4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
20 #include <linux/pci_regs.h> /* The pci register defines */
23 * The PCI interface treats multi-function devices as independent
24 * devices. The slot/function address of each device is encoded
25 * in a single byte as follows:
30 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
31 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
32 #define PCI_FUNC(devfn) ((devfn) & 0x07)
34 /* Ioctls for /proc/bus/pci/X/Y nodes. */
35 #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
36 #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
37 #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
38 #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
39 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
43 #include <linux/mod_devicetable.h>
45 #include <linux/types.h>
46 #include <linux/init.h>
47 #include <linux/ioport.h>
48 #include <linux/list.h>
49 #include <linux/compiler.h>
50 #include <linux/errno.h>
51 #include <linux/kobject.h>
52 #include <asm/atomic.h>
53 #include <linux/device.h>
55 #include <linux/irqreturn.h>
57 /* Include the ID list */
58 #include <linux/pci_ids.h>
60 /* pci_slot represents a physical slot */
62 struct pci_bus *bus; /* The bus this slot is on */
63 struct list_head list; /* node in list of slots on this bus */
64 struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */
65 unsigned char number; /* PCI_SLOT(pci_dev->devfn) */
69 static inline const char *pci_slot_name(const struct pci_slot *slot)
71 return kobject_name(&slot->kobj);
74 /* File state for mmap()s on /proc/bus/pci/X/Y */
80 /* This defines the direction arg to the DMA mapping routines. */
81 #define PCI_DMA_BIDIRECTIONAL 0
82 #define PCI_DMA_TODEVICE 1
83 #define PCI_DMA_FROMDEVICE 2
84 #define PCI_DMA_NONE 3
87 * For PCI devices, the region numbers are assigned this way:
90 /* #0-5: standard PCI resources */
92 PCI_STD_RESOURCE_END = 5,
94 /* #6: expansion ROM resource */
97 /* device specific resources */
100 PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1,
103 /* resources assigned to buses behind the bridge */
104 #define PCI_BRIDGE_RESOURCE_NUM 4
106 PCI_BRIDGE_RESOURCES,
107 PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES +
108 PCI_BRIDGE_RESOURCE_NUM - 1,
110 /* total resources associated with a PCI device */
113 /* preserve this for compatibility */
114 DEVICE_COUNT_RESOURCE
117 typedef int __bitwise pci_power_t;
119 #define PCI_D0 ((pci_power_t __force) 0)
120 #define PCI_D1 ((pci_power_t __force) 1)
121 #define PCI_D2 ((pci_power_t __force) 2)
122 #define PCI_D3hot ((pci_power_t __force) 3)
123 #define PCI_D3cold ((pci_power_t __force) 4)
124 #define PCI_UNKNOWN ((pci_power_t __force) 5)
125 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
127 #define PCI_PM_D2_DELAY 200
128 #define PCI_PM_D3_WAIT 10
129 #define PCI_PM_BUS_WAIT 50
131 /** The pci_channel state describes connectivity between the CPU and
132 * the pci device. If some PCI bus between here and the pci device
133 * has crashed or locked up, this info is reflected here.
135 typedef unsigned int __bitwise pci_channel_state_t;
137 enum pci_channel_state {
138 /* I/O channel is in normal state */
139 pci_channel_io_normal = (__force pci_channel_state_t) 1,
141 /* I/O to channel is blocked */
142 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
144 /* PCI card is dead */
145 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
148 typedef unsigned int __bitwise pcie_reset_state_t;
150 enum pcie_reset_state {
151 /* Reset is NOT asserted (Use to deassert reset) */
152 pcie_deassert_reset = (__force pcie_reset_state_t) 1,
154 /* Use #PERST to reset PCI-E device */
155 pcie_warm_reset = (__force pcie_reset_state_t) 2,
157 /* Use PCI-E Hot Reset to reset device */
158 pcie_hot_reset = (__force pcie_reset_state_t) 3
161 typedef unsigned short __bitwise pci_dev_flags_t;
163 /* INTX_DISABLE in PCI_COMMAND register disables MSI
166 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1,
167 /* Device configuration is irrevocably lost if disabled into D3 */
168 PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) 2,
171 enum pci_irq_reroute_variant {
172 INTEL_IRQ_REROUTE_VARIANT = 1,
173 MAX_IRQ_REROUTE_VARIANTS = 3
176 typedef unsigned short __bitwise pci_bus_flags_t;
178 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
179 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
182 struct pci_cap_saved_state {
183 struct hlist_node next;
188 struct pcie_link_state;
194 * The pci_dev structure is used to describe PCI devices.
197 struct list_head bus_list; /* node in per-bus list */
198 struct pci_bus *bus; /* bus this device is on */
199 struct pci_bus *subordinate; /* bus this device bridges to */
201 void *sysdata; /* hook for sys-specific extension */
202 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
203 struct pci_slot *slot; /* Physical slot this device is in */
205 unsigned int devfn; /* encoded device & function index */
206 unsigned short vendor;
207 unsigned short device;
208 unsigned short subsystem_vendor;
209 unsigned short subsystem_device;
210 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
211 u8 revision; /* PCI revision, low byte of class word */
212 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
213 u8 pcie_type; /* PCI-E device/port type */
214 u8 rom_base_reg; /* which config register controls the ROM */
215 u8 pin; /* which interrupt pin this device uses */
217 struct pci_driver *driver; /* which driver has allocated this device */
218 u64 dma_mask; /* Mask of the bits of bus address this
219 device implements. Normally this is
220 0xffffffff. You only need to change
221 this if your device has broken DMA
222 or supports 64-bit transfers. */
224 struct device_dma_parameters dma_parms;
226 pci_power_t current_state; /* Current operating state. In ACPI-speak,
227 this is D0-D3, D0 being fully functional,
229 int pm_cap; /* PM capability offset in the
230 configuration space */
231 unsigned int pme_support:5; /* Bitmask of states from which PME#
233 unsigned int d1_support:1; /* Low power state D1 is supported */
234 unsigned int d2_support:1; /* Low power state D2 is supported */
235 unsigned int no_d1d2:1; /* Only allow D0 and D3 */
237 #ifdef CONFIG_PCIEASPM
238 struct pcie_link_state *link_state; /* ASPM link state. */
241 pci_channel_state_t error_state; /* current connectivity state */
242 struct device dev; /* Generic device interface */
244 int cfg_size; /* Size of configuration space */
247 * Instead of touching interrupt line and base address registers
248 * directly, use the values stored here. They might be different!
251 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
253 /* These fields are used by common fixups */
254 unsigned int transparent:1; /* Transparent PCI bridge */
255 unsigned int multifunction:1;/* Part of multi-function device */
256 /* keep track of device state */
257 unsigned int is_added:1;
258 unsigned int is_busmaster:1; /* device is busmaster */
259 unsigned int no_msi:1; /* device may not use msi */
260 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
261 unsigned int broken_parity_status:1; /* Device generates false positive parity */
262 unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */
263 unsigned int msi_enabled:1;
264 unsigned int msix_enabled:1;
265 unsigned int ari_enabled:1; /* ARI forwarding */
266 unsigned int is_managed:1;
267 unsigned int is_pcie:1;
268 unsigned int state_saved:1;
269 unsigned int is_physfn:1;
270 unsigned int is_virtfn:1;
271 pci_dev_flags_t dev_flags;
272 atomic_t enable_cnt; /* pci_enable_device has been called */
274 u32 saved_config_space[16]; /* config space saved at suspend time */
275 struct hlist_head saved_cap_space;
276 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
277 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
278 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
279 struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE]; /* sysfs file for WC mapping of resources */
280 #ifdef CONFIG_PCI_MSI
281 struct list_head msi_list;
284 #ifdef CONFIG_PCI_IOV
286 struct pci_sriov *sriov; /* SR-IOV capability related */
287 struct pci_dev *physfn; /* the PF this VF is associated with */
289 struct pci_ats *ats; /* Address Translation Service */
293 extern struct pci_dev *alloc_pci_dev(void);
295 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
296 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
297 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
299 static inline int pci_channel_offline(struct pci_dev *pdev)
301 return (pdev->error_state != pci_channel_io_normal);
304 static inline struct pci_cap_saved_state *pci_find_saved_cap(
305 struct pci_dev *pci_dev, char cap)
307 struct pci_cap_saved_state *tmp;
308 struct hlist_node *pos;
310 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
311 if (tmp->cap_nr == cap)
317 static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
318 struct pci_cap_saved_state *new_cap)
320 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
323 #ifndef PCI_BUS_NUM_RESOURCES
324 #define PCI_BUS_NUM_RESOURCES 16
327 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
330 struct list_head node; /* node in list of buses */
331 struct pci_bus *parent; /* parent bus this bridge is on */
332 struct list_head children; /* list of child buses */
333 struct list_head devices; /* list of devices on this bus */
334 struct pci_dev *self; /* bridge device as seen by parent */
335 struct list_head slots; /* list of slots on this bus */
336 struct resource *resource[PCI_BUS_NUM_RESOURCES];
337 /* address space routed to this bus */
339 struct pci_ops *ops; /* configuration access functions */
340 void *sysdata; /* hook for sys-specific extension */
341 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
343 unsigned char number; /* bus number */
344 unsigned char primary; /* number of primary bridge */
345 unsigned char secondary; /* number of secondary bridge */
346 unsigned char subordinate; /* max number of subordinate buses */
350 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
351 pci_bus_flags_t bus_flags; /* Inherited by child busses */
352 struct device *bridge;
354 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
355 struct bin_attribute *legacy_mem; /* legacy mem */
356 unsigned int is_added:1;
359 #define pci_bus_b(n) list_entry(n, struct pci_bus, node)
360 #define to_pci_bus(n) container_of(n, struct pci_bus, dev)
363 * Returns true if the pci bus is root (behind host-pci bridge),
366 static inline bool pci_is_root_bus(struct pci_bus *pbus)
368 return !(pbus->parent);
371 #ifdef CONFIG_PCI_MSI
372 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev)
374 return pci_dev->msi_enabled || pci_dev->msix_enabled;
377 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; }
381 * Error values that may be returned by PCI functions.
383 #define PCIBIOS_SUCCESSFUL 0x00
384 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
385 #define PCIBIOS_BAD_VENDOR_ID 0x83
386 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
387 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
388 #define PCIBIOS_SET_FAILED 0x88
389 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
391 /* Low-level architecture-dependent routines */
394 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
395 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
399 * ACPI needs to be able to access PCI config space before we've done a
400 * PCI bus scan and created pci_bus structures.
402 extern int raw_pci_read(unsigned int domain, unsigned int bus,
403 unsigned int devfn, int reg, int len, u32 *val);
404 extern int raw_pci_write(unsigned int domain, unsigned int bus,
405 unsigned int devfn, int reg, int len, u32 val);
407 struct pci_bus_region {
408 resource_size_t start;
413 spinlock_t lock; /* protects list, index */
414 struct list_head list; /* for IDs added at runtime */
417 /* ---------------------------------------------------------------- */
418 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
419 * a set of callbacks in struct pci_error_handlers, then that device driver
420 * will be notified of PCI bus errors, and will be driven to recovery
421 * when an error occurs.
424 typedef unsigned int __bitwise pci_ers_result_t;
426 enum pci_ers_result {
427 /* no result/none/not supported in device driver */
428 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
430 /* Device driver can recover without slot reset */
431 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
433 /* Device driver wants slot to be reset. */
434 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
436 /* Device has completely failed, is unrecoverable */
437 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
439 /* Device driver is fully recovered and operational */
440 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
443 /* PCI bus error event callbacks */
444 struct pci_error_handlers {
445 /* PCI bus error detected on this device */
446 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
447 enum pci_channel_state error);
449 /* MMIO has been re-enabled, but not DMA */
450 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
452 /* PCI Express link has been reset */
453 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
455 /* PCI slot has been reset */
456 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
458 /* Device driver may resume normal operations */
459 void (*resume)(struct pci_dev *dev);
462 /* ---------------------------------------------------------------- */
466 struct list_head node;
468 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
469 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
470 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
471 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
472 int (*suspend_late) (struct pci_dev *dev, pm_message_t state);
473 int (*resume_early) (struct pci_dev *dev);
474 int (*resume) (struct pci_dev *dev); /* Device woken up */
475 void (*shutdown) (struct pci_dev *dev);
476 struct pci_error_handlers *err_handler;
477 struct device_driver driver;
478 struct pci_dynids dynids;
481 #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver)
484 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table
485 * @_table: device table name
487 * This macro is used to create a struct pci_device_id array (a device table)
488 * in a generic manner.
490 #define DEFINE_PCI_DEVICE_TABLE(_table) \
491 const struct pci_device_id _table[] __devinitconst
494 * PCI_DEVICE - macro used to describe a specific pci device
495 * @vend: the 16 bit PCI Vendor ID
496 * @dev: the 16 bit PCI Device ID
498 * This macro is used to create a struct pci_device_id that matches a
499 * specific device. The subvendor and subdevice fields will be set to
502 #define PCI_DEVICE(vend,dev) \
503 .vendor = (vend), .device = (dev), \
504 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
507 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
508 * @dev_class: the class, subclass, prog-if triple for this device
509 * @dev_class_mask: the class mask for this device
511 * This macro is used to create a struct pci_device_id that matches a
512 * specific PCI class. The vendor, device, subvendor, and subdevice
513 * fields will be set to PCI_ANY_ID.
515 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
516 .class = (dev_class), .class_mask = (dev_class_mask), \
517 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
518 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
521 * PCI_VDEVICE - macro used to describe a specific pci device in short form
522 * @vendor: the vendor name
523 * @device: the 16 bit PCI Device ID
525 * This macro is used to create a struct pci_device_id that matches a
526 * specific PCI device. The subvendor, and subdevice fields will be set
527 * to PCI_ANY_ID. The macro allows the next field to follow as the device
531 #define PCI_VDEVICE(vendor, device) \
532 PCI_VENDOR_ID_##vendor, (device), \
533 PCI_ANY_ID, PCI_ANY_ID, 0, 0
535 /* these external functions are only available when PCI support is enabled */
538 extern struct bus_type pci_bus_type;
540 /* Do NOT directly access these two variables, unless you are arch specific pci
541 * code, or pci core code. */
542 extern struct list_head pci_root_buses; /* list of all known PCI buses */
543 /* Some device drivers need know if pci is initiated */
544 extern int no_pci_devices(void);
546 void pcibios_fixup_bus(struct pci_bus *);
547 int __must_check pcibios_enable_device(struct pci_dev *, int mask);
548 char *pcibios_setup(char *str);
550 /* Used only when drivers/pci/setup.c is used */
551 void pcibios_align_resource(void *, struct resource *, resource_size_t,
553 void pcibios_update_irq(struct pci_dev *, int irq);
555 /* Generic PCI functions used internally */
557 extern struct pci_bus *pci_find_bus(int domain, int busnr);
558 void pci_bus_add_devices(const struct pci_bus *bus);
559 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus,
560 struct pci_ops *ops, void *sysdata);
561 static inline struct pci_bus * __devinit pci_scan_bus(int bus, struct pci_ops *ops,
564 struct pci_bus *root_bus;
565 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
567 pci_bus_add_devices(root_bus);
570 struct pci_bus *pci_create_bus(struct device *parent, int bus,
571 struct pci_ops *ops, void *sysdata);
572 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
574 struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr,
576 struct hotplug_slot *hotplug);
577 void pci_destroy_slot(struct pci_slot *slot);
578 void pci_renumber_slot(struct pci_slot *slot, int slot_nr);
579 int pci_scan_slot(struct pci_bus *bus, int devfn);
580 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
581 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
582 unsigned int pci_scan_child_bus(struct pci_bus *bus);
583 int __must_check pci_bus_add_device(struct pci_dev *dev);
584 void pci_read_bridge_bases(struct pci_bus *child);
585 struct resource *pci_find_parent_resource(const struct pci_dev *dev,
586 struct resource *res);
587 u8 pci_swizzle_interrupt_pin(struct pci_dev *dev, u8 pin);
588 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
589 u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp);
590 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
591 extern void pci_dev_put(struct pci_dev *dev);
592 extern void pci_remove_bus(struct pci_bus *b);
593 extern void pci_remove_bus_device(struct pci_dev *dev);
594 extern void pci_stop_bus_device(struct pci_dev *dev);
595 void pci_setup_cardbus(struct pci_bus *bus);
596 extern void pci_sort_breadthfirst(void);
598 /* Generic PCI functions exported to card drivers */
600 #ifdef CONFIG_PCI_LEGACY
601 struct pci_dev __deprecated *pci_find_device(unsigned int vendor,
603 struct pci_dev *from);
604 struct pci_dev __deprecated *pci_find_slot(unsigned int bus,
606 #endif /* CONFIG_PCI_LEGACY */
608 enum pci_lost_interrupt_reason {
609 PCI_LOST_IRQ_NO_INFORMATION = 0,
610 PCI_LOST_IRQ_DISABLE_MSI,
611 PCI_LOST_IRQ_DISABLE_MSIX,
612 PCI_LOST_IRQ_DISABLE_ACPI,
614 enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev);
615 int pci_find_capability(struct pci_dev *dev, int cap);
616 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
617 int pci_find_ext_capability(struct pci_dev *dev, int cap);
618 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
619 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
620 struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
622 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
623 struct pci_dev *from);
624 struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
625 unsigned int ss_vendor, unsigned int ss_device,
626 struct pci_dev *from);
627 struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
628 struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn);
629 struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
630 int pci_dev_present(const struct pci_device_id *ids);
632 int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
634 int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn,
635 int where, u16 *val);
636 int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn,
637 int where, u32 *val);
638 int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn,
640 int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
642 int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
645 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
647 return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
649 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
651 return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
653 static inline int pci_read_config_dword(struct pci_dev *dev, int where,
656 return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
658 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
660 return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val);
662 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
664 return pci_bus_write_config_word(dev->bus, dev->devfn, where, val);
666 static inline int pci_write_config_dword(struct pci_dev *dev, int where,
669 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
672 int __must_check pci_enable_device(struct pci_dev *dev);
673 int __must_check pci_enable_device_io(struct pci_dev *dev);
674 int __must_check pci_enable_device_mem(struct pci_dev *dev);
675 int __must_check pci_reenable_device(struct pci_dev *);
676 int __must_check pcim_enable_device(struct pci_dev *pdev);
677 void pcim_pin_device(struct pci_dev *pdev);
679 static inline int pci_is_enabled(struct pci_dev *pdev)
681 return (atomic_read(&pdev->enable_cnt) > 0);
684 static inline int pci_is_managed(struct pci_dev *pdev)
686 return pdev->is_managed;
689 void pci_disable_device(struct pci_dev *dev);
690 void pci_set_master(struct pci_dev *dev);
691 void pci_clear_master(struct pci_dev *dev);
692 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
693 #define HAVE_PCI_SET_MWI
694 int __must_check pci_set_mwi(struct pci_dev *dev);
695 int pci_try_set_mwi(struct pci_dev *dev);
696 void pci_clear_mwi(struct pci_dev *dev);
697 void pci_intx(struct pci_dev *dev, int enable);
698 void pci_msi_off(struct pci_dev *dev);
699 int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
700 int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
701 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
702 int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
703 int pcix_get_max_mmrbc(struct pci_dev *dev);
704 int pcix_get_mmrbc(struct pci_dev *dev);
705 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
706 int pcie_get_readrq(struct pci_dev *dev);
707 int pcie_set_readrq(struct pci_dev *dev, int rq);
708 int pci_reset_function(struct pci_dev *dev);
709 int pci_execute_reset_function(struct pci_dev *dev);
710 void pci_update_resource(struct pci_dev *dev, int resno);
711 int __must_check pci_assign_resource(struct pci_dev *dev, int i);
712 int pci_select_bars(struct pci_dev *dev, unsigned long flags);
714 /* ROM control related routines */
715 int pci_enable_rom(struct pci_dev *pdev);
716 void pci_disable_rom(struct pci_dev *pdev);
717 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
718 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
719 size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size);
721 /* Power management related routines */
722 int pci_save_state(struct pci_dev *dev);
723 int pci_restore_state(struct pci_dev *dev);
724 int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state);
725 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
726 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
727 bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
728 void pci_pme_active(struct pci_dev *dev, bool enable);
729 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
730 int pci_wake_from_d3(struct pci_dev *dev, bool enable);
731 pci_power_t pci_target_state(struct pci_dev *dev);
732 int pci_prepare_to_sleep(struct pci_dev *dev);
733 int pci_back_from_sleep(struct pci_dev *dev);
735 /* Functions for PCI Hotplug drivers to use */
736 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
737 #ifdef CONFIG_HOTPLUG
738 unsigned int pci_rescan_bus(struct pci_bus *bus);
741 /* Vital product data routines */
742 ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
743 ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
744 int pci_vpd_truncate(struct pci_dev *dev, size_t size);
746 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
747 void pci_bus_assign_resources(const struct pci_bus *bus);
748 void pci_bus_size_bridges(struct pci_bus *bus);
749 int pci_claim_resource(struct pci_dev *, int);
750 void pci_assign_unassigned_resources(void);
751 void pdev_enable_device(struct pci_dev *);
752 void pdev_sort_resources(struct pci_dev *, struct resource_list *);
753 int pci_enable_resources(struct pci_dev *, int mask);
754 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
755 int (*)(struct pci_dev *, u8, u8));
756 #define HAVE_PCI_REQ_REGIONS 2
757 int __must_check pci_request_regions(struct pci_dev *, const char *);
758 int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *);
759 void pci_release_regions(struct pci_dev *);
760 int __must_check pci_request_region(struct pci_dev *, int, const char *);
761 int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *);
762 void pci_release_region(struct pci_dev *, int);
763 int pci_request_selected_regions(struct pci_dev *, int, const char *);
764 int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *);
765 void pci_release_selected_regions(struct pci_dev *, int);
767 /* drivers/pci/bus.c */
768 int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
769 struct resource *res, resource_size_t size,
770 resource_size_t align, resource_size_t min,
771 unsigned int type_mask,
772 void (*alignf)(void *, struct resource *,
773 resource_size_t, resource_size_t),
775 void pci_enable_bridges(struct pci_bus *bus);
777 /* Proper probing supporting hot-pluggable devices */
778 int __must_check __pci_register_driver(struct pci_driver *, struct module *,
779 const char *mod_name);
782 * pci_register_driver must be a macro so that KBUILD_MODNAME can be expanded
784 #define pci_register_driver(driver) \
785 __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME)
787 void pci_unregister_driver(struct pci_driver *dev);
788 void pci_remove_behind_bridge(struct pci_dev *dev);
789 struct pci_driver *pci_dev_driver(const struct pci_dev *dev);
790 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
791 struct pci_dev *dev);
792 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
795 void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
797 int pci_cfg_space_size_ext(struct pci_dev *dev);
798 int pci_cfg_space_size(struct pci_dev *dev);
799 unsigned char pci_bus_max_busnr(struct pci_bus *bus);
801 /* kmem_cache style wrapper around pci_alloc_consistent() */
803 #include <linux/dmapool.h>
805 #define pci_pool dma_pool
806 #define pci_pool_create(name, pdev, size, align, allocation) \
807 dma_pool_create(name, &pdev->dev, size, align, allocation)
808 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
809 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
810 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
812 enum pci_dma_burst_strategy {
813 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
814 strategy_parameter is N/A */
815 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
817 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
818 strategy_parameter byte boundaries */
822 u32 vector; /* kernel uses to write allocated vector */
823 u16 entry; /* driver uses to specify entry, OS writes */
827 #ifndef CONFIG_PCI_MSI
828 static inline int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec)
833 static inline void pci_msi_shutdown(struct pci_dev *dev)
835 static inline void pci_disable_msi(struct pci_dev *dev)
838 static inline int pci_msix_table_size(struct pci_dev *dev)
842 static inline int pci_enable_msix(struct pci_dev *dev,
843 struct msix_entry *entries, int nvec)
848 static inline void pci_msix_shutdown(struct pci_dev *dev)
850 static inline void pci_disable_msix(struct pci_dev *dev)
853 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev)
856 static inline void pci_restore_msi_state(struct pci_dev *dev)
858 static inline int pci_msi_enabled(void)
863 extern int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec);
864 extern void pci_msi_shutdown(struct pci_dev *dev);
865 extern void pci_disable_msi(struct pci_dev *dev);
866 extern int pci_msix_table_size(struct pci_dev *dev);
867 extern int pci_enable_msix(struct pci_dev *dev,
868 struct msix_entry *entries, int nvec);
869 extern void pci_msix_shutdown(struct pci_dev *dev);
870 extern void pci_disable_msix(struct pci_dev *dev);
871 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
872 extern void pci_restore_msi_state(struct pci_dev *dev);
873 extern int pci_msi_enabled(void);
876 #ifndef CONFIG_PCIEASPM
877 static inline int pcie_aspm_enabled(void)
882 extern int pcie_aspm_enabled(void);
885 #define pci_enable_msi(pdev) pci_enable_msi_block(pdev, 1)
888 /* The functions a driver should call */
889 int ht_create_irq(struct pci_dev *dev, int idx);
890 void ht_destroy_irq(unsigned int irq);
891 #endif /* CONFIG_HT_IRQ */
893 extern void pci_block_user_cfg_access(struct pci_dev *dev);
894 extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
897 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
898 * a PCI domain is defined to be a set of PCI busses which share
899 * configuration space.
901 #ifdef CONFIG_PCI_DOMAINS
902 extern int pci_domains_supported;
904 enum { pci_domains_supported = 0 };
905 static inline int pci_domain_nr(struct pci_bus *bus)
910 static inline int pci_proc_domain(struct pci_bus *bus)
914 #endif /* CONFIG_PCI_DOMAINS */
916 #else /* CONFIG_PCI is not enabled */
919 * If the system does not have PCI, clearly these return errors. Define
920 * these as simple inline functions to avoid hair in drivers.
923 #define _PCI_NOP(o, s, t) \
924 static inline int pci_##o##_config_##s(struct pci_dev *dev, \
926 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
928 #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \
929 _PCI_NOP(o, word, u16 x) \
930 _PCI_NOP(o, dword, u32 x)
931 _PCI_NOP_ALL(read, *)
934 static inline struct pci_dev *pci_find_device(unsigned int vendor,
936 struct pci_dev *from)
941 static inline struct pci_dev *pci_find_slot(unsigned int bus,
947 static inline struct pci_dev *pci_get_device(unsigned int vendor,
949 struct pci_dev *from)
954 static inline struct pci_dev *pci_get_subsys(unsigned int vendor,
956 unsigned int ss_vendor,
957 unsigned int ss_device,
958 struct pci_dev *from)
963 static inline struct pci_dev *pci_get_class(unsigned int class,
964 struct pci_dev *from)
969 #define pci_dev_present(ids) (0)
970 #define no_pci_devices() (1)
971 #define pci_dev_put(dev) do { } while (0)
973 static inline void pci_set_master(struct pci_dev *dev)
976 static inline int pci_enable_device(struct pci_dev *dev)
981 static inline void pci_disable_device(struct pci_dev *dev)
984 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
989 static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
994 static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
1000 static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
1006 static inline int pci_assign_resource(struct pci_dev *dev, int i)
1011 static inline int __pci_register_driver(struct pci_driver *drv,
1012 struct module *owner)
1017 static inline int pci_register_driver(struct pci_driver *drv)
1022 static inline void pci_unregister_driver(struct pci_driver *drv)
1025 static inline int pci_find_capability(struct pci_dev *dev, int cap)
1030 static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
1036 static inline int pci_find_ext_capability(struct pci_dev *dev, int cap)
1041 /* Power management related routines */
1042 static inline int pci_save_state(struct pci_dev *dev)
1047 static inline int pci_restore_state(struct pci_dev *dev)
1052 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
1057 static inline pci_power_t pci_choose_state(struct pci_dev *dev,
1063 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
1069 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
1074 static inline void pci_release_regions(struct pci_dev *dev)
1077 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
1079 static inline void pci_block_user_cfg_access(struct pci_dev *dev)
1082 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev)
1085 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
1088 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
1092 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
1096 #endif /* CONFIG_PCI */
1098 /* Include architecture-dependent settings and functions */
1100 #include <asm/pci.h>
1102 /* these helpers provide future and backwards compatibility
1103 * for accessing popular PCI BAR info */
1104 #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)
1105 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
1106 #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags)
1107 #define pci_resource_len(dev,bar) \
1108 ((pci_resource_start((dev), (bar)) == 0 && \
1109 pci_resource_end((dev), (bar)) == \
1110 pci_resource_start((dev), (bar))) ? 0 : \
1112 (pci_resource_end((dev), (bar)) - \
1113 pci_resource_start((dev), (bar)) + 1))
1115 /* Similar to the helpers above, these manipulate per-pci_dev
1116 * driver-specific data. They are really just a wrapper around
1117 * the generic device structure functions of these calls.
1119 static inline void *pci_get_drvdata(struct pci_dev *pdev)
1121 return dev_get_drvdata(&pdev->dev);
1124 static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
1126 dev_set_drvdata(&pdev->dev, data);
1129 /* If you want to know what to call your pci_dev, ask this function.
1130 * Again, it's a wrapper around the generic device.
1132 static inline const char *pci_name(struct pci_dev *pdev)
1134 return dev_name(&pdev->dev);
1138 /* Some archs don't want to expose struct resource to userland as-is
1139 * in sysfs and /proc
1141 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
1142 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
1143 const struct resource *rsrc, resource_size_t *start,
1144 resource_size_t *end)
1146 *start = rsrc->start;
1149 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
1153 * The world is not perfect and supplies us with broken PCI devices.
1154 * For at least a part of these bugs we need a work-around, so both
1155 * generic (drivers/pci/quirks.c) and per-architecture code can define
1156 * fixup hooks to be called for particular buggy devices.
1160 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
1161 void (*hook)(struct pci_dev *dev);
1164 enum pci_fixup_pass {
1165 pci_fixup_early, /* Before probing BARs */
1166 pci_fixup_header, /* After reading configuration header */
1167 pci_fixup_final, /* Final phase of device fixups */
1168 pci_fixup_enable, /* pci_enable_device() time */
1169 pci_fixup_resume, /* pci_device_resume() */
1170 pci_fixup_suspend, /* pci_device_suspend */
1171 pci_fixup_resume_early, /* pci_device_resume_early() */
1174 /* Anonymous variables would be nice... */
1175 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
1176 static const struct pci_fixup __pci_fixup_##name __used \
1177 __attribute__((__section__(#section))) = { vendor, device, hook };
1178 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
1179 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1180 vendor##device##hook, vendor, device, hook)
1181 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
1182 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1183 vendor##device##hook, vendor, device, hook)
1184 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
1185 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1186 vendor##device##hook, vendor, device, hook)
1187 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
1188 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1189 vendor##device##hook, vendor, device, hook)
1190 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
1191 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1192 resume##vendor##device##hook, vendor, device, hook)
1193 #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \
1194 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \
1195 resume_early##vendor##device##hook, vendor, device, hook)
1196 #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \
1197 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \
1198 suspend##vendor##device##hook, vendor, device, hook)
1201 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
1203 void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
1204 void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
1205 void __iomem * const *pcim_iomap_table(struct pci_dev *pdev);
1206 int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name);
1207 int pcim_iomap_regions_request_all(struct pci_dev *pdev, u16 mask,
1209 void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask);
1211 extern int pci_pci_problems;
1212 #define PCIPCI_FAIL 1 /* No PCI PCI DMA */
1213 #define PCIPCI_TRITON 2
1214 #define PCIPCI_NATOMA 4
1215 #define PCIPCI_VIAETBF 8
1216 #define PCIPCI_VSFX 16
1217 #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */
1218 #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */
1220 extern unsigned long pci_cardbus_io_size;
1221 extern unsigned long pci_cardbus_mem_size;
1223 int pcibios_add_platform_entries(struct pci_dev *dev);
1224 void pcibios_disable_device(struct pci_dev *dev);
1225 int pcibios_set_pcie_reset_state(struct pci_dev *dev,
1226 enum pcie_reset_state state);
1228 #ifdef CONFIG_PCI_MMCONFIG
1229 extern void __init pci_mmcfg_early_init(void);
1230 extern void __init pci_mmcfg_late_init(void);
1232 static inline void pci_mmcfg_early_init(void) { }
1233 static inline void pci_mmcfg_late_init(void) { }
1236 int pci_ext_cfg_avail(struct pci_dev *dev);
1238 void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar);
1240 #ifdef CONFIG_PCI_IOV
1241 extern int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn);
1242 extern void pci_disable_sriov(struct pci_dev *dev);
1243 extern irqreturn_t pci_sriov_migration(struct pci_dev *dev);
1245 static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
1249 static inline void pci_disable_sriov(struct pci_dev *dev)
1252 static inline irqreturn_t pci_sriov_migration(struct pci_dev *dev)
1258 #endif /* __KERNEL__ */
1259 #endif /* LINUX_PCI_H */