4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
20 /* Include the pci register defines */
21 #include <linux/pci_regs.h>
24 * The PCI interface treats multi-function devices as independent
25 * devices. The slot/function address of each device is encoded
26 * in a single byte as follows:
31 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
32 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
33 #define PCI_FUNC(devfn) ((devfn) & 0x07)
35 /* Ioctls for /proc/bus/pci/X/Y nodes. */
36 #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
37 #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
38 #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
39 #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
40 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
44 #include <linux/mod_devicetable.h>
46 #include <linux/types.h>
47 #include <linux/ioport.h>
48 #include <linux/list.h>
49 #include <linux/compiler.h>
50 #include <linux/errno.h>
51 #include <asm/atomic.h>
52 #include <linux/device.h>
54 /* Include the ID list */
55 #include <linux/pci_ids.h>
57 /* File state for mmap()s on /proc/bus/pci/X/Y */
63 /* This defines the direction arg to the DMA mapping routines. */
64 #define PCI_DMA_BIDIRECTIONAL 0
65 #define PCI_DMA_TODEVICE 1
66 #define PCI_DMA_FROMDEVICE 2
67 #define PCI_DMA_NONE 3
69 #define DEVICE_COUNT_RESOURCE 12
71 typedef int __bitwise pci_power_t;
73 #define PCI_D0 ((pci_power_t __force) 0)
74 #define PCI_D1 ((pci_power_t __force) 1)
75 #define PCI_D2 ((pci_power_t __force) 2)
76 #define PCI_D3hot ((pci_power_t __force) 3)
77 #define PCI_D3cold ((pci_power_t __force) 4)
78 #define PCI_UNKNOWN ((pci_power_t __force) 5)
79 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
81 /** The pci_channel state describes connectivity between the CPU and
82 * the pci device. If some PCI bus between here and the pci device
83 * has crashed or locked up, this info is reflected here.
85 typedef unsigned int __bitwise pci_channel_state_t;
87 enum pci_channel_state {
88 /* I/O channel is in normal state */
89 pci_channel_io_normal = (__force pci_channel_state_t) 1,
91 /* I/O to channel is blocked */
92 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
94 /* PCI card is dead */
95 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
98 typedef unsigned int __bitwise pcie_reset_state_t;
100 enum pcie_reset_state {
101 /* Reset is NOT asserted (Use to deassert reset) */
102 pcie_deassert_reset = (__force pcie_reset_state_t) 1,
104 /* Use #PERST to reset PCI-E device */
105 pcie_warm_reset = (__force pcie_reset_state_t) 2,
107 /* Use PCI-E Hot Reset to reset device */
108 pcie_hot_reset = (__force pcie_reset_state_t) 3
111 typedef unsigned short __bitwise pci_dev_flags_t;
113 /* INTX_DISABLE in PCI_COMMAND register disables MSI
116 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1,
119 typedef unsigned short __bitwise pci_bus_flags_t;
121 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
122 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
125 struct pci_cap_saved_state {
126 struct hlist_node next;
132 * The pci_dev structure is used to describe PCI devices.
135 struct list_head bus_list; /* node in per-bus list */
136 struct pci_bus *bus; /* bus this device is on */
137 struct pci_bus *subordinate; /* bus this device bridges to */
139 void *sysdata; /* hook for sys-specific extension */
140 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
142 unsigned int devfn; /* encoded device & function index */
143 unsigned short vendor;
144 unsigned short device;
145 unsigned short subsystem_vendor;
146 unsigned short subsystem_device;
147 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
148 u8 revision; /* PCI revision, low byte of class word */
149 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
150 u8 pcie_type; /* PCI-E device/port type */
151 u8 rom_base_reg; /* which config register controls the ROM */
152 u8 pin; /* which interrupt pin this device uses */
154 struct pci_driver *driver; /* which driver has allocated this device */
155 u64 dma_mask; /* Mask of the bits of bus address this
156 device implements. Normally this is
157 0xffffffff. You only need to change
158 this if your device has broken DMA
159 or supports 64-bit transfers. */
161 struct device_dma_parameters dma_parms;
163 pci_power_t current_state; /* Current operating state. In ACPI-speak,
164 this is D0-D3, D0 being fully functional,
167 pci_channel_state_t error_state; /* current connectivity state */
168 struct device dev; /* Generic device interface */
170 int cfg_size; /* Size of configuration space */
173 * Instead of touching interrupt line and base address registers
174 * directly, use the values stored here. They might be different!
177 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
179 /* These fields are used by common fixups */
180 unsigned int transparent:1; /* Transparent PCI bridge */
181 unsigned int multifunction:1;/* Part of multi-function device */
182 /* keep track of device state */
183 unsigned int is_added:1;
184 unsigned int is_busmaster:1; /* device is busmaster */
185 unsigned int no_msi:1; /* device may not use msi */
186 unsigned int no_d1d2:1; /* only allow d0 or d3 */
187 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
188 unsigned int broken_parity_status:1; /* Device generates false positive parity */
189 unsigned int msi_enabled:1;
190 unsigned int msix_enabled:1;
191 unsigned int is_managed:1;
192 unsigned int is_pcie:1;
193 pci_dev_flags_t dev_flags;
194 atomic_t enable_cnt; /* pci_enable_device has been called */
196 u32 saved_config_space[16]; /* config space saved at suspend time */
197 struct hlist_head saved_cap_space;
198 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
199 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
200 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
201 #ifdef CONFIG_PCI_MSI
202 struct list_head msi_list;
206 extern struct pci_dev *alloc_pci_dev(void);
208 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
209 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
210 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
212 static inline int pci_channel_offline(struct pci_dev *pdev)
214 return (pdev->error_state != pci_channel_io_normal);
217 static inline struct pci_cap_saved_state *pci_find_saved_cap(
218 struct pci_dev *pci_dev, char cap)
220 struct pci_cap_saved_state *tmp;
221 struct hlist_node *pos;
223 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
224 if (tmp->cap_nr == cap)
230 static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
231 struct pci_cap_saved_state *new_cap)
233 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
237 * For PCI devices, the region numbers are assigned this way:
239 * 0-5 standard PCI regions
241 * 7-10 bridges: address space assigned to buses behind the bridge
244 #define PCI_ROM_RESOURCE 6
245 #define PCI_BRIDGE_RESOURCES 7
246 #define PCI_NUM_RESOURCES 11
248 #ifndef PCI_BUS_NUM_RESOURCES
249 #define PCI_BUS_NUM_RESOURCES 8
252 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
255 struct list_head node; /* node in list of buses */
256 struct pci_bus *parent; /* parent bus this bridge is on */
257 struct list_head children; /* list of child buses */
258 struct list_head devices; /* list of devices on this bus */
259 struct pci_dev *self; /* bridge device as seen by parent */
260 struct resource *resource[PCI_BUS_NUM_RESOURCES];
261 /* address space routed to this bus */
263 struct pci_ops *ops; /* configuration access functions */
264 void *sysdata; /* hook for sys-specific extension */
265 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
267 unsigned char number; /* bus number */
268 unsigned char primary; /* number of primary bridge */
269 unsigned char secondary; /* number of secondary bridge */
270 unsigned char subordinate; /* max number of subordinate buses */
274 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
275 pci_bus_flags_t bus_flags; /* Inherited by child busses */
276 struct device *bridge;
278 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
279 struct bin_attribute *legacy_mem; /* legacy mem */
280 unsigned int is_added:1;
283 #define pci_bus_b(n) list_entry(n, struct pci_bus, node)
284 #define to_pci_bus(n) container_of(n, struct pci_bus, dev)
287 * Error values that may be returned by PCI functions.
289 #define PCIBIOS_SUCCESSFUL 0x00
290 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
291 #define PCIBIOS_BAD_VENDOR_ID 0x83
292 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
293 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
294 #define PCIBIOS_SET_FAILED 0x88
295 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
297 /* Low-level architecture-dependent routines */
300 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
301 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
305 * ACPI needs to be able to access PCI config space before we've done a
306 * PCI bus scan and created pci_bus structures.
308 extern int raw_pci_read(unsigned int domain, unsigned int bus,
309 unsigned int devfn, int reg, int len, u32 *val);
310 extern int raw_pci_write(unsigned int domain, unsigned int bus,
311 unsigned int devfn, int reg, int len, u32 val);
313 struct pci_bus_region {
314 resource_size_t start;
319 spinlock_t lock; /* protects list, index */
320 struct list_head list; /* for IDs added at runtime */
321 unsigned int use_driver_data:1; /* pci_driver->driver_data is used */
324 /* ---------------------------------------------------------------- */
325 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
326 * a set of callbacks in struct pci_error_handlers, then that device driver
327 * will be notified of PCI bus errors, and will be driven to recovery
328 * when an error occurs.
331 typedef unsigned int __bitwise pci_ers_result_t;
333 enum pci_ers_result {
334 /* no result/none/not supported in device driver */
335 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
337 /* Device driver can recover without slot reset */
338 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
340 /* Device driver wants slot to be reset. */
341 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
343 /* Device has completely failed, is unrecoverable */
344 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
346 /* Device driver is fully recovered and operational */
347 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
350 /* PCI bus error event callbacks */
351 struct pci_error_handlers {
352 /* PCI bus error detected on this device */
353 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
354 enum pci_channel_state error);
356 /* MMIO has been re-enabled, but not DMA */
357 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
359 /* PCI Express link has been reset */
360 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
362 /* PCI slot has been reset */
363 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
365 /* Device driver may resume normal operations */
366 void (*resume)(struct pci_dev *dev);
369 /* ---------------------------------------------------------------- */
373 struct list_head node;
375 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
376 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
377 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
378 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
379 int (*suspend_late) (struct pci_dev *dev, pm_message_t state);
380 int (*resume_early) (struct pci_dev *dev);
381 int (*resume) (struct pci_dev *dev); /* Device woken up */
382 void (*shutdown) (struct pci_dev *dev);
384 struct pci_error_handlers *err_handler;
385 struct device_driver driver;
386 struct pci_dynids dynids;
389 #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver)
392 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table
393 * @_table: device table name
395 * This macro is used to create a struct pci_device_id array (a device table)
396 * in a generic manner.
398 #define DEFINE_PCI_DEVICE_TABLE(_table) \
399 const struct pci_device_id _table[] __devinitconst
402 * PCI_DEVICE - macro used to describe a specific pci device
403 * @vend: the 16 bit PCI Vendor ID
404 * @dev: the 16 bit PCI Device ID
406 * This macro is used to create a struct pci_device_id that matches a
407 * specific device. The subvendor and subdevice fields will be set to
410 #define PCI_DEVICE(vend,dev) \
411 .vendor = (vend), .device = (dev), \
412 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
415 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
416 * @dev_class: the class, subclass, prog-if triple for this device
417 * @dev_class_mask: the class mask for this device
419 * This macro is used to create a struct pci_device_id that matches a
420 * specific PCI class. The vendor, device, subvendor, and subdevice
421 * fields will be set to PCI_ANY_ID.
423 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
424 .class = (dev_class), .class_mask = (dev_class_mask), \
425 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
426 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
429 * PCI_VDEVICE - macro used to describe a specific pci device in short form
430 * @vend: the vendor name
431 * @dev: the 16 bit PCI Device ID
433 * This macro is used to create a struct pci_device_id that matches a
434 * specific PCI device. The subvendor, and subdevice fields will be set
435 * to PCI_ANY_ID. The macro allows the next field to follow as the device
439 #define PCI_VDEVICE(vendor, device) \
440 PCI_VENDOR_ID_##vendor, (device), \
441 PCI_ANY_ID, PCI_ANY_ID, 0, 0
443 /* these external functions are only available when PCI support is enabled */
446 extern struct bus_type pci_bus_type;
448 /* Do NOT directly access these two variables, unless you are arch specific pci
449 * code, or pci core code. */
450 extern struct list_head pci_root_buses; /* list of all known PCI buses */
451 /* Some device drivers need know if pci is initiated */
452 extern int no_pci_devices(void);
454 void pcibios_fixup_bus(struct pci_bus *);
455 int __must_check pcibios_enable_device(struct pci_dev *, int mask);
456 char *pcibios_setup(char *str);
458 /* Used only when drivers/pci/setup.c is used */
459 void pcibios_align_resource(void *, struct resource *, resource_size_t,
461 void pcibios_update_irq(struct pci_dev *, int irq);
463 /* Generic PCI functions used internally */
465 extern struct pci_bus *pci_find_bus(int domain, int busnr);
466 void pci_bus_add_devices(struct pci_bus *bus);
467 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus,
468 struct pci_ops *ops, void *sysdata);
469 static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops,
472 struct pci_bus *root_bus;
473 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
475 pci_bus_add_devices(root_bus);
478 struct pci_bus *pci_create_bus(struct device *parent, int bus,
479 struct pci_ops *ops, void *sysdata);
480 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
482 int pci_scan_slot(struct pci_bus *bus, int devfn);
483 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
484 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
485 unsigned int pci_scan_child_bus(struct pci_bus *bus);
486 int __must_check pci_bus_add_device(struct pci_dev *dev);
487 void pci_read_bridge_bases(struct pci_bus *child);
488 struct resource *pci_find_parent_resource(const struct pci_dev *dev,
489 struct resource *res);
490 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
491 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
492 extern void pci_dev_put(struct pci_dev *dev);
493 extern void pci_remove_bus(struct pci_bus *b);
494 extern void pci_remove_bus_device(struct pci_dev *dev);
495 extern void pci_stop_bus_device(struct pci_dev *dev);
496 void pci_setup_cardbus(struct pci_bus *bus);
497 extern void pci_sort_breadthfirst(void);
499 /* Generic PCI functions exported to card drivers */
501 #ifdef CONFIG_PCI_LEGACY
502 struct pci_dev __deprecated *pci_find_device(unsigned int vendor,
504 const struct pci_dev *from);
505 struct pci_dev __deprecated *pci_find_slot(unsigned int bus,
507 #endif /* CONFIG_PCI_LEGACY */
509 int pci_find_capability(struct pci_dev *dev, int cap);
510 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
511 int pci_find_ext_capability(struct pci_dev *dev, int cap);
512 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
513 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
514 struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
516 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
517 struct pci_dev *from);
518 struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
519 unsigned int ss_vendor, unsigned int ss_device,
520 const struct pci_dev *from);
521 struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
522 struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn);
523 struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
524 int pci_dev_present(const struct pci_device_id *ids);
526 int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
528 int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn,
529 int where, u16 *val);
530 int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn,
531 int where, u32 *val);
532 int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn,
534 int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
536 int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
539 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
541 return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
543 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
545 return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
547 static inline int pci_read_config_dword(struct pci_dev *dev, int where,
550 return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
552 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
554 return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val);
556 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
558 return pci_bus_write_config_word(dev->bus, dev->devfn, where, val);
560 static inline int pci_write_config_dword(struct pci_dev *dev, int where,
563 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
566 int __must_check pci_enable_device(struct pci_dev *dev);
567 int __must_check pci_enable_device_io(struct pci_dev *dev);
568 int __must_check pci_enable_device_mem(struct pci_dev *dev);
569 int __must_check pci_reenable_device(struct pci_dev *);
570 int __must_check pcim_enable_device(struct pci_dev *pdev);
571 void pcim_pin_device(struct pci_dev *pdev);
573 static inline int pci_is_managed(struct pci_dev *pdev)
575 return pdev->is_managed;
578 void pci_disable_device(struct pci_dev *dev);
579 void pci_set_master(struct pci_dev *dev);
580 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
581 #define HAVE_PCI_SET_MWI
582 int __must_check pci_set_mwi(struct pci_dev *dev);
583 int pci_try_set_mwi(struct pci_dev *dev);
584 void pci_clear_mwi(struct pci_dev *dev);
585 void pci_intx(struct pci_dev *dev, int enable);
586 void pci_msi_off(struct pci_dev *dev);
587 int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
588 int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
589 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
590 int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
591 int pcix_get_max_mmrbc(struct pci_dev *dev);
592 int pcix_get_mmrbc(struct pci_dev *dev);
593 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
594 int pcie_get_readrq(struct pci_dev *dev);
595 int pcie_set_readrq(struct pci_dev *dev, int rq);
596 void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
597 int __must_check pci_assign_resource(struct pci_dev *dev, int i);
598 int pci_select_bars(struct pci_dev *dev, unsigned long flags);
600 /* ROM control related routines */
601 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
602 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
603 size_t pci_get_rom_size(void __iomem *rom, size_t size);
605 /* Power management related routines */
606 int pci_save_state(struct pci_dev *dev);
607 int pci_restore_state(struct pci_dev *dev);
608 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
609 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
610 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
612 /* Functions for PCI Hotplug drivers to use */
613 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
615 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
616 void pci_bus_assign_resources(struct pci_bus *bus);
617 void pci_bus_size_bridges(struct pci_bus *bus);
618 int pci_claim_resource(struct pci_dev *, int);
619 void pci_assign_unassigned_resources(void);
620 void pdev_enable_device(struct pci_dev *);
621 void pdev_sort_resources(struct pci_dev *, struct resource_list *);
622 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
623 int (*)(struct pci_dev *, u8, u8));
624 #define HAVE_PCI_REQ_REGIONS 2
625 int __must_check pci_request_regions(struct pci_dev *, const char *);
626 void pci_release_regions(struct pci_dev *);
627 int __must_check pci_request_region(struct pci_dev *, int, const char *);
628 void pci_release_region(struct pci_dev *, int);
629 int pci_request_selected_regions(struct pci_dev *, int, const char *);
630 void pci_release_selected_regions(struct pci_dev *, int);
632 /* drivers/pci/bus.c */
633 int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
634 struct resource *res, resource_size_t size,
635 resource_size_t align, resource_size_t min,
636 unsigned int type_mask,
637 void (*alignf)(void *, struct resource *,
638 resource_size_t, resource_size_t),
640 void pci_enable_bridges(struct pci_bus *bus);
642 /* Proper probing supporting hot-pluggable devices */
643 int __must_check __pci_register_driver(struct pci_driver *, struct module *,
644 const char *mod_name);
645 static inline int __must_check pci_register_driver(struct pci_driver *driver)
647 return __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME);
650 void pci_unregister_driver(struct pci_driver *dev);
651 void pci_remove_behind_bridge(struct pci_dev *dev);
652 struct pci_driver *pci_dev_driver(const struct pci_dev *dev);
653 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
654 struct pci_dev *dev);
655 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
658 void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
660 int pci_cfg_space_size(struct pci_dev *dev);
661 unsigned char pci_bus_max_busnr(struct pci_bus *bus);
663 /* kmem_cache style wrapper around pci_alloc_consistent() */
665 #include <linux/dmapool.h>
667 #define pci_pool dma_pool
668 #define pci_pool_create(name, pdev, size, align, allocation) \
669 dma_pool_create(name, &pdev->dev, size, align, allocation)
670 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
671 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
672 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
674 enum pci_dma_burst_strategy {
675 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
676 strategy_parameter is N/A */
677 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
679 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
680 strategy_parameter byte boundaries */
684 u16 vector; /* kernel uses to write allocated vector */
685 u16 entry; /* driver uses to specify entry, OS writes */
689 #ifndef CONFIG_PCI_MSI
690 static inline int pci_enable_msi(struct pci_dev *dev)
695 static inline void pci_disable_msi(struct pci_dev *dev)
698 static inline int pci_enable_msix(struct pci_dev *dev,
699 struct msix_entry *entries, int nvec)
704 static inline void pci_disable_msix(struct pci_dev *dev)
707 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev)
710 static inline void pci_restore_msi_state(struct pci_dev *dev)
713 extern int pci_enable_msi(struct pci_dev *dev);
714 extern void pci_disable_msi(struct pci_dev *dev);
715 extern int pci_enable_msix(struct pci_dev *dev,
716 struct msix_entry *entries, int nvec);
717 extern void pci_disable_msix(struct pci_dev *dev);
718 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
719 extern void pci_restore_msi_state(struct pci_dev *dev);
723 /* The functions a driver should call */
724 int ht_create_irq(struct pci_dev *dev, int idx);
725 void ht_destroy_irq(unsigned int irq);
726 #endif /* CONFIG_HT_IRQ */
728 extern void pci_block_user_cfg_access(struct pci_dev *dev);
729 extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
732 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
733 * a PCI domain is defined to be a set of PCI busses which share
734 * configuration space.
736 #ifdef CONFIG_PCI_DOMAINS
737 extern int pci_domains_supported;
739 enum { pci_domains_supported = 0 };
740 static inline int pci_domain_nr(struct pci_bus *bus)
745 static inline int pci_proc_domain(struct pci_bus *bus)
749 #endif /* CONFIG_PCI_DOMAINS */
751 #else /* CONFIG_PCI is not enabled */
754 * If the system does not have PCI, clearly these return errors. Define
755 * these as simple inline functions to avoid hair in drivers.
758 #define _PCI_NOP(o, s, t) \
759 static inline int pci_##o##_config_##s(struct pci_dev *dev, \
761 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
763 #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \
764 _PCI_NOP(o, word, u16 x) \
765 _PCI_NOP(o, dword, u32 x)
766 _PCI_NOP_ALL(read, *)
769 static inline struct pci_dev *pci_find_device(unsigned int vendor,
771 const struct pci_dev *from)
776 static inline struct pci_dev *pci_find_slot(unsigned int bus,
782 static inline struct pci_dev *pci_get_device(unsigned int vendor,
784 struct pci_dev *from)
789 static inline struct pci_dev *pci_get_subsys(unsigned int vendor,
791 unsigned int ss_vendor,
792 unsigned int ss_device,
793 const struct pci_dev *from)
798 static inline struct pci_dev *pci_get_class(unsigned int class,
799 struct pci_dev *from)
804 #define pci_dev_present(ids) (0)
805 #define no_pci_devices() (1)
806 #define pci_dev_put(dev) do { } while (0)
808 static inline void pci_set_master(struct pci_dev *dev)
811 static inline int pci_enable_device(struct pci_dev *dev)
816 static inline void pci_disable_device(struct pci_dev *dev)
819 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
824 static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
830 static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
836 static inline int pci_assign_resource(struct pci_dev *dev, int i)
841 static inline int __pci_register_driver(struct pci_driver *drv,
842 struct module *owner)
847 static inline int pci_register_driver(struct pci_driver *drv)
852 static inline void pci_unregister_driver(struct pci_driver *drv)
855 static inline int pci_find_capability(struct pci_dev *dev, int cap)
860 static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
866 static inline int pci_find_ext_capability(struct pci_dev *dev, int cap)
871 /* Power management related routines */
872 static inline int pci_save_state(struct pci_dev *dev)
877 static inline int pci_restore_state(struct pci_dev *dev)
882 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
887 static inline pci_power_t pci_choose_state(struct pci_dev *dev,
893 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
899 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
904 static inline void pci_release_regions(struct pci_dev *dev)
907 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
909 static inline void pci_block_user_cfg_access(struct pci_dev *dev)
912 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev)
915 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
918 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
922 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
926 #endif /* CONFIG_PCI */
928 /* Include architecture-dependent settings and functions */
932 /* these helpers provide future and backwards compatibility
933 * for accessing popular PCI BAR info */
934 #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)
935 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
936 #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags)
937 #define pci_resource_len(dev,bar) \
938 ((pci_resource_start((dev), (bar)) == 0 && \
939 pci_resource_end((dev), (bar)) == \
940 pci_resource_start((dev), (bar))) ? 0 : \
942 (pci_resource_end((dev), (bar)) - \
943 pci_resource_start((dev), (bar)) + 1))
945 /* Similar to the helpers above, these manipulate per-pci_dev
946 * driver-specific data. They are really just a wrapper around
947 * the generic device structure functions of these calls.
949 static inline void *pci_get_drvdata(struct pci_dev *pdev)
951 return dev_get_drvdata(&pdev->dev);
954 static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
956 dev_set_drvdata(&pdev->dev, data);
959 /* If you want to know what to call your pci_dev, ask this function.
960 * Again, it's a wrapper around the generic device.
962 static inline char *pci_name(struct pci_dev *pdev)
964 return pdev->dev.bus_id;
968 /* Some archs don't want to expose struct resource to userland as-is
971 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
972 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
973 const struct resource *rsrc, resource_size_t *start,
974 resource_size_t *end)
976 *start = rsrc->start;
979 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
983 * The world is not perfect and supplies us with broken PCI devices.
984 * For at least a part of these bugs we need a work-around, so both
985 * generic (drivers/pci/quirks.c) and per-architecture code can define
986 * fixup hooks to be called for particular buggy devices.
990 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
991 void (*hook)(struct pci_dev *dev);
994 enum pci_fixup_pass {
995 pci_fixup_early, /* Before probing BARs */
996 pci_fixup_header, /* After reading configuration header */
997 pci_fixup_final, /* Final phase of device fixups */
998 pci_fixup_enable, /* pci_enable_device() time */
999 pci_fixup_resume, /* pci_enable_device() time */
1002 /* Anonymous variables would be nice... */
1003 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
1004 static const struct pci_fixup __pci_fixup_##name __used \
1005 __attribute__((__section__(#section))) = { vendor, device, hook };
1006 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
1007 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1008 vendor##device##hook, vendor, device, hook)
1009 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
1010 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1011 vendor##device##hook, vendor, device, hook)
1012 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
1013 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1014 vendor##device##hook, vendor, device, hook)
1015 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
1016 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1017 vendor##device##hook, vendor, device, hook)
1018 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
1019 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1020 resume##vendor##device##hook, vendor, device, hook)
1023 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
1025 void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
1026 void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
1027 void __iomem * const *pcim_iomap_table(struct pci_dev *pdev);
1028 int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name);
1029 int pcim_iomap_regions_request_all(struct pci_dev *pdev, u16 mask,
1031 void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask);
1033 extern int pci_pci_problems;
1034 #define PCIPCI_FAIL 1 /* No PCI PCI DMA */
1035 #define PCIPCI_TRITON 2
1036 #define PCIPCI_NATOMA 4
1037 #define PCIPCI_VIAETBF 8
1038 #define PCIPCI_VSFX 16
1039 #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */
1040 #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */
1042 extern unsigned long pci_cardbus_io_size;
1043 extern unsigned long pci_cardbus_mem_size;
1045 extern int pcibios_add_platform_entries(struct pci_dev *dev);
1047 #endif /* __KERNEL__ */
1048 #endif /* LINUX_PCI_H */