4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
20 #include <linux/pci_regs.h> /* The pci register defines */
23 * The PCI interface treats multi-function devices as independent
24 * devices. The slot/function address of each device is encoded
25 * in a single byte as follows:
30 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
31 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
32 #define PCI_FUNC(devfn) ((devfn) & 0x07)
34 /* Ioctls for /proc/bus/pci/X/Y nodes. */
35 #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
36 #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
37 #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
38 #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
39 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
43 #include <linux/mod_devicetable.h>
45 #include <linux/types.h>
46 #include <linux/init.h>
47 #include <linux/ioport.h>
48 #include <linux/list.h>
49 #include <linux/compiler.h>
50 #include <linux/errno.h>
51 #include <linux/kobject.h>
52 #include <linux/atomic.h>
53 #include <linux/device.h>
55 #include <linux/irqreturn.h>
57 /* Include the ID list */
58 #include <linux/pci_ids.h>
60 /* pci_slot represents a physical slot */
62 struct pci_bus *bus; /* The bus this slot is on */
63 struct list_head list; /* node in list of slots on this bus */
64 struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */
65 unsigned char number; /* PCI_SLOT(pci_dev->devfn) */
69 static inline const char *pci_slot_name(const struct pci_slot *slot)
71 return kobject_name(&slot->kobj);
74 /* File state for mmap()s on /proc/bus/pci/X/Y */
80 /* This defines the direction arg to the DMA mapping routines. */
81 #define PCI_DMA_BIDIRECTIONAL 0
82 #define PCI_DMA_TODEVICE 1
83 #define PCI_DMA_FROMDEVICE 2
84 #define PCI_DMA_NONE 3
87 * For PCI devices, the region numbers are assigned this way:
90 /* #0-5: standard PCI resources */
92 PCI_STD_RESOURCE_END = 5,
94 /* #6: expansion ROM resource */
97 /* device specific resources */
100 PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1,
103 /* resources assigned to buses behind the bridge */
104 #define PCI_BRIDGE_RESOURCE_NUM 4
106 PCI_BRIDGE_RESOURCES,
107 PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES +
108 PCI_BRIDGE_RESOURCE_NUM - 1,
110 /* total resources associated with a PCI device */
113 /* preserve this for compatibility */
114 DEVICE_COUNT_RESOURCE = PCI_NUM_RESOURCES,
117 typedef int __bitwise pci_power_t;
119 #define PCI_D0 ((pci_power_t __force) 0)
120 #define PCI_D1 ((pci_power_t __force) 1)
121 #define PCI_D2 ((pci_power_t __force) 2)
122 #define PCI_D3hot ((pci_power_t __force) 3)
123 #define PCI_D3cold ((pci_power_t __force) 4)
124 #define PCI_UNKNOWN ((pci_power_t __force) 5)
125 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
127 /* Remember to update this when the list above changes! */
128 extern const char *pci_power_names[];
130 static inline const char *pci_power_name(pci_power_t state)
132 return pci_power_names[1 + (int) state];
135 #define PCI_PM_D2_DELAY 200
136 #define PCI_PM_D3_WAIT 10
137 #define PCI_PM_D3COLD_WAIT 100
138 #define PCI_PM_BUS_WAIT 50
140 /** The pci_channel state describes connectivity between the CPU and
141 * the pci device. If some PCI bus between here and the pci device
142 * has crashed or locked up, this info is reflected here.
144 typedef unsigned int __bitwise pci_channel_state_t;
146 enum pci_channel_state {
147 /* I/O channel is in normal state */
148 pci_channel_io_normal = (__force pci_channel_state_t) 1,
150 /* I/O to channel is blocked */
151 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
153 /* PCI card is dead */
154 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
157 typedef unsigned int __bitwise pcie_reset_state_t;
159 enum pcie_reset_state {
160 /* Reset is NOT asserted (Use to deassert reset) */
161 pcie_deassert_reset = (__force pcie_reset_state_t) 1,
163 /* Use #PERST to reset PCI-E device */
164 pcie_warm_reset = (__force pcie_reset_state_t) 2,
166 /* Use PCI-E Hot Reset to reset device */
167 pcie_hot_reset = (__force pcie_reset_state_t) 3
170 typedef unsigned short __bitwise pci_dev_flags_t;
172 /* INTX_DISABLE in PCI_COMMAND register disables MSI
175 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1,
176 /* Device configuration is irrevocably lost if disabled into D3 */
177 PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) 2,
178 /* Provide indication device is assigned by a Virtual Machine Manager */
179 PCI_DEV_FLAGS_ASSIGNED = (__force pci_dev_flags_t) 4,
182 enum pci_irq_reroute_variant {
183 INTEL_IRQ_REROUTE_VARIANT = 1,
184 MAX_IRQ_REROUTE_VARIANTS = 3
187 typedef unsigned short __bitwise pci_bus_flags_t;
189 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
190 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
193 /* Based on the PCI Hotplug Spec, but some values are made up by us */
195 PCI_SPEED_33MHz = 0x00,
196 PCI_SPEED_66MHz = 0x01,
197 PCI_SPEED_66MHz_PCIX = 0x02,
198 PCI_SPEED_100MHz_PCIX = 0x03,
199 PCI_SPEED_133MHz_PCIX = 0x04,
200 PCI_SPEED_66MHz_PCIX_ECC = 0x05,
201 PCI_SPEED_100MHz_PCIX_ECC = 0x06,
202 PCI_SPEED_133MHz_PCIX_ECC = 0x07,
203 PCI_SPEED_66MHz_PCIX_266 = 0x09,
204 PCI_SPEED_100MHz_PCIX_266 = 0x0a,
205 PCI_SPEED_133MHz_PCIX_266 = 0x0b,
211 PCI_SPEED_66MHz_PCIX_533 = 0x11,
212 PCI_SPEED_100MHz_PCIX_533 = 0x12,
213 PCI_SPEED_133MHz_PCIX_533 = 0x13,
214 PCIE_SPEED_2_5GT = 0x14,
215 PCIE_SPEED_5_0GT = 0x15,
216 PCIE_SPEED_8_0GT = 0x16,
217 PCI_SPEED_UNKNOWN = 0xff,
220 struct pci_cap_saved_data {
226 struct pci_cap_saved_state {
227 struct hlist_node next;
228 struct pci_cap_saved_data cap;
231 struct pcie_link_state;
237 * The pci_dev structure is used to describe PCI devices.
240 struct list_head bus_list; /* node in per-bus list */
241 struct pci_bus *bus; /* bus this device is on */
242 struct pci_bus *subordinate; /* bus this device bridges to */
244 void *sysdata; /* hook for sys-specific extension */
245 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
246 struct pci_slot *slot; /* Physical slot this device is in */
248 unsigned int devfn; /* encoded device & function index */
249 unsigned short vendor;
250 unsigned short device;
251 unsigned short subsystem_vendor;
252 unsigned short subsystem_device;
253 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
254 u8 revision; /* PCI revision, low byte of class word */
255 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
256 u8 pcie_cap; /* PCI-E capability offset */
257 u8 pcie_mpss:3; /* PCI-E Max Payload Size Supported */
258 u8 rom_base_reg; /* which config register controls the ROM */
259 u8 pin; /* which interrupt pin this device uses */
260 u16 pcie_flags_reg; /* cached PCI-E Capabilities Register */
262 struct pci_driver *driver; /* which driver has allocated this device */
263 u64 dma_mask; /* Mask of the bits of bus address this
264 device implements. Normally this is
265 0xffffffff. You only need to change
266 this if your device has broken DMA
267 or supports 64-bit transfers. */
269 struct device_dma_parameters dma_parms;
271 pci_power_t current_state; /* Current operating state. In ACPI-speak,
272 this is D0-D3, D0 being fully functional,
274 int pm_cap; /* PM capability offset in the
275 configuration space */
276 unsigned int pme_support:5; /* Bitmask of states from which PME#
278 unsigned int pme_interrupt:1;
279 unsigned int pme_poll:1; /* Poll device's PME status bit */
280 unsigned int d1_support:1; /* Low power state D1 is supported */
281 unsigned int d2_support:1; /* Low power state D2 is supported */
282 unsigned int no_d1d2:1; /* D1 and D2 are forbidden */
283 unsigned int no_d3cold:1; /* D3cold is forbidden */
284 unsigned int d3cold_allowed:1; /* D3cold is allowed by user */
285 unsigned int mmio_always_on:1; /* disallow turning off io/mem
286 decoding during bar sizing */
287 unsigned int wakeup_prepared:1;
288 unsigned int runtime_d3cold:1; /* whether go through runtime
289 D3cold, not set for devices
290 powered on/off by the
291 corresponding bridge */
292 unsigned int d3_delay; /* D3->D0 transition time in ms */
293 unsigned int d3cold_delay; /* D3cold->D0 transition time in ms */
295 #ifdef CONFIG_PCIEASPM
296 struct pcie_link_state *link_state; /* ASPM link state. */
299 pci_channel_state_t error_state; /* current connectivity state */
300 struct device dev; /* Generic device interface */
302 int cfg_size; /* Size of configuration space */
305 * Instead of touching interrupt line and base address registers
306 * directly, use the values stored here. They might be different!
309 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
311 /* These fields are used by common fixups */
312 unsigned int transparent:1; /* Transparent PCI bridge */
313 unsigned int multifunction:1;/* Part of multi-function device */
314 /* keep track of device state */
315 unsigned int is_added:1;
316 unsigned int is_busmaster:1; /* device is busmaster */
317 unsigned int no_msi:1; /* device may not use msi */
318 unsigned int block_cfg_access:1; /* config space access is blocked */
319 unsigned int broken_parity_status:1; /* Device generates false positive parity */
320 unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */
321 unsigned int msi_enabled:1;
322 unsigned int msix_enabled:1;
323 unsigned int ari_enabled:1; /* ARI forwarding */
324 unsigned int is_managed:1;
325 unsigned int is_pcie:1; /* Obsolete. Will be removed.
326 Use pci_is_pcie() instead */
327 unsigned int needs_freset:1; /* Dev requires fundamental reset */
328 unsigned int state_saved:1;
329 unsigned int is_physfn:1;
330 unsigned int is_virtfn:1;
331 unsigned int reset_fn:1;
332 unsigned int is_hotplug_bridge:1;
333 unsigned int __aer_firmware_first_valid:1;
334 unsigned int __aer_firmware_first:1;
335 unsigned int broken_intx_masking:1;
336 unsigned int io_window_1k:1; /* Intel P2P bridge 1K I/O windows */
337 pci_dev_flags_t dev_flags;
338 atomic_t enable_cnt; /* pci_enable_device has been called */
340 u32 saved_config_space[16]; /* config space saved at suspend time */
341 struct hlist_head saved_cap_space;
342 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
343 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
344 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
345 struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE]; /* sysfs file for WC mapping of resources */
346 #ifdef CONFIG_PCI_MSI
347 struct list_head msi_list;
348 struct kset *msi_kset;
351 #ifdef CONFIG_PCI_ATS
353 struct pci_sriov *sriov; /* SR-IOV capability related */
354 struct pci_dev *physfn; /* the PF this VF is associated with */
356 struct pci_ats *ats; /* Address Translation Service */
360 static inline struct pci_dev *pci_physfn(struct pci_dev *dev)
362 #ifdef CONFIG_PCI_IOV
370 extern struct pci_dev *alloc_pci_dev(void);
372 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
373 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
375 static inline int pci_channel_offline(struct pci_dev *pdev)
377 return (pdev->error_state != pci_channel_io_normal);
380 extern struct resource busn_resource;
382 struct pci_host_bridge_window {
383 struct list_head list;
384 struct resource *res; /* host bridge aperture (CPU address) */
385 resource_size_t offset; /* bus address + offset = CPU address */
388 struct pci_host_bridge {
390 struct pci_bus *bus; /* root bus */
391 struct list_head windows; /* pci_host_bridge_windows */
392 void (*release_fn)(struct pci_host_bridge *);
396 #define to_pci_host_bridge(n) container_of(n, struct pci_host_bridge, dev)
397 void pci_set_host_bridge_release(struct pci_host_bridge *bridge,
398 void (*release_fn)(struct pci_host_bridge *),
402 * The first PCI_BRIDGE_RESOURCE_NUM PCI bus resources (those that correspond
403 * to P2P or CardBus bridge windows) go in a table. Additional ones (for
404 * buses below host bridges or subtractive decode bridges) go in the list.
405 * Use pci_bus_for_each_resource() to iterate through all the resources.
409 * PCI_SUBTRACTIVE_DECODE means the bridge forwards the window implicitly
410 * and there's no way to program the bridge with the details of the window.
411 * This does not apply to ACPI _CRS windows, even with the _DEC subtractive-
412 * decode bit set, because they are explicit and can be programmed with _SRS.
414 #define PCI_SUBTRACTIVE_DECODE 0x1
416 struct pci_bus_resource {
417 struct list_head list;
418 struct resource *res;
422 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
425 struct list_head node; /* node in list of buses */
426 struct pci_bus *parent; /* parent bus this bridge is on */
427 struct list_head children; /* list of child buses */
428 struct list_head devices; /* list of devices on this bus */
429 struct pci_dev *self; /* bridge device as seen by parent */
430 struct list_head slots; /* list of slots on this bus */
431 struct resource *resource[PCI_BRIDGE_RESOURCE_NUM];
432 struct list_head resources; /* address space routed to this bus */
433 struct resource busn_res; /* bus numbers routed to this bus */
435 struct pci_ops *ops; /* configuration access functions */
436 void *sysdata; /* hook for sys-specific extension */
437 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
439 unsigned char number; /* bus number */
440 unsigned char primary; /* number of primary bridge */
441 unsigned char max_bus_speed; /* enum pci_bus_speed */
442 unsigned char cur_bus_speed; /* enum pci_bus_speed */
446 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
447 pci_bus_flags_t bus_flags; /* Inherited by child busses */
448 struct device *bridge;
450 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
451 struct bin_attribute *legacy_mem; /* legacy mem */
452 unsigned int is_added:1;
455 #define pci_bus_b(n) list_entry(n, struct pci_bus, node)
456 #define to_pci_bus(n) container_of(n, struct pci_bus, dev)
459 * Returns true if the pci bus is root (behind host-pci bridge),
462 static inline bool pci_is_root_bus(struct pci_bus *pbus)
464 return !(pbus->parent);
467 #ifdef CONFIG_PCI_MSI
468 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev)
470 return pci_dev->msi_enabled || pci_dev->msix_enabled;
473 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; }
477 * Error values that may be returned by PCI functions.
479 #define PCIBIOS_SUCCESSFUL 0x00
480 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
481 #define PCIBIOS_BAD_VENDOR_ID 0x83
482 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
483 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
484 #define PCIBIOS_SET_FAILED 0x88
485 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
488 * Translate above to generic errno for passing back through non-pci.
490 static inline int pcibios_err_to_errno(int err)
492 if (err <= PCIBIOS_SUCCESSFUL)
493 return err; /* Assume already errno */
496 case PCIBIOS_FUNC_NOT_SUPPORTED:
498 case PCIBIOS_BAD_VENDOR_ID:
500 case PCIBIOS_DEVICE_NOT_FOUND:
502 case PCIBIOS_BAD_REGISTER_NUMBER:
504 case PCIBIOS_SET_FAILED:
506 case PCIBIOS_BUFFER_TOO_SMALL:
513 /* Low-level architecture-dependent routines */
516 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
517 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
521 * ACPI needs to be able to access PCI config space before we've done a
522 * PCI bus scan and created pci_bus structures.
524 extern int raw_pci_read(unsigned int domain, unsigned int bus,
525 unsigned int devfn, int reg, int len, u32 *val);
526 extern int raw_pci_write(unsigned int domain, unsigned int bus,
527 unsigned int devfn, int reg, int len, u32 val);
529 struct pci_bus_region {
530 resource_size_t start;
535 spinlock_t lock; /* protects list, index */
536 struct list_head list; /* for IDs added at runtime */
539 /* ---------------------------------------------------------------- */
540 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
541 * a set of callbacks in struct pci_error_handlers, then that device driver
542 * will be notified of PCI bus errors, and will be driven to recovery
543 * when an error occurs.
546 typedef unsigned int __bitwise pci_ers_result_t;
548 enum pci_ers_result {
549 /* no result/none/not supported in device driver */
550 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
552 /* Device driver can recover without slot reset */
553 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
555 /* Device driver wants slot to be reset. */
556 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
558 /* Device has completely failed, is unrecoverable */
559 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
561 /* Device driver is fully recovered and operational */
562 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
565 /* PCI bus error event callbacks */
566 struct pci_error_handlers {
567 /* PCI bus error detected on this device */
568 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
569 enum pci_channel_state error);
571 /* MMIO has been re-enabled, but not DMA */
572 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
574 /* PCI Express link has been reset */
575 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
577 /* PCI slot has been reset */
578 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
580 /* Device driver may resume normal operations */
581 void (*resume)(struct pci_dev *dev);
584 /* ---------------------------------------------------------------- */
588 struct list_head node;
590 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
591 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
592 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
593 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
594 int (*suspend_late) (struct pci_dev *dev, pm_message_t state);
595 int (*resume_early) (struct pci_dev *dev);
596 int (*resume) (struct pci_dev *dev); /* Device woken up */
597 void (*shutdown) (struct pci_dev *dev);
598 const struct pci_error_handlers *err_handler;
599 struct device_driver driver;
600 struct pci_dynids dynids;
603 #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver)
606 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table
607 * @_table: device table name
609 * This macro is used to create a struct pci_device_id array (a device table)
610 * in a generic manner.
612 #define DEFINE_PCI_DEVICE_TABLE(_table) \
613 const struct pci_device_id _table[] __devinitconst
616 * PCI_DEVICE - macro used to describe a specific pci device
617 * @vend: the 16 bit PCI Vendor ID
618 * @dev: the 16 bit PCI Device ID
620 * This macro is used to create a struct pci_device_id that matches a
621 * specific device. The subvendor and subdevice fields will be set to
624 #define PCI_DEVICE(vend,dev) \
625 .vendor = (vend), .device = (dev), \
626 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
629 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
630 * @dev_class: the class, subclass, prog-if triple for this device
631 * @dev_class_mask: the class mask for this device
633 * This macro is used to create a struct pci_device_id that matches a
634 * specific PCI class. The vendor, device, subvendor, and subdevice
635 * fields will be set to PCI_ANY_ID.
637 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
638 .class = (dev_class), .class_mask = (dev_class_mask), \
639 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
640 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
643 * PCI_VDEVICE - macro used to describe a specific pci device in short form
644 * @vendor: the vendor name
645 * @device: the 16 bit PCI Device ID
647 * This macro is used to create a struct pci_device_id that matches a
648 * specific PCI device. The subvendor, and subdevice fields will be set
649 * to PCI_ANY_ID. The macro allows the next field to follow as the device
653 #define PCI_VDEVICE(vendor, device) \
654 PCI_VENDOR_ID_##vendor, (device), \
655 PCI_ANY_ID, PCI_ANY_ID, 0, 0
657 /* these external functions are only available when PCI support is enabled */
660 extern void pcie_bus_configure_settings(struct pci_bus *bus, u8 smpss);
662 enum pcie_bus_config_types {
665 PCIE_BUS_PERFORMANCE,
669 extern enum pcie_bus_config_types pcie_bus_config;
671 extern struct bus_type pci_bus_type;
673 /* Do NOT directly access these two variables, unless you are arch specific pci
674 * code, or pci core code. */
675 extern struct list_head pci_root_buses; /* list of all known PCI buses */
676 /* Some device drivers need know if pci is initiated */
677 extern int no_pci_devices(void);
679 void pcibios_fixup_bus(struct pci_bus *);
680 int __must_check pcibios_enable_device(struct pci_dev *, int mask);
681 /* Architecture specific versions may override this (weak) */
682 char *pcibios_setup(char *str);
684 /* Used only when drivers/pci/setup.c is used */
685 resource_size_t pcibios_align_resource(void *, const struct resource *,
688 void pcibios_update_irq(struct pci_dev *, int irq);
690 /* Weak but can be overriden by arch */
691 void pci_fixup_cardbus(struct pci_bus *);
693 /* Generic PCI functions used internally */
695 void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
696 struct resource *res);
697 void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
698 struct pci_bus_region *region);
699 void pcibios_scan_specific_bus(int busn);
700 extern struct pci_bus *pci_find_bus(int domain, int busnr);
701 void pci_bus_add_devices(const struct pci_bus *bus);
702 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus,
703 struct pci_ops *ops, void *sysdata);
704 struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata);
705 struct pci_bus *pci_create_root_bus(struct device *parent, int bus,
706 struct pci_ops *ops, void *sysdata,
707 struct list_head *resources);
708 int pci_bus_insert_busn_res(struct pci_bus *b, int bus, int busmax);
709 int pci_bus_update_busn_res_end(struct pci_bus *b, int busmax);
710 void pci_bus_release_busn_res(struct pci_bus *b);
711 struct pci_bus * __devinit pci_scan_root_bus(struct device *parent, int bus,
712 struct pci_ops *ops, void *sysdata,
713 struct list_head *resources);
714 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
716 void pcie_update_link_speed(struct pci_bus *bus, u16 link_status);
717 struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr,
719 struct hotplug_slot *hotplug);
720 void pci_destroy_slot(struct pci_slot *slot);
721 void pci_renumber_slot(struct pci_slot *slot, int slot_nr);
722 int pci_scan_slot(struct pci_bus *bus, int devfn);
723 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
724 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
725 unsigned int pci_scan_child_bus(struct pci_bus *bus);
726 int __must_check pci_bus_add_device(struct pci_dev *dev);
727 void pci_read_bridge_bases(struct pci_bus *child);
728 struct resource *pci_find_parent_resource(const struct pci_dev *dev,
729 struct resource *res);
730 u8 pci_swizzle_interrupt_pin(const struct pci_dev *dev, u8 pin);
731 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
732 u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp);
733 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
734 extern void pci_dev_put(struct pci_dev *dev);
735 extern void pci_remove_bus(struct pci_bus *b);
736 extern void pci_stop_and_remove_bus_device(struct pci_dev *dev);
737 void pci_setup_cardbus(struct pci_bus *bus);
738 extern void pci_sort_breadthfirst(void);
739 #define dev_is_pci(d) ((d)->bus == &pci_bus_type)
740 #define dev_is_pf(d) ((dev_is_pci(d) ? to_pci_dev(d)->is_physfn : false))
741 #define dev_num_vf(d) ((dev_is_pci(d) ? pci_num_vf(to_pci_dev(d)) : 0))
743 /* Generic PCI functions exported to card drivers */
745 enum pci_lost_interrupt_reason {
746 PCI_LOST_IRQ_NO_INFORMATION = 0,
747 PCI_LOST_IRQ_DISABLE_MSI,
748 PCI_LOST_IRQ_DISABLE_MSIX,
749 PCI_LOST_IRQ_DISABLE_ACPI,
751 enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev);
752 int pci_find_capability(struct pci_dev *dev, int cap);
753 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
754 int pci_find_ext_capability(struct pci_dev *dev, int cap);
755 int pci_find_next_ext_capability(struct pci_dev *dev, int pos, int cap);
756 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
757 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
758 struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
760 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
761 struct pci_dev *from);
762 struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
763 unsigned int ss_vendor, unsigned int ss_device,
764 struct pci_dev *from);
765 struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
766 struct pci_dev *pci_get_domain_bus_and_slot(int domain, unsigned int bus,
768 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
771 return pci_get_domain_bus_and_slot(0, bus, devfn);
773 struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
774 int pci_dev_present(const struct pci_device_id *ids);
776 int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
778 int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn,
779 int where, u16 *val);
780 int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn,
781 int where, u32 *val);
782 int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn,
784 int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
786 int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
788 struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops);
790 static inline int pci_read_config_byte(const struct pci_dev *dev, int where, u8 *val)
792 return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
794 static inline int pci_read_config_word(const struct pci_dev *dev, int where, u16 *val)
796 return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
798 static inline int pci_read_config_dword(const struct pci_dev *dev, int where,
801 return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
803 static inline int pci_write_config_byte(const struct pci_dev *dev, int where, u8 val)
805 return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val);
807 static inline int pci_write_config_word(const struct pci_dev *dev, int where, u16 val)
809 return pci_bus_write_config_word(dev->bus, dev->devfn, where, val);
811 static inline int pci_write_config_dword(const struct pci_dev *dev, int where,
814 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
817 int pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val);
818 int pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val);
819 int pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val);
820 int pcie_capability_write_dword(struct pci_dev *dev, int pos, u32 val);
821 int pcie_capability_clear_and_set_word(struct pci_dev *dev, int pos,
823 int pcie_capability_clear_and_set_dword(struct pci_dev *dev, int pos,
826 static inline int pcie_capability_set_word(struct pci_dev *dev, int pos,
829 return pcie_capability_clear_and_set_word(dev, pos, 0, set);
832 static inline int pcie_capability_set_dword(struct pci_dev *dev, int pos,
835 return pcie_capability_clear_and_set_dword(dev, pos, 0, set);
838 static inline int pcie_capability_clear_word(struct pci_dev *dev, int pos,
841 return pcie_capability_clear_and_set_word(dev, pos, clear, 0);
844 static inline int pcie_capability_clear_dword(struct pci_dev *dev, int pos,
847 return pcie_capability_clear_and_set_dword(dev, pos, clear, 0);
850 /* user-space driven config access */
851 int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val);
852 int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val);
853 int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val);
854 int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val);
855 int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val);
856 int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val);
858 int __must_check pci_enable_device(struct pci_dev *dev);
859 int __must_check pci_enable_device_io(struct pci_dev *dev);
860 int __must_check pci_enable_device_mem(struct pci_dev *dev);
861 int __must_check pci_reenable_device(struct pci_dev *);
862 int __must_check pcim_enable_device(struct pci_dev *pdev);
863 void pcim_pin_device(struct pci_dev *pdev);
865 static inline int pci_is_enabled(struct pci_dev *pdev)
867 return (atomic_read(&pdev->enable_cnt) > 0);
870 static inline int pci_is_managed(struct pci_dev *pdev)
872 return pdev->is_managed;
875 void pci_disable_device(struct pci_dev *dev);
877 extern unsigned int pcibios_max_latency;
878 void pci_set_master(struct pci_dev *dev);
879 void pci_clear_master(struct pci_dev *dev);
881 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
882 int pci_set_cacheline_size(struct pci_dev *dev);
883 #define HAVE_PCI_SET_MWI
884 int __must_check pci_set_mwi(struct pci_dev *dev);
885 int pci_try_set_mwi(struct pci_dev *dev);
886 void pci_clear_mwi(struct pci_dev *dev);
887 void pci_intx(struct pci_dev *dev, int enable);
888 bool pci_intx_mask_supported(struct pci_dev *dev);
889 bool pci_check_and_mask_intx(struct pci_dev *dev);
890 bool pci_check_and_unmask_intx(struct pci_dev *dev);
891 void pci_msi_off(struct pci_dev *dev);
892 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
893 int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
894 int pcix_get_max_mmrbc(struct pci_dev *dev);
895 int pcix_get_mmrbc(struct pci_dev *dev);
896 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
897 int pcie_get_readrq(struct pci_dev *dev);
898 int pcie_set_readrq(struct pci_dev *dev, int rq);
899 int pcie_get_mps(struct pci_dev *dev);
900 int pcie_set_mps(struct pci_dev *dev, int mps);
901 int __pci_reset_function(struct pci_dev *dev);
902 int __pci_reset_function_locked(struct pci_dev *dev);
903 int pci_reset_function(struct pci_dev *dev);
904 void pci_update_resource(struct pci_dev *dev, int resno);
905 int __must_check pci_assign_resource(struct pci_dev *dev, int i);
906 int __must_check pci_reassign_resource(struct pci_dev *dev, int i, resource_size_t add_size, resource_size_t align);
907 int pci_select_bars(struct pci_dev *dev, unsigned long flags);
909 /* ROM control related routines */
910 int pci_enable_rom(struct pci_dev *pdev);
911 void pci_disable_rom(struct pci_dev *pdev);
912 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
913 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
914 size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size);
916 /* Power management related routines */
917 int pci_save_state(struct pci_dev *dev);
918 void pci_restore_state(struct pci_dev *dev);
919 struct pci_saved_state *pci_store_saved_state(struct pci_dev *dev);
920 int pci_load_saved_state(struct pci_dev *dev, struct pci_saved_state *state);
921 int pci_load_and_free_saved_state(struct pci_dev *dev,
922 struct pci_saved_state **state);
923 int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state);
924 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
925 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
926 bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
927 void pci_pme_active(struct pci_dev *dev, bool enable);
928 int __pci_enable_wake(struct pci_dev *dev, pci_power_t state,
929 bool runtime, bool enable);
930 int pci_wake_from_d3(struct pci_dev *dev, bool enable);
931 pci_power_t pci_target_state(struct pci_dev *dev);
932 int pci_prepare_to_sleep(struct pci_dev *dev);
933 int pci_back_from_sleep(struct pci_dev *dev);
934 bool pci_dev_run_wake(struct pci_dev *dev);
935 bool pci_check_pme_status(struct pci_dev *dev);
936 void pci_pme_wakeup_bus(struct pci_bus *bus);
938 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
941 return __pci_enable_wake(dev, state, false, enable);
944 #define PCI_EXP_IDO_REQUEST (1<<0)
945 #define PCI_EXP_IDO_COMPLETION (1<<1)
946 void pci_enable_ido(struct pci_dev *dev, unsigned long type);
947 void pci_disable_ido(struct pci_dev *dev, unsigned long type);
949 enum pci_obff_signal_type {
950 PCI_EXP_OBFF_SIGNAL_L0 = 0,
951 PCI_EXP_OBFF_SIGNAL_ALWAYS = 1,
953 int pci_enable_obff(struct pci_dev *dev, enum pci_obff_signal_type);
954 void pci_disable_obff(struct pci_dev *dev);
956 int pci_enable_ltr(struct pci_dev *dev);
957 void pci_disable_ltr(struct pci_dev *dev);
958 int pci_set_ltr(struct pci_dev *dev, int snoop_lat_ns, int nosnoop_lat_ns);
960 /* For use by arch with custom probe code */
961 void set_pcie_port_type(struct pci_dev *pdev);
962 void set_pcie_hotplug_bridge(struct pci_dev *pdev);
964 /* Functions for PCI Hotplug drivers to use */
965 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
966 #ifdef CONFIG_HOTPLUG
967 unsigned int pci_rescan_bus_bridge_resize(struct pci_dev *bridge);
968 unsigned int pci_rescan_bus(struct pci_bus *bus);
971 /* Vital product data routines */
972 ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
973 ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
974 int pci_vpd_truncate(struct pci_dev *dev, size_t size);
976 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
977 resource_size_t pcibios_retrieve_fw_addr(struct pci_dev *dev, int idx);
978 void pci_bus_assign_resources(const struct pci_bus *bus);
979 void pci_bus_size_bridges(struct pci_bus *bus);
980 int pci_claim_resource(struct pci_dev *, int);
981 void pci_assign_unassigned_resources(void);
982 void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge);
983 void pdev_enable_device(struct pci_dev *);
984 int pci_enable_resources(struct pci_dev *, int mask);
985 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
986 int (*)(const struct pci_dev *, u8, u8));
987 #define HAVE_PCI_REQ_REGIONS 2
988 int __must_check pci_request_regions(struct pci_dev *, const char *);
989 int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *);
990 void pci_release_regions(struct pci_dev *);
991 int __must_check pci_request_region(struct pci_dev *, int, const char *);
992 int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *);
993 void pci_release_region(struct pci_dev *, int);
994 int pci_request_selected_regions(struct pci_dev *, int, const char *);
995 int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *);
996 void pci_release_selected_regions(struct pci_dev *, int);
998 /* drivers/pci/bus.c */
999 void pci_add_resource(struct list_head *resources, struct resource *res);
1000 void pci_add_resource_offset(struct list_head *resources, struct resource *res,
1001 resource_size_t offset);
1002 void pci_free_resource_list(struct list_head *resources);
1003 void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, unsigned int flags);
1004 struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n);
1005 void pci_bus_remove_resources(struct pci_bus *bus);
1007 #define pci_bus_for_each_resource(bus, res, i) \
1009 (res = pci_bus_resource_n(bus, i)) || i < PCI_BRIDGE_RESOURCE_NUM; \
1012 int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
1013 struct resource *res, resource_size_t size,
1014 resource_size_t align, resource_size_t min,
1015 unsigned int type_mask,
1016 resource_size_t (*alignf)(void *,
1017 const struct resource *,
1021 void pci_enable_bridges(struct pci_bus *bus);
1023 /* Proper probing supporting hot-pluggable devices */
1024 int __must_check __pci_register_driver(struct pci_driver *, struct module *,
1025 const char *mod_name);
1028 * pci_register_driver must be a macro so that KBUILD_MODNAME can be expanded
1030 #define pci_register_driver(driver) \
1031 __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME)
1033 void pci_unregister_driver(struct pci_driver *dev);
1036 * module_pci_driver() - Helper macro for registering a PCI driver
1037 * @__pci_driver: pci_driver struct
1039 * Helper macro for PCI drivers which do not do anything special in module
1040 * init/exit. This eliminates a lot of boilerplate. Each module may only
1041 * use this macro once, and calling it replaces module_init() and module_exit()
1043 #define module_pci_driver(__pci_driver) \
1044 module_driver(__pci_driver, pci_register_driver, \
1045 pci_unregister_driver)
1047 struct pci_driver *pci_dev_driver(const struct pci_dev *dev);
1048 int pci_add_dynid(struct pci_driver *drv,
1049 unsigned int vendor, unsigned int device,
1050 unsigned int subvendor, unsigned int subdevice,
1051 unsigned int class, unsigned int class_mask,
1052 unsigned long driver_data);
1053 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
1054 struct pci_dev *dev);
1055 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
1058 void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
1060 int pci_cfg_space_size_ext(struct pci_dev *dev);
1061 int pci_cfg_space_size(struct pci_dev *dev);
1062 unsigned char pci_bus_max_busnr(struct pci_bus *bus);
1063 void pci_setup_bridge(struct pci_bus *bus);
1064 resource_size_t pcibios_window_alignment(struct pci_bus *bus,
1065 unsigned long type);
1067 #define PCI_VGA_STATE_CHANGE_BRIDGE (1 << 0)
1068 #define PCI_VGA_STATE_CHANGE_DECODES (1 << 1)
1070 int pci_set_vga_state(struct pci_dev *pdev, bool decode,
1071 unsigned int command_bits, u32 flags);
1072 /* kmem_cache style wrapper around pci_alloc_consistent() */
1074 #include <linux/pci-dma.h>
1075 #include <linux/dmapool.h>
1077 #define pci_pool dma_pool
1078 #define pci_pool_create(name, pdev, size, align, allocation) \
1079 dma_pool_create(name, &pdev->dev, size, align, allocation)
1080 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
1081 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
1082 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
1084 enum pci_dma_burst_strategy {
1085 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
1086 strategy_parameter is N/A */
1087 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
1089 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
1090 strategy_parameter byte boundaries */
1094 u32 vector; /* kernel uses to write allocated vector */
1095 u16 entry; /* driver uses to specify entry, OS writes */
1099 #ifndef CONFIG_PCI_MSI
1100 static inline int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec)
1105 static inline void pci_msi_shutdown(struct pci_dev *dev)
1107 static inline void pci_disable_msi(struct pci_dev *dev)
1110 static inline int pci_msix_table_size(struct pci_dev *dev)
1114 static inline int pci_enable_msix(struct pci_dev *dev,
1115 struct msix_entry *entries, int nvec)
1120 static inline void pci_msix_shutdown(struct pci_dev *dev)
1122 static inline void pci_disable_msix(struct pci_dev *dev)
1125 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev)
1128 static inline void pci_restore_msi_state(struct pci_dev *dev)
1130 static inline int pci_msi_enabled(void)
1135 extern int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec);
1136 extern void pci_msi_shutdown(struct pci_dev *dev);
1137 extern void pci_disable_msi(struct pci_dev *dev);
1138 extern int pci_msix_table_size(struct pci_dev *dev);
1139 extern int pci_enable_msix(struct pci_dev *dev,
1140 struct msix_entry *entries, int nvec);
1141 extern void pci_msix_shutdown(struct pci_dev *dev);
1142 extern void pci_disable_msix(struct pci_dev *dev);
1143 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
1144 extern void pci_restore_msi_state(struct pci_dev *dev);
1145 extern int pci_msi_enabled(void);
1148 #ifdef CONFIG_PCIEPORTBUS
1149 extern bool pcie_ports_disabled;
1150 extern bool pcie_ports_auto;
1152 #define pcie_ports_disabled true
1153 #define pcie_ports_auto false
1156 #ifndef CONFIG_PCIEASPM
1157 static inline int pcie_aspm_enabled(void) { return 0; }
1158 static inline bool pcie_aspm_support_enabled(void) { return false; }
1160 extern int pcie_aspm_enabled(void);
1161 extern bool pcie_aspm_support_enabled(void);
1164 #ifdef CONFIG_PCIEAER
1165 void pci_no_aer(void);
1166 bool pci_aer_available(void);
1168 static inline void pci_no_aer(void) { }
1169 static inline bool pci_aer_available(void) { return false; }
1172 #ifndef CONFIG_PCIE_ECRC
1173 static inline void pcie_set_ecrc_checking(struct pci_dev *dev)
1177 static inline void pcie_ecrc_get_policy(char *str) {};
1179 extern void pcie_set_ecrc_checking(struct pci_dev *dev);
1180 extern void pcie_ecrc_get_policy(char *str);
1183 #define pci_enable_msi(pdev) pci_enable_msi_block(pdev, 1)
1185 #ifdef CONFIG_HT_IRQ
1186 /* The functions a driver should call */
1187 int ht_create_irq(struct pci_dev *dev, int idx);
1188 void ht_destroy_irq(unsigned int irq);
1189 #endif /* CONFIG_HT_IRQ */
1191 extern void pci_cfg_access_lock(struct pci_dev *dev);
1192 extern bool pci_cfg_access_trylock(struct pci_dev *dev);
1193 extern void pci_cfg_access_unlock(struct pci_dev *dev);
1196 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
1197 * a PCI domain is defined to be a set of PCI busses which share
1198 * configuration space.
1200 #ifdef CONFIG_PCI_DOMAINS
1201 extern int pci_domains_supported;
1203 enum { pci_domains_supported = 0 };
1204 static inline int pci_domain_nr(struct pci_bus *bus)
1209 static inline int pci_proc_domain(struct pci_bus *bus)
1213 #endif /* CONFIG_PCI_DOMAINS */
1215 /* some architectures require additional setup to direct VGA traffic */
1216 typedef int (*arch_set_vga_state_t)(struct pci_dev *pdev, bool decode,
1217 unsigned int command_bits, u32 flags);
1218 extern void pci_register_set_vga_state(arch_set_vga_state_t func);
1220 #else /* CONFIG_PCI is not enabled */
1223 * If the system does not have PCI, clearly these return errors. Define
1224 * these as simple inline functions to avoid hair in drivers.
1227 #define _PCI_NOP(o, s, t) \
1228 static inline int pci_##o##_config_##s(struct pci_dev *dev, \
1230 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
1232 #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \
1233 _PCI_NOP(o, word, u16 x) \
1234 _PCI_NOP(o, dword, u32 x)
1235 _PCI_NOP_ALL(read, *)
1236 _PCI_NOP_ALL(write,)
1238 static inline struct pci_dev *pci_get_device(unsigned int vendor,
1239 unsigned int device,
1240 struct pci_dev *from)
1245 static inline struct pci_dev *pci_get_subsys(unsigned int vendor,
1246 unsigned int device,
1247 unsigned int ss_vendor,
1248 unsigned int ss_device,
1249 struct pci_dev *from)
1254 static inline struct pci_dev *pci_get_class(unsigned int class,
1255 struct pci_dev *from)
1260 #define pci_dev_present(ids) (0)
1261 #define no_pci_devices() (1)
1262 #define pci_dev_put(dev) do { } while (0)
1264 static inline void pci_set_master(struct pci_dev *dev)
1267 static inline int pci_enable_device(struct pci_dev *dev)
1272 static inline void pci_disable_device(struct pci_dev *dev)
1275 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
1280 static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
1285 static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
1291 static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
1297 static inline int pci_assign_resource(struct pci_dev *dev, int i)
1302 static inline int __pci_register_driver(struct pci_driver *drv,
1303 struct module *owner)
1308 static inline int pci_register_driver(struct pci_driver *drv)
1313 static inline void pci_unregister_driver(struct pci_driver *drv)
1316 static inline int pci_find_capability(struct pci_dev *dev, int cap)
1321 static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
1327 static inline int pci_find_ext_capability(struct pci_dev *dev, int cap)
1332 /* Power management related routines */
1333 static inline int pci_save_state(struct pci_dev *dev)
1338 static inline void pci_restore_state(struct pci_dev *dev)
1341 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
1346 static inline int pci_wake_from_d3(struct pci_dev *dev, bool enable)
1351 static inline pci_power_t pci_choose_state(struct pci_dev *dev,
1357 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
1363 static inline void pci_enable_ido(struct pci_dev *dev, unsigned long type)
1367 static inline void pci_disable_ido(struct pci_dev *dev, unsigned long type)
1371 static inline int pci_enable_obff(struct pci_dev *dev, unsigned long type)
1376 static inline void pci_disable_obff(struct pci_dev *dev)
1380 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
1385 static inline void pci_release_regions(struct pci_dev *dev)
1388 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
1390 static inline void pci_block_cfg_access(struct pci_dev *dev)
1393 static inline int pci_block_cfg_access_in_atomic(struct pci_dev *dev)
1396 static inline void pci_unblock_cfg_access(struct pci_dev *dev)
1399 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
1402 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
1406 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
1410 static inline int pci_domain_nr(struct pci_bus *bus)
1413 static inline struct pci_dev *pci_dev_get(struct pci_dev *dev)
1416 #define dev_is_pci(d) (false)
1417 #define dev_is_pf(d) (false)
1418 #define dev_num_vf(d) (0)
1419 #endif /* CONFIG_PCI */
1421 /* Include architecture-dependent settings and functions */
1423 #include <asm/pci.h>
1425 #ifndef PCIBIOS_MAX_MEM_32
1426 #define PCIBIOS_MAX_MEM_32 (-1)
1429 /* these helpers provide future and backwards compatibility
1430 * for accessing popular PCI BAR info */
1431 #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)
1432 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
1433 #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags)
1434 #define pci_resource_len(dev,bar) \
1435 ((pci_resource_start((dev), (bar)) == 0 && \
1436 pci_resource_end((dev), (bar)) == \
1437 pci_resource_start((dev), (bar))) ? 0 : \
1439 (pci_resource_end((dev), (bar)) - \
1440 pci_resource_start((dev), (bar)) + 1))
1442 /* Similar to the helpers above, these manipulate per-pci_dev
1443 * driver-specific data. They are really just a wrapper around
1444 * the generic device structure functions of these calls.
1446 static inline void *pci_get_drvdata(struct pci_dev *pdev)
1448 return dev_get_drvdata(&pdev->dev);
1451 static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
1453 dev_set_drvdata(&pdev->dev, data);
1456 /* If you want to know what to call your pci_dev, ask this function.
1457 * Again, it's a wrapper around the generic device.
1459 static inline const char *pci_name(const struct pci_dev *pdev)
1461 return dev_name(&pdev->dev);
1465 /* Some archs don't want to expose struct resource to userland as-is
1466 * in sysfs and /proc
1468 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
1469 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
1470 const struct resource *rsrc, resource_size_t *start,
1471 resource_size_t *end)
1473 *start = rsrc->start;
1476 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
1480 * The world is not perfect and supplies us with broken PCI devices.
1481 * For at least a part of these bugs we need a work-around, so both
1482 * generic (drivers/pci/quirks.c) and per-architecture code can define
1483 * fixup hooks to be called for particular buggy devices.
1487 u16 vendor; /* You can use PCI_ANY_ID here of course */
1488 u16 device; /* You can use PCI_ANY_ID here of course */
1489 u32 class; /* You can use PCI_ANY_ID here too */
1490 unsigned int class_shift; /* should be 0, 8, 16 */
1491 void (*hook)(struct pci_dev *dev);
1494 enum pci_fixup_pass {
1495 pci_fixup_early, /* Before probing BARs */
1496 pci_fixup_header, /* After reading configuration header */
1497 pci_fixup_final, /* Final phase of device fixups */
1498 pci_fixup_enable, /* pci_enable_device() time */
1499 pci_fixup_resume, /* pci_device_resume() */
1500 pci_fixup_suspend, /* pci_device_suspend */
1501 pci_fixup_resume_early, /* pci_device_resume_early() */
1504 /* Anonymous variables would be nice... */
1505 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, class, \
1506 class_shift, hook) \
1507 static const struct pci_fixup __pci_fixup_##name __used \
1508 __attribute__((__section__(#section), aligned((sizeof(void *))))) \
1509 = { vendor, device, class, class_shift, hook };
1511 #define DECLARE_PCI_FIXUP_CLASS_EARLY(vendor, device, class, \
1512 class_shift, hook) \
1513 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1514 vendor##device##hook, vendor, device, class, class_shift, hook)
1515 #define DECLARE_PCI_FIXUP_CLASS_HEADER(vendor, device, class, \
1516 class_shift, hook) \
1517 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1518 vendor##device##hook, vendor, device, class, class_shift, hook)
1519 #define DECLARE_PCI_FIXUP_CLASS_FINAL(vendor, device, class, \
1520 class_shift, hook) \
1521 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1522 vendor##device##hook, vendor, device, class, class_shift, hook)
1523 #define DECLARE_PCI_FIXUP_CLASS_ENABLE(vendor, device, class, \
1524 class_shift, hook) \
1525 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1526 vendor##device##hook, vendor, device, class, class_shift, hook)
1527 #define DECLARE_PCI_FIXUP_CLASS_RESUME(vendor, device, class, \
1528 class_shift, hook) \
1529 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1530 resume##vendor##device##hook, vendor, device, class, \
1532 #define DECLARE_PCI_FIXUP_CLASS_RESUME_EARLY(vendor, device, class, \
1533 class_shift, hook) \
1534 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \
1535 resume_early##vendor##device##hook, vendor, device, \
1536 class, class_shift, hook)
1537 #define DECLARE_PCI_FIXUP_CLASS_SUSPEND(vendor, device, class, \
1538 class_shift, hook) \
1539 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \
1540 suspend##vendor##device##hook, vendor, device, class, \
1543 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
1544 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1545 vendor##device##hook, vendor, device, PCI_ANY_ID, 0, hook)
1546 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
1547 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1548 vendor##device##hook, vendor, device, PCI_ANY_ID, 0, hook)
1549 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
1550 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1551 vendor##device##hook, vendor, device, PCI_ANY_ID, 0, hook)
1552 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
1553 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1554 vendor##device##hook, vendor, device, PCI_ANY_ID, 0, hook)
1555 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
1556 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1557 resume##vendor##device##hook, vendor, device, \
1558 PCI_ANY_ID, 0, hook)
1559 #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \
1560 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \
1561 resume_early##vendor##device##hook, vendor, device, \
1562 PCI_ANY_ID, 0, hook)
1563 #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \
1564 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \
1565 suspend##vendor##device##hook, vendor, device, \
1566 PCI_ANY_ID, 0, hook)
1568 #ifdef CONFIG_PCI_QUIRKS
1569 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
1570 struct pci_dev *pci_get_dma_source(struct pci_dev *dev);
1571 int pci_dev_specific_acs_enabled(struct pci_dev *dev, u16 acs_flags);
1573 static inline void pci_fixup_device(enum pci_fixup_pass pass,
1574 struct pci_dev *dev) {}
1575 static inline struct pci_dev *pci_get_dma_source(struct pci_dev *dev)
1577 return pci_dev_get(dev);
1579 static inline int pci_dev_specific_acs_enabled(struct pci_dev *dev,
1586 void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
1587 void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
1588 void __iomem * const *pcim_iomap_table(struct pci_dev *pdev);
1589 int pcim_iomap_regions(struct pci_dev *pdev, int mask, const char *name);
1590 int pcim_iomap_regions_request_all(struct pci_dev *pdev, int mask,
1592 void pcim_iounmap_regions(struct pci_dev *pdev, int mask);
1594 extern int pci_pci_problems;
1595 #define PCIPCI_FAIL 1 /* No PCI PCI DMA */
1596 #define PCIPCI_TRITON 2
1597 #define PCIPCI_NATOMA 4
1598 #define PCIPCI_VIAETBF 8
1599 #define PCIPCI_VSFX 16
1600 #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */
1601 #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */
1603 extern unsigned long pci_cardbus_io_size;
1604 extern unsigned long pci_cardbus_mem_size;
1605 extern u8 __devinitdata pci_dfl_cache_line_size;
1606 extern u8 pci_cache_line_size;
1608 extern unsigned long pci_hotplug_io_size;
1609 extern unsigned long pci_hotplug_mem_size;
1611 /* Architecture specific versions may override these (weak) */
1612 int pcibios_add_platform_entries(struct pci_dev *dev);
1613 void pcibios_disable_device(struct pci_dev *dev);
1614 void pcibios_set_master(struct pci_dev *dev);
1615 int pcibios_set_pcie_reset_state(struct pci_dev *dev,
1616 enum pcie_reset_state state);
1618 #ifdef CONFIG_PCI_MMCONFIG
1619 extern void __init pci_mmcfg_early_init(void);
1620 extern void __init pci_mmcfg_late_init(void);
1622 static inline void pci_mmcfg_early_init(void) { }
1623 static inline void pci_mmcfg_late_init(void) { }
1626 int pci_ext_cfg_avail(struct pci_dev *dev);
1628 void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar);
1630 #ifdef CONFIG_PCI_IOV
1631 extern int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn);
1632 extern void pci_disable_sriov(struct pci_dev *dev);
1633 extern irqreturn_t pci_sriov_migration(struct pci_dev *dev);
1634 extern int pci_num_vf(struct pci_dev *dev);
1636 static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
1640 static inline void pci_disable_sriov(struct pci_dev *dev)
1643 static inline irqreturn_t pci_sriov_migration(struct pci_dev *dev)
1647 static inline int pci_num_vf(struct pci_dev *dev)
1653 #if defined(CONFIG_HOTPLUG_PCI) || defined(CONFIG_HOTPLUG_PCI_MODULE)
1654 extern void pci_hp_create_module_link(struct pci_slot *pci_slot);
1655 extern void pci_hp_remove_module_link(struct pci_slot *pci_slot);
1659 * pci_pcie_cap - get the saved PCIe capability offset
1662 * PCIe capability offset is calculated at PCI device initialization
1663 * time and saved in the data structure. This function returns saved
1664 * PCIe capability offset. Using this instead of pci_find_capability()
1665 * reduces unnecessary search in the PCI configuration space. If you
1666 * need to calculate PCIe capability offset from raw device for some
1667 * reasons, please use pci_find_capability() instead.
1669 static inline int pci_pcie_cap(struct pci_dev *dev)
1671 return dev->pcie_cap;
1675 * pci_is_pcie - check if the PCI device is PCI Express capable
1678 * Retrun true if the PCI device is PCI Express capable, false otherwise.
1680 static inline bool pci_is_pcie(struct pci_dev *dev)
1682 return !!pci_pcie_cap(dev);
1686 * pci_pcie_type - get the PCIe device/port type
1689 static inline int pci_pcie_type(const struct pci_dev *dev)
1691 return (dev->pcie_flags_reg & PCI_EXP_FLAGS_TYPE) >> 4;
1694 void pci_request_acs(void);
1695 bool pci_acs_enabled(struct pci_dev *pdev, u16 acs_flags);
1696 bool pci_acs_path_enabled(struct pci_dev *start,
1697 struct pci_dev *end, u16 acs_flags);
1699 #define PCI_VPD_LRDT 0x80 /* Large Resource Data Type */
1700 #define PCI_VPD_LRDT_ID(x) (x | PCI_VPD_LRDT)
1702 /* Large Resource Data Type Tag Item Names */
1703 #define PCI_VPD_LTIN_ID_STRING 0x02 /* Identifier String */
1704 #define PCI_VPD_LTIN_RO_DATA 0x10 /* Read-Only Data */
1705 #define PCI_VPD_LTIN_RW_DATA 0x11 /* Read-Write Data */
1707 #define PCI_VPD_LRDT_ID_STRING PCI_VPD_LRDT_ID(PCI_VPD_LTIN_ID_STRING)
1708 #define PCI_VPD_LRDT_RO_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RO_DATA)
1709 #define PCI_VPD_LRDT_RW_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RW_DATA)
1711 /* Small Resource Data Type Tag Item Names */
1712 #define PCI_VPD_STIN_END 0x78 /* End */
1714 #define PCI_VPD_SRDT_END PCI_VPD_STIN_END
1716 #define PCI_VPD_SRDT_TIN_MASK 0x78
1717 #define PCI_VPD_SRDT_LEN_MASK 0x07
1719 #define PCI_VPD_LRDT_TAG_SIZE 3
1720 #define PCI_VPD_SRDT_TAG_SIZE 1
1722 #define PCI_VPD_INFO_FLD_HDR_SIZE 3
1724 #define PCI_VPD_RO_KEYWORD_PARTNO "PN"
1725 #define PCI_VPD_RO_KEYWORD_MFR_ID "MN"
1726 #define PCI_VPD_RO_KEYWORD_VENDOR0 "V0"
1727 #define PCI_VPD_RO_KEYWORD_CHKSUM "RV"
1730 * pci_vpd_lrdt_size - Extracts the Large Resource Data Type length
1731 * @lrdt: Pointer to the beginning of the Large Resource Data Type tag
1733 * Returns the extracted Large Resource Data Type length.
1735 static inline u16 pci_vpd_lrdt_size(const u8 *lrdt)
1737 return (u16)lrdt[1] + ((u16)lrdt[2] << 8);
1741 * pci_vpd_srdt_size - Extracts the Small Resource Data Type length
1742 * @lrdt: Pointer to the beginning of the Small Resource Data Type tag
1744 * Returns the extracted Small Resource Data Type length.
1746 static inline u8 pci_vpd_srdt_size(const u8 *srdt)
1748 return (*srdt) & PCI_VPD_SRDT_LEN_MASK;
1752 * pci_vpd_info_field_size - Extracts the information field length
1753 * @lrdt: Pointer to the beginning of an information field header
1755 * Returns the extracted information field length.
1757 static inline u8 pci_vpd_info_field_size(const u8 *info_field)
1759 return info_field[2];
1763 * pci_vpd_find_tag - Locates the Resource Data Type tag provided
1764 * @buf: Pointer to buffered vpd data
1765 * @off: The offset into the buffer at which to begin the search
1766 * @len: The length of the vpd buffer
1767 * @rdt: The Resource Data Type to search for
1769 * Returns the index where the Resource Data Type was found or
1770 * -ENOENT otherwise.
1772 int pci_vpd_find_tag(const u8 *buf, unsigned int off, unsigned int len, u8 rdt);
1775 * pci_vpd_find_info_keyword - Locates an information field keyword in the VPD
1776 * @buf: Pointer to buffered vpd data
1777 * @off: The offset into the buffer at which to begin the search
1778 * @len: The length of the buffer area, relative to off, in which to search
1779 * @kw: The keyword to search for
1781 * Returns the index where the information field keyword was found or
1782 * -ENOENT otherwise.
1784 int pci_vpd_find_info_keyword(const u8 *buf, unsigned int off,
1785 unsigned int len, const char *kw);
1787 /* PCI <-> OF binding helpers */
1790 extern void pci_set_of_node(struct pci_dev *dev);
1791 extern void pci_release_of_node(struct pci_dev *dev);
1792 extern void pci_set_bus_of_node(struct pci_bus *bus);
1793 extern void pci_release_bus_of_node(struct pci_bus *bus);
1795 /* Arch may override this (weak) */
1796 extern struct device_node * __weak pcibios_get_phb_of_node(struct pci_bus *bus);
1798 static inline struct device_node *
1799 pci_device_to_OF_node(const struct pci_dev *pdev)
1801 return pdev ? pdev->dev.of_node : NULL;
1804 static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
1806 return bus ? bus->dev.of_node : NULL;
1809 #else /* CONFIG_OF */
1810 static inline void pci_set_of_node(struct pci_dev *dev) { }
1811 static inline void pci_release_of_node(struct pci_dev *dev) { }
1812 static inline void pci_set_bus_of_node(struct pci_bus *bus) { }
1813 static inline void pci_release_bus_of_node(struct pci_bus *bus) { }
1814 #endif /* CONFIG_OF */
1817 static inline struct eeh_dev *pci_dev_to_eeh_dev(struct pci_dev *pdev)
1819 return pdev->dev.archdata.edev;
1824 * pci_find_upstream_pcie_bridge - find upstream PCIe-to-PCI bridge of a device
1825 * @pdev: the PCI device
1827 * if the device is PCIE, return NULL
1828 * if the device isn't connected to a PCIe bridge (that is its parent is a
1829 * legacy PCI bridge and the bridge is directly connected to bus 0), return its
1832 struct pci_dev *pci_find_upstream_pcie_bridge(struct pci_dev *pdev);
1834 #endif /* __KERNEL__ */
1835 #endif /* LINUX_PCI_H */