4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
20 #include <linux/pci_regs.h> /* The pci register defines */
23 * The PCI interface treats multi-function devices as independent
24 * devices. The slot/function address of each device is encoded
25 * in a single byte as follows:
30 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
31 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
32 #define PCI_FUNC(devfn) ((devfn) & 0x07)
34 /* Ioctls for /proc/bus/pci/X/Y nodes. */
35 #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
36 #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
37 #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
38 #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
39 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
43 #include <linux/mod_devicetable.h>
45 #include <linux/types.h>
46 #include <linux/init.h>
47 #include <linux/ioport.h>
48 #include <linux/list.h>
49 #include <linux/compiler.h>
50 #include <linux/errno.h>
51 #include <linux/kobject.h>
52 #include <asm/atomic.h>
53 #include <linux/device.h>
55 #include <linux/irqreturn.h>
57 /* Include the ID list */
58 #include <linux/pci_ids.h>
60 /* pci_slot represents a physical slot */
62 struct pci_bus *bus; /* The bus this slot is on */
63 struct list_head list; /* node in list of slots on this bus */
64 struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */
65 unsigned char number; /* PCI_SLOT(pci_dev->devfn) */
69 static inline const char *pci_slot_name(const struct pci_slot *slot)
71 return kobject_name(&slot->kobj);
74 /* File state for mmap()s on /proc/bus/pci/X/Y */
80 /* This defines the direction arg to the DMA mapping routines. */
81 #define PCI_DMA_BIDIRECTIONAL 0
82 #define PCI_DMA_TODEVICE 1
83 #define PCI_DMA_FROMDEVICE 2
84 #define PCI_DMA_NONE 3
87 * For PCI devices, the region numbers are assigned this way:
90 /* #0-5: standard PCI resources */
92 PCI_STD_RESOURCE_END = 5,
94 /* #6: expansion ROM resource */
97 /* device specific resources */
100 PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1,
103 /* resources assigned to buses behind the bridge */
104 #define PCI_BRIDGE_RESOURCE_NUM 4
106 PCI_BRIDGE_RESOURCES,
107 PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES +
108 PCI_BRIDGE_RESOURCE_NUM - 1,
110 /* total resources associated with a PCI device */
113 /* preserve this for compatibility */
114 DEVICE_COUNT_RESOURCE
117 typedef int __bitwise pci_power_t;
119 #define PCI_D0 ((pci_power_t __force) 0)
120 #define PCI_D1 ((pci_power_t __force) 1)
121 #define PCI_D2 ((pci_power_t __force) 2)
122 #define PCI_D3hot ((pci_power_t __force) 3)
123 #define PCI_D3cold ((pci_power_t __force) 4)
124 #define PCI_UNKNOWN ((pci_power_t __force) 5)
125 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
127 /* Remember to update this when the list above changes! */
128 extern const char *pci_power_names[];
130 static inline const char *pci_power_name(pci_power_t state)
132 return pci_power_names[1 + (int) state];
135 #define PCI_PM_D2_DELAY 200
136 #define PCI_PM_D3_WAIT 10
137 #define PCI_PM_BUS_WAIT 50
139 /** The pci_channel state describes connectivity between the CPU and
140 * the pci device. If some PCI bus between here and the pci device
141 * has crashed or locked up, this info is reflected here.
143 typedef unsigned int __bitwise pci_channel_state_t;
145 enum pci_channel_state {
146 /* I/O channel is in normal state */
147 pci_channel_io_normal = (__force pci_channel_state_t) 1,
149 /* I/O to channel is blocked */
150 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
152 /* PCI card is dead */
153 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
156 typedef unsigned int __bitwise pcie_reset_state_t;
158 enum pcie_reset_state {
159 /* Reset is NOT asserted (Use to deassert reset) */
160 pcie_deassert_reset = (__force pcie_reset_state_t) 1,
162 /* Use #PERST to reset PCI-E device */
163 pcie_warm_reset = (__force pcie_reset_state_t) 2,
165 /* Use PCI-E Hot Reset to reset device */
166 pcie_hot_reset = (__force pcie_reset_state_t) 3
169 typedef unsigned short __bitwise pci_dev_flags_t;
171 /* INTX_DISABLE in PCI_COMMAND register disables MSI
174 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1,
175 /* Device configuration is irrevocably lost if disabled into D3 */
176 PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) 2,
179 enum pci_irq_reroute_variant {
180 INTEL_IRQ_REROUTE_VARIANT = 1,
181 MAX_IRQ_REROUTE_VARIANTS = 3
184 typedef unsigned short __bitwise pci_bus_flags_t;
186 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
187 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
190 struct pci_cap_saved_state {
191 struct hlist_node next;
196 struct pcie_link_state;
201 * The pci_dev structure is used to describe PCI devices.
204 struct list_head bus_list; /* node in per-bus list */
205 struct pci_bus *bus; /* bus this device is on */
206 struct pci_bus *subordinate; /* bus this device bridges to */
208 void *sysdata; /* hook for sys-specific extension */
209 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
210 struct pci_slot *slot; /* Physical slot this device is in */
212 unsigned int devfn; /* encoded device & function index */
213 unsigned short vendor;
214 unsigned short device;
215 unsigned short subsystem_vendor;
216 unsigned short subsystem_device;
217 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
218 u8 revision; /* PCI revision, low byte of class word */
219 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
220 u8 pcie_type; /* PCI-E device/port type */
221 u8 rom_base_reg; /* which config register controls the ROM */
222 u8 pin; /* which interrupt pin this device uses */
224 struct pci_driver *driver; /* which driver has allocated this device */
225 u64 dma_mask; /* Mask of the bits of bus address this
226 device implements. Normally this is
227 0xffffffff. You only need to change
228 this if your device has broken DMA
229 or supports 64-bit transfers. */
231 struct device_dma_parameters dma_parms;
233 pci_power_t current_state; /* Current operating state. In ACPI-speak,
234 this is D0-D3, D0 being fully functional,
236 int pm_cap; /* PM capability offset in the
237 configuration space */
238 unsigned int pme_support:5; /* Bitmask of states from which PME#
240 unsigned int d1_support:1; /* Low power state D1 is supported */
241 unsigned int d2_support:1; /* Low power state D2 is supported */
242 unsigned int no_d1d2:1; /* Only allow D0 and D3 */
244 #ifdef CONFIG_PCIEASPM
245 struct pcie_link_state *link_state; /* ASPM link state. */
248 pci_channel_state_t error_state; /* current connectivity state */
249 struct device dev; /* Generic device interface */
251 int cfg_size; /* Size of configuration space */
254 * Instead of touching interrupt line and base address registers
255 * directly, use the values stored here. They might be different!
258 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
260 /* These fields are used by common fixups */
261 unsigned int transparent:1; /* Transparent PCI bridge */
262 unsigned int multifunction:1;/* Part of multi-function device */
263 /* keep track of device state */
264 unsigned int is_added:1;
265 unsigned int is_busmaster:1; /* device is busmaster */
266 unsigned int no_msi:1; /* device may not use msi */
267 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
268 unsigned int broken_parity_status:1; /* Device generates false positive parity */
269 unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */
270 unsigned int msi_enabled:1;
271 unsigned int msix_enabled:1;
272 unsigned int ari_enabled:1; /* ARI forwarding */
273 unsigned int is_managed:1;
274 unsigned int is_pcie:1;
275 unsigned int state_saved:1;
276 unsigned int is_physfn:1;
277 unsigned int is_virtfn:1;
278 pci_dev_flags_t dev_flags;
279 atomic_t enable_cnt; /* pci_enable_device has been called */
281 u32 saved_config_space[16]; /* config space saved at suspend time */
282 struct hlist_head saved_cap_space;
283 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
284 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
285 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
286 struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE]; /* sysfs file for WC mapping of resources */
287 #ifdef CONFIG_PCI_MSI
288 struct list_head msi_list;
291 #ifdef CONFIG_PCI_IOV
293 struct pci_sriov *sriov; /* SR-IOV capability related */
294 struct pci_dev *physfn; /* the PF this VF is associated with */
299 extern struct pci_dev *alloc_pci_dev(void);
301 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
302 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
303 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
305 static inline int pci_channel_offline(struct pci_dev *pdev)
307 return (pdev->error_state != pci_channel_io_normal);
310 static inline struct pci_cap_saved_state *pci_find_saved_cap(
311 struct pci_dev *pci_dev, char cap)
313 struct pci_cap_saved_state *tmp;
314 struct hlist_node *pos;
316 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
317 if (tmp->cap_nr == cap)
323 static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
324 struct pci_cap_saved_state *new_cap)
326 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
329 #ifndef PCI_BUS_NUM_RESOURCES
330 #define PCI_BUS_NUM_RESOURCES 16
333 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
336 struct list_head node; /* node in list of buses */
337 struct pci_bus *parent; /* parent bus this bridge is on */
338 struct list_head children; /* list of child buses */
339 struct list_head devices; /* list of devices on this bus */
340 struct pci_dev *self; /* bridge device as seen by parent */
341 struct list_head slots; /* list of slots on this bus */
342 struct resource *resource[PCI_BUS_NUM_RESOURCES];
343 /* address space routed to this bus */
345 struct pci_ops *ops; /* configuration access functions */
346 void *sysdata; /* hook for sys-specific extension */
347 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
349 unsigned char number; /* bus number */
350 unsigned char primary; /* number of primary bridge */
351 unsigned char secondary; /* number of secondary bridge */
352 unsigned char subordinate; /* max number of subordinate buses */
356 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
357 pci_bus_flags_t bus_flags; /* Inherited by child busses */
358 struct device *bridge;
360 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
361 struct bin_attribute *legacy_mem; /* legacy mem */
362 unsigned int is_added:1;
365 #define pci_bus_b(n) list_entry(n, struct pci_bus, node)
366 #define to_pci_bus(n) container_of(n, struct pci_bus, dev)
369 * Returns true if the pci bus is root (behind host-pci bridge),
372 static inline bool pci_is_root_bus(struct pci_bus *pbus)
374 return !(pbus->parent);
377 #ifdef CONFIG_PCI_MSI
378 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev)
380 return pci_dev->msi_enabled || pci_dev->msix_enabled;
383 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; }
387 * Error values that may be returned by PCI functions.
389 #define PCIBIOS_SUCCESSFUL 0x00
390 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
391 #define PCIBIOS_BAD_VENDOR_ID 0x83
392 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
393 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
394 #define PCIBIOS_SET_FAILED 0x88
395 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
397 /* Low-level architecture-dependent routines */
400 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
401 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
405 * ACPI needs to be able to access PCI config space before we've done a
406 * PCI bus scan and created pci_bus structures.
408 extern int raw_pci_read(unsigned int domain, unsigned int bus,
409 unsigned int devfn, int reg, int len, u32 *val);
410 extern int raw_pci_write(unsigned int domain, unsigned int bus,
411 unsigned int devfn, int reg, int len, u32 val);
413 struct pci_bus_region {
414 resource_size_t start;
419 spinlock_t lock; /* protects list, index */
420 struct list_head list; /* for IDs added at runtime */
423 /* ---------------------------------------------------------------- */
424 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
425 * a set of callbacks in struct pci_error_handlers, then that device driver
426 * will be notified of PCI bus errors, and will be driven to recovery
427 * when an error occurs.
430 typedef unsigned int __bitwise pci_ers_result_t;
432 enum pci_ers_result {
433 /* no result/none/not supported in device driver */
434 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
436 /* Device driver can recover without slot reset */
437 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
439 /* Device driver wants slot to be reset. */
440 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
442 /* Device has completely failed, is unrecoverable */
443 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
445 /* Device driver is fully recovered and operational */
446 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
449 /* PCI bus error event callbacks */
450 struct pci_error_handlers {
451 /* PCI bus error detected on this device */
452 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
453 enum pci_channel_state error);
455 /* MMIO has been re-enabled, but not DMA */
456 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
458 /* PCI Express link has been reset */
459 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
461 /* PCI slot has been reset */
462 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
464 /* Device driver may resume normal operations */
465 void (*resume)(struct pci_dev *dev);
468 /* ---------------------------------------------------------------- */
472 struct list_head node;
474 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
475 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
476 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
477 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
478 int (*suspend_late) (struct pci_dev *dev, pm_message_t state);
479 int (*resume_early) (struct pci_dev *dev);
480 int (*resume) (struct pci_dev *dev); /* Device woken up */
481 void (*shutdown) (struct pci_dev *dev);
482 struct pci_error_handlers *err_handler;
483 struct device_driver driver;
484 struct pci_dynids dynids;
487 #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver)
490 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table
491 * @_table: device table name
493 * This macro is used to create a struct pci_device_id array (a device table)
494 * in a generic manner.
496 #define DEFINE_PCI_DEVICE_TABLE(_table) \
497 const struct pci_device_id _table[] __devinitconst
500 * PCI_DEVICE - macro used to describe a specific pci device
501 * @vend: the 16 bit PCI Vendor ID
502 * @dev: the 16 bit PCI Device ID
504 * This macro is used to create a struct pci_device_id that matches a
505 * specific device. The subvendor and subdevice fields will be set to
508 #define PCI_DEVICE(vend,dev) \
509 .vendor = (vend), .device = (dev), \
510 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
513 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
514 * @dev_class: the class, subclass, prog-if triple for this device
515 * @dev_class_mask: the class mask for this device
517 * This macro is used to create a struct pci_device_id that matches a
518 * specific PCI class. The vendor, device, subvendor, and subdevice
519 * fields will be set to PCI_ANY_ID.
521 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
522 .class = (dev_class), .class_mask = (dev_class_mask), \
523 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
524 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
527 * PCI_VDEVICE - macro used to describe a specific pci device in short form
528 * @vendor: the vendor name
529 * @device: the 16 bit PCI Device ID
531 * This macro is used to create a struct pci_device_id that matches a
532 * specific PCI device. The subvendor, and subdevice fields will be set
533 * to PCI_ANY_ID. The macro allows the next field to follow as the device
537 #define PCI_VDEVICE(vendor, device) \
538 PCI_VENDOR_ID_##vendor, (device), \
539 PCI_ANY_ID, PCI_ANY_ID, 0, 0
541 /* these external functions are only available when PCI support is enabled */
544 extern struct bus_type pci_bus_type;
546 /* Do NOT directly access these two variables, unless you are arch specific pci
547 * code, or pci core code. */
548 extern struct list_head pci_root_buses; /* list of all known PCI buses */
549 /* Some device drivers need know if pci is initiated */
550 extern int no_pci_devices(void);
552 void pcibios_fixup_bus(struct pci_bus *);
553 int __must_check pcibios_enable_device(struct pci_dev *, int mask);
554 char *pcibios_setup(char *str);
556 /* Used only when drivers/pci/setup.c is used */
557 void pcibios_align_resource(void *, struct resource *, resource_size_t,
559 void pcibios_update_irq(struct pci_dev *, int irq);
561 /* Generic PCI functions used internally */
563 extern struct pci_bus *pci_find_bus(int domain, int busnr);
564 void pci_bus_add_devices(const struct pci_bus *bus);
565 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus,
566 struct pci_ops *ops, void *sysdata);
567 static inline struct pci_bus * __devinit pci_scan_bus(int bus, struct pci_ops *ops,
570 struct pci_bus *root_bus;
571 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
573 pci_bus_add_devices(root_bus);
576 struct pci_bus *pci_create_bus(struct device *parent, int bus,
577 struct pci_ops *ops, void *sysdata);
578 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
580 struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr,
582 struct hotplug_slot *hotplug);
583 void pci_destroy_slot(struct pci_slot *slot);
584 void pci_renumber_slot(struct pci_slot *slot, int slot_nr);
585 int pci_scan_slot(struct pci_bus *bus, int devfn);
586 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
587 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
588 unsigned int pci_scan_child_bus(struct pci_bus *bus);
589 int __must_check pci_bus_add_device(struct pci_dev *dev);
590 void pci_read_bridge_bases(struct pci_bus *child);
591 struct resource *pci_find_parent_resource(const struct pci_dev *dev,
592 struct resource *res);
593 u8 pci_swizzle_interrupt_pin(struct pci_dev *dev, u8 pin);
594 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
595 u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp);
596 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
597 extern void pci_dev_put(struct pci_dev *dev);
598 extern void pci_remove_bus(struct pci_bus *b);
599 extern void pci_remove_bus_device(struct pci_dev *dev);
600 extern void pci_stop_bus_device(struct pci_dev *dev);
601 void pci_setup_cardbus(struct pci_bus *bus);
602 extern void pci_sort_breadthfirst(void);
604 /* Generic PCI functions exported to card drivers */
606 #ifdef CONFIG_PCI_LEGACY
607 struct pci_dev __deprecated *pci_find_device(unsigned int vendor,
609 struct pci_dev *from);
610 #endif /* CONFIG_PCI_LEGACY */
612 enum pci_lost_interrupt_reason {
613 PCI_LOST_IRQ_NO_INFORMATION = 0,
614 PCI_LOST_IRQ_DISABLE_MSI,
615 PCI_LOST_IRQ_DISABLE_MSIX,
616 PCI_LOST_IRQ_DISABLE_ACPI,
618 enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev);
619 int pci_find_capability(struct pci_dev *dev, int cap);
620 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
621 int pci_find_ext_capability(struct pci_dev *dev, int cap);
622 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
623 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
624 struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
626 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
627 struct pci_dev *from);
628 struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
629 unsigned int ss_vendor, unsigned int ss_device,
630 struct pci_dev *from);
631 struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
632 struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn);
633 struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
634 int pci_dev_present(const struct pci_device_id *ids);
636 int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
638 int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn,
639 int where, u16 *val);
640 int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn,
641 int where, u32 *val);
642 int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn,
644 int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
646 int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
648 struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops);
650 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
652 return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
654 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
656 return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
658 static inline int pci_read_config_dword(struct pci_dev *dev, int where,
661 return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
663 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
665 return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val);
667 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
669 return pci_bus_write_config_word(dev->bus, dev->devfn, where, val);
671 static inline int pci_write_config_dword(struct pci_dev *dev, int where,
674 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
677 int __must_check pci_enable_device(struct pci_dev *dev);
678 int __must_check pci_enable_device_io(struct pci_dev *dev);
679 int __must_check pci_enable_device_mem(struct pci_dev *dev);
680 int __must_check pci_reenable_device(struct pci_dev *);
681 int __must_check pcim_enable_device(struct pci_dev *pdev);
682 void pcim_pin_device(struct pci_dev *pdev);
684 static inline int pci_is_enabled(struct pci_dev *pdev)
686 return (atomic_read(&pdev->enable_cnt) > 0);
689 static inline int pci_is_managed(struct pci_dev *pdev)
691 return pdev->is_managed;
694 void pci_disable_device(struct pci_dev *dev);
695 void pci_set_master(struct pci_dev *dev);
696 void pci_clear_master(struct pci_dev *dev);
697 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
698 #define HAVE_PCI_SET_MWI
699 int __must_check pci_set_mwi(struct pci_dev *dev);
700 int pci_try_set_mwi(struct pci_dev *dev);
701 void pci_clear_mwi(struct pci_dev *dev);
702 void pci_intx(struct pci_dev *dev, int enable);
703 void pci_msi_off(struct pci_dev *dev);
704 int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
705 int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
706 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
707 int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
708 int pcix_get_max_mmrbc(struct pci_dev *dev);
709 int pcix_get_mmrbc(struct pci_dev *dev);
710 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
711 int pcie_get_readrq(struct pci_dev *dev);
712 int pcie_set_readrq(struct pci_dev *dev, int rq);
713 int __pci_reset_function(struct pci_dev *dev);
714 int pci_reset_function(struct pci_dev *dev);
715 void pci_update_resource(struct pci_dev *dev, int resno);
716 int __must_check pci_assign_resource(struct pci_dev *dev, int i);
717 int pci_select_bars(struct pci_dev *dev, unsigned long flags);
719 /* ROM control related routines */
720 int pci_enable_rom(struct pci_dev *pdev);
721 void pci_disable_rom(struct pci_dev *pdev);
722 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
723 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
724 size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size);
726 /* Power management related routines */
727 int pci_save_state(struct pci_dev *dev);
728 int pci_restore_state(struct pci_dev *dev);
729 int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state);
730 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
731 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
732 bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
733 void pci_pme_active(struct pci_dev *dev, bool enable);
734 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, bool enable);
735 int pci_wake_from_d3(struct pci_dev *dev, bool enable);
736 pci_power_t pci_target_state(struct pci_dev *dev);
737 int pci_prepare_to_sleep(struct pci_dev *dev);
738 int pci_back_from_sleep(struct pci_dev *dev);
740 /* Functions for PCI Hotplug drivers to use */
741 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
742 #ifdef CONFIG_HOTPLUG
743 unsigned int pci_rescan_bus(struct pci_bus *bus);
746 /* Vital product data routines */
747 ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
748 ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
749 int pci_vpd_truncate(struct pci_dev *dev, size_t size);
751 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
752 void pci_bus_assign_resources(const struct pci_bus *bus);
753 void pci_bus_size_bridges(struct pci_bus *bus);
754 int pci_claim_resource(struct pci_dev *, int);
755 void pci_assign_unassigned_resources(void);
756 void pdev_enable_device(struct pci_dev *);
757 void pdev_sort_resources(struct pci_dev *, struct resource_list *);
758 int pci_enable_resources(struct pci_dev *, int mask);
759 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
760 int (*)(struct pci_dev *, u8, u8));
761 #define HAVE_PCI_REQ_REGIONS 2
762 int __must_check pci_request_regions(struct pci_dev *, const char *);
763 int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *);
764 void pci_release_regions(struct pci_dev *);
765 int __must_check pci_request_region(struct pci_dev *, int, const char *);
766 int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *);
767 void pci_release_region(struct pci_dev *, int);
768 int pci_request_selected_regions(struct pci_dev *, int, const char *);
769 int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *);
770 void pci_release_selected_regions(struct pci_dev *, int);
772 /* drivers/pci/bus.c */
773 int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
774 struct resource *res, resource_size_t size,
775 resource_size_t align, resource_size_t min,
776 unsigned int type_mask,
777 void (*alignf)(void *, struct resource *,
778 resource_size_t, resource_size_t),
780 void pci_enable_bridges(struct pci_bus *bus);
782 /* Proper probing supporting hot-pluggable devices */
783 int __must_check __pci_register_driver(struct pci_driver *, struct module *,
784 const char *mod_name);
787 * pci_register_driver must be a macro so that KBUILD_MODNAME can be expanded
789 #define pci_register_driver(driver) \
790 __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME)
792 void pci_unregister_driver(struct pci_driver *dev);
793 void pci_remove_behind_bridge(struct pci_dev *dev);
794 struct pci_driver *pci_dev_driver(const struct pci_dev *dev);
795 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
796 struct pci_dev *dev);
797 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
800 void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
802 int pci_cfg_space_size_ext(struct pci_dev *dev);
803 int pci_cfg_space_size(struct pci_dev *dev);
804 unsigned char pci_bus_max_busnr(struct pci_bus *bus);
806 /* kmem_cache style wrapper around pci_alloc_consistent() */
808 #include <linux/dmapool.h>
810 #define pci_pool dma_pool
811 #define pci_pool_create(name, pdev, size, align, allocation) \
812 dma_pool_create(name, &pdev->dev, size, align, allocation)
813 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
814 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
815 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
817 enum pci_dma_burst_strategy {
818 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
819 strategy_parameter is N/A */
820 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
822 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
823 strategy_parameter byte boundaries */
827 u32 vector; /* kernel uses to write allocated vector */
828 u16 entry; /* driver uses to specify entry, OS writes */
832 #ifndef CONFIG_PCI_MSI
833 static inline int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec)
838 static inline void pci_msi_shutdown(struct pci_dev *dev)
840 static inline void pci_disable_msi(struct pci_dev *dev)
843 static inline int pci_msix_table_size(struct pci_dev *dev)
847 static inline int pci_enable_msix(struct pci_dev *dev,
848 struct msix_entry *entries, int nvec)
853 static inline void pci_msix_shutdown(struct pci_dev *dev)
855 static inline void pci_disable_msix(struct pci_dev *dev)
858 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev)
861 static inline void pci_restore_msi_state(struct pci_dev *dev)
863 static inline int pci_msi_enabled(void)
868 extern int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec);
869 extern void pci_msi_shutdown(struct pci_dev *dev);
870 extern void pci_disable_msi(struct pci_dev *dev);
871 extern int pci_msix_table_size(struct pci_dev *dev);
872 extern int pci_enable_msix(struct pci_dev *dev,
873 struct msix_entry *entries, int nvec);
874 extern void pci_msix_shutdown(struct pci_dev *dev);
875 extern void pci_disable_msix(struct pci_dev *dev);
876 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
877 extern void pci_restore_msi_state(struct pci_dev *dev);
878 extern int pci_msi_enabled(void);
881 #ifndef CONFIG_PCIEASPM
882 static inline int pcie_aspm_enabled(void)
887 extern int pcie_aspm_enabled(void);
890 #ifndef CONFIG_PCIE_ECRC
891 static inline void pcie_set_ecrc_checking(struct pci_dev *dev)
895 static inline void pcie_ecrc_get_policy(char *str) {};
897 extern void pcie_set_ecrc_checking(struct pci_dev *dev);
898 extern void pcie_ecrc_get_policy(char *str);
901 #define pci_enable_msi(pdev) pci_enable_msi_block(pdev, 1)
904 /* The functions a driver should call */
905 int ht_create_irq(struct pci_dev *dev, int idx);
906 void ht_destroy_irq(unsigned int irq);
907 #endif /* CONFIG_HT_IRQ */
909 extern void pci_block_user_cfg_access(struct pci_dev *dev);
910 extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
913 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
914 * a PCI domain is defined to be a set of PCI busses which share
915 * configuration space.
917 #ifdef CONFIG_PCI_DOMAINS
918 extern int pci_domains_supported;
920 enum { pci_domains_supported = 0 };
921 static inline int pci_domain_nr(struct pci_bus *bus)
926 static inline int pci_proc_domain(struct pci_bus *bus)
930 #endif /* CONFIG_PCI_DOMAINS */
932 #else /* CONFIG_PCI is not enabled */
935 * If the system does not have PCI, clearly these return errors. Define
936 * these as simple inline functions to avoid hair in drivers.
939 #define _PCI_NOP(o, s, t) \
940 static inline int pci_##o##_config_##s(struct pci_dev *dev, \
942 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
944 #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \
945 _PCI_NOP(o, word, u16 x) \
946 _PCI_NOP(o, dword, u32 x)
947 _PCI_NOP_ALL(read, *)
950 static inline struct pci_dev *pci_find_device(unsigned int vendor,
952 struct pci_dev *from)
957 static inline struct pci_dev *pci_get_device(unsigned int vendor,
959 struct pci_dev *from)
964 static inline struct pci_dev *pci_get_subsys(unsigned int vendor,
966 unsigned int ss_vendor,
967 unsigned int ss_device,
968 struct pci_dev *from)
973 static inline struct pci_dev *pci_get_class(unsigned int class,
974 struct pci_dev *from)
979 #define pci_dev_present(ids) (0)
980 #define no_pci_devices() (1)
981 #define pci_dev_put(dev) do { } while (0)
983 static inline void pci_set_master(struct pci_dev *dev)
986 static inline int pci_enable_device(struct pci_dev *dev)
991 static inline void pci_disable_device(struct pci_dev *dev)
994 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
999 static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
1004 static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
1010 static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
1016 static inline int pci_assign_resource(struct pci_dev *dev, int i)
1021 static inline int __pci_register_driver(struct pci_driver *drv,
1022 struct module *owner)
1027 static inline int pci_register_driver(struct pci_driver *drv)
1032 static inline void pci_unregister_driver(struct pci_driver *drv)
1035 static inline int pci_find_capability(struct pci_dev *dev, int cap)
1040 static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
1046 static inline int pci_find_ext_capability(struct pci_dev *dev, int cap)
1051 /* Power management related routines */
1052 static inline int pci_save_state(struct pci_dev *dev)
1057 static inline int pci_restore_state(struct pci_dev *dev)
1062 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
1067 static inline pci_power_t pci_choose_state(struct pci_dev *dev,
1073 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
1079 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
1084 static inline void pci_release_regions(struct pci_dev *dev)
1087 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
1089 static inline void pci_block_user_cfg_access(struct pci_dev *dev)
1092 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev)
1095 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
1098 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
1102 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
1106 #endif /* CONFIG_PCI */
1108 /* Include architecture-dependent settings and functions */
1110 #include <asm/pci.h>
1112 #ifndef PCIBIOS_MAX_MEM_32
1113 #define PCIBIOS_MAX_MEM_32 (-1)
1116 /* these helpers provide future and backwards compatibility
1117 * for accessing popular PCI BAR info */
1118 #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)
1119 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
1120 #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags)
1121 #define pci_resource_len(dev,bar) \
1122 ((pci_resource_start((dev), (bar)) == 0 && \
1123 pci_resource_end((dev), (bar)) == \
1124 pci_resource_start((dev), (bar))) ? 0 : \
1126 (pci_resource_end((dev), (bar)) - \
1127 pci_resource_start((dev), (bar)) + 1))
1129 /* Similar to the helpers above, these manipulate per-pci_dev
1130 * driver-specific data. They are really just a wrapper around
1131 * the generic device structure functions of these calls.
1133 static inline void *pci_get_drvdata(struct pci_dev *pdev)
1135 return dev_get_drvdata(&pdev->dev);
1138 static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
1140 dev_set_drvdata(&pdev->dev, data);
1143 /* If you want to know what to call your pci_dev, ask this function.
1144 * Again, it's a wrapper around the generic device.
1146 static inline const char *pci_name(struct pci_dev *pdev)
1148 return dev_name(&pdev->dev);
1152 /* Some archs don't want to expose struct resource to userland as-is
1153 * in sysfs and /proc
1155 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
1156 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
1157 const struct resource *rsrc, resource_size_t *start,
1158 resource_size_t *end)
1160 *start = rsrc->start;
1163 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
1167 * The world is not perfect and supplies us with broken PCI devices.
1168 * For at least a part of these bugs we need a work-around, so both
1169 * generic (drivers/pci/quirks.c) and per-architecture code can define
1170 * fixup hooks to be called for particular buggy devices.
1174 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
1175 void (*hook)(struct pci_dev *dev);
1178 enum pci_fixup_pass {
1179 pci_fixup_early, /* Before probing BARs */
1180 pci_fixup_header, /* After reading configuration header */
1181 pci_fixup_final, /* Final phase of device fixups */
1182 pci_fixup_enable, /* pci_enable_device() time */
1183 pci_fixup_resume, /* pci_device_resume() */
1184 pci_fixup_suspend, /* pci_device_suspend */
1185 pci_fixup_resume_early, /* pci_device_resume_early() */
1188 /* Anonymous variables would be nice... */
1189 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
1190 static const struct pci_fixup __pci_fixup_##name __used \
1191 __attribute__((__section__(#section))) = { vendor, device, hook };
1192 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
1193 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1194 vendor##device##hook, vendor, device, hook)
1195 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
1196 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1197 vendor##device##hook, vendor, device, hook)
1198 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
1199 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1200 vendor##device##hook, vendor, device, hook)
1201 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
1202 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1203 vendor##device##hook, vendor, device, hook)
1204 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
1205 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1206 resume##vendor##device##hook, vendor, device, hook)
1207 #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \
1208 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \
1209 resume_early##vendor##device##hook, vendor, device, hook)
1210 #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \
1211 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \
1212 suspend##vendor##device##hook, vendor, device, hook)
1215 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
1217 void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
1218 void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
1219 void __iomem * const *pcim_iomap_table(struct pci_dev *pdev);
1220 int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name);
1221 int pcim_iomap_regions_request_all(struct pci_dev *pdev, u16 mask,
1223 void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask);
1225 extern int pci_pci_problems;
1226 #define PCIPCI_FAIL 1 /* No PCI PCI DMA */
1227 #define PCIPCI_TRITON 2
1228 #define PCIPCI_NATOMA 4
1229 #define PCIPCI_VIAETBF 8
1230 #define PCIPCI_VSFX 16
1231 #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */
1232 #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */
1234 extern unsigned long pci_cardbus_io_size;
1235 extern unsigned long pci_cardbus_mem_size;
1237 int pcibios_add_platform_entries(struct pci_dev *dev);
1238 void pcibios_disable_device(struct pci_dev *dev);
1239 int pcibios_set_pcie_reset_state(struct pci_dev *dev,
1240 enum pcie_reset_state state);
1242 #ifdef CONFIG_PCI_MMCONFIG
1243 extern void __init pci_mmcfg_early_init(void);
1244 extern void __init pci_mmcfg_late_init(void);
1246 static inline void pci_mmcfg_early_init(void) { }
1247 static inline void pci_mmcfg_late_init(void) { }
1250 int pci_ext_cfg_avail(struct pci_dev *dev);
1252 void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar);
1254 #ifdef CONFIG_PCI_IOV
1255 extern int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn);
1256 extern void pci_disable_sriov(struct pci_dev *dev);
1257 extern irqreturn_t pci_sriov_migration(struct pci_dev *dev);
1259 static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
1263 static inline void pci_disable_sriov(struct pci_dev *dev)
1266 static inline irqreturn_t pci_sriov_migration(struct pci_dev *dev)
1272 #if defined(CONFIG_HOTPLUG_PCI) || defined(CONFIG_HOTPLUG_PCI_MODULE)
1273 extern void pci_hp_create_module_link(struct pci_slot *pci_slot);
1274 extern void pci_hp_remove_module_link(struct pci_slot *pci_slot);
1277 #endif /* __KERNEL__ */
1278 #endif /* LINUX_PCI_H */