1 /* Copyright (c) 2010-2015, The Linux Foundation. All rights reserved.
2 * Copyright (C) 2015 Linaro Ltd.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
16 #define QCOM_SCM_VERSION(major, minor) (((major) << 16) | ((minor) & 0xFF))
17 #define QCOM_SCM_CPU_PWR_DOWN_L2_ON 0x0
18 #define QCOM_SCM_CPU_PWR_DOWN_L2_OFF 0x1
19 #define QCOM_SCM_HDCP_MAX_REQ_CNT 5
21 struct qcom_scm_hdcp_req {
26 #if IS_ENABLED(CONFIG_QCOM_SCM)
27 extern int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus);
28 extern int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus);
29 extern bool qcom_scm_is_available(void);
30 extern bool qcom_scm_hdcp_available(void);
31 extern int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt,
33 extern bool qcom_scm_pas_supported(u32 peripheral);
34 extern int qcom_scm_pas_init_image(u32 peripheral, const void *metadata,
36 extern int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr,
38 extern int qcom_scm_pas_auth_and_reset(u32 peripheral);
39 extern int qcom_scm_pas_shutdown(u32 peripheral);
40 extern void qcom_scm_cpu_power_down(u32 flags);
41 extern u32 qcom_scm_get_version(void);
42 extern int qcom_scm_set_remote_state(u32 state, u32 id);
45 int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
50 int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus)
54 static inline bool qcom_scm_is_available(void) { return false; }
55 static inline bool qcom_scm_hdcp_available(void) { return false; }
56 static inline int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt,
57 u32 *resp) { return -ENODEV; }
58 static inline bool qcom_scm_pas_supported(u32 peripheral) { return false; }
59 static inline int qcom_scm_pas_init_image(u32 peripheral, const void *metadata,
60 size_t size) { return -ENODEV; }
61 static inline int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr,
62 phys_addr_t size) { return -ENODEV; }
64 qcom_scm_pas_auth_and_reset(u32 peripheral) { return -ENODEV; }
65 static inline int qcom_scm_pas_shutdown(u32 peripheral) { return -ENODEV; }
66 static inline void qcom_scm_cpu_power_down(u32 flags) {}
67 static inline u32 qcom_scm_get_version(void) { return 0; }
69 qcom_scm_set_remote_state(u32 state,u32 id) { return -ENODEV; }