4 #include <linux/list.h>
5 #include <linux/seq_file.h>
6 #include <linux/cpufreq.h>
13 void (*init)(struct clk *clk);
14 int (*enable)(struct clk *clk);
15 void (*disable)(struct clk *clk);
16 unsigned long (*recalc)(struct clk *clk);
17 int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id);
18 int (*set_parent)(struct clk *clk, struct clk *parent);
19 long (*round_rate)(struct clk *clk, unsigned long rate);
23 struct list_head node;
25 struct clk **parent_table; /* list of parents to */
26 unsigned short parent_num; /* choose between */
27 unsigned char src_shift; /* source clock field in the */
28 unsigned char src_width; /* configuration register */
31 struct list_head children;
32 struct list_head sibling; /* node for children */
39 void __iomem *enable_reg;
40 unsigned int enable_bit;
42 unsigned long arch_flags;
44 struct dentry *dentry;
45 struct cpufreq_frequency_table *freq_table;
48 #define CLK_ENABLE_ON_INIT (1 << 0)
50 /* drivers/sh/clk.c */
51 unsigned long followparent_recalc(struct clk *);
52 void recalculate_root_clocks(void);
53 void propagate_rate(struct clk *);
54 int clk_reparent(struct clk *child, struct clk *parent);
55 int clk_register(struct clk *);
56 void clk_unregister(struct clk *);
57 void clk_enable_init_clocks(void);
60 * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter
62 * @rate: desired clock rate in Hz
63 * @algo_id: algorithm id to be passed down to ops->set_rate
65 * Returns success (0) or negative errno.
67 int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id);
89 struct clk_div_mult_table {
90 unsigned int *divisors;
91 unsigned int nr_divisors;
92 unsigned int *multipliers;
93 unsigned int nr_multipliers;
96 struct cpufreq_frequency_table;
97 void clk_rate_table_build(struct clk *clk,
98 struct cpufreq_frequency_table *freq_table,
100 struct clk_div_mult_table *src_table,
101 unsigned long *bitmap);
103 long clk_rate_table_round(struct clk *clk,
104 struct cpufreq_frequency_table *freq_table,
107 int clk_rate_table_find(struct clk *clk,
108 struct cpufreq_frequency_table *freq_table,
111 #define SH_CLK_MSTP32(_parent, _enable_reg, _enable_bit, _flags) \
114 .enable_reg = (void __iomem *)_enable_reg, \
115 .enable_bit = _enable_bit, \
119 int sh_clk_mstp32_register(struct clk *clks, int nr);
121 #define SH_CLK_DIV4(_parent, _reg, _shift, _div_bitmap, _flags) \
124 .enable_reg = (void __iomem *)_reg, \
125 .enable_bit = _shift, \
126 .arch_flags = _div_bitmap, \
130 struct clk_div4_table {
131 struct clk_div_mult_table *div_mult_table;
132 void (*kick)(struct clk *clk);
135 int sh_clk_div4_register(struct clk *clks, int nr,
136 struct clk_div4_table *table);
137 int sh_clk_div4_enable_register(struct clk *clks, int nr,
138 struct clk_div4_table *table);
139 int sh_clk_div4_reparent_register(struct clk *clks, int nr,
140 struct clk_div4_table *table);
142 #define SH_CLK_DIV6_EXT(_parent, _reg, _flags, _parents, \
143 _num_parents, _src_shift, _src_width) \
146 .enable_reg = (void __iomem *)_reg, \
148 .parent_table = _parents, \
149 .parent_num = _num_parents, \
150 .src_shift = _src_shift, \
151 .src_width = _src_width, \
154 #define SH_CLK_DIV6(_parent, _reg, _flags) \
155 SH_CLK_DIV6_EXT(_parent, _reg, _flags, NULL, 0, 0, 0)
157 int sh_clk_div6_register(struct clk *clks, int nr);
158 int sh_clk_div6_reparent_register(struct clk *clks, int nr);
160 #endif /* __SH_CLOCK_H */