2 * Copyright (C) 2005 David Brownell
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
18 #include <linux/device.h>
19 #include <linux/mod_devicetable.h>
20 #include <linux/slab.h>
21 #include <linux/kthread.h>
22 #include <linux/completion.h>
23 #include <linux/scatterlist.h>
28 struct spi_flash_read_message;
31 * INTERFACES between SPI master-side drivers and SPI infrastructure.
32 * (There's no SPI slave support for Linux yet...)
34 extern struct bus_type spi_bus_type;
37 * struct spi_statistics - statistics for spi transfers
38 * @lock: lock protecting this structure
40 * @messages: number of spi-messages handled
41 * @transfers: number of spi_transfers handled
42 * @errors: number of errors during spi_transfer
43 * @timedout: number of timeouts during spi_transfer
45 * @spi_sync: number of times spi_sync is used
46 * @spi_sync_immediate:
47 * number of times spi_sync is executed immediately
48 * in calling context without queuing and scheduling
49 * @spi_async: number of times spi_async is used
51 * @bytes: number of bytes transferred to/from device
52 * @bytes_tx: number of bytes sent to device
53 * @bytes_rx: number of bytes received from device
55 * @transfer_bytes_histo:
56 * transfer bytes histogramm
58 struct spi_statistics {
59 spinlock_t lock; /* lock for the whole structure */
61 unsigned long messages;
62 unsigned long transfers;
64 unsigned long timedout;
66 unsigned long spi_sync;
67 unsigned long spi_sync_immediate;
68 unsigned long spi_async;
70 unsigned long long bytes;
71 unsigned long long bytes_rx;
72 unsigned long long bytes_tx;
74 #define SPI_STATISTICS_HISTO_SIZE 17
75 unsigned long transfer_bytes_histo[SPI_STATISTICS_HISTO_SIZE];
78 void spi_statistics_add_transfer_stats(struct spi_statistics *stats,
79 struct spi_transfer *xfer,
80 struct spi_master *master);
82 #define SPI_STATISTICS_ADD_TO_FIELD(stats, field, count) \
84 unsigned long flags; \
85 spin_lock_irqsave(&(stats)->lock, flags); \
86 (stats)->field += count; \
87 spin_unlock_irqrestore(&(stats)->lock, flags); \
90 #define SPI_STATISTICS_INCREMENT_FIELD(stats, field) \
91 SPI_STATISTICS_ADD_TO_FIELD(stats, field, 1)
94 * struct spi_device - Master side proxy for an SPI slave device
95 * @dev: Driver model representation of the device.
96 * @master: SPI controller used with the device.
97 * @max_speed_hz: Maximum clock rate to be used with this chip
98 * (on this board); may be changed by the device's driver.
99 * The spi_transfer.speed_hz can override this for each transfer.
100 * @chip_select: Chipselect, distinguishing chips handled by @master.
101 * @mode: The spi mode defines how data is clocked out and in.
102 * This may be changed by the device's driver.
103 * The "active low" default for chipselect mode can be overridden
104 * (by specifying SPI_CS_HIGH) as can the "MSB first" default for
105 * each word in a transfer (by specifying SPI_LSB_FIRST).
106 * @bits_per_word: Data transfers involve one or more words; word sizes
107 * like eight or 12 bits are common. In-memory wordsizes are
108 * powers of two bytes (e.g. 20 bit samples use 32 bits).
109 * This may be changed by the device's driver, or left at the
110 * default (0) indicating protocol words are eight bit bytes.
111 * The spi_transfer.bits_per_word can override this for each transfer.
112 * @irq: Negative, or the number passed to request_irq() to receive
113 * interrupts from this device.
114 * @controller_state: Controller's runtime state
115 * @controller_data: Board-specific definitions for controller, such as
116 * FIFO initialization parameters; from board_info.controller_data
117 * @modalias: Name of the driver to use with this device, or an alias
118 * for that name. This appears in the sysfs "modalias" attribute
119 * for driver coldplugging, and in uevents used for hotplugging
120 * @cs_gpio: gpio number of the chipselect line (optional, -ENOENT when
121 * when not using a GPIO line)
123 * @statistics: statistics for the spi_device
125 * A @spi_device is used to interchange data between an SPI slave
126 * (usually a discrete chip) and CPU memory.
128 * In @dev, the platform_data is used to hold information about this
129 * device that's meaningful to the device's protocol driver, but not
130 * to its controller. One example might be an identifier for a chip
131 * variant with slightly different functionality; another might be
132 * information about how this particular board wires the chip's pins.
136 struct spi_master *master;
141 #define SPI_CPHA 0x01 /* clock phase */
142 #define SPI_CPOL 0x02 /* clock polarity */
143 #define SPI_MODE_0 (0|0) /* (original MicroWire) */
144 #define SPI_MODE_1 (0|SPI_CPHA)
145 #define SPI_MODE_2 (SPI_CPOL|0)
146 #define SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
147 #define SPI_CS_HIGH 0x04 /* chipselect active high? */
148 #define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */
149 #define SPI_3WIRE 0x10 /* SI/SO signals shared */
150 #define SPI_LOOP 0x20 /* loopback mode */
151 #define SPI_NO_CS 0x40 /* 1 dev/bus, no chipselect */
152 #define SPI_READY 0x80 /* slave pulls low to pause */
153 #define SPI_TX_DUAL 0x100 /* transmit with 2 wires */
154 #define SPI_TX_QUAD 0x200 /* transmit with 4 wires */
155 #define SPI_RX_DUAL 0x400 /* receive with 2 wires */
156 #define SPI_RX_QUAD 0x800 /* receive with 4 wires */
158 void *controller_state;
159 void *controller_data;
160 char modalias[SPI_NAME_SIZE];
161 int cs_gpio; /* chip select gpio */
164 struct spi_statistics statistics;
167 * likely need more hooks for more protocol options affecting how
168 * the controller talks to each chip, like:
169 * - memory packing (12 bit samples into low bits, others zeroed)
171 * - drop chipselect after each word
172 * - chipselect delays
177 static inline struct spi_device *to_spi_device(struct device *dev)
179 return dev ? container_of(dev, struct spi_device, dev) : NULL;
182 /* most drivers won't need to care about device refcounting */
183 static inline struct spi_device *spi_dev_get(struct spi_device *spi)
185 return (spi && get_device(&spi->dev)) ? spi : NULL;
188 static inline void spi_dev_put(struct spi_device *spi)
191 put_device(&spi->dev);
194 /* ctldata is for the bus_master driver's runtime state */
195 static inline void *spi_get_ctldata(struct spi_device *spi)
197 return spi->controller_state;
200 static inline void spi_set_ctldata(struct spi_device *spi, void *state)
202 spi->controller_state = state;
205 /* device driver data */
207 static inline void spi_set_drvdata(struct spi_device *spi, void *data)
209 dev_set_drvdata(&spi->dev, data);
212 static inline void *spi_get_drvdata(struct spi_device *spi)
214 return dev_get_drvdata(&spi->dev);
221 * struct spi_driver - Host side "protocol" driver
222 * @id_table: List of SPI devices supported by this driver
223 * @probe: Binds this driver to the spi device. Drivers can verify
224 * that the device is actually present, and may need to configure
225 * characteristics (such as bits_per_word) which weren't needed for
226 * the initial configuration done during system setup.
227 * @remove: Unbinds this driver from the spi device
228 * @shutdown: Standard shutdown callback used during system state
229 * transitions such as powerdown/halt and kexec
230 * @driver: SPI device drivers should initialize the name and owner
231 * field of this structure.
233 * This represents the kind of device driver that uses SPI messages to
234 * interact with the hardware at the other end of a SPI link. It's called
235 * a "protocol" driver because it works through messages rather than talking
236 * directly to SPI hardware (which is what the underlying SPI controller
237 * driver does to pass those messages). These protocols are defined in the
238 * specification for the device(s) supported by the driver.
240 * As a rule, those device protocols represent the lowest level interface
241 * supported by a driver, and it will support upper level interfaces too.
242 * Examples of such upper levels include frameworks like MTD, networking,
243 * MMC, RTC, filesystem character device nodes, and hardware monitoring.
246 const struct spi_device_id *id_table;
247 int (*probe)(struct spi_device *spi);
248 int (*remove)(struct spi_device *spi);
249 void (*shutdown)(struct spi_device *spi);
250 struct device_driver driver;
253 static inline struct spi_driver *to_spi_driver(struct device_driver *drv)
255 return drv ? container_of(drv, struct spi_driver, driver) : NULL;
258 extern int __spi_register_driver(struct module *owner, struct spi_driver *sdrv);
261 * spi_unregister_driver - reverse effect of spi_register_driver
262 * @sdrv: the driver to unregister
265 static inline void spi_unregister_driver(struct spi_driver *sdrv)
268 driver_unregister(&sdrv->driver);
271 /* use a define to avoid include chaining to get THIS_MODULE */
272 #define spi_register_driver(driver) \
273 __spi_register_driver(THIS_MODULE, driver)
276 * module_spi_driver() - Helper macro for registering a SPI driver
277 * @__spi_driver: spi_driver struct
279 * Helper macro for SPI drivers which do not do anything special in module
280 * init/exit. This eliminates a lot of boilerplate. Each module may only
281 * use this macro once, and calling it replaces module_init() and module_exit()
283 #define module_spi_driver(__spi_driver) \
284 module_driver(__spi_driver, spi_register_driver, \
285 spi_unregister_driver)
288 * struct spi_master - interface to SPI master controller
289 * @dev: device interface to this driver
290 * @list: link with the global spi_master list
291 * @bus_num: board-specific (and often SOC-specific) identifier for a
292 * given SPI controller.
293 * @num_chipselect: chipselects are used to distinguish individual
294 * SPI slaves, and are numbered from zero to num_chipselects.
295 * each slave has a chipselect signal, but it's common that not
296 * every chipselect is connected to a slave.
297 * @dma_alignment: SPI controller constraint on DMA buffers alignment.
298 * @mode_bits: flags understood by this controller driver
299 * @bits_per_word_mask: A mask indicating which values of bits_per_word are
300 * supported by the driver. Bit n indicates that a bits_per_word n+1 is
301 * supported. If set, the SPI core will reject any transfer with an
302 * unsupported bits_per_word. If not set, this value is simply ignored,
303 * and it's up to the individual driver to perform any validation.
304 * @min_speed_hz: Lowest supported transfer speed
305 * @max_speed_hz: Highest supported transfer speed
306 * @flags: other constraints relevant to this driver
307 * @bus_lock_spinlock: spinlock for SPI bus locking
308 * @bus_lock_mutex: mutex for SPI bus locking
309 * @bus_lock_flag: indicates that the SPI bus is locked for exclusive use
310 * @setup: updates the device mode and clocking records used by a
311 * device's SPI controller; protocol code may call this. This
312 * must fail if an unrecognized or unsupported mode is requested.
313 * It's always safe to call this unless transfers are pending on
314 * the device whose settings are being modified.
315 * @transfer: adds a message to the controller's transfer queue.
316 * @cleanup: frees controller-specific state
317 * @can_dma: determine whether this master supports DMA
318 * @queued: whether this master is providing an internal message queue
319 * @kworker: thread struct for message pump
320 * @kworker_task: pointer to task for message pump kworker thread
321 * @pump_messages: work struct for scheduling work to the message pump
322 * @queue_lock: spinlock to syncronise access to message queue
323 * @queue: message queue
324 * @idling: the device is entering idle state
325 * @cur_msg: the currently in-flight message
326 * @cur_msg_prepared: spi_prepare_message was called for the currently
328 * @cur_msg_mapped: message has been mapped for DMA
329 * @xfer_completion: used by core transfer_one_message()
330 * @busy: message pump is busy
331 * @running: message pump is running
332 * @rt: whether this queue is set to run as a realtime task
333 * @auto_runtime_pm: the core should ensure a runtime PM reference is held
334 * while the hardware is prepared, using the parent
335 * device for the spidev
336 * @max_dma_len: Maximum length of a DMA transfer for the device.
337 * @prepare_transfer_hardware: a message will soon arrive from the queue
338 * so the subsystem requests the driver to prepare the transfer hardware
339 * by issuing this call
340 * @transfer_one_message: the subsystem calls the driver to transfer a single
341 * message while queuing transfers that arrive in the meantime. When the
342 * driver is finished with this message, it must call
343 * spi_finalize_current_message() so the subsystem can issue the next
345 * @unprepare_transfer_hardware: there are currently no more messages on the
346 * queue so the subsystem notifies the driver that it may relax the
347 * hardware by issuing this call
348 * @set_cs: set the logic level of the chip select line. May be called
349 * from interrupt context.
350 * @prepare_message: set up the controller to transfer a single message,
351 * for example doing DMA mapping. Called from threaded
353 * @transfer_one: transfer a single spi_transfer.
354 * - return 0 if the transfer is finished,
355 * - return 1 if the transfer is still in progress. When
356 * the driver is finished with this transfer it must
357 * call spi_finalize_current_transfer() so the subsystem
358 * can issue the next transfer. Note: transfer_one and
359 * transfer_one_message are mutually exclusive; when both
360 * are set, the generic subsystem does not call your
361 * transfer_one callback.
362 * @handle_err: the subsystem calls the driver to handle an error that occurs
363 * in the generic implementation of transfer_one_message().
364 * @unprepare_message: undo any work done by prepare_message().
365 * @spi_flash_read: to support spi-controller hardwares that provide
366 * accelerated interface to read from flash devices.
367 * @cs_gpios: Array of GPIOs to use as chip select lines; one per CS
368 * number. Any individual value may be -ENOENT for CS lines that
369 * are not GPIOs (driven by the SPI controller itself).
370 * @statistics: statistics for the spi_master
371 * @dma_tx: DMA transmit channel
372 * @dma_rx: DMA receive channel
373 * @dummy_rx: dummy receive buffer for full-duplex devices
374 * @dummy_tx: dummy transmit buffer for full-duplex devices
375 * @fw_translate_cs: If the boot firmware uses different numbering scheme
376 * what Linux expects, this optional hook can be used to translate
379 * Each SPI master controller can communicate with one or more @spi_device
380 * children. These make a small bus, sharing MOSI, MISO and SCK signals
381 * but not chip select signals. Each device may be configured to use a
382 * different clock rate, since those shared signals are ignored unless
383 * the chip is selected.
385 * The driver for an SPI controller manages access to those devices through
386 * a queue of spi_message transactions, copying data between CPU memory and
387 * an SPI slave device. For each such message it queues, it calls the
388 * message's completion function when the transaction completes.
393 struct list_head list;
395 /* other than negative (== assign one dynamically), bus_num is fully
396 * board-specific. usually that simplifies to being SOC-specific.
397 * example: one SOC has three SPI controllers, numbered 0..2,
398 * and one board's schematics might show it using SPI-2. software
399 * would normally use bus_num=2 for that controller.
403 /* chipselects will be integral to many controllers; some others
404 * might use board-specific GPIOs.
408 /* some SPI controllers pose alignment requirements on DMAable
409 * buffers; let protocol drivers know about these requirements.
413 /* spi_device.mode flags understood by this controller driver */
416 /* bitmask of supported bits_per_word for transfers */
417 u32 bits_per_word_mask;
418 #define SPI_BPW_MASK(bits) BIT((bits) - 1)
419 #define SPI_BIT_MASK(bits) (((bits) == 32) ? ~0U : (BIT(bits) - 1))
420 #define SPI_BPW_RANGE_MASK(min, max) (SPI_BIT_MASK(max) - SPI_BIT_MASK(min - 1))
422 /* limits on transfer speed */
426 /* other constraints relevant to this driver */
428 #define SPI_MASTER_HALF_DUPLEX BIT(0) /* can't do full duplex */
429 #define SPI_MASTER_NO_RX BIT(1) /* can't do buffer read */
430 #define SPI_MASTER_NO_TX BIT(2) /* can't do buffer write */
431 #define SPI_MASTER_MUST_RX BIT(3) /* requires rx */
432 #define SPI_MASTER_MUST_TX BIT(4) /* requires tx */
435 * on some hardware transfer size may be constrained
436 * the limit may depend on device transfer settings
438 size_t (*max_transfer_size)(struct spi_device *spi);
440 /* lock and mutex for SPI bus locking */
441 spinlock_t bus_lock_spinlock;
442 struct mutex bus_lock_mutex;
444 /* flag indicating that the SPI bus is locked for exclusive use */
447 /* Setup mode and clock, etc (spi driver may call many times).
449 * IMPORTANT: this may be called when transfers to another
450 * device are active. DO NOT UPDATE SHARED REGISTERS in ways
451 * which could break those transfers.
453 int (*setup)(struct spi_device *spi);
455 /* bidirectional bulk transfers
457 * + The transfer() method may not sleep; its main role is
458 * just to add the message to the queue.
459 * + For now there's no remove-from-queue operation, or
460 * any other request management
461 * + To a given spi_device, message queueing is pure fifo
463 * + The master's main job is to process its message queue,
464 * selecting a chip then transferring data
465 * + If there are multiple spi_device children, the i/o queue
466 * arbitration algorithm is unspecified (round robin, fifo,
467 * priority, reservations, preemption, etc)
469 * + Chipselect stays active during the entire message
470 * (unless modified by spi_transfer.cs_change != 0).
471 * + The message transfers use clock and SPI mode parameters
472 * previously established by setup() for this device
474 int (*transfer)(struct spi_device *spi,
475 struct spi_message *mesg);
477 /* called on release() to free memory provided by spi_master */
478 void (*cleanup)(struct spi_device *spi);
481 * Used to enable core support for DMA handling, if can_dma()
482 * exists and returns true then the transfer will be mapped
483 * prior to transfer_one() being called. The driver should
484 * not modify or store xfer and dma_tx and dma_rx must be set
485 * while the device is prepared.
487 bool (*can_dma)(struct spi_master *master,
488 struct spi_device *spi,
489 struct spi_transfer *xfer);
492 * These hooks are for drivers that want to use the generic
493 * master transfer queueing mechanism. If these are used, the
494 * transfer() function above must NOT be specified by the driver.
495 * Over time we expect SPI drivers to be phased over to this API.
498 struct kthread_worker kworker;
499 struct task_struct *kworker_task;
500 struct kthread_work pump_messages;
501 spinlock_t queue_lock;
502 struct list_head queue;
503 struct spi_message *cur_msg;
508 bool auto_runtime_pm;
509 bool cur_msg_prepared;
511 struct completion xfer_completion;
514 int (*prepare_transfer_hardware)(struct spi_master *master);
515 int (*transfer_one_message)(struct spi_master *master,
516 struct spi_message *mesg);
517 int (*unprepare_transfer_hardware)(struct spi_master *master);
518 int (*prepare_message)(struct spi_master *master,
519 struct spi_message *message);
520 int (*unprepare_message)(struct spi_master *master,
521 struct spi_message *message);
522 int (*spi_flash_read)(struct spi_device *spi,
523 struct spi_flash_read_message *msg);
526 * These hooks are for drivers that use a generic implementation
527 * of transfer_one_message() provied by the core.
529 void (*set_cs)(struct spi_device *spi, bool enable);
530 int (*transfer_one)(struct spi_master *master, struct spi_device *spi,
531 struct spi_transfer *transfer);
532 void (*handle_err)(struct spi_master *master,
533 struct spi_message *message);
535 /* gpio chip select */
539 struct spi_statistics statistics;
541 /* DMA channels for use with core dmaengine helpers */
542 struct dma_chan *dma_tx;
543 struct dma_chan *dma_rx;
545 /* dummy data for full duplex devices */
549 int (*fw_translate_cs)(struct spi_master *master, unsigned cs);
552 static inline void *spi_master_get_devdata(struct spi_master *master)
554 return dev_get_drvdata(&master->dev);
557 static inline void spi_master_set_devdata(struct spi_master *master, void *data)
559 dev_set_drvdata(&master->dev, data);
562 static inline struct spi_master *spi_master_get(struct spi_master *master)
564 if (!master || !get_device(&master->dev))
569 static inline void spi_master_put(struct spi_master *master)
572 put_device(&master->dev);
575 /* PM calls that need to be issued by the driver */
576 extern int spi_master_suspend(struct spi_master *master);
577 extern int spi_master_resume(struct spi_master *master);
579 /* Calls the driver make to interact with the message queue */
580 extern struct spi_message *spi_get_next_queued_message(struct spi_master *master);
581 extern void spi_finalize_current_message(struct spi_master *master);
582 extern void spi_finalize_current_transfer(struct spi_master *master);
584 /* the spi driver core manages memory for the spi_master classdev */
585 extern struct spi_master *
586 spi_alloc_master(struct device *host, unsigned size);
588 extern int spi_register_master(struct spi_master *master);
589 extern int devm_spi_register_master(struct device *dev,
590 struct spi_master *master);
591 extern void spi_unregister_master(struct spi_master *master);
593 extern struct spi_master *spi_busnum_to_master(u16 busnum);
595 /*---------------------------------------------------------------------------*/
598 * I/O INTERFACE between SPI controller and protocol drivers
600 * Protocol drivers use a queue of spi_messages, each transferring data
601 * between the controller and memory buffers.
603 * The spi_messages themselves consist of a series of read+write transfer
604 * segments. Those segments always read the same number of bits as they
605 * write; but one or the other is easily ignored by passing a null buffer
606 * pointer. (This is unlike most types of I/O API, because SPI hardware
609 * NOTE: Allocation of spi_transfer and spi_message memory is entirely
610 * up to the protocol driver, which guarantees the integrity of both (as
611 * well as the data buffers) for as long as the message is queued.
615 * struct spi_transfer - a read/write buffer pair
616 * @tx_buf: data to be written (dma-safe memory), or NULL
617 * @rx_buf: data to be read (dma-safe memory), or NULL
618 * @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped
619 * @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped
620 * @tx_nbits: number of bits used for writing. If 0 the default
621 * (SPI_NBITS_SINGLE) is used.
622 * @rx_nbits: number of bits used for reading. If 0 the default
623 * (SPI_NBITS_SINGLE) is used.
624 * @len: size of rx and tx buffers (in bytes)
625 * @speed_hz: Select a speed other than the device default for this
626 * transfer. If 0 the default (from @spi_device) is used.
627 * @bits_per_word: select a bits_per_word other than the device default
628 * for this transfer. If 0 the default (from @spi_device) is used.
629 * @cs_change: affects chipselect after this transfer completes
630 * @delay_usecs: microseconds to delay after this transfer before
631 * (optionally) changing the chipselect status, then starting
632 * the next transfer or completing this @spi_message.
633 * @transfer_list: transfers are sequenced through @spi_message.transfers
634 * @tx_sg: Scatterlist for transmit, currently not for client use
635 * @rx_sg: Scatterlist for receive, currently not for client use
637 * SPI transfers always write the same number of bytes as they read.
638 * Protocol drivers should always provide @rx_buf and/or @tx_buf.
639 * In some cases, they may also want to provide DMA addresses for
640 * the data being transferred; that may reduce overhead, when the
641 * underlying driver uses dma.
643 * If the transmit buffer is null, zeroes will be shifted out
644 * while filling @rx_buf. If the receive buffer is null, the data
645 * shifted in will be discarded. Only "len" bytes shift out (or in).
646 * It's an error to try to shift out a partial word. (For example, by
647 * shifting out three bytes with word size of sixteen or twenty bits;
648 * the former uses two bytes per word, the latter uses four bytes.)
650 * In-memory data values are always in native CPU byte order, translated
651 * from the wire byte order (big-endian except with SPI_LSB_FIRST). So
652 * for example when bits_per_word is sixteen, buffers are 2N bytes long
653 * (@len = 2N) and hold N sixteen bit words in CPU byte order.
655 * When the word size of the SPI transfer is not a power-of-two multiple
656 * of eight bits, those in-memory words include extra bits. In-memory
657 * words are always seen by protocol drivers as right-justified, so the
658 * undefined (rx) or unused (tx) bits are always the most significant bits.
660 * All SPI transfers start with the relevant chipselect active. Normally
661 * it stays selected until after the last transfer in a message. Drivers
662 * can affect the chipselect signal using cs_change.
664 * (i) If the transfer isn't the last one in the message, this flag is
665 * used to make the chipselect briefly go inactive in the middle of the
666 * message. Toggling chipselect in this way may be needed to terminate
667 * a chip command, letting a single spi_message perform all of group of
668 * chip transactions together.
670 * (ii) When the transfer is the last one in the message, the chip may
671 * stay selected until the next transfer. On multi-device SPI busses
672 * with nothing blocking messages going to other devices, this is just
673 * a performance hint; starting a message to another device deselects
674 * this one. But in other cases, this can be used to ensure correctness.
675 * Some devices need protocol transactions to be built from a series of
676 * spi_message submissions, where the content of one message is determined
677 * by the results of previous messages and where the whole transaction
678 * ends when the chipselect goes intactive.
680 * When SPI can transfer in 1x,2x or 4x. It can get this transfer information
681 * from device through @tx_nbits and @rx_nbits. In Bi-direction, these
682 * two should both be set. User can set transfer mode with SPI_NBITS_SINGLE(1x)
683 * SPI_NBITS_DUAL(2x) and SPI_NBITS_QUAD(4x) to support these three transfer.
685 * The code that submits an spi_message (and its spi_transfers)
686 * to the lower layers is responsible for managing its memory.
687 * Zero-initialize every field you don't set up explicitly, to
688 * insulate against future API updates. After you submit a message
689 * and its transfers, ignore them until its completion callback.
691 struct spi_transfer {
692 /* it's ok if tx_buf == rx_buf (right?)
693 * for MicroWire, one buffer must be null
694 * buffers must work with dma_*map_single() calls, unless
695 * spi_message.is_dma_mapped reports a pre-existing mapping
703 struct sg_table tx_sg;
704 struct sg_table rx_sg;
706 unsigned cs_change:1;
709 #define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */
710 #define SPI_NBITS_DUAL 0x02 /* 2bits transfer */
711 #define SPI_NBITS_QUAD 0x04 /* 4bits transfer */
716 struct list_head transfer_list;
720 * struct spi_message - one multi-segment SPI transaction
721 * @transfers: list of transfer segments in this transaction
722 * @spi: SPI device to which the transaction is queued
723 * @is_dma_mapped: if true, the caller provided both dma and cpu virtual
724 * addresses for each transfer buffer
725 * @complete: called to report transaction completions
726 * @context: the argument to complete() when it's called
727 * @frame_length: the total number of bytes in the message
728 * @actual_length: the total number of bytes that were transferred in all
729 * successful segments
730 * @status: zero for success, else negative errno
731 * @queue: for use by whichever driver currently owns the message
732 * @state: for use by whichever driver currently owns the message
734 * A @spi_message is used to execute an atomic sequence of data transfers,
735 * each represented by a struct spi_transfer. The sequence is "atomic"
736 * in the sense that no other spi_message may use that SPI bus until that
737 * sequence completes. On some systems, many such sequences can execute as
738 * as single programmed DMA transfer. On all systems, these messages are
739 * queued, and might complete after transactions to other devices. Messages
740 * sent to a given spi_device are always executed in FIFO order.
742 * The code that submits an spi_message (and its spi_transfers)
743 * to the lower layers is responsible for managing its memory.
744 * Zero-initialize every field you don't set up explicitly, to
745 * insulate against future API updates. After you submit a message
746 * and its transfers, ignore them until its completion callback.
749 struct list_head transfers;
751 struct spi_device *spi;
753 unsigned is_dma_mapped:1;
755 /* REVISIT: we might want a flag affecting the behavior of the
756 * last transfer ... allowing things like "read 16 bit length L"
757 * immediately followed by "read L bytes". Basically imposing
758 * a specific message scheduling algorithm.
760 * Some controller drivers (message-at-a-time queue processing)
761 * could provide that as their default scheduling algorithm. But
762 * others (with multi-message pipelines) could need a flag to
763 * tell them about such special cases.
766 /* completion is reported through a callback */
767 void (*complete)(void *context);
769 unsigned frame_length;
770 unsigned actual_length;
773 /* for optional use by whatever driver currently owns the
774 * spi_message ... between calls to spi_async and then later
775 * complete(), that's the spi_master controller driver.
777 struct list_head queue;
781 static inline void spi_message_init_no_memset(struct spi_message *m)
783 INIT_LIST_HEAD(&m->transfers);
786 static inline void spi_message_init(struct spi_message *m)
788 memset(m, 0, sizeof *m);
789 spi_message_init_no_memset(m);
793 spi_message_add_tail(struct spi_transfer *t, struct spi_message *m)
795 list_add_tail(&t->transfer_list, &m->transfers);
799 spi_transfer_del(struct spi_transfer *t)
801 list_del(&t->transfer_list);
805 * spi_message_init_with_transfers - Initialize spi_message and append transfers
806 * @m: spi_message to be initialized
807 * @xfers: An array of spi transfers
808 * @num_xfers: Number of items in the xfer array
810 * This function initializes the given spi_message and adds each spi_transfer in
811 * the given array to the message.
814 spi_message_init_with_transfers(struct spi_message *m,
815 struct spi_transfer *xfers, unsigned int num_xfers)
820 for (i = 0; i < num_xfers; ++i)
821 spi_message_add_tail(&xfers[i], m);
824 /* It's fine to embed message and transaction structures in other data
825 * structures so long as you don't free them while they're in use.
828 static inline struct spi_message *spi_message_alloc(unsigned ntrans, gfp_t flags)
830 struct spi_message *m;
832 m = kzalloc(sizeof(struct spi_message)
833 + ntrans * sizeof(struct spi_transfer),
837 struct spi_transfer *t = (struct spi_transfer *)(m + 1);
839 INIT_LIST_HEAD(&m->transfers);
840 for (i = 0; i < ntrans; i++, t++)
841 spi_message_add_tail(t, m);
846 static inline void spi_message_free(struct spi_message *m)
851 extern int spi_setup(struct spi_device *spi);
852 extern int spi_async(struct spi_device *spi, struct spi_message *message);
853 extern int spi_async_locked(struct spi_device *spi,
854 struct spi_message *message);
857 spi_max_transfer_size(struct spi_device *spi)
859 struct spi_master *master = spi->master;
860 if (!master->max_transfer_size)
862 return master->max_transfer_size(spi);
865 /*---------------------------------------------------------------------------*/
867 /* All these synchronous SPI transfer routines are utilities layered
868 * over the core async transfer primitive. Here, "synchronous" means
869 * they will sleep uninterruptibly until the async transfer completes.
872 extern int spi_sync(struct spi_device *spi, struct spi_message *message);
873 extern int spi_sync_locked(struct spi_device *spi, struct spi_message *message);
874 extern int spi_bus_lock(struct spi_master *master);
875 extern int spi_bus_unlock(struct spi_master *master);
878 * spi_write - SPI synchronous write
879 * @spi: device to which data will be written
881 * @len: data buffer size
884 * This function writes the buffer @buf.
885 * Callable only from contexts that can sleep.
887 * Return: zero on success, else a negative error code.
890 spi_write(struct spi_device *spi, const void *buf, size_t len)
892 struct spi_transfer t = {
896 struct spi_message m;
898 spi_message_init(&m);
899 spi_message_add_tail(&t, &m);
900 return spi_sync(spi, &m);
904 * spi_read - SPI synchronous read
905 * @spi: device from which data will be read
907 * @len: data buffer size
910 * This function reads the buffer @buf.
911 * Callable only from contexts that can sleep.
913 * Return: zero on success, else a negative error code.
916 spi_read(struct spi_device *spi, void *buf, size_t len)
918 struct spi_transfer t = {
922 struct spi_message m;
924 spi_message_init(&m);
925 spi_message_add_tail(&t, &m);
926 return spi_sync(spi, &m);
930 * spi_sync_transfer - synchronous SPI data transfer
931 * @spi: device with which data will be exchanged
932 * @xfers: An array of spi_transfers
933 * @num_xfers: Number of items in the xfer array
936 * Does a synchronous SPI data transfer of the given spi_transfer array.
938 * For more specific semantics see spi_sync().
940 * Return: Return: zero on success, else a negative error code.
943 spi_sync_transfer(struct spi_device *spi, struct spi_transfer *xfers,
944 unsigned int num_xfers)
946 struct spi_message msg;
948 spi_message_init_with_transfers(&msg, xfers, num_xfers);
950 return spi_sync(spi, &msg);
953 /* this copies txbuf and rxbuf data; for small transfers only! */
954 extern int spi_write_then_read(struct spi_device *spi,
955 const void *txbuf, unsigned n_tx,
956 void *rxbuf, unsigned n_rx);
959 * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read
960 * @spi: device with which data will be exchanged
961 * @cmd: command to be written before data is read back
964 * Callable only from contexts that can sleep.
966 * Return: the (unsigned) eight bit number returned by the
967 * device, or else a negative error code.
969 static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd)
974 status = spi_write_then_read(spi, &cmd, 1, &result, 1);
976 /* return negative errno or unsigned value */
977 return (status < 0) ? status : result;
981 * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read
982 * @spi: device with which data will be exchanged
983 * @cmd: command to be written before data is read back
986 * The number is returned in wire-order, which is at least sometimes
989 * Callable only from contexts that can sleep.
991 * Return: the (unsigned) sixteen bit number returned by the
992 * device, or else a negative error code.
994 static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd)
999 status = spi_write_then_read(spi, &cmd, 1, &result, 2);
1001 /* return negative errno or unsigned value */
1002 return (status < 0) ? status : result;
1006 * spi_w8r16be - SPI synchronous 8 bit write followed by 16 bit big-endian read
1007 * @spi: device with which data will be exchanged
1008 * @cmd: command to be written before data is read back
1009 * Context: can sleep
1011 * This function is similar to spi_w8r16, with the exception that it will
1012 * convert the read 16 bit data word from big-endian to native endianness.
1014 * Callable only from contexts that can sleep.
1016 * Return: the (unsigned) sixteen bit number returned by the device in cpu
1017 * endianness, or else a negative error code.
1019 static inline ssize_t spi_w8r16be(struct spi_device *spi, u8 cmd)
1025 status = spi_write_then_read(spi, &cmd, 1, &result, 2);
1029 return be16_to_cpu(result);
1033 * struct spi_flash_read_message - flash specific information for
1034 * spi-masters that provide accelerated flash read interfaces
1035 * @buf: buffer to read data
1036 * @from: offset within the flash from where data is to be read
1037 * @len: length of data to be read
1038 * @retlen: actual length of data read
1039 * @read_opcode: read_opcode to be used to communicate with flash
1040 * @addr_width: number of address bytes
1041 * @dummy_bytes: number of dummy bytes
1042 * @opcode_nbits: number of lines to send opcode
1043 * @addr_nbits: number of lines to send address
1044 * @data_nbits: number of lines for data
1046 struct spi_flash_read_message {
1059 /* SPI core interface for flash read support */
1060 static inline bool spi_flash_read_supported(struct spi_device *spi)
1062 return spi->master->spi_flash_read ? true : false;
1065 int spi_flash_read(struct spi_device *spi,
1066 struct spi_flash_read_message *msg);
1068 /*---------------------------------------------------------------------------*/
1071 * INTERFACE between board init code and SPI infrastructure.
1073 * No SPI driver ever sees these SPI device table segments, but
1074 * it's how the SPI core (or adapters that get hotplugged) grows
1075 * the driver model tree.
1077 * As a rule, SPI devices can't be probed. Instead, board init code
1078 * provides a table listing the devices which are present, with enough
1079 * information to bind and set up the device's driver. There's basic
1080 * support for nonstatic configurations too; enough to handle adding
1081 * parport adapters, or microcontrollers acting as USB-to-SPI bridges.
1085 * struct spi_board_info - board-specific template for a SPI device
1086 * @modalias: Initializes spi_device.modalias; identifies the driver.
1087 * @platform_data: Initializes spi_device.platform_data; the particular
1088 * data stored there is driver-specific.
1089 * @controller_data: Initializes spi_device.controller_data; some
1090 * controllers need hints about hardware setup, e.g. for DMA.
1091 * @irq: Initializes spi_device.irq; depends on how the board is wired.
1092 * @max_speed_hz: Initializes spi_device.max_speed_hz; based on limits
1093 * from the chip datasheet and board-specific signal quality issues.
1094 * @bus_num: Identifies which spi_master parents the spi_device; unused
1095 * by spi_new_device(), and otherwise depends on board wiring.
1096 * @chip_select: Initializes spi_device.chip_select; depends on how
1097 * the board is wired.
1098 * @mode: Initializes spi_device.mode; based on the chip datasheet, board
1099 * wiring (some devices support both 3WIRE and standard modes), and
1100 * possibly presence of an inverter in the chipselect path.
1102 * When adding new SPI devices to the device tree, these structures serve
1103 * as a partial device template. They hold information which can't always
1104 * be determined by drivers. Information that probe() can establish (such
1105 * as the default transfer wordsize) is not included here.
1107 * These structures are used in two places. Their primary role is to
1108 * be stored in tables of board-specific device descriptors, which are
1109 * declared early in board initialization and then used (much later) to
1110 * populate a controller's device tree after the that controller's driver
1111 * initializes. A secondary (and atypical) role is as a parameter to
1112 * spi_new_device() call, which happens after those controller drivers
1113 * are active in some dynamic board configuration models.
1115 struct spi_board_info {
1116 /* the device name and module name are coupled, like platform_bus;
1117 * "modalias" is normally the driver name.
1119 * platform_data goes to spi_device.dev.platform_data,
1120 * controller_data goes to spi_device.controller_data,
1123 char modalias[SPI_NAME_SIZE];
1124 const void *platform_data;
1125 void *controller_data;
1128 /* slower signaling on noisy or low voltage boards */
1132 /* bus_num is board specific and matches the bus_num of some
1133 * spi_master that will probably be registered later.
1135 * chip_select reflects how this chip is wired to that master;
1136 * it's less than num_chipselect.
1141 /* mode becomes spi_device.mode, and is essential for chips
1142 * where the default of SPI_CS_HIGH = 0 is wrong.
1146 /* ... may need additional spi_device chip config data here.
1147 * avoid stuff protocol drivers can set; but include stuff
1148 * needed to behave without being bound to a driver:
1149 * - quirks like clock rate mattering when not selected
1155 spi_register_board_info(struct spi_board_info const *info, unsigned n);
1157 /* board init code may ignore whether SPI is configured or not */
1159 spi_register_board_info(struct spi_board_info const *info, unsigned n)
1164 /* If you're hotplugging an adapter with devices (parport, usb, etc)
1165 * use spi_new_device() to describe each device. You can also call
1166 * spi_unregister_device() to start making that device vanish, but
1167 * normally that would be handled by spi_unregister_master().
1169 * You can also use spi_alloc_device() and spi_add_device() to use a two
1170 * stage registration sequence for each spi_device. This gives the caller
1171 * some more control over the spi_device structure before it is registered,
1172 * but requires that caller to initialize fields that would otherwise
1173 * be defined using the board info.
1175 extern struct spi_device *
1176 spi_alloc_device(struct spi_master *master);
1179 spi_add_device(struct spi_device *spi);
1181 extern struct spi_device *
1182 spi_new_device(struct spi_master *, struct spi_board_info *);
1184 extern void spi_unregister_device(struct spi_device *spi);
1186 extern const struct spi_device_id *
1187 spi_get_device_id(const struct spi_device *sdev);
1190 spi_transfer_is_last(struct spi_master *master, struct spi_transfer *xfer)
1192 return list_is_last(&xfer->transfer_list, &master->cur_msg->transfers);
1195 #endif /* __LINUX_SPI_H */