2 * Copyright (C) 2005 David Brownell
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
18 #include <linux/device.h>
19 #include <linux/mod_devicetable.h>
20 #include <linux/slab.h>
21 #include <linux/kthread.h>
22 #include <linux/completion.h>
23 #include <linux/scatterlist.h>
28 * INTERFACES between SPI master-side drivers and SPI infrastructure.
29 * (There's no SPI slave support for Linux yet...)
31 extern struct bus_type spi_bus_type;
34 * struct spi_device - Master side proxy for an SPI slave device
35 * @dev: Driver model representation of the device.
36 * @master: SPI controller used with the device.
37 * @max_speed_hz: Maximum clock rate to be used with this chip
38 * (on this board); may be changed by the device's driver.
39 * The spi_transfer.speed_hz can override this for each transfer.
40 * @chip_select: Chipselect, distinguishing chips handled by @master.
41 * @mode: The spi mode defines how data is clocked out and in.
42 * This may be changed by the device's driver.
43 * The "active low" default for chipselect mode can be overridden
44 * (by specifying SPI_CS_HIGH) as can the "MSB first" default for
45 * each word in a transfer (by specifying SPI_LSB_FIRST).
46 * @bits_per_word: Data transfers involve one or more words; word sizes
47 * like eight or 12 bits are common. In-memory wordsizes are
48 * powers of two bytes (e.g. 20 bit samples use 32 bits).
49 * This may be changed by the device's driver, or left at the
50 * default (0) indicating protocol words are eight bit bytes.
51 * The spi_transfer.bits_per_word can override this for each transfer.
52 * @irq: Negative, or the number passed to request_irq() to receive
53 * interrupts from this device.
54 * @controller_state: Controller's runtime state
55 * @controller_data: Board-specific definitions for controller, such as
56 * FIFO initialization parameters; from board_info.controller_data
57 * @modalias: Name of the driver to use with this device, or an alias
58 * for that name. This appears in the sysfs "modalias" attribute
59 * for driver coldplugging, and in uevents used for hotplugging
60 * @cs_gpio: gpio number of the chipselect line (optional, -ENOENT when
61 * when not using a GPIO line)
63 * A @spi_device is used to interchange data between an SPI slave
64 * (usually a discrete chip) and CPU memory.
66 * In @dev, the platform_data is used to hold information about this
67 * device that's meaningful to the device's protocol driver, but not
68 * to its controller. One example might be an identifier for a chip
69 * variant with slightly different functionality; another might be
70 * information about how this particular board wires the chip's pins.
74 struct spi_master *master;
79 #define SPI_CPHA 0x01 /* clock phase */
80 #define SPI_CPOL 0x02 /* clock polarity */
81 #define SPI_MODE_0 (0|0) /* (original MicroWire) */
82 #define SPI_MODE_1 (0|SPI_CPHA)
83 #define SPI_MODE_2 (SPI_CPOL|0)
84 #define SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
85 #define SPI_CS_HIGH 0x04 /* chipselect active high? */
86 #define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */
87 #define SPI_3WIRE 0x10 /* SI/SO signals shared */
88 #define SPI_LOOP 0x20 /* loopback mode */
89 #define SPI_NO_CS 0x40 /* 1 dev/bus, no chipselect */
90 #define SPI_READY 0x80 /* slave pulls low to pause */
91 #define SPI_TX_DUAL 0x100 /* transmit with 2 wires */
92 #define SPI_TX_QUAD 0x200 /* transmit with 4 wires */
93 #define SPI_RX_DUAL 0x400 /* receive with 2 wires */
94 #define SPI_RX_QUAD 0x800 /* receive with 4 wires */
96 void *controller_state;
97 void *controller_data;
98 char modalias[SPI_NAME_SIZE];
99 int cs_gpio; /* chip select gpio */
102 * likely need more hooks for more protocol options affecting how
103 * the controller talks to each chip, like:
104 * - memory packing (12 bit samples into low bits, others zeroed)
106 * - drop chipselect after each word
107 * - chipselect delays
112 static inline struct spi_device *to_spi_device(struct device *dev)
114 return dev ? container_of(dev, struct spi_device, dev) : NULL;
117 /* most drivers won't need to care about device refcounting */
118 static inline struct spi_device *spi_dev_get(struct spi_device *spi)
120 return (spi && get_device(&spi->dev)) ? spi : NULL;
123 static inline void spi_dev_put(struct spi_device *spi)
126 put_device(&spi->dev);
129 /* ctldata is for the bus_master driver's runtime state */
130 static inline void *spi_get_ctldata(struct spi_device *spi)
132 return spi->controller_state;
135 static inline void spi_set_ctldata(struct spi_device *spi, void *state)
137 spi->controller_state = state;
140 /* device driver data */
142 static inline void spi_set_drvdata(struct spi_device *spi, void *data)
144 dev_set_drvdata(&spi->dev, data);
147 static inline void *spi_get_drvdata(struct spi_device *spi)
149 return dev_get_drvdata(&spi->dev);
156 * struct spi_driver - Host side "protocol" driver
157 * @id_table: List of SPI devices supported by this driver
158 * @probe: Binds this driver to the spi device. Drivers can verify
159 * that the device is actually present, and may need to configure
160 * characteristics (such as bits_per_word) which weren't needed for
161 * the initial configuration done during system setup.
162 * @remove: Unbinds this driver from the spi device
163 * @shutdown: Standard shutdown callback used during system state
164 * transitions such as powerdown/halt and kexec
165 * @driver: SPI device drivers should initialize the name and owner
166 * field of this structure.
168 * This represents the kind of device driver that uses SPI messages to
169 * interact with the hardware at the other end of a SPI link. It's called
170 * a "protocol" driver because it works through messages rather than talking
171 * directly to SPI hardware (which is what the underlying SPI controller
172 * driver does to pass those messages). These protocols are defined in the
173 * specification for the device(s) supported by the driver.
175 * As a rule, those device protocols represent the lowest level interface
176 * supported by a driver, and it will support upper level interfaces too.
177 * Examples of such upper levels include frameworks like MTD, networking,
178 * MMC, RTC, filesystem character device nodes, and hardware monitoring.
181 const struct spi_device_id *id_table;
182 int (*probe)(struct spi_device *spi);
183 int (*remove)(struct spi_device *spi);
184 void (*shutdown)(struct spi_device *spi);
185 struct device_driver driver;
188 static inline struct spi_driver *to_spi_driver(struct device_driver *drv)
190 return drv ? container_of(drv, struct spi_driver, driver) : NULL;
193 extern int spi_register_driver(struct spi_driver *sdrv);
196 * spi_unregister_driver - reverse effect of spi_register_driver
197 * @sdrv: the driver to unregister
200 static inline void spi_unregister_driver(struct spi_driver *sdrv)
203 driver_unregister(&sdrv->driver);
207 * module_spi_driver() - Helper macro for registering a SPI driver
208 * @__spi_driver: spi_driver struct
210 * Helper macro for SPI drivers which do not do anything special in module
211 * init/exit. This eliminates a lot of boilerplate. Each module may only
212 * use this macro once, and calling it replaces module_init() and module_exit()
214 #define module_spi_driver(__spi_driver) \
215 module_driver(__spi_driver, spi_register_driver, \
216 spi_unregister_driver)
219 * struct spi_master - interface to SPI master controller
220 * @dev: device interface to this driver
221 * @list: link with the global spi_master list
222 * @bus_num: board-specific (and often SOC-specific) identifier for a
223 * given SPI controller.
224 * @num_chipselect: chipselects are used to distinguish individual
225 * SPI slaves, and are numbered from zero to num_chipselects.
226 * each slave has a chipselect signal, but it's common that not
227 * every chipselect is connected to a slave.
228 * @dma_alignment: SPI controller constraint on DMA buffers alignment.
229 * @mode_bits: flags understood by this controller driver
230 * @bits_per_word_mask: A mask indicating which values of bits_per_word are
231 * supported by the driver. Bit n indicates that a bits_per_word n+1 is
232 * supported. If set, the SPI core will reject any transfer with an
233 * unsupported bits_per_word. If not set, this value is simply ignored,
234 * and it's up to the individual driver to perform any validation.
235 * @min_speed_hz: Lowest supported transfer speed
236 * @max_speed_hz: Highest supported transfer speed
237 * @flags: other constraints relevant to this driver
238 * @bus_lock_spinlock: spinlock for SPI bus locking
239 * @bus_lock_mutex: mutex for SPI bus locking
240 * @bus_lock_flag: indicates that the SPI bus is locked for exclusive use
241 * @setup: updates the device mode and clocking records used by a
242 * device's SPI controller; protocol code may call this. This
243 * must fail if an unrecognized or unsupported mode is requested.
244 * It's always safe to call this unless transfers are pending on
245 * the device whose settings are being modified.
246 * @transfer: adds a message to the controller's transfer queue.
247 * @cleanup: frees controller-specific state
248 * @can_dma: determine whether this master supports DMA
249 * @queued: whether this master is providing an internal message queue
250 * @kworker: thread struct for message pump
251 * @kworker_task: pointer to task for message pump kworker thread
252 * @pump_messages: work struct for scheduling work to the message pump
253 * @queue_lock: spinlock to syncronise access to message queue
254 * @queue: message queue
255 * @idling: the device is entering idle state
256 * @cur_msg: the currently in-flight message
257 * @cur_msg_prepared: spi_prepare_message was called for the currently
259 * @cur_msg_mapped: message has been mapped for DMA
260 * @xfer_completion: used by core transfer_one_message()
261 * @busy: message pump is busy
262 * @running: message pump is running
263 * @rt: whether this queue is set to run as a realtime task
264 * @auto_runtime_pm: the core should ensure a runtime PM reference is held
265 * while the hardware is prepared, using the parent
266 * device for the spidev
267 * @max_dma_len: Maximum length of a DMA transfer for the device.
268 * @prepare_transfer_hardware: a message will soon arrive from the queue
269 * so the subsystem requests the driver to prepare the transfer hardware
270 * by issuing this call
271 * @transfer_one_message: the subsystem calls the driver to transfer a single
272 * message while queuing transfers that arrive in the meantime. When the
273 * driver is finished with this message, it must call
274 * spi_finalize_current_message() so the subsystem can issue the next
276 * @unprepare_transfer_hardware: there are currently no more messages on the
277 * queue so the subsystem notifies the driver that it may relax the
278 * hardware by issuing this call
279 * @set_cs: set the logic level of the chip select line. May be called
280 * from interrupt context.
281 * @prepare_message: set up the controller to transfer a single message,
282 * for example doing DMA mapping. Called from threaded
284 * @transfer_one: transfer a single spi_transfer.
285 * - return 0 if the transfer is finished,
286 * - return 1 if the transfer is still in progress. When
287 * the driver is finished with this transfer it must
288 * call spi_finalize_current_transfer() so the subsystem
289 * can issue the next transfer. Note: transfer_one and
290 * transfer_one_message are mutually exclusive; when both
291 * are set, the generic subsystem does not call your
292 * transfer_one callback.
293 * @unprepare_message: undo any work done by prepare_message().
294 * @cs_gpios: Array of GPIOs to use as chip select lines; one per CS
295 * number. Any individual value may be -ENOENT for CS lines that
296 * are not GPIOs (driven by the SPI controller itself).
297 * @dma_tx: DMA transmit channel
298 * @dma_rx: DMA receive channel
299 * @dummy_rx: dummy receive buffer for full-duplex devices
300 * @dummy_tx: dummy transmit buffer for full-duplex devices
302 * Each SPI master controller can communicate with one or more @spi_device
303 * children. These make a small bus, sharing MOSI, MISO and SCK signals
304 * but not chip select signals. Each device may be configured to use a
305 * different clock rate, since those shared signals are ignored unless
306 * the chip is selected.
308 * The driver for an SPI controller manages access to those devices through
309 * a queue of spi_message transactions, copying data between CPU memory and
310 * an SPI slave device. For each such message it queues, it calls the
311 * message's completion function when the transaction completes.
316 struct list_head list;
318 /* other than negative (== assign one dynamically), bus_num is fully
319 * board-specific. usually that simplifies to being SOC-specific.
320 * example: one SOC has three SPI controllers, numbered 0..2,
321 * and one board's schematics might show it using SPI-2. software
322 * would normally use bus_num=2 for that controller.
326 /* chipselects will be integral to many controllers; some others
327 * might use board-specific GPIOs.
331 /* some SPI controllers pose alignment requirements on DMAable
332 * buffers; let protocol drivers know about these requirements.
336 /* spi_device.mode flags understood by this controller driver */
339 /* bitmask of supported bits_per_word for transfers */
340 u32 bits_per_word_mask;
341 #define SPI_BPW_MASK(bits) BIT((bits) - 1)
342 #define SPI_BIT_MASK(bits) (((bits) == 32) ? ~0U : (BIT(bits) - 1))
343 #define SPI_BPW_RANGE_MASK(min, max) (SPI_BIT_MASK(max) - SPI_BIT_MASK(min - 1))
345 /* limits on transfer speed */
349 /* other constraints relevant to this driver */
351 #define SPI_MASTER_HALF_DUPLEX BIT(0) /* can't do full duplex */
352 #define SPI_MASTER_NO_RX BIT(1) /* can't do buffer read */
353 #define SPI_MASTER_NO_TX BIT(2) /* can't do buffer write */
354 #define SPI_MASTER_MUST_RX BIT(3) /* requires rx */
355 #define SPI_MASTER_MUST_TX BIT(4) /* requires tx */
357 /* lock and mutex for SPI bus locking */
358 spinlock_t bus_lock_spinlock;
359 struct mutex bus_lock_mutex;
361 /* flag indicating that the SPI bus is locked for exclusive use */
364 /* Setup mode and clock, etc (spi driver may call many times).
366 * IMPORTANT: this may be called when transfers to another
367 * device are active. DO NOT UPDATE SHARED REGISTERS in ways
368 * which could break those transfers.
370 int (*setup)(struct spi_device *spi);
372 /* bidirectional bulk transfers
374 * + The transfer() method may not sleep; its main role is
375 * just to add the message to the queue.
376 * + For now there's no remove-from-queue operation, or
377 * any other request management
378 * + To a given spi_device, message queueing is pure fifo
380 * + The master's main job is to process its message queue,
381 * selecting a chip then transferring data
382 * + If there are multiple spi_device children, the i/o queue
383 * arbitration algorithm is unspecified (round robin, fifo,
384 * priority, reservations, preemption, etc)
386 * + Chipselect stays active during the entire message
387 * (unless modified by spi_transfer.cs_change != 0).
388 * + The message transfers use clock and SPI mode parameters
389 * previously established by setup() for this device
391 int (*transfer)(struct spi_device *spi,
392 struct spi_message *mesg);
394 /* called on release() to free memory provided by spi_master */
395 void (*cleanup)(struct spi_device *spi);
398 * Used to enable core support for DMA handling, if can_dma()
399 * exists and returns true then the transfer will be mapped
400 * prior to transfer_one() being called. The driver should
401 * not modify or store xfer and dma_tx and dma_rx must be set
402 * while the device is prepared.
404 bool (*can_dma)(struct spi_master *master,
405 struct spi_device *spi,
406 struct spi_transfer *xfer);
409 * These hooks are for drivers that want to use the generic
410 * master transfer queueing mechanism. If these are used, the
411 * transfer() function above must NOT be specified by the driver.
412 * Over time we expect SPI drivers to be phased over to this API.
415 struct kthread_worker kworker;
416 struct task_struct *kworker_task;
417 struct kthread_work pump_messages;
418 spinlock_t queue_lock;
419 struct list_head queue;
420 struct spi_message *cur_msg;
425 bool auto_runtime_pm;
426 bool cur_msg_prepared;
428 struct completion xfer_completion;
431 int (*prepare_transfer_hardware)(struct spi_master *master);
432 int (*transfer_one_message)(struct spi_master *master,
433 struct spi_message *mesg);
434 int (*unprepare_transfer_hardware)(struct spi_master *master);
435 int (*prepare_message)(struct spi_master *master,
436 struct spi_message *message);
437 int (*unprepare_message)(struct spi_master *master,
438 struct spi_message *message);
441 * These hooks are for drivers that use a generic implementation
442 * of transfer_one_message() provied by the core.
444 void (*set_cs)(struct spi_device *spi, bool enable);
445 int (*transfer_one)(struct spi_master *master, struct spi_device *spi,
446 struct spi_transfer *transfer);
448 /* gpio chip select */
451 /* DMA channels for use with core dmaengine helpers */
452 struct dma_chan *dma_tx;
453 struct dma_chan *dma_rx;
455 /* dummy data for full duplex devices */
460 static inline void *spi_master_get_devdata(struct spi_master *master)
462 return dev_get_drvdata(&master->dev);
465 static inline void spi_master_set_devdata(struct spi_master *master, void *data)
467 dev_set_drvdata(&master->dev, data);
470 static inline struct spi_master *spi_master_get(struct spi_master *master)
472 if (!master || !get_device(&master->dev))
477 static inline void spi_master_put(struct spi_master *master)
480 put_device(&master->dev);
483 /* PM calls that need to be issued by the driver */
484 extern int spi_master_suspend(struct spi_master *master);
485 extern int spi_master_resume(struct spi_master *master);
487 /* Calls the driver make to interact with the message queue */
488 extern struct spi_message *spi_get_next_queued_message(struct spi_master *master);
489 extern void spi_finalize_current_message(struct spi_master *master);
490 extern void spi_finalize_current_transfer(struct spi_master *master);
492 /* the spi driver core manages memory for the spi_master classdev */
493 extern struct spi_master *
494 spi_alloc_master(struct device *host, unsigned size);
496 extern int spi_register_master(struct spi_master *master);
497 extern int devm_spi_register_master(struct device *dev,
498 struct spi_master *master);
499 extern void spi_unregister_master(struct spi_master *master);
501 extern struct spi_master *spi_busnum_to_master(u16 busnum);
503 /*---------------------------------------------------------------------------*/
506 * I/O INTERFACE between SPI controller and protocol drivers
508 * Protocol drivers use a queue of spi_messages, each transferring data
509 * between the controller and memory buffers.
511 * The spi_messages themselves consist of a series of read+write transfer
512 * segments. Those segments always read the same number of bits as they
513 * write; but one or the other is easily ignored by passing a null buffer
514 * pointer. (This is unlike most types of I/O API, because SPI hardware
517 * NOTE: Allocation of spi_transfer and spi_message memory is entirely
518 * up to the protocol driver, which guarantees the integrity of both (as
519 * well as the data buffers) for as long as the message is queued.
523 * struct spi_transfer - a read/write buffer pair
524 * @tx_buf: data to be written (dma-safe memory), or NULL
525 * @rx_buf: data to be read (dma-safe memory), or NULL
526 * @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped
527 * @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped
528 * @tx_nbits: number of bits used for writing. If 0 the default
529 * (SPI_NBITS_SINGLE) is used.
530 * @rx_nbits: number of bits used for reading. If 0 the default
531 * (SPI_NBITS_SINGLE) is used.
532 * @len: size of rx and tx buffers (in bytes)
533 * @speed_hz: Select a speed other than the device default for this
534 * transfer. If 0 the default (from @spi_device) is used.
535 * @bits_per_word: select a bits_per_word other than the device default
536 * for this transfer. If 0 the default (from @spi_device) is used.
537 * @cs_change: affects chipselect after this transfer completes
538 * @delay_usecs: microseconds to delay after this transfer before
539 * (optionally) changing the chipselect status, then starting
540 * the next transfer or completing this @spi_message.
541 * @transfer_list: transfers are sequenced through @spi_message.transfers
542 * @tx_sg: Scatterlist for transmit, currently not for client use
543 * @rx_sg: Scatterlist for receive, currently not for client use
545 * SPI transfers always write the same number of bytes as they read.
546 * Protocol drivers should always provide @rx_buf and/or @tx_buf.
547 * In some cases, they may also want to provide DMA addresses for
548 * the data being transferred; that may reduce overhead, when the
549 * underlying driver uses dma.
551 * If the transmit buffer is null, zeroes will be shifted out
552 * while filling @rx_buf. If the receive buffer is null, the data
553 * shifted in will be discarded. Only "len" bytes shift out (or in).
554 * It's an error to try to shift out a partial word. (For example, by
555 * shifting out three bytes with word size of sixteen or twenty bits;
556 * the former uses two bytes per word, the latter uses four bytes.)
558 * In-memory data values are always in native CPU byte order, translated
559 * from the wire byte order (big-endian except with SPI_LSB_FIRST). So
560 * for example when bits_per_word is sixteen, buffers are 2N bytes long
561 * (@len = 2N) and hold N sixteen bit words in CPU byte order.
563 * When the word size of the SPI transfer is not a power-of-two multiple
564 * of eight bits, those in-memory words include extra bits. In-memory
565 * words are always seen by protocol drivers as right-justified, so the
566 * undefined (rx) or unused (tx) bits are always the most significant bits.
568 * All SPI transfers start with the relevant chipselect active. Normally
569 * it stays selected until after the last transfer in a message. Drivers
570 * can affect the chipselect signal using cs_change.
572 * (i) If the transfer isn't the last one in the message, this flag is
573 * used to make the chipselect briefly go inactive in the middle of the
574 * message. Toggling chipselect in this way may be needed to terminate
575 * a chip command, letting a single spi_message perform all of group of
576 * chip transactions together.
578 * (ii) When the transfer is the last one in the message, the chip may
579 * stay selected until the next transfer. On multi-device SPI busses
580 * with nothing blocking messages going to other devices, this is just
581 * a performance hint; starting a message to another device deselects
582 * this one. But in other cases, this can be used to ensure correctness.
583 * Some devices need protocol transactions to be built from a series of
584 * spi_message submissions, where the content of one message is determined
585 * by the results of previous messages and where the whole transaction
586 * ends when the chipselect goes intactive.
588 * When SPI can transfer in 1x,2x or 4x. It can get this transfer information
589 * from device through @tx_nbits and @rx_nbits. In Bi-direction, these
590 * two should both be set. User can set transfer mode with SPI_NBITS_SINGLE(1x)
591 * SPI_NBITS_DUAL(2x) and SPI_NBITS_QUAD(4x) to support these three transfer.
593 * The code that submits an spi_message (and its spi_transfers)
594 * to the lower layers is responsible for managing its memory.
595 * Zero-initialize every field you don't set up explicitly, to
596 * insulate against future API updates. After you submit a message
597 * and its transfers, ignore them until its completion callback.
599 struct spi_transfer {
600 /* it's ok if tx_buf == rx_buf (right?)
601 * for MicroWire, one buffer must be null
602 * buffers must work with dma_*map_single() calls, unless
603 * spi_message.is_dma_mapped reports a pre-existing mapping
611 struct sg_table tx_sg;
612 struct sg_table rx_sg;
614 unsigned cs_change:1;
617 #define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */
618 #define SPI_NBITS_DUAL 0x02 /* 2bits transfer */
619 #define SPI_NBITS_QUAD 0x04 /* 4bits transfer */
624 struct list_head transfer_list;
628 * struct spi_message - one multi-segment SPI transaction
629 * @transfers: list of transfer segments in this transaction
630 * @spi: SPI device to which the transaction is queued
631 * @is_dma_mapped: if true, the caller provided both dma and cpu virtual
632 * addresses for each transfer buffer
633 * @complete: called to report transaction completions
634 * @context: the argument to complete() when it's called
635 * @frame_length: the total number of bytes in the message
636 * @actual_length: the total number of bytes that were transferred in all
637 * successful segments
638 * @status: zero for success, else negative errno
639 * @queue: for use by whichever driver currently owns the message
640 * @state: for use by whichever driver currently owns the message
642 * A @spi_message is used to execute an atomic sequence of data transfers,
643 * each represented by a struct spi_transfer. The sequence is "atomic"
644 * in the sense that no other spi_message may use that SPI bus until that
645 * sequence completes. On some systems, many such sequences can execute as
646 * as single programmed DMA transfer. On all systems, these messages are
647 * queued, and might complete after transactions to other devices. Messages
648 * sent to a given spi_device are alway executed in FIFO order.
650 * The code that submits an spi_message (and its spi_transfers)
651 * to the lower layers is responsible for managing its memory.
652 * Zero-initialize every field you don't set up explicitly, to
653 * insulate against future API updates. After you submit a message
654 * and its transfers, ignore them until its completion callback.
657 struct list_head transfers;
659 struct spi_device *spi;
661 unsigned is_dma_mapped:1;
663 /* REVISIT: we might want a flag affecting the behavior of the
664 * last transfer ... allowing things like "read 16 bit length L"
665 * immediately followed by "read L bytes". Basically imposing
666 * a specific message scheduling algorithm.
668 * Some controller drivers (message-at-a-time queue processing)
669 * could provide that as their default scheduling algorithm. But
670 * others (with multi-message pipelines) could need a flag to
671 * tell them about such special cases.
674 /* completion is reported through a callback */
675 void (*complete)(void *context);
677 unsigned frame_length;
678 unsigned actual_length;
681 /* for optional use by whatever driver currently owns the
682 * spi_message ... between calls to spi_async and then later
683 * complete(), that's the spi_master controller driver.
685 struct list_head queue;
689 static inline void spi_message_init(struct spi_message *m)
691 memset(m, 0, sizeof *m);
692 INIT_LIST_HEAD(&m->transfers);
696 spi_message_add_tail(struct spi_transfer *t, struct spi_message *m)
698 list_add_tail(&t->transfer_list, &m->transfers);
702 spi_transfer_del(struct spi_transfer *t)
704 list_del(&t->transfer_list);
708 * spi_message_init_with_transfers - Initialize spi_message and append transfers
709 * @m: spi_message to be initialized
710 * @xfers: An array of spi transfers
711 * @num_xfers: Number of items in the xfer array
713 * This function initializes the given spi_message and adds each spi_transfer in
714 * the given array to the message.
717 spi_message_init_with_transfers(struct spi_message *m,
718 struct spi_transfer *xfers, unsigned int num_xfers)
723 for (i = 0; i < num_xfers; ++i)
724 spi_message_add_tail(&xfers[i], m);
727 /* It's fine to embed message and transaction structures in other data
728 * structures so long as you don't free them while they're in use.
731 static inline struct spi_message *spi_message_alloc(unsigned ntrans, gfp_t flags)
733 struct spi_message *m;
735 m = kzalloc(sizeof(struct spi_message)
736 + ntrans * sizeof(struct spi_transfer),
740 struct spi_transfer *t = (struct spi_transfer *)(m + 1);
742 INIT_LIST_HEAD(&m->transfers);
743 for (i = 0; i < ntrans; i++, t++)
744 spi_message_add_tail(t, m);
749 static inline void spi_message_free(struct spi_message *m)
754 extern int spi_setup(struct spi_device *spi);
755 extern int spi_async(struct spi_device *spi, struct spi_message *message);
756 extern int spi_async_locked(struct spi_device *spi,
757 struct spi_message *message);
759 /*---------------------------------------------------------------------------*/
761 /* All these synchronous SPI transfer routines are utilities layered
762 * over the core async transfer primitive. Here, "synchronous" means
763 * they will sleep uninterruptibly until the async transfer completes.
766 extern int spi_sync(struct spi_device *spi, struct spi_message *message);
767 extern int spi_sync_locked(struct spi_device *spi, struct spi_message *message);
768 extern int spi_bus_lock(struct spi_master *master);
769 extern int spi_bus_unlock(struct spi_master *master);
772 * spi_write - SPI synchronous write
773 * @spi: device to which data will be written
775 * @len: data buffer size
778 * This writes the buffer and returns zero or a negative error code.
779 * Callable only from contexts that can sleep.
782 spi_write(struct spi_device *spi, const void *buf, size_t len)
784 struct spi_transfer t = {
788 struct spi_message m;
790 spi_message_init(&m);
791 spi_message_add_tail(&t, &m);
792 return spi_sync(spi, &m);
796 * spi_read - SPI synchronous read
797 * @spi: device from which data will be read
799 * @len: data buffer size
802 * This reads the buffer and returns zero or a negative error code.
803 * Callable only from contexts that can sleep.
806 spi_read(struct spi_device *spi, void *buf, size_t len)
808 struct spi_transfer t = {
812 struct spi_message m;
814 spi_message_init(&m);
815 spi_message_add_tail(&t, &m);
816 return spi_sync(spi, &m);
820 * spi_sync_transfer - synchronous SPI data transfer
821 * @spi: device with which data will be exchanged
822 * @xfers: An array of spi_transfers
823 * @num_xfers: Number of items in the xfer array
826 * Does a synchronous SPI data transfer of the given spi_transfer array.
828 * For more specific semantics see spi_sync().
830 * It returns zero on success, else a negative error code.
833 spi_sync_transfer(struct spi_device *spi, struct spi_transfer *xfers,
834 unsigned int num_xfers)
836 struct spi_message msg;
838 spi_message_init_with_transfers(&msg, xfers, num_xfers);
840 return spi_sync(spi, &msg);
843 /* this copies txbuf and rxbuf data; for small transfers only! */
844 extern int spi_write_then_read(struct spi_device *spi,
845 const void *txbuf, unsigned n_tx,
846 void *rxbuf, unsigned n_rx);
849 * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read
850 * @spi: device with which data will be exchanged
851 * @cmd: command to be written before data is read back
854 * This returns the (unsigned) eight bit number returned by the
855 * device, or else a negative error code. Callable only from
856 * contexts that can sleep.
858 static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd)
863 status = spi_write_then_read(spi, &cmd, 1, &result, 1);
865 /* return negative errno or unsigned value */
866 return (status < 0) ? status : result;
870 * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read
871 * @spi: device with which data will be exchanged
872 * @cmd: command to be written before data is read back
875 * This returns the (unsigned) sixteen bit number returned by the
876 * device, or else a negative error code. Callable only from
877 * contexts that can sleep.
879 * The number is returned in wire-order, which is at least sometimes
882 static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd)
887 status = spi_write_then_read(spi, &cmd, 1, &result, 2);
889 /* return negative errno or unsigned value */
890 return (status < 0) ? status : result;
894 * spi_w8r16be - SPI synchronous 8 bit write followed by 16 bit big-endian read
895 * @spi: device with which data will be exchanged
896 * @cmd: command to be written before data is read back
899 * This returns the (unsigned) sixteen bit number returned by the device in cpu
900 * endianness, or else a negative error code. Callable only from contexts that
903 * This function is similar to spi_w8r16, with the exception that it will
904 * convert the read 16 bit data word from big-endian to native endianness.
907 static inline ssize_t spi_w8r16be(struct spi_device *spi, u8 cmd)
913 status = spi_write_then_read(spi, &cmd, 1, &result, 2);
917 return be16_to_cpu(result);
920 /*---------------------------------------------------------------------------*/
923 * INTERFACE between board init code and SPI infrastructure.
925 * No SPI driver ever sees these SPI device table segments, but
926 * it's how the SPI core (or adapters that get hotplugged) grows
927 * the driver model tree.
929 * As a rule, SPI devices can't be probed. Instead, board init code
930 * provides a table listing the devices which are present, with enough
931 * information to bind and set up the device's driver. There's basic
932 * support for nonstatic configurations too; enough to handle adding
933 * parport adapters, or microcontrollers acting as USB-to-SPI bridges.
937 * struct spi_board_info - board-specific template for a SPI device
938 * @modalias: Initializes spi_device.modalias; identifies the driver.
939 * @platform_data: Initializes spi_device.platform_data; the particular
940 * data stored there is driver-specific.
941 * @controller_data: Initializes spi_device.controller_data; some
942 * controllers need hints about hardware setup, e.g. for DMA.
943 * @irq: Initializes spi_device.irq; depends on how the board is wired.
944 * @max_speed_hz: Initializes spi_device.max_speed_hz; based on limits
945 * from the chip datasheet and board-specific signal quality issues.
946 * @bus_num: Identifies which spi_master parents the spi_device; unused
947 * by spi_new_device(), and otherwise depends on board wiring.
948 * @chip_select: Initializes spi_device.chip_select; depends on how
949 * the board is wired.
950 * @mode: Initializes spi_device.mode; based on the chip datasheet, board
951 * wiring (some devices support both 3WIRE and standard modes), and
952 * possibly presence of an inverter in the chipselect path.
954 * When adding new SPI devices to the device tree, these structures serve
955 * as a partial device template. They hold information which can't always
956 * be determined by drivers. Information that probe() can establish (such
957 * as the default transfer wordsize) is not included here.
959 * These structures are used in two places. Their primary role is to
960 * be stored in tables of board-specific device descriptors, which are
961 * declared early in board initialization and then used (much later) to
962 * populate a controller's device tree after the that controller's driver
963 * initializes. A secondary (and atypical) role is as a parameter to
964 * spi_new_device() call, which happens after those controller drivers
965 * are active in some dynamic board configuration models.
967 struct spi_board_info {
968 /* the device name and module name are coupled, like platform_bus;
969 * "modalias" is normally the driver name.
971 * platform_data goes to spi_device.dev.platform_data,
972 * controller_data goes to spi_device.controller_data,
975 char modalias[SPI_NAME_SIZE];
976 const void *platform_data;
977 void *controller_data;
980 /* slower signaling on noisy or low voltage boards */
984 /* bus_num is board specific and matches the bus_num of some
985 * spi_master that will probably be registered later.
987 * chip_select reflects how this chip is wired to that master;
988 * it's less than num_chipselect.
993 /* mode becomes spi_device.mode, and is essential for chips
994 * where the default of SPI_CS_HIGH = 0 is wrong.
998 /* ... may need additional spi_device chip config data here.
999 * avoid stuff protocol drivers can set; but include stuff
1000 * needed to behave without being bound to a driver:
1001 * - quirks like clock rate mattering when not selected
1007 spi_register_board_info(struct spi_board_info const *info, unsigned n);
1009 /* board init code may ignore whether SPI is configured or not */
1011 spi_register_board_info(struct spi_board_info const *info, unsigned n)
1016 /* If you're hotplugging an adapter with devices (parport, usb, etc)
1017 * use spi_new_device() to describe each device. You can also call
1018 * spi_unregister_device() to start making that device vanish, but
1019 * normally that would be handled by spi_unregister_master().
1021 * You can also use spi_alloc_device() and spi_add_device() to use a two
1022 * stage registration sequence for each spi_device. This gives the caller
1023 * some more control over the spi_device structure before it is registered,
1024 * but requires that caller to initialize fields that would otherwise
1025 * be defined using the board info.
1027 extern struct spi_device *
1028 spi_alloc_device(struct spi_master *master);
1031 spi_add_device(struct spi_device *spi);
1033 extern struct spi_device *
1034 spi_new_device(struct spi_master *, struct spi_board_info *);
1037 spi_unregister_device(struct spi_device *spi)
1040 device_unregister(&spi->dev);
1043 extern const struct spi_device_id *
1044 spi_get_device_id(const struct spi_device *sdev);
1047 spi_transfer_is_last(struct spi_master *master, struct spi_transfer *xfer)
1049 return list_is_last(&xfer->transfer_list, &master->cur_msg->transfers);
1052 #endif /* __LINUX_SPI_H */