2 * Copyright (C) 2005 David Brownell
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <linux/device.h>
23 #include <linux/mod_devicetable.h>
24 #include <linux/slab.h>
25 #include <linux/kthread.h>
26 #include <linux/completion.h>
29 * INTERFACES between SPI master-side drivers and SPI infrastructure.
30 * (There's no SPI slave support for Linux yet...)
32 extern struct bus_type spi_bus_type;
35 * struct spi_device - Master side proxy for an SPI slave device
36 * @dev: Driver model representation of the device.
37 * @master: SPI controller used with the device.
38 * @max_speed_hz: Maximum clock rate to be used with this chip
39 * (on this board); may be changed by the device's driver.
40 * The spi_transfer.speed_hz can override this for each transfer.
41 * @chip_select: Chipselect, distinguishing chips handled by @master.
42 * @mode: The spi mode defines how data is clocked out and in.
43 * This may be changed by the device's driver.
44 * The "active low" default for chipselect mode can be overridden
45 * (by specifying SPI_CS_HIGH) as can the "MSB first" default for
46 * each word in a transfer (by specifying SPI_LSB_FIRST).
47 * @bits_per_word: Data transfers involve one or more words; word sizes
48 * like eight or 12 bits are common. In-memory wordsizes are
49 * powers of two bytes (e.g. 20 bit samples use 32 bits).
50 * This may be changed by the device's driver, or left at the
51 * default (0) indicating protocol words are eight bit bytes.
52 * The spi_transfer.bits_per_word can override this for each transfer.
53 * @irq: Negative, or the number passed to request_irq() to receive
54 * interrupts from this device.
55 * @controller_state: Controller's runtime state
56 * @controller_data: Board-specific definitions for controller, such as
57 * FIFO initialization parameters; from board_info.controller_data
58 * @modalias: Name of the driver to use with this device, or an alias
59 * for that name. This appears in the sysfs "modalias" attribute
60 * for driver coldplugging, and in uevents used for hotplugging
61 * @cs_gpio: gpio number of the chipselect line (optional, -ENOENT when
62 * when not using a GPIO line)
64 * A @spi_device is used to interchange data between an SPI slave
65 * (usually a discrete chip) and CPU memory.
67 * In @dev, the platform_data is used to hold information about this
68 * device that's meaningful to the device's protocol driver, but not
69 * to its controller. One example might be an identifier for a chip
70 * variant with slightly different functionality; another might be
71 * information about how this particular board wires the chip's pins.
75 struct spi_master *master;
80 #define SPI_CPHA 0x01 /* clock phase */
81 #define SPI_CPOL 0x02 /* clock polarity */
82 #define SPI_MODE_0 (0|0) /* (original MicroWire) */
83 #define SPI_MODE_1 (0|SPI_CPHA)
84 #define SPI_MODE_2 (SPI_CPOL|0)
85 #define SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
86 #define SPI_CS_HIGH 0x04 /* chipselect active high? */
87 #define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */
88 #define SPI_3WIRE 0x10 /* SI/SO signals shared */
89 #define SPI_LOOP 0x20 /* loopback mode */
90 #define SPI_NO_CS 0x40 /* 1 dev/bus, no chipselect */
91 #define SPI_READY 0x80 /* slave pulls low to pause */
92 #define SPI_TX_DUAL 0x100 /* transmit with 2 wires */
93 #define SPI_TX_QUAD 0x200 /* transmit with 4 wires */
94 #define SPI_RX_DUAL 0x400 /* receive with 2 wires */
95 #define SPI_RX_QUAD 0x800 /* receive with 4 wires */
97 void *controller_state;
98 void *controller_data;
99 char modalias[SPI_NAME_SIZE];
100 int cs_gpio; /* chip select gpio */
103 * likely need more hooks for more protocol options affecting how
104 * the controller talks to each chip, like:
105 * - memory packing (12 bit samples into low bits, others zeroed)
107 * - drop chipselect after each word
108 * - chipselect delays
113 static inline struct spi_device *to_spi_device(struct device *dev)
115 return dev ? container_of(dev, struct spi_device, dev) : NULL;
118 /* most drivers won't need to care about device refcounting */
119 static inline struct spi_device *spi_dev_get(struct spi_device *spi)
121 return (spi && get_device(&spi->dev)) ? spi : NULL;
124 static inline void spi_dev_put(struct spi_device *spi)
127 put_device(&spi->dev);
130 /* ctldata is for the bus_master driver's runtime state */
131 static inline void *spi_get_ctldata(struct spi_device *spi)
133 return spi->controller_state;
136 static inline void spi_set_ctldata(struct spi_device *spi, void *state)
138 spi->controller_state = state;
141 /* device driver data */
143 static inline void spi_set_drvdata(struct spi_device *spi, void *data)
145 dev_set_drvdata(&spi->dev, data);
148 static inline void *spi_get_drvdata(struct spi_device *spi)
150 return dev_get_drvdata(&spi->dev);
157 * struct spi_driver - Host side "protocol" driver
158 * @id_table: List of SPI devices supported by this driver
159 * @probe: Binds this driver to the spi device. Drivers can verify
160 * that the device is actually present, and may need to configure
161 * characteristics (such as bits_per_word) which weren't needed for
162 * the initial configuration done during system setup.
163 * @remove: Unbinds this driver from the spi device
164 * @shutdown: Standard shutdown callback used during system state
165 * transitions such as powerdown/halt and kexec
166 * @suspend: Standard suspend callback used during system state transitions
167 * @resume: Standard resume callback used during system state transitions
168 * @driver: SPI device drivers should initialize the name and owner
169 * field of this structure.
171 * This represents the kind of device driver that uses SPI messages to
172 * interact with the hardware at the other end of a SPI link. It's called
173 * a "protocol" driver because it works through messages rather than talking
174 * directly to SPI hardware (which is what the underlying SPI controller
175 * driver does to pass those messages). These protocols are defined in the
176 * specification for the device(s) supported by the driver.
178 * As a rule, those device protocols represent the lowest level interface
179 * supported by a driver, and it will support upper level interfaces too.
180 * Examples of such upper levels include frameworks like MTD, networking,
181 * MMC, RTC, filesystem character device nodes, and hardware monitoring.
184 const struct spi_device_id *id_table;
185 int (*probe)(struct spi_device *spi);
186 int (*remove)(struct spi_device *spi);
187 void (*shutdown)(struct spi_device *spi);
188 int (*suspend)(struct spi_device *spi, pm_message_t mesg);
189 int (*resume)(struct spi_device *spi);
190 struct device_driver driver;
193 static inline struct spi_driver *to_spi_driver(struct device_driver *drv)
195 return drv ? container_of(drv, struct spi_driver, driver) : NULL;
198 extern int spi_register_driver(struct spi_driver *sdrv);
201 * spi_unregister_driver - reverse effect of spi_register_driver
202 * @sdrv: the driver to unregister
205 static inline void spi_unregister_driver(struct spi_driver *sdrv)
208 driver_unregister(&sdrv->driver);
212 * module_spi_driver() - Helper macro for registering a SPI driver
213 * @__spi_driver: spi_driver struct
215 * Helper macro for SPI drivers which do not do anything special in module
216 * init/exit. This eliminates a lot of boilerplate. Each module may only
217 * use this macro once, and calling it replaces module_init() and module_exit()
219 #define module_spi_driver(__spi_driver) \
220 module_driver(__spi_driver, spi_register_driver, \
221 spi_unregister_driver)
224 * struct spi_master - interface to SPI master controller
225 * @dev: device interface to this driver
226 * @list: link with the global spi_master list
227 * @bus_num: board-specific (and often SOC-specific) identifier for a
228 * given SPI controller.
229 * @num_chipselect: chipselects are used to distinguish individual
230 * SPI slaves, and are numbered from zero to num_chipselects.
231 * each slave has a chipselect signal, but it's common that not
232 * every chipselect is connected to a slave.
233 * @dma_alignment: SPI controller constraint on DMA buffers alignment.
234 * @mode_bits: flags understood by this controller driver
235 * @bits_per_word_mask: A mask indicating which values of bits_per_word are
236 * supported by the driver. Bit n indicates that a bits_per_word n+1 is
237 * suported. If set, the SPI core will reject any transfer with an
238 * unsupported bits_per_word. If not set, this value is simply ignored,
239 * and it's up to the individual driver to perform any validation.
240 * @min_speed_hz: Lowest supported transfer speed
241 * @max_speed_hz: Highest supported transfer speed
242 * @flags: other constraints relevant to this driver
243 * @bus_lock_spinlock: spinlock for SPI bus locking
244 * @bus_lock_mutex: mutex for SPI bus locking
245 * @bus_lock_flag: indicates that the SPI bus is locked for exclusive use
246 * @setup: updates the device mode and clocking records used by a
247 * device's SPI controller; protocol code may call this. This
248 * must fail if an unrecognized or unsupported mode is requested.
249 * It's always safe to call this unless transfers are pending on
250 * the device whose settings are being modified.
251 * @transfer: adds a message to the controller's transfer queue.
252 * @cleanup: frees controller-specific state
253 * @queued: whether this master is providing an internal message queue
254 * @kworker: thread struct for message pump
255 * @kworker_task: pointer to task for message pump kworker thread
256 * @pump_messages: work struct for scheduling work to the message pump
257 * @queue_lock: spinlock to syncronise access to message queue
258 * @queue: message queue
259 * @cur_msg: the currently in-flight message
260 * @cur_msg_prepared: spi_prepare_message was called for the currently
262 * @xfer_completion: used by core tranfer_one_message()
263 * @busy: message pump is busy
264 * @running: message pump is running
265 * @rt: whether this queue is set to run as a realtime task
266 * @auto_runtime_pm: the core should ensure a runtime PM reference is held
267 * while the hardware is prepared, using the parent
268 * device for the spidev
269 * @prepare_transfer_hardware: a message will soon arrive from the queue
270 * so the subsystem requests the driver to prepare the transfer hardware
271 * by issuing this call
272 * @transfer_one_message: the subsystem calls the driver to transfer a single
273 * message while queuing transfers that arrive in the meantime. When the
274 * driver is finished with this message, it must call
275 * spi_finalize_current_message() so the subsystem can issue the next
277 * @unprepare_transfer_hardware: there are currently no more messages on the
278 * queue so the subsystem notifies the driver that it may relax the
279 * hardware by issuing this call
280 * @set_cs: set the logic level of the chip select line. May be called
281 * from interrupt context.
282 * @prepare_message: set up the controller to transfer a single message,
283 * for example doing DMA mapping. Called from threaded
285 * @transfer_one: transfer a single spi_transfer.
286 * - return 0 if the transfer is finished,
287 * - return 1 if the transfer is still in progress. When
288 * the driver is finished with this transfer it must
289 * call spi_finalize_current_transfer() so the subsystem
290 * can issue the next transfer. Note: transfer_one and
291 * transfer_one_message are mutually exclusive; when both
292 * are set, the generic subsystem does not call your
293 * transfer_one callback.
294 * @unprepare_message: undo any work done by prepare_message().
295 * @cs_gpios: Array of GPIOs to use as chip select lines; one per CS
296 * number. Any individual value may be -ENOENT for CS lines that
297 * are not GPIOs (driven by the SPI controller itself).
299 * Each SPI master controller can communicate with one or more @spi_device
300 * children. These make a small bus, sharing MOSI, MISO and SCK signals
301 * but not chip select signals. Each device may be configured to use a
302 * different clock rate, since those shared signals are ignored unless
303 * the chip is selected.
305 * The driver for an SPI controller manages access to those devices through
306 * a queue of spi_message transactions, copying data between CPU memory and
307 * an SPI slave device. For each such message it queues, it calls the
308 * message's completion function when the transaction completes.
313 struct list_head list;
315 /* other than negative (== assign one dynamically), bus_num is fully
316 * board-specific. usually that simplifies to being SOC-specific.
317 * example: one SOC has three SPI controllers, numbered 0..2,
318 * and one board's schematics might show it using SPI-2. software
319 * would normally use bus_num=2 for that controller.
323 /* chipselects will be integral to many controllers; some others
324 * might use board-specific GPIOs.
328 /* some SPI controllers pose alignment requirements on DMAable
329 * buffers; let protocol drivers know about these requirements.
333 /* spi_device.mode flags understood by this controller driver */
336 /* bitmask of supported bits_per_word for transfers */
337 u32 bits_per_word_mask;
338 #define SPI_BPW_MASK(bits) BIT((bits) - 1)
339 #define SPI_BIT_MASK(bits) (((bits) == 32) ? ~0U : (BIT(bits) - 1))
340 #define SPI_BPW_RANGE_MASK(min, max) (SPI_BIT_MASK(max) - SPI_BIT_MASK(min - 1))
342 /* limits on transfer speed */
346 /* other constraints relevant to this driver */
348 #define SPI_MASTER_HALF_DUPLEX BIT(0) /* can't do full duplex */
349 #define SPI_MASTER_NO_RX BIT(1) /* can't do buffer read */
350 #define SPI_MASTER_NO_TX BIT(2) /* can't do buffer write */
352 /* lock and mutex for SPI bus locking */
353 spinlock_t bus_lock_spinlock;
354 struct mutex bus_lock_mutex;
356 /* flag indicating that the SPI bus is locked for exclusive use */
359 /* Setup mode and clock, etc (spi driver may call many times).
361 * IMPORTANT: this may be called when transfers to another
362 * device are active. DO NOT UPDATE SHARED REGISTERS in ways
363 * which could break those transfers.
365 int (*setup)(struct spi_device *spi);
367 /* bidirectional bulk transfers
369 * + The transfer() method may not sleep; its main role is
370 * just to add the message to the queue.
371 * + For now there's no remove-from-queue operation, or
372 * any other request management
373 * + To a given spi_device, message queueing is pure fifo
375 * + The master's main job is to process its message queue,
376 * selecting a chip then transferring data
377 * + If there are multiple spi_device children, the i/o queue
378 * arbitration algorithm is unspecified (round robin, fifo,
379 * priority, reservations, preemption, etc)
381 * + Chipselect stays active during the entire message
382 * (unless modified by spi_transfer.cs_change != 0).
383 * + The message transfers use clock and SPI mode parameters
384 * previously established by setup() for this device
386 int (*transfer)(struct spi_device *spi,
387 struct spi_message *mesg);
389 /* called on release() to free memory provided by spi_master */
390 void (*cleanup)(struct spi_device *spi);
393 * These hooks are for drivers that want to use the generic
394 * master transfer queueing mechanism. If these are used, the
395 * transfer() function above must NOT be specified by the driver.
396 * Over time we expect SPI drivers to be phased over to this API.
399 struct kthread_worker kworker;
400 struct task_struct *kworker_task;
401 struct kthread_work pump_messages;
402 spinlock_t queue_lock;
403 struct list_head queue;
404 struct spi_message *cur_msg;
408 bool auto_runtime_pm;
409 bool cur_msg_prepared;
410 struct completion xfer_completion;
412 int (*prepare_transfer_hardware)(struct spi_master *master);
413 int (*transfer_one_message)(struct spi_master *master,
414 struct spi_message *mesg);
415 int (*unprepare_transfer_hardware)(struct spi_master *master);
416 int (*prepare_message)(struct spi_master *master,
417 struct spi_message *message);
418 int (*unprepare_message)(struct spi_master *master,
419 struct spi_message *message);
422 * These hooks are for drivers that use a generic implementation
423 * of transfer_one_message() provied by the core.
425 void (*set_cs)(struct spi_device *spi, bool enable);
426 int (*transfer_one)(struct spi_master *master, struct spi_device *spi,
427 struct spi_transfer *transfer);
429 /* gpio chip select */
433 static inline void *spi_master_get_devdata(struct spi_master *master)
435 return dev_get_drvdata(&master->dev);
438 static inline void spi_master_set_devdata(struct spi_master *master, void *data)
440 dev_set_drvdata(&master->dev, data);
443 static inline struct spi_master *spi_master_get(struct spi_master *master)
445 if (!master || !get_device(&master->dev))
450 static inline void spi_master_put(struct spi_master *master)
453 put_device(&master->dev);
456 /* PM calls that need to be issued by the driver */
457 extern int spi_master_suspend(struct spi_master *master);
458 extern int spi_master_resume(struct spi_master *master);
460 /* Calls the driver make to interact with the message queue */
461 extern struct spi_message *spi_get_next_queued_message(struct spi_master *master);
462 extern void spi_finalize_current_message(struct spi_master *master);
463 extern void spi_finalize_current_transfer(struct spi_master *master);
465 /* the spi driver core manages memory for the spi_master classdev */
466 extern struct spi_master *
467 spi_alloc_master(struct device *host, unsigned size);
469 extern int spi_register_master(struct spi_master *master);
470 extern int devm_spi_register_master(struct device *dev,
471 struct spi_master *master);
472 extern void spi_unregister_master(struct spi_master *master);
474 extern struct spi_master *spi_busnum_to_master(u16 busnum);
476 /*---------------------------------------------------------------------------*/
479 * I/O INTERFACE between SPI controller and protocol drivers
481 * Protocol drivers use a queue of spi_messages, each transferring data
482 * between the controller and memory buffers.
484 * The spi_messages themselves consist of a series of read+write transfer
485 * segments. Those segments always read the same number of bits as they
486 * write; but one or the other is easily ignored by passing a null buffer
487 * pointer. (This is unlike most types of I/O API, because SPI hardware
490 * NOTE: Allocation of spi_transfer and spi_message memory is entirely
491 * up to the protocol driver, which guarantees the integrity of both (as
492 * well as the data buffers) for as long as the message is queued.
496 * struct spi_transfer - a read/write buffer pair
497 * @tx_buf: data to be written (dma-safe memory), or NULL
498 * @rx_buf: data to be read (dma-safe memory), or NULL
499 * @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped
500 * @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped
501 * @tx_nbits: number of bits used for writting. If 0 the default
502 * (SPI_NBITS_SINGLE) is used.
503 * @rx_nbits: number of bits used for reading. If 0 the default
504 * (SPI_NBITS_SINGLE) is used.
505 * @len: size of rx and tx buffers (in bytes)
506 * @speed_hz: Select a speed other than the device default for this
507 * transfer. If 0 the default (from @spi_device) is used.
508 * @bits_per_word: select a bits_per_word other than the device default
509 * for this transfer. If 0 the default (from @spi_device) is used.
510 * @cs_change: affects chipselect after this transfer completes
511 * @delay_usecs: microseconds to delay after this transfer before
512 * (optionally) changing the chipselect status, then starting
513 * the next transfer or completing this @spi_message.
514 * @transfer_list: transfers are sequenced through @spi_message.transfers
516 * SPI transfers always write the same number of bytes as they read.
517 * Protocol drivers should always provide @rx_buf and/or @tx_buf.
518 * In some cases, they may also want to provide DMA addresses for
519 * the data being transferred; that may reduce overhead, when the
520 * underlying driver uses dma.
522 * If the transmit buffer is null, zeroes will be shifted out
523 * while filling @rx_buf. If the receive buffer is null, the data
524 * shifted in will be discarded. Only "len" bytes shift out (or in).
525 * It's an error to try to shift out a partial word. (For example, by
526 * shifting out three bytes with word size of sixteen or twenty bits;
527 * the former uses two bytes per word, the latter uses four bytes.)
529 * In-memory data values are always in native CPU byte order, translated
530 * from the wire byte order (big-endian except with SPI_LSB_FIRST). So
531 * for example when bits_per_word is sixteen, buffers are 2N bytes long
532 * (@len = 2N) and hold N sixteen bit words in CPU byte order.
534 * When the word size of the SPI transfer is not a power-of-two multiple
535 * of eight bits, those in-memory words include extra bits. In-memory
536 * words are always seen by protocol drivers as right-justified, so the
537 * undefined (rx) or unused (tx) bits are always the most significant bits.
539 * All SPI transfers start with the relevant chipselect active. Normally
540 * it stays selected until after the last transfer in a message. Drivers
541 * can affect the chipselect signal using cs_change.
543 * (i) If the transfer isn't the last one in the message, this flag is
544 * used to make the chipselect briefly go inactive in the middle of the
545 * message. Toggling chipselect in this way may be needed to terminate
546 * a chip command, letting a single spi_message perform all of group of
547 * chip transactions together.
549 * (ii) When the transfer is the last one in the message, the chip may
550 * stay selected until the next transfer. On multi-device SPI busses
551 * with nothing blocking messages going to other devices, this is just
552 * a performance hint; starting a message to another device deselects
553 * this one. But in other cases, this can be used to ensure correctness.
554 * Some devices need protocol transactions to be built from a series of
555 * spi_message submissions, where the content of one message is determined
556 * by the results of previous messages and where the whole transaction
557 * ends when the chipselect goes intactive.
559 * When SPI can transfer in 1x,2x or 4x. It can get this tranfer information
560 * from device through @tx_nbits and @rx_nbits. In Bi-direction, these
561 * two should both be set. User can set transfer mode with SPI_NBITS_SINGLE(1x)
562 * SPI_NBITS_DUAL(2x) and SPI_NBITS_QUAD(4x) to support these three transfer.
564 * The code that submits an spi_message (and its spi_transfers)
565 * to the lower layers is responsible for managing its memory.
566 * Zero-initialize every field you don't set up explicitly, to
567 * insulate against future API updates. After you submit a message
568 * and its transfers, ignore them until its completion callback.
570 struct spi_transfer {
571 /* it's ok if tx_buf == rx_buf (right?)
572 * for MicroWire, one buffer must be null
573 * buffers must work with dma_*map_single() calls, unless
574 * spi_message.is_dma_mapped reports a pre-existing mapping
583 unsigned cs_change:1;
586 #define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */
587 #define SPI_NBITS_DUAL 0x02 /* 2bits transfer */
588 #define SPI_NBITS_QUAD 0x04 /* 4bits transfer */
593 struct list_head transfer_list;
597 * struct spi_message - one multi-segment SPI transaction
598 * @transfers: list of transfer segments in this transaction
599 * @spi: SPI device to which the transaction is queued
600 * @is_dma_mapped: if true, the caller provided both dma and cpu virtual
601 * addresses for each transfer buffer
602 * @complete: called to report transaction completions
603 * @context: the argument to complete() when it's called
604 * @actual_length: the total number of bytes that were transferred in all
605 * successful segments
606 * @status: zero for success, else negative errno
607 * @queue: for use by whichever driver currently owns the message
608 * @state: for use by whichever driver currently owns the message
610 * A @spi_message is used to execute an atomic sequence of data transfers,
611 * each represented by a struct spi_transfer. The sequence is "atomic"
612 * in the sense that no other spi_message may use that SPI bus until that
613 * sequence completes. On some systems, many such sequences can execute as
614 * as single programmed DMA transfer. On all systems, these messages are
615 * queued, and might complete after transactions to other devices. Messages
616 * sent to a given spi_device are alway executed in FIFO order.
618 * The code that submits an spi_message (and its spi_transfers)
619 * to the lower layers is responsible for managing its memory.
620 * Zero-initialize every field you don't set up explicitly, to
621 * insulate against future API updates. After you submit a message
622 * and its transfers, ignore them until its completion callback.
625 struct list_head transfers;
627 struct spi_device *spi;
629 unsigned is_dma_mapped:1;
631 /* REVISIT: we might want a flag affecting the behavior of the
632 * last transfer ... allowing things like "read 16 bit length L"
633 * immediately followed by "read L bytes". Basically imposing
634 * a specific message scheduling algorithm.
636 * Some controller drivers (message-at-a-time queue processing)
637 * could provide that as their default scheduling algorithm. But
638 * others (with multi-message pipelines) could need a flag to
639 * tell them about such special cases.
642 /* completion is reported through a callback */
643 void (*complete)(void *context);
645 unsigned frame_length;
646 unsigned actual_length;
649 /* for optional use by whatever driver currently owns the
650 * spi_message ... between calls to spi_async and then later
651 * complete(), that's the spi_master controller driver.
653 struct list_head queue;
657 static inline void spi_message_init(struct spi_message *m)
659 memset(m, 0, sizeof *m);
660 INIT_LIST_HEAD(&m->transfers);
664 spi_message_add_tail(struct spi_transfer *t, struct spi_message *m)
666 list_add_tail(&t->transfer_list, &m->transfers);
670 spi_transfer_del(struct spi_transfer *t)
672 list_del(&t->transfer_list);
676 * spi_message_init_with_transfers - Initialize spi_message and append transfers
677 * @m: spi_message to be initialized
678 * @xfers: An array of spi transfers
679 * @num_xfers: Number of items in the xfer array
681 * This function initializes the given spi_message and adds each spi_transfer in
682 * the given array to the message.
685 spi_message_init_with_transfers(struct spi_message *m,
686 struct spi_transfer *xfers, unsigned int num_xfers)
691 for (i = 0; i < num_xfers; ++i)
692 spi_message_add_tail(&xfers[i], m);
695 /* It's fine to embed message and transaction structures in other data
696 * structures so long as you don't free them while they're in use.
699 static inline struct spi_message *spi_message_alloc(unsigned ntrans, gfp_t flags)
701 struct spi_message *m;
703 m = kzalloc(sizeof(struct spi_message)
704 + ntrans * sizeof(struct spi_transfer),
708 struct spi_transfer *t = (struct spi_transfer *)(m + 1);
710 INIT_LIST_HEAD(&m->transfers);
711 for (i = 0; i < ntrans; i++, t++)
712 spi_message_add_tail(t, m);
717 static inline void spi_message_free(struct spi_message *m)
722 extern int spi_setup(struct spi_device *spi);
723 extern int spi_async(struct spi_device *spi, struct spi_message *message);
724 extern int spi_async_locked(struct spi_device *spi,
725 struct spi_message *message);
727 /*---------------------------------------------------------------------------*/
729 /* All these synchronous SPI transfer routines are utilities layered
730 * over the core async transfer primitive. Here, "synchronous" means
731 * they will sleep uninterruptibly until the async transfer completes.
734 extern int spi_sync(struct spi_device *spi, struct spi_message *message);
735 extern int spi_sync_locked(struct spi_device *spi, struct spi_message *message);
736 extern int spi_bus_lock(struct spi_master *master);
737 extern int spi_bus_unlock(struct spi_master *master);
740 * spi_write - SPI synchronous write
741 * @spi: device to which data will be written
743 * @len: data buffer size
746 * This writes the buffer and returns zero or a negative error code.
747 * Callable only from contexts that can sleep.
750 spi_write(struct spi_device *spi, const void *buf, size_t len)
752 struct spi_transfer t = {
756 struct spi_message m;
758 spi_message_init(&m);
759 spi_message_add_tail(&t, &m);
760 return spi_sync(spi, &m);
764 * spi_read - SPI synchronous read
765 * @spi: device from which data will be read
767 * @len: data buffer size
770 * This reads the buffer and returns zero or a negative error code.
771 * Callable only from contexts that can sleep.
774 spi_read(struct spi_device *spi, void *buf, size_t len)
776 struct spi_transfer t = {
780 struct spi_message m;
782 spi_message_init(&m);
783 spi_message_add_tail(&t, &m);
784 return spi_sync(spi, &m);
788 * spi_sync_transfer - synchronous SPI data transfer
789 * @spi: device with which data will be exchanged
790 * @xfers: An array of spi_transfers
791 * @num_xfers: Number of items in the xfer array
794 * Does a synchronous SPI data transfer of the given spi_transfer array.
796 * For more specific semantics see spi_sync().
798 * It returns zero on success, else a negative error code.
801 spi_sync_transfer(struct spi_device *spi, struct spi_transfer *xfers,
802 unsigned int num_xfers)
804 struct spi_message msg;
806 spi_message_init_with_transfers(&msg, xfers, num_xfers);
808 return spi_sync(spi, &msg);
811 /* this copies txbuf and rxbuf data; for small transfers only! */
812 extern int spi_write_then_read(struct spi_device *spi,
813 const void *txbuf, unsigned n_tx,
814 void *rxbuf, unsigned n_rx);
817 * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read
818 * @spi: device with which data will be exchanged
819 * @cmd: command to be written before data is read back
822 * This returns the (unsigned) eight bit number returned by the
823 * device, or else a negative error code. Callable only from
824 * contexts that can sleep.
826 static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd)
831 status = spi_write_then_read(spi, &cmd, 1, &result, 1);
833 /* return negative errno or unsigned value */
834 return (status < 0) ? status : result;
838 * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read
839 * @spi: device with which data will be exchanged
840 * @cmd: command to be written before data is read back
843 * This returns the (unsigned) sixteen bit number returned by the
844 * device, or else a negative error code. Callable only from
845 * contexts that can sleep.
847 * The number is returned in wire-order, which is at least sometimes
850 static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd)
855 status = spi_write_then_read(spi, &cmd, 1, &result, 2);
857 /* return negative errno or unsigned value */
858 return (status < 0) ? status : result;
862 * spi_w8r16be - SPI synchronous 8 bit write followed by 16 bit big-endian read
863 * @spi: device with which data will be exchanged
864 * @cmd: command to be written before data is read back
867 * This returns the (unsigned) sixteen bit number returned by the device in cpu
868 * endianness, or else a negative error code. Callable only from contexts that
871 * This function is similar to spi_w8r16, with the exception that it will
872 * convert the read 16 bit data word from big-endian to native endianness.
875 static inline ssize_t spi_w8r16be(struct spi_device *spi, u8 cmd)
881 status = spi_write_then_read(spi, &cmd, 1, &result, 2);
885 return be16_to_cpu(result);
888 /*---------------------------------------------------------------------------*/
891 * INTERFACE between board init code and SPI infrastructure.
893 * No SPI driver ever sees these SPI device table segments, but
894 * it's how the SPI core (or adapters that get hotplugged) grows
895 * the driver model tree.
897 * As a rule, SPI devices can't be probed. Instead, board init code
898 * provides a table listing the devices which are present, with enough
899 * information to bind and set up the device's driver. There's basic
900 * support for nonstatic configurations too; enough to handle adding
901 * parport adapters, or microcontrollers acting as USB-to-SPI bridges.
905 * struct spi_board_info - board-specific template for a SPI device
906 * @modalias: Initializes spi_device.modalias; identifies the driver.
907 * @platform_data: Initializes spi_device.platform_data; the particular
908 * data stored there is driver-specific.
909 * @controller_data: Initializes spi_device.controller_data; some
910 * controllers need hints about hardware setup, e.g. for DMA.
911 * @irq: Initializes spi_device.irq; depends on how the board is wired.
912 * @max_speed_hz: Initializes spi_device.max_speed_hz; based on limits
913 * from the chip datasheet and board-specific signal quality issues.
914 * @bus_num: Identifies which spi_master parents the spi_device; unused
915 * by spi_new_device(), and otherwise depends on board wiring.
916 * @chip_select: Initializes spi_device.chip_select; depends on how
917 * the board is wired.
918 * @mode: Initializes spi_device.mode; based on the chip datasheet, board
919 * wiring (some devices support both 3WIRE and standard modes), and
920 * possibly presence of an inverter in the chipselect path.
922 * When adding new SPI devices to the device tree, these structures serve
923 * as a partial device template. They hold information which can't always
924 * be determined by drivers. Information that probe() can establish (such
925 * as the default transfer wordsize) is not included here.
927 * These structures are used in two places. Their primary role is to
928 * be stored in tables of board-specific device descriptors, which are
929 * declared early in board initialization and then used (much later) to
930 * populate a controller's device tree after the that controller's driver
931 * initializes. A secondary (and atypical) role is as a parameter to
932 * spi_new_device() call, which happens after those controller drivers
933 * are active in some dynamic board configuration models.
935 struct spi_board_info {
936 /* the device name and module name are coupled, like platform_bus;
937 * "modalias" is normally the driver name.
939 * platform_data goes to spi_device.dev.platform_data,
940 * controller_data goes to spi_device.controller_data,
943 char modalias[SPI_NAME_SIZE];
944 const void *platform_data;
945 void *controller_data;
948 /* slower signaling on noisy or low voltage boards */
952 /* bus_num is board specific and matches the bus_num of some
953 * spi_master that will probably be registered later.
955 * chip_select reflects how this chip is wired to that master;
956 * it's less than num_chipselect.
961 /* mode becomes spi_device.mode, and is essential for chips
962 * where the default of SPI_CS_HIGH = 0 is wrong.
966 /* ... may need additional spi_device chip config data here.
967 * avoid stuff protocol drivers can set; but include stuff
968 * needed to behave without being bound to a driver:
969 * - quirks like clock rate mattering when not selected
975 spi_register_board_info(struct spi_board_info const *info, unsigned n);
977 /* board init code may ignore whether SPI is configured or not */
979 spi_register_board_info(struct spi_board_info const *info, unsigned n)
984 /* If you're hotplugging an adapter with devices (parport, usb, etc)
985 * use spi_new_device() to describe each device. You can also call
986 * spi_unregister_device() to start making that device vanish, but
987 * normally that would be handled by spi_unregister_master().
989 * You can also use spi_alloc_device() and spi_add_device() to use a two
990 * stage registration sequence for each spi_device. This gives the caller
991 * some more control over the spi_device structure before it is registered,
992 * but requires that caller to initialize fields that would otherwise
993 * be defined using the board info.
995 extern struct spi_device *
996 spi_alloc_device(struct spi_master *master);
999 spi_add_device(struct spi_device *spi);
1001 extern struct spi_device *
1002 spi_new_device(struct spi_master *, struct spi_board_info *);
1005 spi_unregister_device(struct spi_device *spi)
1008 device_unregister(&spi->dev);
1011 extern const struct spi_device_id *
1012 spi_get_device_id(const struct spi_device *sdev);
1014 #endif /* __LINUX_SPI_H */