include/uapi/linux/nvme.h

   1 /*
   2  * Definitions for the NVM Express interface
   3  * Copyright (c) 2011-2014, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  */
  14
  15 #ifndef _UAPI_LINUX_NVME_H
  16 #define _UAPI_LINUX_NVME_H
  17
  18 #include <linux/types.h>
  19
  20 struct nvme_id_power_state {
  21         __le16                  max_power;      /* centiwatts */
  22         __u8                    rsvd2;
  23         __u8                    flags;
  24         __le32                  entry_lat;      /* microseconds */
  25         __le32                  exit_lat;       /* microseconds */
  26         __u8                    read_tput;
  27         __u8                    read_lat;
  28         __u8                    write_tput;
  29         __u8                    write_lat;
  30         __u8                    rsvd16[16];
  31 };
  32
  33 enum {
  34         NVME_PS_FLAGS_MAX_POWER_SCALE   = 1 << 0,
  35         NVME_PS_FLAGS_NON_OP_STATE      = 1 << 1,
  36 };
  37
  38 struct nvme_id_ctrl {
  39         __le16                  vid;
  40         __le16                  ssvid;
  41         char                    sn[20];
  42         char                    mn[40];
  43         char                    fr[8];
  44         __u8                    rab;
  45         __u8                    ieee[3];
  46         __u8                    mic;
  47         __u8                    mdts;
  48         __u16                   cntlid;
  49         __u8                    rsvd80[176];
  50         __le16                  oacs;
  51         __u8                    acl;
  52         __u8                    aerl;
  53         __u8                    frmw;
  54         __u8                    lpa;
  55         __u8                    elpe;
  56         __u8                    npss;
  57         __u8                    avscc;
  58         __u8                    apsta;
  59         __u8                    rsvd266[246];
  60         __u8                    sqes;
  61         __u8                    cqes;
  62         __u8                    rsvd514[2];
  63         __le32                  nn;
  64         __le16                  oncs;
  65         __le16                  fuses;
  66         __u8                    fna;
  67         __u8                    vwc;
  68         __le16                  awun;
  69         __le16                  awupf;
  70         __u8                    nvscc;
  71         __u8                    rsvd531;
  72         __le16                  acwu;
  73         __u8                    rsvd534[2];
  74         __le32                  sgls;
  75         __u8                    rsvd540[1508];
  76         struct nvme_id_power_state      psd[32];
  77         __u8                    vs[1024];
  78 };
  79
  80 enum {
  81         NVME_CTRL_ONCS_COMPARE                  = 1 << 0,
  82         NVME_CTRL_ONCS_WRITE_UNCORRECTABLE      = 1 << 1,
  83         NVME_CTRL_ONCS_DSM                      = 1 << 2,
  84         NVME_CTRL_VWC_PRESENT                   = 1 << 0,
  85 };
  86
  87 struct nvme_lbaf {
  88         __le16                  ms;
  89         __u8                    ds;
  90         __u8                    rp;
  91 };
  92
  93 struct nvme_id_ns {
  94         __le64                  nsze;
  95         __le64                  ncap;
  96         __le64                  nuse;
  97         __u8                    nsfeat;
  98         __u8                    nlbaf;
  99         __u8                    flbas;
 100         __u8                    mc;
 101         __u8                    dpc;
 102         __u8                    dps;
 103         __u8                    nmic;
 104         __u8                    rescap;
 105         __u8                    rsvd32[88];
 106         __u8                    eui64[8];
 107         struct nvme_lbaf        lbaf[16];
 108         __u8                    rsvd192[192];
 109         __u8                    vs[3712];
 110 };
 111
 112 enum {
 113         NVME_NS_FEAT_THIN       = 1 << 0,
 114         NVME_LBAF_RP_BEST       = 0,
 115         NVME_LBAF_RP_BETTER     = 1,
 116         NVME_LBAF_RP_GOOD       = 2,
 117         NVME_LBAF_RP_DEGRADED   = 3,
 118 };
 119
 120 struct nvme_smart_log {
 121         __u8                    critical_warning;
 122         __u8                    temperature[2];
 123         __u8                    avail_spare;
 124         __u8                    spare_thresh;
 125         __u8                    percent_used;
 126         __u8                    rsvd6[26];
 127         __u8                    data_units_read[16];
 128         __u8                    data_units_written[16];
 129         __u8                    host_reads[16];
 130         __u8                    host_writes[16];
 131         __u8                    ctrl_busy_time[16];
 132         __u8                    power_cycles[16];
 133         __u8                    power_on_hours[16];
 134         __u8                    unsafe_shutdowns[16];
 135         __u8                    media_errors[16];
 136         __u8                    num_err_log_entries[16];
 137         __u8                    rsvd192[320];
 138 };
 139
 140 enum {
 141         NVME_SMART_CRIT_SPARE           = 1 << 0,
 142         NVME_SMART_CRIT_TEMPERATURE     = 1 << 1,
 143         NVME_SMART_CRIT_RELIABILITY     = 1 << 2,
 144         NVME_SMART_CRIT_MEDIA           = 1 << 3,
 145         NVME_SMART_CRIT_VOLATILE_MEMORY = 1 << 4,
 146 };
 147
 148 struct nvme_lba_range_type {
 149         __u8                    type;
 150         __u8                    attributes;
 151         __u8                    rsvd2[14];
 152         __u64                   slba;
 153         __u64                   nlb;
 154         __u8                    guid[16];
 155         __u8                    rsvd48[16];
 156 };
 157
 158 enum {
 159         NVME_LBART_TYPE_FS      = 0x01,
 160         NVME_LBART_TYPE_RAID    = 0x02,
 161         NVME_LBART_TYPE_CACHE   = 0x03,
 162         NVME_LBART_TYPE_SWAP    = 0x04,
 163
 164         NVME_LBART_ATTRIB_TEMP  = 1 << 0,
 165         NVME_LBART_ATTRIB_HIDE  = 1 << 1,
 166 };
 167
 168 /* I/O commands */
 169
 170 enum nvme_opcode {
 171         nvme_cmd_flush          = 0x00,
 172         nvme_cmd_write          = 0x01,
 173         nvme_cmd_read           = 0x02,
 174         nvme_cmd_write_uncor    = 0x04,
 175         nvme_cmd_compare        = 0x05,
 176         nvme_cmd_dsm            = 0x09,
 177 };
 178
 179 struct nvme_common_command {
 180         __u8                    opcode;
 181         __u8                    flags;
 182         __u16                   command_id;
 183         __le32                  nsid;
 184         __le32                  cdw2[2];
 185         __le64                  metadata;
 186         __le64                  prp1;
 187         __le64                  prp2;
 188         __le32                  cdw10[6];
 189 };
 190
 191 struct nvme_rw_command {
 192         __u8                    opcode;
 193         __u8                    flags;
 194         __u16                   command_id;
 195         __le32                  nsid;
 196         __u64                   rsvd2;
 197         __le64                  metadata;
 198         __le64                  prp1;
 199         __le64                  prp2;
 200         __le64                  slba;
 201         __le16                  length;
 202         __le16                  control;
 203         __le32                  dsmgmt;
 204         __le32                  reftag;
 205         __le16                  apptag;
 206         __le16                  appmask;
 207 };
 208
 209 enum {
 210         NVME_RW_LR                      = 1 << 15,
 211         NVME_RW_FUA                     = 1 << 14,
 212         NVME_RW_DSM_FREQ_UNSPEC         = 0,
 213         NVME_RW_DSM_FREQ_TYPICAL        = 1,
 214         NVME_RW_DSM_FREQ_RARE           = 2,
 215         NVME_RW_DSM_FREQ_READS          = 3,
 216         NVME_RW_DSM_FREQ_WRITES         = 4,
 217         NVME_RW_DSM_FREQ_RW             = 5,
 218         NVME_RW_DSM_FREQ_ONCE           = 6,
 219         NVME_RW_DSM_FREQ_PREFETCH       = 7,
 220         NVME_RW_DSM_FREQ_TEMP           = 8,
 221         NVME_RW_DSM_LATENCY_NONE        = 0 << 4,
 222         NVME_RW_DSM_LATENCY_IDLE        = 1 << 4,
 223         NVME_RW_DSM_LATENCY_NORM        = 2 << 4,
 224         NVME_RW_DSM_LATENCY_LOW         = 3 << 4,
 225         NVME_RW_DSM_SEQ_REQ             = 1 << 6,
 226         NVME_RW_DSM_COMPRESSED          = 1 << 7,
 227 };
 228
 229 struct nvme_dsm_cmd {
 230         __u8                    opcode;
 231         __u8                    flags;
 232         __u16                   command_id;
 233         __le32                  nsid;
 234         __u64                   rsvd2[2];
 235         __le64                  prp1;
 236         __le64                  prp2;
 237         __le32                  nr;
 238         __le32                  attributes;
 239         __u32                   rsvd12[4];
 240 };
 241
 242 enum {
 243         NVME_DSMGMT_IDR         = 1 << 0,
 244         NVME_DSMGMT_IDW         = 1 << 1,
 245         NVME_DSMGMT_AD          = 1 << 2,
 246 };
 247
 248 struct nvme_dsm_range {
 249         __le32                  cattr;
 250         __le32                  nlb;
 251         __le64                  slba;
 252 };
 253
 254 /* Admin commands */
 255
 256 enum nvme_admin_opcode {
 257         nvme_admin_delete_sq            = 0x00,
 258         nvme_admin_create_sq            = 0x01,
 259         nvme_admin_get_log_page         = 0x02,
 260         nvme_admin_delete_cq            = 0x04,
 261         nvme_admin_create_cq            = 0x05,
 262         nvme_admin_identify             = 0x06,
 263         nvme_admin_abort_cmd            = 0x08,
 264         nvme_admin_set_features         = 0x09,
 265         nvme_admin_get_features         = 0x0a,
 266         nvme_admin_async_event          = 0x0c,
 267         nvme_admin_activate_fw          = 0x10,
 268         nvme_admin_download_fw          = 0x11,
 269         nvme_admin_format_nvm           = 0x80,
 270         nvme_admin_security_send        = 0x81,
 271         nvme_admin_security_recv        = 0x82,
 272 };
 273
 274 enum {
 275         NVME_QUEUE_PHYS_CONTIG  = (1 << 0),
 276         NVME_CQ_IRQ_ENABLED     = (1 << 1),
 277         NVME_SQ_PRIO_URGENT     = (0 << 1),
 278         NVME_SQ_PRIO_HIGH       = (1 << 1),
 279         NVME_SQ_PRIO_MEDIUM     = (2 << 1),
 280         NVME_SQ_PRIO_LOW        = (3 << 1),
 281         NVME_FEAT_ARBITRATION   = 0x01,
 282         NVME_FEAT_POWER_MGMT    = 0x02,
 283         NVME_FEAT_LBA_RANGE     = 0x03,
 284         NVME_FEAT_TEMP_THRESH   = 0x04,
 285         NVME_FEAT_ERR_RECOVERY  = 0x05,
 286         NVME_FEAT_VOLATILE_WC   = 0x06,
 287         NVME_FEAT_NUM_QUEUES    = 0x07,
 288         NVME_FEAT_IRQ_COALESCE  = 0x08,
 289         NVME_FEAT_IRQ_CONFIG    = 0x09,
 290         NVME_FEAT_WRITE_ATOMIC  = 0x0a,
 291         NVME_FEAT_ASYNC_EVENT   = 0x0b,
 292         NVME_FEAT_SW_PROGRESS   = 0x0c,
 293         NVME_FWACT_REPL         = (0 << 3),
 294         NVME_FWACT_REPL_ACTV    = (1 << 3),
 295         NVME_FWACT_ACTV         = (2 << 3),
 296 };
 297
 298 struct nvme_identify {
 299         __u8                    opcode;
 300         __u8                    flags;
 301         __u16                   command_id;
 302         __le32                  nsid;
 303         __u64                   rsvd2[2];
 304         __le64                  prp1;
 305         __le64                  prp2;
 306         __le32                  cns;
 307         __u32                   rsvd11[5];
 308 };
 309
 310 struct nvme_features {
 311         __u8                    opcode;
 312         __u8                    flags;
 313         __u16                   command_id;
 314         __le32                  nsid;
 315         __u64                   rsvd2[2];
 316         __le64                  prp1;
 317         __le64                  prp2;
 318         __le32                  fid;
 319         __le32                  dword11;
 320         __u32                   rsvd12[4];
 321 };
 322
 323 struct nvme_create_cq {
 324         __u8                    opcode;
 325         __u8                    flags;
 326         __u16                   command_id;
 327         __u32                   rsvd1[5];
 328         __le64                  prp1;
 329         __u64                   rsvd8;
 330         __le16                  cqid;
 331         __le16                  qsize;
 332         __le16                  cq_flags;
 333         __le16                  irq_vector;
 334         __u32                   rsvd12[4];
 335 };
 336
 337 struct nvme_create_sq {
 338         __u8                    opcode;
 339         __u8                    flags;
 340         __u16                   command_id;
 341         __u32                   rsvd1[5];
 342         __le64                  prp1;
 343         __u64                   rsvd8;
 344         __le16                  sqid;
 345         __le16                  qsize;
 346         __le16                  sq_flags;
 347         __le16                  cqid;
 348         __u32                   rsvd12[4];
 349 };
 350
 351 struct nvme_delete_queue {
 352         __u8                    opcode;
 353         __u8                    flags;
 354         __u16                   command_id;
 355         __u32                   rsvd1[9];
 356         __le16                  qid;
 357         __u16                   rsvd10;
 358         __u32                   rsvd11[5];
 359 };
 360
 361 struct nvme_abort_cmd {
 362         __u8                    opcode;
 363         __u8                    flags;
 364         __u16                   command_id;
 365         __u32                   rsvd1[9];
 366         __le16                  sqid;
 367         __u16                   cid;
 368         __u32                   rsvd11[5];
 369 };
 370
 371 struct nvme_download_firmware {
 372         __u8                    opcode;
 373         __u8                    flags;
 374         __u16                   command_id;
 375         __u32                   rsvd1[5];
 376         __le64                  prp1;
 377         __le64                  prp2;
 378         __le32                  numd;
 379         __le32                  offset;
 380         __u32                   rsvd12[4];
 381 };
 382
 383 struct nvme_format_cmd {
 384         __u8                    opcode;
 385         __u8                    flags;
 386         __u16                   command_id;
 387         __le32                  nsid;
 388         __u64                   rsvd2[4];
 389         __le32                  cdw10;
 390         __u32                   rsvd11[5];
 391 };
 392
 393 struct nvme_command {
 394         union {
 395                 struct nvme_common_command common;
 396                 struct nvme_rw_command rw;
 397                 struct nvme_identify identify;
 398                 struct nvme_features features;
 399                 struct nvme_create_cq create_cq;
 400                 struct nvme_create_sq create_sq;
 401                 struct nvme_delete_queue delete_queue;
 402                 struct nvme_download_firmware dlfw;
 403                 struct nvme_format_cmd format;
 404                 struct nvme_dsm_cmd dsm;
 405                 struct nvme_abort_cmd abort;
 406         };
 407 };
 408
 409 enum {
 410         NVME_SC_SUCCESS                 = 0x0,
 411         NVME_SC_INVALID_OPCODE          = 0x1,
 412         NVME_SC_INVALID_FIELD           = 0x2,
 413         NVME_SC_CMDID_CONFLICT          = 0x3,
 414         NVME_SC_DATA_XFER_ERROR         = 0x4,
 415         NVME_SC_POWER_LOSS              = 0x5,
 416         NVME_SC_INTERNAL                = 0x6,
 417         NVME_SC_ABORT_REQ               = 0x7,
 418         NVME_SC_ABORT_QUEUE             = 0x8,
 419         NVME_SC_FUSED_FAIL              = 0x9,
 420         NVME_SC_FUSED_MISSING           = 0xa,
 421         NVME_SC_INVALID_NS              = 0xb,
 422         NVME_SC_CMD_SEQ_ERROR           = 0xc,
 423         NVME_SC_LBA_RANGE               = 0x80,
 424         NVME_SC_CAP_EXCEEDED            = 0x81,
 425         NVME_SC_NS_NOT_READY            = 0x82,
 426         NVME_SC_CQ_INVALID              = 0x100,
 427         NVME_SC_QID_INVALID             = 0x101,
 428         NVME_SC_QUEUE_SIZE              = 0x102,
 429         NVME_SC_ABORT_LIMIT             = 0x103,
 430         NVME_SC_ABORT_MISSING           = 0x104,
 431         NVME_SC_ASYNC_LIMIT             = 0x105,
 432         NVME_SC_FIRMWARE_SLOT           = 0x106,
 433         NVME_SC_FIRMWARE_IMAGE          = 0x107,
 434         NVME_SC_INVALID_VECTOR          = 0x108,
 435         NVME_SC_INVALID_LOG_PAGE        = 0x109,
 436         NVME_SC_INVALID_FORMAT          = 0x10a,
 437         NVME_SC_BAD_ATTRIBUTES          = 0x180,
 438         NVME_SC_WRITE_FAULT             = 0x280,
 439         NVME_SC_READ_ERROR              = 0x281,
 440         NVME_SC_GUARD_CHECK             = 0x282,
 441         NVME_SC_APPTAG_CHECK            = 0x283,
 442         NVME_SC_REFTAG_CHECK            = 0x284,
 443         NVME_SC_COMPARE_FAILED          = 0x285,
 444         NVME_SC_ACCESS_DENIED           = 0x286,
 445         NVME_SC_DNR                     = 0x4000,
 446 };
 447
 448 struct nvme_completion {
 449         __le32  result;         /* Used by admin commands to return data */
 450         __u32   rsvd;
 451         __le16  sq_head;        /* how much of this queue may be reclaimed */
 452         __le16  sq_id;          /* submission queue that generated this entry */
 453         __u16   command_id;     /* of the command which completed */
 454         __le16  status;         /* did the command fail, and if so, why? */
 455 };
 456
 457 struct nvme_user_io {
 458         __u8    opcode;
 459         __u8    flags;
 460         __u16   control;
 461         __u16   nblocks;
 462         __u16   rsvd;
 463         __u64   metadata;
 464         __u64   addr;
 465         __u64   slba;
 466         __u32   dsmgmt;
 467         __u32   reftag;
 468         __u16   apptag;
 469         __u16   appmask;
 470 };
 471
 472 struct nvme_admin_cmd {
 473         __u8    opcode;
 474         __u8    flags;
 475         __u16   rsvd1;
 476         __u32   nsid;
 477         __u32   cdw2;
 478         __u32   cdw3;
 479         __u64   metadata;
 480         __u64   addr;
 481         __u32   metadata_len;
 482         __u32   data_len;
 483         __u32   cdw10;
 484         __u32   cdw11;
 485         __u32   cdw12;
 486         __u32   cdw13;
 487         __u32   cdw14;
 488         __u32   cdw15;
 489         __u32   timeout_ms;
 490         __u32   result;
 491 };
 492
 493 #define NVME_IOCTL_ID           _IO('N', 0x40)
 494 #define NVME_IOCTL_ADMIN_CMD    _IOWR('N', 0x41, struct nvme_admin_cmd)
 495 #define NVME_IOCTL_SUBMIT_IO    _IOW('N', 0x42, struct nvme_user_io)
 496
 497 #endif /* _UAPI_LINUX_NVME_H */