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46 #ifndef __VMW_PVRDMA_ABI_H__
47 #define __VMW_PVRDMA_ABI_H__
49 #include <linux/types.h>
51 #define PVRDMA_UVERBS_ABI_VERSION 3 /* ABI Version. */
52 #define PVRDMA_UAR_HANDLE_MASK 0x00FFFFFF /* Bottom 24 bits. */
53 #define PVRDMA_UAR_QP_OFFSET 0 /* QP doorbell. */
54 #define PVRDMA_UAR_QP_SEND BIT(30) /* Send bit. */
55 #define PVRDMA_UAR_QP_RECV BIT(31) /* Recv bit. */
56 #define PVRDMA_UAR_CQ_OFFSET 4 /* CQ doorbell. */
57 #define PVRDMA_UAR_CQ_ARM_SOL BIT(29) /* Arm solicited bit. */
58 #define PVRDMA_UAR_CQ_ARM BIT(30) /* Arm bit. */
59 #define PVRDMA_UAR_CQ_POLL BIT(31) /* Poll bit. */
61 enum pvrdma_wr_opcode {
63 PVRDMA_WR_RDMA_WRITE_WITH_IMM,
65 PVRDMA_WR_SEND_WITH_IMM,
67 PVRDMA_WR_ATOMIC_CMP_AND_SWP,
68 PVRDMA_WR_ATOMIC_FETCH_AND_ADD,
70 PVRDMA_WR_SEND_WITH_INV,
71 PVRDMA_WR_RDMA_READ_WITH_INV,
73 PVRDMA_WR_FAST_REG_MR,
74 PVRDMA_WR_MASKED_ATOMIC_CMP_AND_SWP,
75 PVRDMA_WR_MASKED_ATOMIC_FETCH_AND_ADD,
80 enum pvrdma_wc_status {
82 PVRDMA_WC_LOC_LEN_ERR,
83 PVRDMA_WC_LOC_QP_OP_ERR,
84 PVRDMA_WC_LOC_EEC_OP_ERR,
85 PVRDMA_WC_LOC_PROT_ERR,
86 PVRDMA_WC_WR_FLUSH_ERR,
87 PVRDMA_WC_MW_BIND_ERR,
88 PVRDMA_WC_BAD_RESP_ERR,
89 PVRDMA_WC_LOC_ACCESS_ERR,
90 PVRDMA_WC_REM_INV_REQ_ERR,
91 PVRDMA_WC_REM_ACCESS_ERR,
93 PVRDMA_WC_RETRY_EXC_ERR,
94 PVRDMA_WC_RNR_RETRY_EXC_ERR,
95 PVRDMA_WC_LOC_RDD_VIOL_ERR,
96 PVRDMA_WC_REM_INV_RD_REQ_ERR,
97 PVRDMA_WC_REM_ABORT_ERR,
98 PVRDMA_WC_INV_EECN_ERR,
99 PVRDMA_WC_INV_EEC_STATE_ERR,
101 PVRDMA_WC_RESP_TIMEOUT_ERR,
102 PVRDMA_WC_GENERAL_ERR,
105 enum pvrdma_wc_opcode {
107 PVRDMA_WC_RDMA_WRITE,
114 PVRDMA_WC_FAST_REG_MR,
115 PVRDMA_WC_MASKED_COMP_SWAP,
116 PVRDMA_WC_MASKED_FETCH_ADD,
117 PVRDMA_WC_RECV = 1 << 7,
118 PVRDMA_WC_RECV_RDMA_WITH_IMM,
121 enum pvrdma_wc_flags {
122 PVRDMA_WC_GRH = 1 << 0,
123 PVRDMA_WC_WITH_IMM = 1 << 1,
124 PVRDMA_WC_WITH_INVALIDATE = 1 << 2,
125 PVRDMA_WC_IP_CSUM_OK = 1 << 3,
126 PVRDMA_WC_WITH_SMAC = 1 << 4,
127 PVRDMA_WC_WITH_VLAN = 1 << 5,
128 PVRDMA_WC_FLAGS_MAX = PVRDMA_WC_WITH_VLAN,
131 struct pvrdma_alloc_ucontext_resp {
136 struct pvrdma_alloc_pd_resp {
141 struct pvrdma_create_cq {
147 struct pvrdma_create_cq_resp {
152 struct pvrdma_resize_cq {
158 struct pvrdma_create_srq {
162 struct pvrdma_create_srq_resp {
167 struct pvrdma_create_qp {
175 /* PVRDMA masked atomic compare and swap */
176 struct pvrdma_ex_cmp_swap {
183 /* PVRDMA masked atomic fetch and add */
184 struct pvrdma_ex_fetch_add {
186 __u64 field_boundary;
189 /* PVRDMA address vector. */
192 __u32 sl_tclass_flowlabel;
202 /* PVRDMA scatter/gather entry */
209 /* PVRDMA receive queue work request */
210 struct pvrdma_rq_wqe_hdr {
211 __u64 wr_id; /* wr id */
212 __u32 num_sge; /* size of s/g array */
213 __u32 total_len; /* reserved */
215 /* Use pvrdma_sge (ib_sge) for receive queue s/g array elements. */
217 /* PVRDMA send queue work request */
218 struct pvrdma_sq_wqe_hdr {
219 __u64 wr_id; /* wr id */
220 __u32 num_sge; /* size of s/g array */
221 __u32 total_len; /* reserved */
222 __u32 opcode; /* operation type */
223 __u32 send_flags; /* wr flags */
226 __u32 invalidate_rkey;
247 struct pvrdma_ex_cmp_swap cmp_swap;
248 struct pvrdma_ex_fetch_add fetch_add;
267 /* Use pvrdma_sge (ib_sge) for send queue s/g array elements. */
269 /* Completion queue element. */
286 __u8 reserved2[7]; /* Pad to next power of 2 (64). */
289 #endif /* __VMW_PVRDMA_ABI_H__ */