include/video/omapdss.h

   1 /*
   2  * Copyright (C) 2008 Nokia Corporation
   3  * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #ifndef __OMAP_OMAPDSS_H
  19 #define __OMAP_OMAPDSS_H
  20
  21 #include <linux/list.h>
  22 #include <linux/kobject.h>
  23 #include <linux/device.h>
  24
  25 #define DISPC_IRQ_FRAMEDONE             (1 << 0)
  26 #define DISPC_IRQ_VSYNC                 (1 << 1)
  27 #define DISPC_IRQ_EVSYNC_EVEN           (1 << 2)
  28 #define DISPC_IRQ_EVSYNC_ODD            (1 << 3)
  29 #define DISPC_IRQ_ACBIAS_COUNT_STAT     (1 << 4)
  30 #define DISPC_IRQ_PROG_LINE_NUM         (1 << 5)
  31 #define DISPC_IRQ_GFX_FIFO_UNDERFLOW    (1 << 6)
  32 #define DISPC_IRQ_GFX_END_WIN           (1 << 7)
  33 #define DISPC_IRQ_PAL_GAMMA_MASK        (1 << 8)
  34 #define DISPC_IRQ_OCP_ERR               (1 << 9)
  35 #define DISPC_IRQ_VID1_FIFO_UNDERFLOW   (1 << 10)
  36 #define DISPC_IRQ_VID1_END_WIN          (1 << 11)
  37 #define DISPC_IRQ_VID2_FIFO_UNDERFLOW   (1 << 12)
  38 #define DISPC_IRQ_VID2_END_WIN          (1 << 13)
  39 #define DISPC_IRQ_SYNC_LOST             (1 << 14)
  40 #define DISPC_IRQ_SYNC_LOST_DIGIT       (1 << 15)
  41 #define DISPC_IRQ_WAKEUP                (1 << 16)
  42 #define DISPC_IRQ_SYNC_LOST2            (1 << 17)
  43 #define DISPC_IRQ_VSYNC2                (1 << 18)
  44 #define DISPC_IRQ_ACBIAS_COUNT_STAT2    (1 << 21)
  45 #define DISPC_IRQ_FRAMEDONE2            (1 << 22)
  46
  47 struct omap_dss_device;
  48 struct omap_overlay_manager;
  49
  50 enum omap_display_type {
  51         OMAP_DISPLAY_TYPE_NONE          = 0,
  52         OMAP_DISPLAY_TYPE_DPI           = 1 << 0,
  53         OMAP_DISPLAY_TYPE_DBI           = 1 << 1,
  54         OMAP_DISPLAY_TYPE_SDI           = 1 << 2,
  55         OMAP_DISPLAY_TYPE_DSI           = 1 << 3,
  56         OMAP_DISPLAY_TYPE_VENC          = 1 << 4,
  57         OMAP_DISPLAY_TYPE_HDMI          = 1 << 5,
  58 };
  59
  60 enum omap_plane {
  61         OMAP_DSS_GFX    = 0,
  62         OMAP_DSS_VIDEO1 = 1,
  63         OMAP_DSS_VIDEO2 = 2
  64 };
  65
  66 enum omap_channel {
  67         OMAP_DSS_CHANNEL_LCD    = 0,
  68         OMAP_DSS_CHANNEL_DIGIT  = 1,
  69         OMAP_DSS_CHANNEL_LCD2   = 2,
  70 };
  71
  72 enum omap_color_mode {
  73         OMAP_DSS_COLOR_CLUT1    = 1 << 0,  /* BITMAP 1 */
  74         OMAP_DSS_COLOR_CLUT2    = 1 << 1,  /* BITMAP 2 */
  75         OMAP_DSS_COLOR_CLUT4    = 1 << 2,  /* BITMAP 4 */
  76         OMAP_DSS_COLOR_CLUT8    = 1 << 3,  /* BITMAP 8 */
  77         OMAP_DSS_COLOR_RGB12U   = 1 << 4,  /* RGB12, 16-bit container */
  78         OMAP_DSS_COLOR_ARGB16   = 1 << 5,  /* ARGB16 */
  79         OMAP_DSS_COLOR_RGB16    = 1 << 6,  /* RGB16 */
  80         OMAP_DSS_COLOR_RGB24U   = 1 << 7,  /* RGB24, 32-bit container */
  81         OMAP_DSS_COLOR_RGB24P   = 1 << 8,  /* RGB24, 24-bit container */
  82         OMAP_DSS_COLOR_YUV2     = 1 << 9,  /* YUV2 4:2:2 co-sited */
  83         OMAP_DSS_COLOR_UYVY     = 1 << 10, /* UYVY 4:2:2 co-sited */
  84         OMAP_DSS_COLOR_ARGB32   = 1 << 11, /* ARGB32 */
  85         OMAP_DSS_COLOR_RGBA32   = 1 << 12, /* RGBA32 */
  86         OMAP_DSS_COLOR_RGBX32   = 1 << 13, /* RGBx32 */
  87         OMAP_DSS_COLOR_NV12             = 1 << 14, /* NV12 format: YUV 4:2:0 */
  88         OMAP_DSS_COLOR_RGBA16           = 1 << 15, /* RGBA16 - 4444 */
  89         OMAP_DSS_COLOR_RGBX16           = 1 << 16, /* RGBx16 - 4444 */
  90         OMAP_DSS_COLOR_ARGB16_1555      = 1 << 17, /* ARGB16 - 1555 */
  91         OMAP_DSS_COLOR_XRGB16_1555      = 1 << 18, /* xRGB16 - 1555 */
  92 };
  93
  94 enum omap_lcd_display_type {
  95         OMAP_DSS_LCD_DISPLAY_STN,
  96         OMAP_DSS_LCD_DISPLAY_TFT,
  97 };
  98
  99 enum omap_dss_load_mode {
 100         OMAP_DSS_LOAD_CLUT_AND_FRAME    = 0,
 101         OMAP_DSS_LOAD_CLUT_ONLY         = 1,
 102         OMAP_DSS_LOAD_FRAME_ONLY        = 2,
 103         OMAP_DSS_LOAD_CLUT_ONCE_FRAME   = 3,
 104 };
 105
 106 enum omap_dss_trans_key_type {
 107         OMAP_DSS_COLOR_KEY_GFX_DST = 0,
 108         OMAP_DSS_COLOR_KEY_VID_SRC = 1,
 109 };
 110
 111 enum omap_rfbi_te_mode {
 112         OMAP_DSS_RFBI_TE_MODE_1 = 1,
 113         OMAP_DSS_RFBI_TE_MODE_2 = 2,
 114 };
 115
 116 enum omap_panel_config {
 117         OMAP_DSS_LCD_IVS                = 1<<0,
 118         OMAP_DSS_LCD_IHS                = 1<<1,
 119         OMAP_DSS_LCD_IPC                = 1<<2,
 120         OMAP_DSS_LCD_IEO                = 1<<3,
 121         OMAP_DSS_LCD_RF                 = 1<<4,
 122         OMAP_DSS_LCD_ONOFF              = 1<<5,
 123
 124         OMAP_DSS_LCD_TFT                = 1<<20,
 125 };
 126
 127 enum omap_dss_venc_type {
 128         OMAP_DSS_VENC_TYPE_COMPOSITE,
 129         OMAP_DSS_VENC_TYPE_SVIDEO,
 130 };
 131
 132 enum omap_display_caps {
 133         OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE      = 1 << 0,
 134         OMAP_DSS_DISPLAY_CAP_TEAR_ELIM          = 1 << 1,
 135 };
 136
 137 enum omap_dss_display_state {
 138         OMAP_DSS_DISPLAY_DISABLED = 0,
 139         OMAP_DSS_DISPLAY_ACTIVE,
 140         OMAP_DSS_DISPLAY_SUSPENDED,
 141 };
 142
 143 /* XXX perhaps this should be removed */
 144 enum omap_dss_overlay_managers {
 145         OMAP_DSS_OVL_MGR_LCD,
 146         OMAP_DSS_OVL_MGR_TV,
 147         OMAP_DSS_OVL_MGR_LCD2,
 148 };
 149
 150 enum omap_dss_rotation_type {
 151         OMAP_DSS_ROT_DMA = 0,
 152         OMAP_DSS_ROT_VRFB = 1,
 153 };
 154
 155 /* clockwise rotation angle */
 156 enum omap_dss_rotation_angle {
 157         OMAP_DSS_ROT_0   = 0,
 158         OMAP_DSS_ROT_90  = 1,
 159         OMAP_DSS_ROT_180 = 2,
 160         OMAP_DSS_ROT_270 = 3,
 161 };
 162
 163 enum omap_overlay_caps {
 164         OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
 165         OMAP_DSS_OVL_CAP_GLOBAL_ALPHA = 1 << 1,
 166         OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA = 1 << 2,
 167 };
 168
 169 enum omap_overlay_manager_caps {
 170         OMAP_DSS_DUMMY_VALUE, /* add a dummy value to prevent compiler error */
 171 };
 172
 173 enum omap_dss_clk_source {
 174         OMAP_DSS_CLK_SRC_FCK = 0,               /* OMAP2/3: DSS1_ALWON_FCLK
 175                                                  * OMAP4: DSS_FCLK */
 176         OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC,   /* OMAP3: DSI1_PLL_FCLK
 177                                                  * OMAP4: PLL1_CLK1 */
 178         OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI,     /* OMAP3: DSI2_PLL_FCLK
 179                                                  * OMAP4: PLL1_CLK2 */
 180         OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC,  /* OMAP4: PLL2_CLK1 */
 181         OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI,    /* OMAP4: PLL2_CLK2 */
 182 };
 183
 184 /* RFBI */
 185
 186 struct rfbi_timings {
 187         int cs_on_time;
 188         int cs_off_time;
 189         int we_on_time;
 190         int we_off_time;
 191         int re_on_time;
 192         int re_off_time;
 193         int we_cycle_time;
 194         int re_cycle_time;
 195         int cs_pulse_width;
 196         int access_time;
 197
 198         int clk_div;
 199
 200         u32 tim[5];             /* set by rfbi_convert_timings() */
 201
 202         int converted;
 203 };
 204
 205 void omap_rfbi_write_command(const void *buf, u32 len);
 206 void omap_rfbi_read_data(void *buf, u32 len);
 207 void omap_rfbi_write_data(const void *buf, u32 len);
 208 void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
 209                 u16 x, u16 y,
 210                 u16 w, u16 h);
 211 int omap_rfbi_enable_te(bool enable, unsigned line);
 212 int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
 213                              unsigned hs_pulse_time, unsigned vs_pulse_time,
 214                              int hs_pol_inv, int vs_pol_inv, int extif_div);
 215 void rfbi_bus_lock(void);
 216 void rfbi_bus_unlock(void);
 217
 218 /* DSI */
 219 void dsi_bus_lock(struct omap_dss_device *dssdev);
 220 void dsi_bus_unlock(struct omap_dss_device *dssdev);
 221 int dsi_vc_dcs_write(struct omap_dss_device *dssdev, int channel, u8 *data,
 222                 int len);
 223 int dsi_vc_dcs_write_0(struct omap_dss_device *dssdev, int channel,
 224                 u8 dcs_cmd);
 225 int dsi_vc_dcs_write_1(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
 226                 u8 param);
 227 int dsi_vc_dcs_write_nosync(struct omap_dss_device *dssdev, int channel,
 228                 u8 *data, int len);
 229 int dsi_vc_dcs_read(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
 230                 u8 *buf, int buflen);
 231 int dsi_vc_dcs_read_1(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
 232                 u8 *data);
 233 int dsi_vc_dcs_read_2(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
 234                 u8 *data1, u8 *data2);
 235 int dsi_vc_set_max_rx_packet_size(struct omap_dss_device *dssdev, int channel,
 236                 u16 len);
 237 int dsi_vc_send_null(struct omap_dss_device *dssdev, int channel);
 238 int dsi_vc_send_bta_sync(struct omap_dss_device *dssdev, int channel);
 239
 240 /* Board specific data */
 241 struct omap_dss_board_info {
 242         int (*get_context_loss_count)(struct device *dev);
 243         int num_devices;
 244         struct omap_dss_device **devices;
 245         struct omap_dss_device *default_device;
 246         int (*dsi_enable_pads)(int dsi_id, unsigned lane_mask);
 247         void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask);
 248 };
 249
 250 #if defined(CONFIG_OMAP2_DSS_MODULE) || defined(CONFIG_OMAP2_DSS)
 251 /* Init with the board info */
 252 extern int omap_display_init(struct omap_dss_board_info *board_data);
 253 #else
 254 static inline int omap_display_init(struct omap_dss_board_info *board_data)
 255 {
 256         return 0;
 257 }
 258 #endif
 259
 260 struct omap_display_platform_data {
 261         struct omap_dss_board_info *board_data;
 262         /* TODO: Additional members to be added when PM is considered */
 263 };
 264
 265 struct omap_video_timings {
 266         /* Unit: pixels */
 267         u16 x_res;
 268         /* Unit: pixels */
 269         u16 y_res;
 270         /* Unit: KHz */
 271         u32 pixel_clock;
 272         /* Unit: pixel clocks */
 273         u16 hsw;        /* Horizontal synchronization pulse width */
 274         /* Unit: pixel clocks */
 275         u16 hfp;        /* Horizontal front porch */
 276         /* Unit: pixel clocks */
 277         u16 hbp;        /* Horizontal back porch */
 278         /* Unit: line clocks */
 279         u16 vsw;        /* Vertical synchronization pulse width */
 280         /* Unit: line clocks */
 281         u16 vfp;        /* Vertical front porch */
 282         /* Unit: line clocks */
 283         u16 vbp;        /* Vertical back porch */
 284 };
 285
 286 #ifdef CONFIG_OMAP2_DSS_VENC
 287 /* Hardcoded timings for tv modes. Venc only uses these to
 288  * identify the mode, and does not actually use the configs
 289  * itself. However, the configs should be something that
 290  * a normal monitor can also show */
 291 extern const struct omap_video_timings omap_dss_pal_timings;
 292 extern const struct omap_video_timings omap_dss_ntsc_timings;
 293 #endif
 294
 295 struct omap_dss_cpr_coefs {
 296         s16 rr, rg, rb;
 297         s16 gr, gg, gb;
 298         s16 br, bg, bb;
 299 };
 300
 301 struct omap_overlay_info {
 302         bool enabled;
 303
 304         u32 paddr;
 305         void __iomem *vaddr;
 306         u32 p_uv_addr;  /* for NV12 format */
 307         u16 screen_width;
 308         u16 width;
 309         u16 height;
 310         enum omap_color_mode color_mode;
 311         u8 rotation;
 312         enum omap_dss_rotation_type rotation_type;
 313         bool mirror;
 314
 315         u16 pos_x;
 316         u16 pos_y;
 317         u16 out_width;  /* if 0, out_width == width */
 318         u16 out_height; /* if 0, out_height == height */
 319         u8 global_alpha;
 320         u8 pre_mult_alpha;
 321 };
 322
 323 struct omap_overlay {
 324         struct kobject kobj;
 325         struct list_head list;
 326
 327         /* static fields */
 328         const char *name;
 329         enum omap_plane id;
 330         enum omap_color_mode supported_modes;
 331         enum omap_overlay_caps caps;
 332
 333         /* dynamic fields */
 334         struct omap_overlay_manager *manager;
 335         struct omap_overlay_info info;
 336
 337         bool manager_changed;
 338         /* if true, info has been changed, but not applied() yet */
 339         bool info_dirty;
 340
 341         int (*set_manager)(struct omap_overlay *ovl,
 342                 struct omap_overlay_manager *mgr);
 343         int (*unset_manager)(struct omap_overlay *ovl);
 344
 345         int (*set_overlay_info)(struct omap_overlay *ovl,
 346                         struct omap_overlay_info *info);
 347         void (*get_overlay_info)(struct omap_overlay *ovl,
 348                         struct omap_overlay_info *info);
 349
 350         int (*wait_for_go)(struct omap_overlay *ovl);
 351 };
 352
 353 struct omap_overlay_manager_info {
 354         u32 default_color;
 355
 356         enum omap_dss_trans_key_type trans_key_type;
 357         u32 trans_key;
 358         bool trans_enabled;
 359
 360         bool alpha_enabled;
 361
 362         bool cpr_enable;
 363         struct omap_dss_cpr_coefs cpr_coefs;
 364 };
 365
 366 struct omap_overlay_manager {
 367         struct kobject kobj;
 368         struct list_head list;
 369
 370         /* static fields */
 371         const char *name;
 372         enum omap_channel id;
 373         enum omap_overlay_manager_caps caps;
 374         int num_overlays;
 375         struct omap_overlay **overlays;
 376         enum omap_display_type supported_displays;
 377
 378         /* dynamic fields */
 379         struct omap_dss_device *device;
 380         struct omap_overlay_manager_info info;
 381
 382         bool device_changed;
 383         /* if true, info has been changed but not applied() yet */
 384         bool info_dirty;
 385
 386         int (*set_device)(struct omap_overlay_manager *mgr,
 387                 struct omap_dss_device *dssdev);
 388         int (*unset_device)(struct omap_overlay_manager *mgr);
 389
 390         int (*set_manager_info)(struct omap_overlay_manager *mgr,
 391                         struct omap_overlay_manager_info *info);
 392         void (*get_manager_info)(struct omap_overlay_manager *mgr,
 393                         struct omap_overlay_manager_info *info);
 394
 395         int (*apply)(struct omap_overlay_manager *mgr);
 396         int (*wait_for_go)(struct omap_overlay_manager *mgr);
 397         int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
 398
 399         int (*enable)(struct omap_overlay_manager *mgr);
 400         int (*disable)(struct omap_overlay_manager *mgr);
 401 };
 402
 403 struct omap_dss_device {
 404         struct device dev;
 405
 406         enum omap_display_type type;
 407
 408         enum omap_channel channel;
 409
 410         union {
 411                 struct {
 412                         u8 data_lines;
 413                 } dpi;
 414
 415                 struct {
 416                         u8 channel;
 417                         u8 data_lines;
 418                 } rfbi;
 419
 420                 struct {
 421                         u8 datapairs;
 422                 } sdi;
 423
 424                 struct {
 425                         u8 clk_lane;
 426                         u8 clk_pol;
 427                         u8 data1_lane;
 428                         u8 data1_pol;
 429                         u8 data2_lane;
 430                         u8 data2_pol;
 431                         u8 data3_lane;
 432                         u8 data3_pol;
 433                         u8 data4_lane;
 434                         u8 data4_pol;
 435
 436                         int module;
 437
 438                         bool ext_te;
 439                         u8 ext_te_gpio;
 440                 } dsi;
 441
 442                 struct {
 443                         enum omap_dss_venc_type type;
 444                         bool invert_polarity;
 445                 } venc;
 446         } phy;
 447
 448         struct {
 449                 struct {
 450                         struct {
 451                                 u16 lck_div;
 452                                 u16 pck_div;
 453                                 enum omap_dss_clk_source lcd_clk_src;
 454                         } channel;
 455
 456                         enum omap_dss_clk_source dispc_fclk_src;
 457                 } dispc;
 458
 459                 struct {
 460                         u16 regn;
 461                         u16 regm;
 462                         u16 regm_dispc;
 463                         u16 regm_dsi;
 464
 465                         u16 lp_clk_div;
 466                         enum omap_dss_clk_source dsi_fclk_src;
 467                 } dsi;
 468
 469                 struct {
 470                         u16 regn;
 471                         u16 regm2;
 472                 } hdmi;
 473         } clocks;
 474
 475         struct {
 476                 struct omap_video_timings timings;
 477
 478                 int acbi;       /* ac-bias pin transitions per interrupt */
 479                 /* Unit: line clocks */
 480                 int acb;        /* ac-bias pin frequency */
 481
 482                 enum omap_panel_config config;
 483         } panel;
 484
 485         struct {
 486                 u8 pixel_size;
 487                 struct rfbi_timings rfbi_timings;
 488         } ctrl;
 489
 490         int reset_gpio;
 491
 492         int max_backlight_level;
 493
 494         const char *name;
 495
 496         /* used to match device to driver */
 497         const char *driver_name;
 498
 499         void *data;
 500
 501         struct omap_dss_driver *driver;
 502
 503         /* helper variable for driver suspend/resume */
 504         bool activate_after_resume;
 505
 506         enum omap_display_caps caps;
 507
 508         struct omap_overlay_manager *manager;
 509
 510         enum omap_dss_display_state state;
 511
 512         /* platform specific  */
 513         int (*platform_enable)(struct omap_dss_device *dssdev);
 514         void (*platform_disable)(struct omap_dss_device *dssdev);
 515         int (*set_backlight)(struct omap_dss_device *dssdev, int level);
 516         int (*get_backlight)(struct omap_dss_device *dssdev);
 517 };
 518
 519 struct omap_dss_driver {
 520         struct device_driver driver;
 521
 522         int (*probe)(struct omap_dss_device *);
 523         void (*remove)(struct omap_dss_device *);
 524
 525         int (*enable)(struct omap_dss_device *display);
 526         void (*disable)(struct omap_dss_device *display);
 527         int (*suspend)(struct omap_dss_device *display);
 528         int (*resume)(struct omap_dss_device *display);
 529         int (*run_test)(struct omap_dss_device *display, int test);
 530
 531         int (*update)(struct omap_dss_device *dssdev,
 532                                u16 x, u16 y, u16 w, u16 h);
 533         int (*sync)(struct omap_dss_device *dssdev);
 534
 535         int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
 536         int (*get_te)(struct omap_dss_device *dssdev);
 537
 538         u8 (*get_rotate)(struct omap_dss_device *dssdev);
 539         int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
 540
 541         bool (*get_mirror)(struct omap_dss_device *dssdev);
 542         int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
 543
 544         int (*memory_read)(struct omap_dss_device *dssdev,
 545                         void *buf, size_t size,
 546                         u16 x, u16 y, u16 w, u16 h);
 547
 548         void (*get_resolution)(struct omap_dss_device *dssdev,
 549                         u16 *xres, u16 *yres);
 550         void (*get_dimensions)(struct omap_dss_device *dssdev,
 551                         u32 *width, u32 *height);
 552         int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
 553
 554         int (*check_timings)(struct omap_dss_device *dssdev,
 555                         struct omap_video_timings *timings);
 556         void (*set_timings)(struct omap_dss_device *dssdev,
 557                         struct omap_video_timings *timings);
 558         void (*get_timings)(struct omap_dss_device *dssdev,
 559                         struct omap_video_timings *timings);
 560
 561         int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
 562         u32 (*get_wss)(struct omap_dss_device *dssdev);
 563 };
 564
 565 int omap_dss_register_driver(struct omap_dss_driver *);
 566 void omap_dss_unregister_driver(struct omap_dss_driver *);
 567
 568 void omap_dss_get_device(struct omap_dss_device *dssdev);
 569 void omap_dss_put_device(struct omap_dss_device *dssdev);
 570 #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
 571 struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
 572 struct omap_dss_device *omap_dss_find_device(void *data,
 573                 int (*match)(struct omap_dss_device *dssdev, void *data));
 574
 575 int omap_dss_start_device(struct omap_dss_device *dssdev);
 576 void omap_dss_stop_device(struct omap_dss_device *dssdev);
 577
 578 int omap_dss_get_num_overlay_managers(void);
 579 struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
 580
 581 int omap_dss_get_num_overlays(void);
 582 struct omap_overlay *omap_dss_get_overlay(int num);
 583
 584 void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
 585                 u16 *xres, u16 *yres);
 586 int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
 587
 588 typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
 589 int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
 590 int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
 591
 592 int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout);
 593 int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask,
 594                 unsigned long timeout);
 595
 596 #define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
 597 #define to_dss_device(x) container_of((x), struct omap_dss_device, dev)
 598
 599 void omapdss_dsi_vc_enable_hs(struct omap_dss_device *dssdev, int channel,
 600                 bool enable);
 601 int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable);
 602
 603 int omap_dsi_prepare_update(struct omap_dss_device *dssdev,
 604                                     u16 *x, u16 *y, u16 *w, u16 *h,
 605                                     bool enlarge_update_area);
 606 int omap_dsi_update(struct omap_dss_device *dssdev,
 607                 int channel,
 608                 u16 x, u16 y, u16 w, u16 h,
 609                 void (*callback)(int, void *), void *data);
 610 int omap_dsi_request_vc(struct omap_dss_device *dssdev, int *channel);
 611 int omap_dsi_set_vc_id(struct omap_dss_device *dssdev, int channel, int vc_id);
 612 void omap_dsi_release_vc(struct omap_dss_device *dssdev, int channel);
 613
 614 int omapdss_dsi_display_enable(struct omap_dss_device *dssdev);
 615 void omapdss_dsi_display_disable(struct omap_dss_device *dssdev,
 616                 bool disconnect_lanes, bool enter_ulps);
 617
 618 int omapdss_dpi_display_enable(struct omap_dss_device *dssdev);
 619 void omapdss_dpi_display_disable(struct omap_dss_device *dssdev);
 620 void dpi_set_timings(struct omap_dss_device *dssdev,
 621                         struct omap_video_timings *timings);
 622 int dpi_check_timings(struct omap_dss_device *dssdev,
 623                         struct omap_video_timings *timings);
 624
 625 int omapdss_sdi_display_enable(struct omap_dss_device *dssdev);
 626 void omapdss_sdi_display_disable(struct omap_dss_device *dssdev);
 627
 628 int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev);
 629 void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev);
 630 int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
 631                 u16 *x, u16 *y, u16 *w, u16 *h);
 632 int omap_rfbi_update(struct omap_dss_device *dssdev,
 633                 u16 x, u16 y, u16 w, u16 h,
 634                 void (*callback)(void *), void *data);
 635 int omap_rfbi_configure(struct omap_dss_device *dssdev, int pixel_size,
 636                 int data_lines);
 637
 638 #endif