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1 /*
2  * Copyright (C) 2008 Nokia Corporation
3  * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of the GNU General Public License version 2 as published by
7  * the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program.  If not, see <http://www.gnu.org/licenses/>.
16  */
17
18 #ifndef __OMAP_OMAPDSS_H
19 #define __OMAP_OMAPDSS_H
20
21 #include <linux/list.h>
22 #include <linux/kobject.h>
23 #include <linux/device.h>
24 #include <linux/platform_device.h>
25 #include <asm/atomic.h>
26
27 #define DISPC_IRQ_FRAMEDONE             (1 << 0)
28 #define DISPC_IRQ_VSYNC                 (1 << 1)
29 #define DISPC_IRQ_EVSYNC_EVEN           (1 << 2)
30 #define DISPC_IRQ_EVSYNC_ODD            (1 << 3)
31 #define DISPC_IRQ_ACBIAS_COUNT_STAT     (1 << 4)
32 #define DISPC_IRQ_PROG_LINE_NUM         (1 << 5)
33 #define DISPC_IRQ_GFX_FIFO_UNDERFLOW    (1 << 6)
34 #define DISPC_IRQ_GFX_END_WIN           (1 << 7)
35 #define DISPC_IRQ_PAL_GAMMA_MASK        (1 << 8)
36 #define DISPC_IRQ_OCP_ERR               (1 << 9)
37 #define DISPC_IRQ_VID1_FIFO_UNDERFLOW   (1 << 10)
38 #define DISPC_IRQ_VID1_END_WIN          (1 << 11)
39 #define DISPC_IRQ_VID2_FIFO_UNDERFLOW   (1 << 12)
40 #define DISPC_IRQ_VID2_END_WIN          (1 << 13)
41 #define DISPC_IRQ_SYNC_LOST             (1 << 14)
42 #define DISPC_IRQ_SYNC_LOST_DIGIT       (1 << 15)
43 #define DISPC_IRQ_WAKEUP                (1 << 16)
44 #define DISPC_IRQ_SYNC_LOST2            (1 << 17)
45 #define DISPC_IRQ_VSYNC2                (1 << 18)
46 #define DISPC_IRQ_ACBIAS_COUNT_STAT2    (1 << 21)
47 #define DISPC_IRQ_FRAMEDONE2            (1 << 22)
48
49 struct omap_dss_device;
50 struct omap_overlay_manager;
51
52 enum omap_display_type {
53         OMAP_DISPLAY_TYPE_NONE          = 0,
54         OMAP_DISPLAY_TYPE_DPI           = 1 << 0,
55         OMAP_DISPLAY_TYPE_DBI           = 1 << 1,
56         OMAP_DISPLAY_TYPE_SDI           = 1 << 2,
57         OMAP_DISPLAY_TYPE_DSI           = 1 << 3,
58         OMAP_DISPLAY_TYPE_VENC          = 1 << 4,
59         OMAP_DISPLAY_TYPE_HDMI          = 1 << 5,
60 };
61
62 enum omap_plane {
63         OMAP_DSS_GFX    = 0,
64         OMAP_DSS_VIDEO1 = 1,
65         OMAP_DSS_VIDEO2 = 2
66 };
67
68 enum omap_channel {
69         OMAP_DSS_CHANNEL_LCD    = 0,
70         OMAP_DSS_CHANNEL_DIGIT  = 1,
71         OMAP_DSS_CHANNEL_LCD2   = 2,
72 };
73
74 enum omap_color_mode {
75         OMAP_DSS_COLOR_CLUT1    = 1 << 0,  /* BITMAP 1 */
76         OMAP_DSS_COLOR_CLUT2    = 1 << 1,  /* BITMAP 2 */
77         OMAP_DSS_COLOR_CLUT4    = 1 << 2,  /* BITMAP 4 */
78         OMAP_DSS_COLOR_CLUT8    = 1 << 3,  /* BITMAP 8 */
79         OMAP_DSS_COLOR_RGB12U   = 1 << 4,  /* RGB12, 16-bit container */
80         OMAP_DSS_COLOR_ARGB16   = 1 << 5,  /* ARGB16 */
81         OMAP_DSS_COLOR_RGB16    = 1 << 6,  /* RGB16 */
82         OMAP_DSS_COLOR_RGB24U   = 1 << 7,  /* RGB24, 32-bit container */
83         OMAP_DSS_COLOR_RGB24P   = 1 << 8,  /* RGB24, 24-bit container */
84         OMAP_DSS_COLOR_YUV2     = 1 << 9,  /* YUV2 4:2:2 co-sited */
85         OMAP_DSS_COLOR_UYVY     = 1 << 10, /* UYVY 4:2:2 co-sited */
86         OMAP_DSS_COLOR_ARGB32   = 1 << 11, /* ARGB32 */
87         OMAP_DSS_COLOR_RGBA32   = 1 << 12, /* RGBA32 */
88         OMAP_DSS_COLOR_RGBX32   = 1 << 13, /* RGBx32 */
89 };
90
91 enum omap_lcd_display_type {
92         OMAP_DSS_LCD_DISPLAY_STN,
93         OMAP_DSS_LCD_DISPLAY_TFT,
94 };
95
96 enum omap_dss_load_mode {
97         OMAP_DSS_LOAD_CLUT_AND_FRAME    = 0,
98         OMAP_DSS_LOAD_CLUT_ONLY         = 1,
99         OMAP_DSS_LOAD_FRAME_ONLY        = 2,
100         OMAP_DSS_LOAD_CLUT_ONCE_FRAME   = 3,
101 };
102
103 enum omap_dss_trans_key_type {
104         OMAP_DSS_COLOR_KEY_GFX_DST = 0,
105         OMAP_DSS_COLOR_KEY_VID_SRC = 1,
106 };
107
108 enum omap_rfbi_te_mode {
109         OMAP_DSS_RFBI_TE_MODE_1 = 1,
110         OMAP_DSS_RFBI_TE_MODE_2 = 2,
111 };
112
113 enum omap_panel_config {
114         OMAP_DSS_LCD_IVS                = 1<<0,
115         OMAP_DSS_LCD_IHS                = 1<<1,
116         OMAP_DSS_LCD_IPC                = 1<<2,
117         OMAP_DSS_LCD_IEO                = 1<<3,
118         OMAP_DSS_LCD_RF                 = 1<<4,
119         OMAP_DSS_LCD_ONOFF              = 1<<5,
120
121         OMAP_DSS_LCD_TFT                = 1<<20,
122 };
123
124 enum omap_dss_venc_type {
125         OMAP_DSS_VENC_TYPE_COMPOSITE,
126         OMAP_DSS_VENC_TYPE_SVIDEO,
127 };
128
129 enum omap_display_caps {
130         OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE      = 1 << 0,
131         OMAP_DSS_DISPLAY_CAP_TEAR_ELIM          = 1 << 1,
132 };
133
134 enum omap_dss_update_mode {
135         OMAP_DSS_UPDATE_DISABLED = 0,
136         OMAP_DSS_UPDATE_AUTO,
137         OMAP_DSS_UPDATE_MANUAL,
138 };
139
140 enum omap_dss_display_state {
141         OMAP_DSS_DISPLAY_DISABLED = 0,
142         OMAP_DSS_DISPLAY_ACTIVE,
143         OMAP_DSS_DISPLAY_SUSPENDED,
144 };
145
146 /* XXX perhaps this should be removed */
147 enum omap_dss_overlay_managers {
148         OMAP_DSS_OVL_MGR_LCD,
149         OMAP_DSS_OVL_MGR_TV,
150         OMAP_DSS_OVL_MGR_LCD2,
151 };
152
153 enum omap_dss_rotation_type {
154         OMAP_DSS_ROT_DMA = 0,
155         OMAP_DSS_ROT_VRFB = 1,
156 };
157
158 /* clockwise rotation angle */
159 enum omap_dss_rotation_angle {
160         OMAP_DSS_ROT_0   = 0,
161         OMAP_DSS_ROT_90  = 1,
162         OMAP_DSS_ROT_180 = 2,
163         OMAP_DSS_ROT_270 = 3,
164 };
165
166 enum omap_overlay_caps {
167         OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
168         OMAP_DSS_OVL_CAP_DISPC = 1 << 1,
169 };
170
171 enum omap_overlay_manager_caps {
172         OMAP_DSS_OVL_MGR_CAP_DISPC = 1 << 0,
173 };
174
175 /* RFBI */
176
177 struct rfbi_timings {
178         int cs_on_time;
179         int cs_off_time;
180         int we_on_time;
181         int we_off_time;
182         int re_on_time;
183         int re_off_time;
184         int we_cycle_time;
185         int re_cycle_time;
186         int cs_pulse_width;
187         int access_time;
188
189         int clk_div;
190
191         u32 tim[5];             /* set by rfbi_convert_timings() */
192
193         int converted;
194 };
195
196 void omap_rfbi_write_command(const void *buf, u32 len);
197 void omap_rfbi_read_data(void *buf, u32 len);
198 void omap_rfbi_write_data(const void *buf, u32 len);
199 void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
200                 u16 x, u16 y,
201                 u16 w, u16 h);
202 int omap_rfbi_enable_te(bool enable, unsigned line);
203 int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
204                              unsigned hs_pulse_time, unsigned vs_pulse_time,
205                              int hs_pol_inv, int vs_pol_inv, int extif_div);
206
207 /* DSI */
208 void dsi_bus_lock(void);
209 void dsi_bus_unlock(void);
210 int dsi_vc_dcs_write(int channel, u8 *data, int len);
211 int dsi_vc_dcs_write_0(int channel, u8 dcs_cmd);
212 int dsi_vc_dcs_write_1(int channel, u8 dcs_cmd, u8 param);
213 int dsi_vc_dcs_write_nosync(int channel, u8 *data, int len);
214 int dsi_vc_dcs_read(int channel, u8 dcs_cmd, u8 *buf, int buflen);
215 int dsi_vc_dcs_read_1(int channel, u8 dcs_cmd, u8 *data);
216 int dsi_vc_dcs_read_2(int channel, u8 dcs_cmd, u8 *data1, u8 *data2);
217 int dsi_vc_set_max_rx_packet_size(int channel, u16 len);
218 int dsi_vc_send_null(int channel);
219 int dsi_vc_send_bta_sync(int channel);
220
221 /* Board specific data */
222 struct omap_dss_board_info {
223         int (*get_last_off_on_transaction_id)(struct device *dev);
224         int num_devices;
225         struct omap_dss_device **devices;
226         struct omap_dss_device *default_device;
227 };
228
229 #if defined(CONFIG_OMAP2_DSS_MODULE) || defined(CONFIG_OMAP2_DSS)
230 /* Init with the board info */
231 extern int omap_display_init(struct omap_dss_board_info *board_data);
232 #else
233 static inline int omap_display_init(struct omap_dss_board_info *board_data)
234 {
235         return 0;
236 }
237 #endif
238
239 struct omap_display_platform_data {
240         struct omap_dss_board_info *board_data;
241         /* TODO: Additional members to be added when PM is considered */
242
243         bool (*opt_clock_available)(const char *clk_role);
244 };
245
246 struct omap_video_timings {
247         /* Unit: pixels */
248         u16 x_res;
249         /* Unit: pixels */
250         u16 y_res;
251         /* Unit: KHz */
252         u32 pixel_clock;
253         /* Unit: pixel clocks */
254         u16 hsw;        /* Horizontal synchronization pulse width */
255         /* Unit: pixel clocks */
256         u16 hfp;        /* Horizontal front porch */
257         /* Unit: pixel clocks */
258         u16 hbp;        /* Horizontal back porch */
259         /* Unit: line clocks */
260         u16 vsw;        /* Vertical synchronization pulse width */
261         /* Unit: line clocks */
262         u16 vfp;        /* Vertical front porch */
263         /* Unit: line clocks */
264         u16 vbp;        /* Vertical back porch */
265 };
266
267 #ifdef CONFIG_OMAP2_DSS_VENC
268 /* Hardcoded timings for tv modes. Venc only uses these to
269  * identify the mode, and does not actually use the configs
270  * itself. However, the configs should be something that
271  * a normal monitor can also show */
272 extern const struct omap_video_timings omap_dss_pal_timings;
273 extern const struct omap_video_timings omap_dss_ntsc_timings;
274 #endif
275
276 struct omap_overlay_info {
277         bool enabled;
278
279         u32 paddr;
280         void __iomem *vaddr;
281         u16 screen_width;
282         u16 width;
283         u16 height;
284         enum omap_color_mode color_mode;
285         u8 rotation;
286         enum omap_dss_rotation_type rotation_type;
287         bool mirror;
288
289         u16 pos_x;
290         u16 pos_y;
291         u16 out_width;  /* if 0, out_width == width */
292         u16 out_height; /* if 0, out_height == height */
293         u8 global_alpha;
294         u8 pre_mult_alpha;
295 };
296
297 struct omap_overlay {
298         struct kobject kobj;
299         struct list_head list;
300
301         /* static fields */
302         const char *name;
303         int id;
304         enum omap_color_mode supported_modes;
305         enum omap_overlay_caps caps;
306
307         /* dynamic fields */
308         struct omap_overlay_manager *manager;
309         struct omap_overlay_info info;
310
311         /* if true, info has been changed, but not applied() yet */
312         bool info_dirty;
313
314         int (*set_manager)(struct omap_overlay *ovl,
315                 struct omap_overlay_manager *mgr);
316         int (*unset_manager)(struct omap_overlay *ovl);
317
318         int (*set_overlay_info)(struct omap_overlay *ovl,
319                         struct omap_overlay_info *info);
320         void (*get_overlay_info)(struct omap_overlay *ovl,
321                         struct omap_overlay_info *info);
322
323         int (*wait_for_go)(struct omap_overlay *ovl);
324 };
325
326 struct omap_overlay_manager_info {
327         u32 default_color;
328
329         enum omap_dss_trans_key_type trans_key_type;
330         u32 trans_key;
331         bool trans_enabled;
332
333         bool alpha_enabled;
334 };
335
336 struct omap_overlay_manager {
337         struct kobject kobj;
338         struct list_head list;
339
340         /* static fields */
341         const char *name;
342         int id;
343         enum omap_overlay_manager_caps caps;
344         int num_overlays;
345         struct omap_overlay **overlays;
346         enum omap_display_type supported_displays;
347
348         /* dynamic fields */
349         struct omap_dss_device *device;
350         struct omap_overlay_manager_info info;
351
352         bool device_changed;
353         /* if true, info has been changed but not applied() yet */
354         bool info_dirty;
355
356         int (*set_device)(struct omap_overlay_manager *mgr,
357                 struct omap_dss_device *dssdev);
358         int (*unset_device)(struct omap_overlay_manager *mgr);
359
360         int (*set_manager_info)(struct omap_overlay_manager *mgr,
361                         struct omap_overlay_manager_info *info);
362         void (*get_manager_info)(struct omap_overlay_manager *mgr,
363                         struct omap_overlay_manager_info *info);
364
365         int (*apply)(struct omap_overlay_manager *mgr);
366         int (*wait_for_go)(struct omap_overlay_manager *mgr);
367         int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
368
369         int (*enable)(struct omap_overlay_manager *mgr);
370         int (*disable)(struct omap_overlay_manager *mgr);
371 };
372
373 struct omap_dss_device {
374         struct device dev;
375
376         enum omap_display_type type;
377
378         enum omap_channel channel;
379
380         union {
381                 struct {
382                         u8 data_lines;
383                 } dpi;
384
385                 struct {
386                         u8 channel;
387                         u8 data_lines;
388                 } rfbi;
389
390                 struct {
391                         u8 datapairs;
392                 } sdi;
393
394                 struct {
395                         u8 clk_lane;
396                         u8 clk_pol;
397                         u8 data1_lane;
398                         u8 data1_pol;
399                         u8 data2_lane;
400                         u8 data2_pol;
401
402                         struct {
403                                 u16 regn;
404                                 u16 regm;
405                                 u16 regm_dispc;
406                                 u16 regm_dsi;
407
408                                 u16 lp_clk_div;
409
410                                 u16 lck_div;
411                                 u16 pck_div;
412                         } div;
413
414                         bool ext_te;
415                         u8 ext_te_gpio;
416                 } dsi;
417
418                 struct {
419                         enum omap_dss_venc_type type;
420                         bool invert_polarity;
421                 } venc;
422         } phy;
423
424         struct {
425                 struct omap_video_timings timings;
426
427                 int acbi;       /* ac-bias pin transitions per interrupt */
428                 /* Unit: line clocks */
429                 int acb;        /* ac-bias pin frequency */
430
431                 enum omap_panel_config config;
432         } panel;
433
434         struct {
435                 u8 pixel_size;
436                 struct rfbi_timings rfbi_timings;
437         } ctrl;
438
439         int reset_gpio;
440
441         int max_backlight_level;
442
443         const char *name;
444
445         /* used to match device to driver */
446         const char *driver_name;
447
448         void *data;
449
450         struct omap_dss_driver *driver;
451
452         /* helper variable for driver suspend/resume */
453         bool activate_after_resume;
454
455         enum omap_display_caps caps;
456
457         struct omap_overlay_manager *manager;
458
459         enum omap_dss_display_state state;
460
461         /* platform specific  */
462         int (*platform_enable)(struct omap_dss_device *dssdev);
463         void (*platform_disable)(struct omap_dss_device *dssdev);
464         int (*set_backlight)(struct omap_dss_device *dssdev, int level);
465         int (*get_backlight)(struct omap_dss_device *dssdev);
466 };
467
468 struct omap_dss_driver {
469         struct device_driver driver;
470
471         int (*probe)(struct omap_dss_device *);
472         void (*remove)(struct omap_dss_device *);
473
474         int (*enable)(struct omap_dss_device *display);
475         void (*disable)(struct omap_dss_device *display);
476         int (*suspend)(struct omap_dss_device *display);
477         int (*resume)(struct omap_dss_device *display);
478         int (*run_test)(struct omap_dss_device *display, int test);
479
480         int (*set_update_mode)(struct omap_dss_device *dssdev,
481                         enum omap_dss_update_mode);
482         enum omap_dss_update_mode (*get_update_mode)(
483                         struct omap_dss_device *dssdev);
484
485         int (*update)(struct omap_dss_device *dssdev,
486                                u16 x, u16 y, u16 w, u16 h);
487         int (*sync)(struct omap_dss_device *dssdev);
488
489         int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
490         int (*get_te)(struct omap_dss_device *dssdev);
491
492         u8 (*get_rotate)(struct omap_dss_device *dssdev);
493         int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
494
495         bool (*get_mirror)(struct omap_dss_device *dssdev);
496         int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
497
498         int (*memory_read)(struct omap_dss_device *dssdev,
499                         void *buf, size_t size,
500                         u16 x, u16 y, u16 w, u16 h);
501
502         void (*get_resolution)(struct omap_dss_device *dssdev,
503                         u16 *xres, u16 *yres);
504         int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
505
506         int (*check_timings)(struct omap_dss_device *dssdev,
507                         struct omap_video_timings *timings);
508         void (*set_timings)(struct omap_dss_device *dssdev,
509                         struct omap_video_timings *timings);
510         void (*get_timings)(struct omap_dss_device *dssdev,
511                         struct omap_video_timings *timings);
512
513         int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
514         u32 (*get_wss)(struct omap_dss_device *dssdev);
515 };
516
517 int omap_dss_register_driver(struct omap_dss_driver *);
518 void omap_dss_unregister_driver(struct omap_dss_driver *);
519
520 int omap_dss_register_device(struct omap_dss_device *);
521 void omap_dss_unregister_device(struct omap_dss_device *);
522
523 void omap_dss_get_device(struct omap_dss_device *dssdev);
524 void omap_dss_put_device(struct omap_dss_device *dssdev);
525 #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
526 struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
527 struct omap_dss_device *omap_dss_find_device(void *data,
528                 int (*match)(struct omap_dss_device *dssdev, void *data));
529
530 int omap_dss_start_device(struct omap_dss_device *dssdev);
531 void omap_dss_stop_device(struct omap_dss_device *dssdev);
532
533 int omap_dss_get_num_overlay_managers(void);
534 struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
535
536 int omap_dss_get_num_overlays(void);
537 struct omap_overlay *omap_dss_get_overlay(int num);
538
539 void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
540                 u16 *xres, u16 *yres);
541 int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
542
543 typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
544 int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
545 int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
546
547 int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout);
548 int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask,
549                 unsigned long timeout);
550
551 #define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
552 #define to_dss_device(x) container_of((x), struct omap_dss_device, dev)
553
554 void omapdss_dsi_vc_enable_hs(int channel, bool enable);
555 int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable);
556
557 int omap_dsi_prepare_update(struct omap_dss_device *dssdev,
558                                     u16 *x, u16 *y, u16 *w, u16 *h,
559                                     bool enlarge_update_area);
560 int omap_dsi_update(struct omap_dss_device *dssdev,
561                 int channel,
562                 u16 x, u16 y, u16 w, u16 h,
563                 void (*callback)(int, void *), void *data);
564 int omap_dsi_request_vc(struct omap_dss_device *dssdev, int *channel);
565 int omap_dsi_set_vc_id(struct omap_dss_device *dssdev, int channel, int vc_id);
566 void omap_dsi_release_vc(struct omap_dss_device *dssdev, int channel);
567
568 int omapdss_dsi_display_enable(struct omap_dss_device *dssdev);
569 void omapdss_dsi_display_disable(struct omap_dss_device *dssdev);
570
571 int omapdss_dpi_display_enable(struct omap_dss_device *dssdev);
572 void omapdss_dpi_display_disable(struct omap_dss_device *dssdev);
573 void dpi_set_timings(struct omap_dss_device *dssdev,
574                         struct omap_video_timings *timings);
575 int dpi_check_timings(struct omap_dss_device *dssdev,
576                         struct omap_video_timings *timings);
577
578 int omapdss_sdi_display_enable(struct omap_dss_device *dssdev);
579 void omapdss_sdi_display_disable(struct omap_dss_device *dssdev);
580
581 int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev);
582 void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev);
583 int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
584                 u16 *x, u16 *y, u16 *w, u16 *h);
585 int omap_rfbi_update(struct omap_dss_device *dssdev,
586                 u16 x, u16 y, u16 w, u16 h,
587                 void (*callback)(void *), void *data);
588
589 #endif