2 * Copyright (C) 2008 Nokia Corporation
3 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
18 #ifndef __OMAP_OMAPDSS_H
19 #define __OMAP_OMAPDSS_H
21 #include <linux/list.h>
22 #include <linux/kobject.h>
23 #include <linux/device.h>
24 #include <linux/interrupt.h>
26 #include <video/videomode.h>
28 #define DISPC_IRQ_FRAMEDONE (1 << 0)
29 #define DISPC_IRQ_VSYNC (1 << 1)
30 #define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
31 #define DISPC_IRQ_EVSYNC_ODD (1 << 3)
32 #define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
33 #define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
34 #define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
35 #define DISPC_IRQ_GFX_END_WIN (1 << 7)
36 #define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
37 #define DISPC_IRQ_OCP_ERR (1 << 9)
38 #define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
39 #define DISPC_IRQ_VID1_END_WIN (1 << 11)
40 #define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
41 #define DISPC_IRQ_VID2_END_WIN (1 << 13)
42 #define DISPC_IRQ_SYNC_LOST (1 << 14)
43 #define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
44 #define DISPC_IRQ_WAKEUP (1 << 16)
45 #define DISPC_IRQ_SYNC_LOST2 (1 << 17)
46 #define DISPC_IRQ_VSYNC2 (1 << 18)
47 #define DISPC_IRQ_VID3_END_WIN (1 << 19)
48 #define DISPC_IRQ_VID3_FIFO_UNDERFLOW (1 << 20)
49 #define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21)
50 #define DISPC_IRQ_FRAMEDONE2 (1 << 22)
51 #define DISPC_IRQ_FRAMEDONEWB (1 << 23)
52 #define DISPC_IRQ_FRAMEDONETV (1 << 24)
53 #define DISPC_IRQ_WBBUFFEROVERFLOW (1 << 25)
54 #define DISPC_IRQ_SYNC_LOST3 (1 << 27)
55 #define DISPC_IRQ_VSYNC3 (1 << 28)
56 #define DISPC_IRQ_ACBIAS_COUNT_STAT3 (1 << 29)
57 #define DISPC_IRQ_FRAMEDONE3 (1 << 30)
59 struct omap_dss_device;
60 struct omap_overlay_manager;
61 struct dss_lcd_mgr_config;
62 struct snd_aes_iec958;
63 struct snd_cea_861_aud_if;
65 enum omap_display_type {
66 OMAP_DISPLAY_TYPE_NONE = 0,
67 OMAP_DISPLAY_TYPE_DPI = 1 << 0,
68 OMAP_DISPLAY_TYPE_DBI = 1 << 1,
69 OMAP_DISPLAY_TYPE_SDI = 1 << 2,
70 OMAP_DISPLAY_TYPE_DSI = 1 << 3,
71 OMAP_DISPLAY_TYPE_VENC = 1 << 4,
72 OMAP_DISPLAY_TYPE_HDMI = 1 << 5,
84 OMAP_DSS_CHANNEL_LCD = 0,
85 OMAP_DSS_CHANNEL_DIGIT = 1,
86 OMAP_DSS_CHANNEL_LCD2 = 2,
87 OMAP_DSS_CHANNEL_LCD3 = 3,
90 enum omap_color_mode {
91 OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */
92 OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */
93 OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */
94 OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */
95 OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
96 OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
97 OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
98 OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
99 OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
100 OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
101 OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
102 OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
103 OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
104 OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
105 OMAP_DSS_COLOR_NV12 = 1 << 14, /* NV12 format: YUV 4:2:0 */
106 OMAP_DSS_COLOR_RGBA16 = 1 << 15, /* RGBA16 - 4444 */
107 OMAP_DSS_COLOR_RGBX16 = 1 << 16, /* RGBx16 - 4444 */
108 OMAP_DSS_COLOR_ARGB16_1555 = 1 << 17, /* ARGB16 - 1555 */
109 OMAP_DSS_COLOR_XRGB16_1555 = 1 << 18, /* xRGB16 - 1555 */
112 enum omap_dss_load_mode {
113 OMAP_DSS_LOAD_CLUT_AND_FRAME = 0,
114 OMAP_DSS_LOAD_CLUT_ONLY = 1,
115 OMAP_DSS_LOAD_FRAME_ONLY = 2,
116 OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3,
119 enum omap_dss_trans_key_type {
120 OMAP_DSS_COLOR_KEY_GFX_DST = 0,
121 OMAP_DSS_COLOR_KEY_VID_SRC = 1,
124 enum omap_rfbi_te_mode {
125 OMAP_DSS_RFBI_TE_MODE_1 = 1,
126 OMAP_DSS_RFBI_TE_MODE_2 = 2,
129 enum omap_dss_signal_level {
130 OMAPDSS_SIG_ACTIVE_HIGH = 0,
131 OMAPDSS_SIG_ACTIVE_LOW = 1,
134 enum omap_dss_signal_edge {
135 OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
136 OMAPDSS_DRIVE_SIG_RISING_EDGE,
137 OMAPDSS_DRIVE_SIG_FALLING_EDGE,
140 enum omap_dss_venc_type {
141 OMAP_DSS_VENC_TYPE_COMPOSITE,
142 OMAP_DSS_VENC_TYPE_SVIDEO,
145 enum omap_dss_dsi_pixel_format {
146 OMAP_DSS_DSI_FMT_RGB888,
147 OMAP_DSS_DSI_FMT_RGB666,
148 OMAP_DSS_DSI_FMT_RGB666_PACKED,
149 OMAP_DSS_DSI_FMT_RGB565,
152 enum omap_dss_dsi_mode {
153 OMAP_DSS_DSI_CMD_MODE = 0,
154 OMAP_DSS_DSI_VIDEO_MODE,
157 enum omap_display_caps {
158 OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
159 OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1,
162 enum omap_dss_display_state {
163 OMAP_DSS_DISPLAY_DISABLED = 0,
164 OMAP_DSS_DISPLAY_ACTIVE,
167 enum omap_dss_audio_state {
168 OMAP_DSS_AUDIO_DISABLED = 0,
169 OMAP_DSS_AUDIO_ENABLED,
170 OMAP_DSS_AUDIO_CONFIGURED,
171 OMAP_DSS_AUDIO_PLAYING,
174 enum omap_dss_rotation_type {
175 OMAP_DSS_ROT_DMA = 1 << 0,
176 OMAP_DSS_ROT_VRFB = 1 << 1,
177 OMAP_DSS_ROT_TILER = 1 << 2,
180 /* clockwise rotation angle */
181 enum omap_dss_rotation_angle {
184 OMAP_DSS_ROT_180 = 2,
185 OMAP_DSS_ROT_270 = 3,
188 enum omap_overlay_caps {
189 OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
190 OMAP_DSS_OVL_CAP_GLOBAL_ALPHA = 1 << 1,
191 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA = 1 << 2,
192 OMAP_DSS_OVL_CAP_ZORDER = 1 << 3,
193 OMAP_DSS_OVL_CAP_POS = 1 << 4,
194 OMAP_DSS_OVL_CAP_REPLICATION = 1 << 5,
197 enum omap_overlay_manager_caps {
198 OMAP_DSS_DUMMY_VALUE, /* add a dummy value to prevent compiler error */
201 enum omap_dss_clk_source {
202 OMAP_DSS_CLK_SRC_FCK = 0, /* OMAP2/3: DSS1_ALWON_FCLK
204 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, /* OMAP3: DSI1_PLL_FCLK
205 * OMAP4: PLL1_CLK1 */
206 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK
207 * OMAP4: PLL1_CLK2 */
208 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC, /* OMAP4: PLL2_CLK1 */
209 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI, /* OMAP4: PLL2_CLK2 */
212 enum omap_hdmi_flags {
213 OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP = 1 << 0,
216 enum omap_dss_output_id {
217 OMAP_DSS_OUTPUT_DPI = 1 << 0,
218 OMAP_DSS_OUTPUT_DBI = 1 << 1,
219 OMAP_DSS_OUTPUT_SDI = 1 << 2,
220 OMAP_DSS_OUTPUT_DSI1 = 1 << 3,
221 OMAP_DSS_OUTPUT_DSI2 = 1 << 4,
222 OMAP_DSS_OUTPUT_VENC = 1 << 5,
223 OMAP_DSS_OUTPUT_HDMI = 1 << 6,
228 struct rfbi_timings {
242 u32 tim[5]; /* set by rfbi_convert_timings() */
247 void omap_rfbi_write_command(const void *buf, u32 len);
248 void omap_rfbi_read_data(void *buf, u32 len);
249 void omap_rfbi_write_data(const void *buf, u32 len);
250 void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
253 int omap_rfbi_enable_te(bool enable, unsigned line);
254 int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
255 unsigned hs_pulse_time, unsigned vs_pulse_time,
256 int hs_pol_inv, int vs_pol_inv, int extif_div);
257 void rfbi_bus_lock(void);
258 void rfbi_bus_unlock(void);
262 enum omap_dss_dsi_trans_mode {
263 /* Sync Pulses: both sync start and end packets sent */
264 OMAP_DSS_DSI_PULSE_MODE,
265 /* Sync Events: only sync start packets sent */
266 OMAP_DSS_DSI_EVENT_MODE,
267 /* Burst: only sync start packets sent, pixels are time compressed */
268 OMAP_DSS_DSI_BURST_MODE,
271 struct omap_dss_dsi_videomode_timings {
282 /* DSI video mode blanking data */
283 /* Unit: byte clock cycles */
289 /* Unit: line clocks */
294 /* DSI blanking modes */
296 int hsa_blanking_mode;
297 int hbp_blanking_mode;
298 int hfp_blanking_mode;
300 enum omap_dss_dsi_trans_mode trans_mode;
302 bool ddr_clk_always_on;
306 struct omap_dss_dsi_config {
307 enum omap_dss_dsi_mode mode;
308 enum omap_dss_dsi_pixel_format pixel_format;
309 const struct omap_video_timings *timings;
311 unsigned long hs_clk_min, hs_clk_max;
312 unsigned long lp_clk_min, lp_clk_max;
314 bool ddr_clk_always_on;
315 enum omap_dss_dsi_trans_mode trans_mode;
318 void dsi_bus_lock(struct omap_dss_device *dssdev);
319 void dsi_bus_unlock(struct omap_dss_device *dssdev);
320 int dsi_vc_dcs_write(struct omap_dss_device *dssdev, int channel, u8 *data,
322 int dsi_vc_generic_write(struct omap_dss_device *dssdev, int channel, u8 *data,
324 int dsi_vc_dcs_write_0(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd);
325 int dsi_vc_generic_write_0(struct omap_dss_device *dssdev, int channel);
326 int dsi_vc_dcs_write_1(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
328 int dsi_vc_generic_write_1(struct omap_dss_device *dssdev, int channel,
330 int dsi_vc_generic_write_2(struct omap_dss_device *dssdev, int channel,
331 u8 param1, u8 param2);
332 int dsi_vc_dcs_write_nosync(struct omap_dss_device *dssdev, int channel,
334 int dsi_vc_generic_write_nosync(struct omap_dss_device *dssdev, int channel,
336 int dsi_vc_dcs_read(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
337 u8 *buf, int buflen);
338 int dsi_vc_generic_read_0(struct omap_dss_device *dssdev, int channel, u8 *buf,
340 int dsi_vc_generic_read_1(struct omap_dss_device *dssdev, int channel, u8 param,
341 u8 *buf, int buflen);
342 int dsi_vc_generic_read_2(struct omap_dss_device *dssdev, int channel,
343 u8 param1, u8 param2, u8 *buf, int buflen);
344 int dsi_vc_set_max_rx_packet_size(struct omap_dss_device *dssdev, int channel,
346 int dsi_vc_send_null(struct omap_dss_device *dssdev, int channel);
347 int dsi_vc_send_bta_sync(struct omap_dss_device *dssdev, int channel);
348 int dsi_enable_video_output(struct omap_dss_device *dssdev, int channel);
349 void dsi_disable_video_output(struct omap_dss_device *dssdev, int channel);
351 enum omapdss_version {
352 OMAPDSS_VER_UNKNOWN = 0,
353 OMAPDSS_VER_OMAP24xx,
354 OMAPDSS_VER_OMAP34xx_ES1, /* OMAP3430 ES1.0, 2.0 */
355 OMAPDSS_VER_OMAP34xx_ES3, /* OMAP3430 ES3.0+ */
356 OMAPDSS_VER_OMAP3630,
358 OMAPDSS_VER_OMAP4430_ES1, /* OMAP4430 ES1.0 */
359 OMAPDSS_VER_OMAP4430_ES2, /* OMAP4430 ES2.0, 2.1, 2.2 */
360 OMAPDSS_VER_OMAP4, /* All other OMAP4s */
364 /* Board specific data */
365 struct omap_dss_board_info {
366 int (*get_context_loss_count)(struct device *dev);
368 struct omap_dss_device **devices;
369 struct omap_dss_device *default_device;
370 const char *default_display_name;
371 int (*dsi_enable_pads)(int dsi_id, unsigned lane_mask);
372 void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask);
373 int (*set_min_bus_tput)(struct device *dev, unsigned long r);
374 enum omapdss_version version;
377 /* Init with the board info */
378 extern int omap_display_init(struct omap_dss_board_info *board_data);
380 extern int omap_hdmi_init(enum omap_hdmi_flags flags);
382 struct omap_video_timings {
389 /* Unit: pixel clocks */
390 u16 hsw; /* Horizontal synchronization pulse width */
391 /* Unit: pixel clocks */
392 u16 hfp; /* Horizontal front porch */
393 /* Unit: pixel clocks */
394 u16 hbp; /* Horizontal back porch */
395 /* Unit: line clocks */
396 u16 vsw; /* Vertical synchronization pulse width */
397 /* Unit: line clocks */
398 u16 vfp; /* Vertical front porch */
399 /* Unit: line clocks */
400 u16 vbp; /* Vertical back porch */
402 /* Vsync logic level */
403 enum omap_dss_signal_level vsync_level;
404 /* Hsync logic level */
405 enum omap_dss_signal_level hsync_level;
406 /* Interlaced or Progressive timings */
408 /* Pixel clock edge to drive LCD data */
409 enum omap_dss_signal_edge data_pclk_edge;
410 /* Data enable logic level */
411 enum omap_dss_signal_level de_level;
412 /* Pixel clock edges to drive HSYNC and VSYNC signals */
413 enum omap_dss_signal_edge sync_pclk_edge;
416 #ifdef CONFIG_OMAP2_DSS_VENC
417 /* Hardcoded timings for tv modes. Venc only uses these to
418 * identify the mode, and does not actually use the configs
419 * itself. However, the configs should be something that
420 * a normal monitor can also show */
421 extern const struct omap_video_timings omap_dss_pal_timings;
422 extern const struct omap_video_timings omap_dss_ntsc_timings;
425 struct omap_dss_cpr_coefs {
431 struct omap_overlay_info {
433 u32 p_uv_addr; /* for NV12 format */
437 enum omap_color_mode color_mode;
439 enum omap_dss_rotation_type rotation_type;
444 u16 out_width; /* if 0, out_width == width */
445 u16 out_height; /* if 0, out_height == height */
451 struct omap_overlay {
453 struct list_head list;
458 enum omap_color_mode supported_modes;
459 enum omap_overlay_caps caps;
462 struct omap_overlay_manager *manager;
465 * The following functions do not block:
471 * The rest of the functions may block and cannot be called from
475 int (*enable)(struct omap_overlay *ovl);
476 int (*disable)(struct omap_overlay *ovl);
477 bool (*is_enabled)(struct omap_overlay *ovl);
479 int (*set_manager)(struct omap_overlay *ovl,
480 struct omap_overlay_manager *mgr);
481 int (*unset_manager)(struct omap_overlay *ovl);
483 int (*set_overlay_info)(struct omap_overlay *ovl,
484 struct omap_overlay_info *info);
485 void (*get_overlay_info)(struct omap_overlay *ovl,
486 struct omap_overlay_info *info);
488 int (*wait_for_go)(struct omap_overlay *ovl);
490 struct omap_dss_device *(*get_device)(struct omap_overlay *ovl);
493 struct omap_overlay_manager_info {
496 enum omap_dss_trans_key_type trans_key_type;
500 bool partial_alpha_enabled;
503 struct omap_dss_cpr_coefs cpr_coefs;
506 struct omap_overlay_manager {
511 enum omap_channel id;
512 enum omap_overlay_manager_caps caps;
513 struct list_head overlays;
514 enum omap_display_type supported_displays;
515 enum omap_dss_output_id supported_outputs;
518 struct omap_dss_output *output;
521 * The following functions do not block:
527 * The rest of the functions may block and cannot be called from
531 int (*set_output)(struct omap_overlay_manager *mgr,
532 struct omap_dss_output *output);
533 int (*unset_output)(struct omap_overlay_manager *mgr);
535 int (*set_manager_info)(struct omap_overlay_manager *mgr,
536 struct omap_overlay_manager_info *info);
537 void (*get_manager_info)(struct omap_overlay_manager *mgr,
538 struct omap_overlay_manager_info *info);
540 int (*apply)(struct omap_overlay_manager *mgr);
541 int (*wait_for_go)(struct omap_overlay_manager *mgr);
542 int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
544 struct omap_dss_device *(*get_device)(struct omap_overlay_manager *mgr);
547 /* 22 pins means 1 clk lane and 10 data lanes */
548 #define OMAP_DSS_MAX_DSI_PINS 22
550 struct omap_dsi_pin_config {
553 * pin numbers in the following order:
559 int pins[OMAP_DSS_MAX_DSI_PINS];
562 struct omap_dss_writeback_info {
568 enum omap_color_mode color_mode;
570 enum omap_dss_rotation_type rotation_type;
575 struct omap_dss_output {
576 struct list_head list;
580 /* display type supported by the output */
581 enum omap_display_type type;
583 /* DISPC channel for this output */
584 enum omap_channel dispc_channel;
586 /* output instance */
587 enum omap_dss_output_id id;
589 /* output's platform device pointer */
590 struct platform_device *pdev;
593 struct omap_overlay_manager *manager;
595 struct omap_dss_device *device;
598 struct omap_dss_device {
599 /* old device, to be removed */
600 struct device old_dev;
602 /* new device, pointer to panel device */
605 struct list_head panel_list;
607 /* alias in the form of "display%d" */
610 enum omap_display_type type;
612 /* obsolete, to be removed */
613 enum omap_channel channel;
637 enum omap_dss_venc_type type;
638 bool invert_polarity;
643 struct omap_video_timings timings;
645 enum omap_dss_dsi_pixel_format dsi_pix_fmt;
646 enum omap_dss_dsi_mode dsi_mode;
651 struct rfbi_timings rfbi_timings;
656 int max_backlight_level;
660 /* used to match device to driver */
661 const char *driver_name;
665 struct omap_dss_driver *driver;
667 /* helper variable for driver suspend/resume */
668 bool activate_after_resume;
670 enum omap_display_caps caps;
672 struct omap_dss_output *output;
674 enum omap_dss_display_state state;
676 enum omap_dss_audio_state audio_state;
678 /* platform specific */
679 int (*platform_enable)(struct omap_dss_device *dssdev);
680 void (*platform_disable)(struct omap_dss_device *dssdev);
681 int (*set_backlight)(struct omap_dss_device *dssdev, int level);
682 int (*get_backlight)(struct omap_dss_device *dssdev);
685 struct omap_dss_hdmi_data
692 struct omap_dss_audio {
693 struct snd_aes_iec958 *iec;
694 struct snd_cea_861_aud_if *cea;
697 struct omap_dss_driver {
698 struct device_driver driver;
700 int (*probe)(struct omap_dss_device *);
701 void (*remove)(struct omap_dss_device *);
703 int (*connect)(struct omap_dss_device *dssdev);
704 void (*disconnect)(struct omap_dss_device *dssdev);
706 int (*enable)(struct omap_dss_device *display);
707 void (*disable)(struct omap_dss_device *display);
708 int (*run_test)(struct omap_dss_device *display, int test);
710 int (*update)(struct omap_dss_device *dssdev,
711 u16 x, u16 y, u16 w, u16 h);
712 int (*sync)(struct omap_dss_device *dssdev);
714 int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
715 int (*get_te)(struct omap_dss_device *dssdev);
717 u8 (*get_rotate)(struct omap_dss_device *dssdev);
718 int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
720 bool (*get_mirror)(struct omap_dss_device *dssdev);
721 int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
723 int (*memory_read)(struct omap_dss_device *dssdev,
724 void *buf, size_t size,
725 u16 x, u16 y, u16 w, u16 h);
727 void (*get_resolution)(struct omap_dss_device *dssdev,
728 u16 *xres, u16 *yres);
729 void (*get_dimensions)(struct omap_dss_device *dssdev,
730 u32 *width, u32 *height);
731 int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
733 int (*check_timings)(struct omap_dss_device *dssdev,
734 struct omap_video_timings *timings);
735 void (*set_timings)(struct omap_dss_device *dssdev,
736 struct omap_video_timings *timings);
737 void (*get_timings)(struct omap_dss_device *dssdev,
738 struct omap_video_timings *timings);
740 int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
741 u32 (*get_wss)(struct omap_dss_device *dssdev);
743 int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
744 bool (*detect)(struct omap_dss_device *dssdev);
747 * For display drivers that support audio. This encompasses
748 * HDMI and DisplayPort at the moment.
751 * Note: These functions might sleep. Do not call while
752 * holding a spinlock/readlock.
754 int (*audio_enable)(struct omap_dss_device *dssdev);
755 void (*audio_disable)(struct omap_dss_device *dssdev);
756 bool (*audio_supported)(struct omap_dss_device *dssdev);
757 int (*audio_config)(struct omap_dss_device *dssdev,
758 struct omap_dss_audio *audio);
759 /* Note: These functions may not sleep */
760 int (*audio_start)(struct omap_dss_device *dssdev);
761 void (*audio_stop)(struct omap_dss_device *dssdev);
765 enum omapdss_version omapdss_get_version(void);
766 bool omapdss_is_initialized(void);
768 int omap_dss_register_driver(struct omap_dss_driver *);
769 void omap_dss_unregister_driver(struct omap_dss_driver *);
771 int omapdss_register_display(struct omap_dss_device *dssdev);
772 void omapdss_unregister_display(struct omap_dss_device *dssdev);
774 void omap_dss_get_device(struct omap_dss_device *dssdev);
775 void omap_dss_put_device(struct omap_dss_device *dssdev);
776 #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
777 struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
778 struct omap_dss_device *omap_dss_find_device(void *data,
779 int (*match)(struct omap_dss_device *dssdev, void *data));
780 const char *omapdss_get_default_display_name(void);
782 void videomode_to_omap_video_timings(const struct videomode *vm,
783 struct omap_video_timings *ovt);
784 void omap_video_timings_to_videomode(const struct omap_video_timings *ovt,
785 struct videomode *vm);
787 int dss_feat_get_num_mgrs(void);
788 int dss_feat_get_num_ovls(void);
789 enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel);
790 enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel);
791 enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane);
795 int omap_dss_get_num_overlay_managers(void);
796 struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
798 int omap_dss_get_num_overlays(void);
799 struct omap_overlay *omap_dss_get_overlay(int num);
801 struct omap_dss_output *omap_dss_get_output(enum omap_dss_output_id id);
802 struct omap_dss_output *omap_dss_find_output(const char *name);
803 struct omap_dss_output *omap_dss_find_output_by_node(struct device_node *node);
804 int omapdss_output_set_device(struct omap_dss_output *out,
805 struct omap_dss_device *dssdev);
806 int omapdss_output_unset_device(struct omap_dss_output *out);
808 struct omap_dss_output *omapdss_find_output_from_display(struct omap_dss_device *dssdev);
809 struct omap_overlay_manager *omapdss_find_mgr_from_display(struct omap_dss_device *dssdev);
811 void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
812 u16 *xres, u16 *yres);
813 int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
814 void omapdss_default_get_timings(struct omap_dss_device *dssdev,
815 struct omap_video_timings *timings);
817 typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
818 int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
819 int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
821 u32 dispc_read_irqstatus(void);
822 void dispc_clear_irqstatus(u32 mask);
823 u32 dispc_read_irqenable(void);
824 void dispc_write_irqenable(u32 mask);
826 int dispc_request_irq(irq_handler_t handler, void *dev_id);
827 void dispc_free_irq(void *dev_id);
829 int dispc_runtime_get(void);
830 void dispc_runtime_put(void);
832 void dispc_mgr_enable(enum omap_channel channel, bool enable);
833 bool dispc_mgr_is_enabled(enum omap_channel channel);
834 u32 dispc_mgr_get_vsync_irq(enum omap_channel channel);
835 u32 dispc_mgr_get_framedone_irq(enum omap_channel channel);
836 u32 dispc_mgr_get_sync_lost_irq(enum omap_channel channel);
837 bool dispc_mgr_go_busy(enum omap_channel channel);
838 void dispc_mgr_go(enum omap_channel channel);
839 void dispc_mgr_set_lcd_config(enum omap_channel channel,
840 const struct dss_lcd_mgr_config *config);
841 void dispc_mgr_set_timings(enum omap_channel channel,
842 const struct omap_video_timings *timings);
843 void dispc_mgr_setup(enum omap_channel channel,
844 const struct omap_overlay_manager_info *info);
846 int dispc_ovl_check(enum omap_plane plane, enum omap_channel channel,
847 const struct omap_overlay_info *oi,
848 const struct omap_video_timings *timings,
849 int *x_predecim, int *y_predecim);
851 int dispc_ovl_enable(enum omap_plane plane, bool enable);
852 bool dispc_ovl_enabled(enum omap_plane plane);
853 void dispc_ovl_set_channel_out(enum omap_plane plane,
854 enum omap_channel channel);
855 int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi,
856 bool replication, const struct omap_video_timings *mgr_timings,
859 #define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
860 #define to_dss_device(x) container_of((x), struct omap_dss_device, old_dev)
862 void omapdss_dsi_vc_enable_hs(struct omap_dss_device *dssdev, int channel,
864 int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable);
865 int omapdss_dsi_set_config(struct omap_dss_device *dssdev,
866 const struct omap_dss_dsi_config *config);
868 int omap_dsi_update(struct omap_dss_device *dssdev, int channel,
869 void (*callback)(int, void *), void *data);
870 int omap_dsi_request_vc(struct omap_dss_device *dssdev, int *channel);
871 int omap_dsi_set_vc_id(struct omap_dss_device *dssdev, int channel, int vc_id);
872 void omap_dsi_release_vc(struct omap_dss_device *dssdev, int channel);
873 int omapdss_dsi_configure_pins(struct omap_dss_device *dssdev,
874 const struct omap_dsi_pin_config *pin_cfg);
876 int omapdss_dsi_display_enable(struct omap_dss_device *dssdev);
877 void omapdss_dsi_display_disable(struct omap_dss_device *dssdev,
878 bool disconnect_lanes, bool enter_ulps);
880 int omapdss_dpi_display_enable(struct omap_dss_device *dssdev);
881 void omapdss_dpi_display_disable(struct omap_dss_device *dssdev);
882 void omapdss_dpi_set_timings(struct omap_dss_device *dssdev,
883 struct omap_video_timings *timings);
884 int dpi_check_timings(struct omap_dss_device *dssdev,
885 struct omap_video_timings *timings);
886 void omapdss_dpi_set_data_lines(struct omap_dss_device *dssdev, int data_lines);
888 int omapdss_sdi_display_enable(struct omap_dss_device *dssdev);
889 void omapdss_sdi_display_disable(struct omap_dss_device *dssdev);
890 void omapdss_sdi_set_timings(struct omap_dss_device *dssdev,
891 struct omap_video_timings *timings);
892 void omapdss_sdi_set_datapairs(struct omap_dss_device *dssdev, int datapairs);
894 int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev);
895 void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev);
896 int omap_rfbi_update(struct omap_dss_device *dssdev, void (*callback)(void *),
898 int omap_rfbi_configure(struct omap_dss_device *dssdev);
899 void omapdss_rfbi_set_size(struct omap_dss_device *dssdev, u16 w, u16 h);
900 void omapdss_rfbi_set_pixel_size(struct omap_dss_device *dssdev,
902 void omapdss_rfbi_set_data_lines(struct omap_dss_device *dssdev,
904 void omapdss_rfbi_set_interface_timings(struct omap_dss_device *dssdev,
905 struct rfbi_timings *timings);
907 int omapdss_compat_init(void);
908 void omapdss_compat_uninit(void);
911 int (*connect)(struct omap_overlay_manager *mgr,
912 struct omap_dss_output *dst);
913 void (*disconnect)(struct omap_overlay_manager *mgr,
914 struct omap_dss_output *dst);
916 void (*start_update)(struct omap_overlay_manager *mgr);
917 int (*enable)(struct omap_overlay_manager *mgr);
918 void (*disable)(struct omap_overlay_manager *mgr);
919 void (*set_timings)(struct omap_overlay_manager *mgr,
920 const struct omap_video_timings *timings);
921 void (*set_lcd_config)(struct omap_overlay_manager *mgr,
922 const struct dss_lcd_mgr_config *config);
923 int (*register_framedone_handler)(struct omap_overlay_manager *mgr,
924 void (*handler)(void *), void *data);
925 void (*unregister_framedone_handler)(struct omap_overlay_manager *mgr,
926 void (*handler)(void *), void *data);
929 int dss_install_mgr_ops(const struct dss_mgr_ops *mgr_ops);
930 void dss_uninstall_mgr_ops(void);
932 int dss_mgr_connect(struct omap_overlay_manager *mgr,
933 struct omap_dss_output *dst);
934 void dss_mgr_disconnect(struct omap_overlay_manager *mgr,
935 struct omap_dss_output *dst);
936 void dss_mgr_set_timings(struct omap_overlay_manager *mgr,
937 const struct omap_video_timings *timings);
938 void dss_mgr_set_lcd_config(struct omap_overlay_manager *mgr,
939 const struct dss_lcd_mgr_config *config);
940 int dss_mgr_enable(struct omap_overlay_manager *mgr);
941 void dss_mgr_disable(struct omap_overlay_manager *mgr);
942 void dss_mgr_start_update(struct omap_overlay_manager *mgr);
943 int dss_mgr_register_framedone_handler(struct omap_overlay_manager *mgr,
944 void (*handler)(void *), void *data);
945 void dss_mgr_unregister_framedone_handler(struct omap_overlay_manager *mgr,
946 void (*handler)(void *), void *data);
948 static inline bool omapdss_device_is_connected(struct omap_dss_device *dssdev)
950 return dssdev->output;
953 static inline bool omapdss_device_is_enabled(struct omap_dss_device *dssdev)
955 return dssdev->state == OMAP_DSS_DISPLAY_ACTIVE;