1 //==========================================================================
5 // Atmel AT91EB55 SPI devices
7 //==========================================================================
8 //####ECOSGPLCOPYRIGHTBEGIN####
9 // -------------------------------------------
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38 // -------------------------------------------
39 //####ECOSGPLCOPYRIGHTEND####
40 //==========================================================================
41 //#####DESCRIPTIONBEGIN####
43 // Author(s): Savin Zlobec <savin@elatec.si>
46 //####DESCRIPTIONEND####
48 //==========================================================================
50 #include <pkgconf/hal.h>
51 #include <pkgconf/io_spi.h>
53 #include <cyg/infra/cyg_type.h>
54 #include <cyg/io/spi.h>
55 #include <cyg/io/spi_at91.h>
57 // -------------------------------------------------------------------------
58 // AT91EB55 SPI exported devices
60 // AT45DB321B DataFlash
61 static cyg_spi_at91_device_t spi_dataflash_dev0 CYG_SPI_DEVICE_ON_BUS(0) =
63 .spi_device.spi_bus = &cyg_spi_at91_bus.spi_bus,
65 .dev_num = 0, // Device number
66 .cl_pol = 1, // Clock polarity (0 or 1)
67 .cl_pha = 0, // Clock phase (0 or 1)
68 .cl_brate = 8192000, // Clock baud rate
69 .cs_up_udly = 1, // Delay in usec between CS up and transfer start
70 .cs_dw_udly = 1, // Delay in usec between transfer end and CS down
71 .tr_bt_udly = 1 // Delay in usec between two transfers
74 cyg_spi_device *cyg_spi_dataflash_dev0 = &spi_dataflash_dev0.spi_device;
76 // -------------------------------------------------------------------------