1 #ifndef CYGONCE_HAL_PLATFORM_SETUP_H
2 #define CYGONCE_HAL_PLATFORM_SETUP_H
4 /*=============================================================================
6 // hal_platform_setup.h
8 // Platform specific support for HAL (assembly code)
10 //=============================================================================
11 //####ECOSGPLCOPYRIGHTBEGIN####
12 // -------------------------------------------
13 // This file is part of eCos, the Embedded Configurable Operating System.
14 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
15 // Copyright (C) 2003 Nick Garnett <nickg@calivar.com>
17 // eCos is free software; you can redistribute it and/or modify it under
18 // the terms of the GNU General Public License as published by the Free
19 // Software Foundation; either version 2 or (at your option) any later version.
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22 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
23 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
26 // You should have received a copy of the GNU General Public License along
27 // with eCos; if not, write to the Free Software Foundation, Inc.,
28 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
30 // As a special exception, if other files instantiate templates or use macros
31 // or inline functions from this file, or you compile this file and link it
32 // with other works to produce a work based on this file, this file does not
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34 // License. However the source code for this file must still be made available
35 // in accordance with section (3) of the GNU General Public License.
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38 // this file might be covered by the GNU General Public License.
40 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
41 // at http://sources.redhat.com/ecos/ecos-license/
42 // -------------------------------------------
43 //####ECOSGPLCOPYRIGHTEND####
44 //=============================================================================
45 //#####DESCRIPTIONBEGIN####
48 // Contributors:gthomas, tdrury, nickg
50 // Purpose: AT91/EB55 platform specific support routines
52 // Usage: #include <cyg/hal/hal_platform_setup.h>
54 //####DESCRIPTIONEND####
56 //===========================================================================*/
58 #include <cyg/hal/var_io.h>
60 //===========================================================================*/
65 str r1,[r0,#AT91_PIO_PER]
66 str r1,[r0,#AT91_PIO_OER]
73 str r1,[r0,#AT91_PIO_SODR]
75 str r1,[r0,#AT91_PIO_CODR]
85 ldr r0,=AT91_PMC // Power saving interface
86 ldr r1,=0xFFFFFFFF // Enable all peripheral [clocks]
87 str r1,[r0,#AT91_PMC_PCER]
91 ldr r0,=AT91_PIOA // Disable PIO (so peripherals can use bits)
92 ldr r1,=(0x3f<<14) // Enable UARTS 0/1 to use pins
93 str r1,[r0,#AT91_PIO_PDR]
96 #define CYGHWR_LED_MACRO _led \x
98 //===========================================================================*/
100 #if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
102 #define AT91_PMC_CGMR_INIT0 (AT91_PMC_CGMR_MOSC_XTAL | \
103 AT91_PMC_CGMR_MOSC_ENA | \
104 AT91_PMC_CGMR_OSC_CNT(47))
106 #define AT91_PMC_CGMR_INIT1 (AT91_PMC_CGMR_INIT0 | \
107 AT91_PMC_CGMR_CSS_MOSC)
109 #define AT91_PMC_CGMR_INIT2 (AT91_PMC_CGMR_INIT1 | \
110 AT91_PMC_CGMR_PLL_MUL(1) | \
111 AT91_PMC_CGMR_PLL_CNT(255))
113 #define AT91_PMC_CGMR_INIT3 (AT91_PMC_CGMR_INIT0 | \
114 AT91_PMC_CGMR_PLL_MUL(1) | \
115 AT91_PMC_CGMR_PLL_CNT(3) | \
116 AT91_PMC_CGMR_CSS_PLL)
121 // Change system frequency from 32kHz to 32MHz.
123 // First enable the master oscillator to run at 16MHz from
126 ldr r3,=AT91_PMC_CGMR_INIT0
127 str r3,[r2,#AT91_PMC_CGMR]
129 // Wait for MOSC to stabilize.
130 mov r4,#AT91_PMC_SR_MOSCS
132 ldr r3,[r2,#AT91_PMC_SR]
134 cmp r3,r4 //#AT91_PMC_SR_MOSCS
137 // Now switch CPU clock to use master oscillator, after this we
138 // should be running at 16MHz.
139 ldr r3,=AT91_PMC_CGMR_INIT1
140 str r3,[r2,#AT91_PMC_CGMR]
142 // Now enable PLL to run at twice MOSC frequency
143 ldr r3,=AT91_PMC_CGMR_INIT2
144 str r3,[r2,#AT91_PMC_CGMR]
146 // Wait for PLL to stabilize
147 mov r4,#AT91_PMC_SR_LOCK
149 ldr r3,[r2,#AT91_PMC_SR]
154 // Finally, switch CPU clock from MOSC to PLL
155 ldr r3,=AT91_PMC_CGMR_INIT3
156 str r3,[r2,#AT91_PMC_CGMR]
158 // All done, we should be running at 32MHz now
160 ldr r10,=_InitMemory // Initialize memory controller
161 movs r0,pc,lsr #20 // If ROM startup, PC < 0x100000
162 moveq r10,r10,lsl #12 // mask address to low 20 bits
163 moveq r10,r10,lsr #12
164 ldmia r10!,{r0-r9,r11-r12} // Table of initialization constants
165 #if defined(CYG_HAL_STARTUP_ROMRAM)
171 stmia r11!,{r0-r9} // Write to controller
172 mov pc,r12 // Change address space, break pipeline
174 .long 0x01002529 // 0x01000000, 16MB, 2 cycles after transfer, 16-bit, 6 wait states
175 .long 0x02002121 // 0x02000000, 16MB, 0 cycles after transfer, 16-bit, 1 wait state
176 .long 0x20000000 // unused
177 .long 0x30000000 // unused
178 .long 0x40000000 // unused
179 .long 0x50000000 // unused
180 .long 0x60000000 // unused
181 .long 0x70000000 // unused
182 .long 0x00000001 // REMAP command
183 .long 0x00000000 // Standard read protocol
184 .long AT91_EBI // External Bus Interface address
185 .long 10f // address where to jump
187 #if defined(CYG_HAL_STARTUP_ROMRAM)
188 ldr r0,=0x01000000 // Relocate FLASH/ROM to on-chip RAM
189 ldr r1,=0x02000000 // RAM base & length
203 #define CYGSEM_HAL_ROM_RESET_USES_JUMP
215 #define PLATFORM_SETUP1 _setup
218 //-----------------------------------------------------------------------------
219 // end of hal_platform_setup.h
220 #endif // CYGONCE_HAL_PLATFORM_SETUP_H