1 #ifndef CYGONCE_HAL_CACHE_H
2 #define CYGONCE_HAL_CACHE_H
4 //=============================================================================
8 // HAL cache control API
10 //=============================================================================
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43 //=============================================================================
44 //#####DESCRIPTIONBEGIN####
46 // Author(s): nickg, gthomas
47 // Contributors: nickg, gthomas
49 // Purpose: Cache control API
50 // Description: The macros defined here provide the HAL APIs for handling
51 // cache control operations.
53 // #include <cyg/hal/hal_cache.h>
57 //####DESCRIPTIONEND####
59 //=============================================================================
61 #include <cyg/infra/cyg_type.h>
63 //-----------------------------------------------------------------------------
67 //#define HAL_DCACHE_SIZE 0 // Size of data cache in bytes
68 //#define HAL_DCACHE_LINE_SIZE 0 // Size of a data cache line
69 //#define HAL_DCACHE_WAYS 0 // Associativity of the cache
72 //#define HAL_ICACHE_SIZE 0 // Size of cache in bytes
73 //#define HAL_ICACHE_LINE_SIZE 0 // Size of a cache line
74 //#define HAL_ICACHE_WAYS 0 // Associativity of the cache
76 //#define HAL_DCACHE_SETS (HAL_DCACHE_SIZE/(HAL_DCACHE_LINE_SIZE*HAL_DCACHE_WAYS))
77 //#define HAL_ICACHE_SETS (HAL_ICACHE_SIZE/(HAL_ICACHE_LINE_SIZE*HAL_ICACHE_WAYS))
79 //-----------------------------------------------------------------------------
80 // Global control of data cache
82 // Enable the data cache
83 #define HAL_DCACHE_ENABLE()
85 // Disable the data cache
86 #define HAL_DCACHE_DISABLE()
88 // Invalidate the entire cache
89 #define HAL_DCACHE_INVALIDATE_ALL()
91 // Synchronize the contents of the cache with memory.
92 #define HAL_DCACHE_SYNC()
94 // Purge contents of data cache
95 #define HAL_DCACHE_PURGE_ALL()
97 // Query the state of the data cache (does not affect the caching)
98 #define HAL_DCACHE_IS_ENABLED(_state_) \
103 // Set the data cache refill burst size
104 //#define HAL_DCACHE_BURST_SIZE(_size_)
106 // Set the data cache write mode
107 //#define HAL_DCACHE_WRITE_MODE( _mode_ )
109 //#define HAL_DCACHE_WRITETHRU_MODE 0
110 //#define HAL_DCACHE_WRITEBACK_MODE 1
112 // Load the contents of the given address range into the data cache
113 // and then lock the cache so that it stays there.
114 //#define HAL_DCACHE_LOCK(_base_, _size_)
116 // Undo a previous lock operation
117 //#define HAL_DCACHE_UNLOCK(_base_, _size_)
119 // Unlock entire cache
120 //#define HAL_DCACHE_UNLOCK_ALL()
122 //-----------------------------------------------------------------------------
123 // Data cache line control
125 // Allocate cache lines for the given address range without reading its
126 // contents from memory.
127 //#define HAL_DCACHE_ALLOCATE( _base_ , _size_ )
129 // Write dirty cache lines to memory and invalidate the cache entries
130 // for the given address range.
131 //#define HAL_DCACHE_FLUSH( _base_ , _size_ )
133 // Invalidate cache lines in the given range without writing to memory.
134 //#define HAL_DCACHE_INVALIDATE( _base_ , _size_ )
136 // Write dirty cache lines to memory for the given address range.
137 //#define HAL_DCACHE_STORE( _base_ , _size_ )
139 // Preread the given range into the cache with the intention of reading
141 //#define HAL_DCACHE_READ_HINT( _base_ , _size_ )
143 // Preread the given range into the cache with the intention of writing
145 //#define HAL_DCACHE_WRITE_HINT( _base_ , _size_ )
147 // Allocate and zero the cache lines associated with the given range.
148 //#define HAL_DCACHE_ZERO( _base_ , _size_ )
150 //-----------------------------------------------------------------------------
151 // Global control of Instruction cache
153 // Enable the instruction cache
154 #define HAL_ICACHE_ENABLE()
156 // Disable the instruction cache
157 #define HAL_ICACHE_DISABLE()
159 // Invalidate the entire cache
160 #define HAL_ICACHE_INVALIDATE_ALL()
162 // Synchronize the contents of the cache with memory.
163 #define HAL_ICACHE_SYNC()
165 // Query the state of the instruction cache (does not affect the caching)
166 #define HAL_ICACHE_IS_ENABLED(_state_) \
171 // Set the instruction cache refill burst size
172 //#define HAL_ICACHE_BURST_SIZE(_size_)
174 // Load the contents of the given address range into the instruction cache
175 // and then lock the cache so that it stays there.
176 //#define HAL_ICACHE_LOCK(_base_, _size_)
178 // Undo a previous lock operation
179 //#define HAL_ICACHE_UNLOCK(_base_, _size_)
181 // Unlock entire cache
182 //#define HAL_ICACHE_UNLOCK_ALL()
184 //-----------------------------------------------------------------------------
185 // Instruction cache line control
187 // Invalidate cache lines in the given range without writing to memory.
188 //#define HAL_ICACHE_INVALIDATE( _base_ , _size_ )
190 //-----------------------------------------------------------------------------
191 #endif // ifndef CYGONCE_HAL_CACHE_H
192 // End of hal_cache.h