1 /*=============================================================================
5 // HAL diagnostic output code
7 //=============================================================================
8 //####ECOSGPLCOPYRIGHTBEGIN####
9 // -------------------------------------------
10 // This file is part of eCos, the Embedded Configurable Operating System.
11 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
13 // eCos is free software; you can redistribute it and/or modify it under
14 // the terms of the GNU General Public License as published by the Free
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18 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
19 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
22 // You should have received a copy of the GNU General Public License along
23 // with eCos; if not, write to the Free Software Foundation, Inc.,
24 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
26 // As a special exception, if other files instantiate templates or use macros
27 // or inline functions from this file, or you compile this file and link it
28 // with other works to produce a work based on this file, this file does not
29 // by itself cause the resulting work to be covered by the GNU General Public
30 // License. However the source code for this file must still be made available
31 // in accordance with section (3) of the GNU General Public License.
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34 // this file might be covered by the GNU General Public License.
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37 // at http://sources.redhat.com/ecos/ecos-license/
38 // -------------------------------------------
39 //####ECOSGPLCOPYRIGHTEND####
40 //=============================================================================
41 //#####DESCRIPTIONBEGIN####
44 // Contributors:jskov, gthomas
46 // Purpose: HAL diagnostic output
47 // Description: Implementations of HAL diagnostic output support.
49 //####DESCRIPTIONEND####
51 //===========================================================================*/
53 #include <pkgconf/hal.h>
54 #include CYGBLD_HAL_PLATFORM_H
56 #include <cyg/infra/cyg_type.h> // base types
58 #include <cyg/hal/hal_arch.h> // SAVE/RESTORE GP macros
59 #include <cyg/hal/hal_io.h> // IO macros
60 #include <cyg/hal/hal_if.h> // interface API
61 #include <cyg/hal/hal_intr.h> // HAL_ENABLE/MASK/UNMASK_INTERRUPTS
62 #include <cyg/hal/hal_misc.h> // Helper functions
63 #include <cyg/hal/drv_api.h> // CYG_ISR_HANDLED
65 #include <cyg/hal/plf_io.h> // USART registers
67 //-----------------------------------------------------------------------------
70 cyg_int32 msec_timeout;
74 //-----------------------------------------------------------------------------
77 cyg_hal_plf_serial_init_channel(void* __ch_data)
79 cyg_uint8* base = ((channel_data_t*)__ch_data)->base;
82 HAL_WRITE_UINT32(base+AT91_US_CR, AT91_US_CR_RxRESET | AT91_US_CR_TxRESET);
85 HAL_WRITE_UINT32(base+AT91_US_MR,
86 AT91_US_MR_CLOCK_MCK | AT91_US_MR_LENGTH_8 |
87 AT91_US_MR_PARITY_NONE | AT91_US_MR_STOP_1);
89 HAL_WRITE_UINT32(base+AT91_US_BRG, AT91_US_BAUD(CYGNUM_HAL_VIRTUAL_VECTOR_CHANNELS_DEFAULT_BAUD));
92 HAL_WRITE_UINT32(base+AT91_US_CR, AT91_US_CR_RxENAB | AT91_US_CR_TxENAB);
96 cyg_hal_plf_serial_putc(void *__ch_data, char c)
98 cyg_uint8* base = ((channel_data_t*)__ch_data)->base;
99 cyg_uint32 status, ch;
100 CYGARC_HAL_SAVE_GP();
103 HAL_READ_UINT32(base+AT91_US_CSR, status);
104 } while ((status & AT91_US_CSR_TxRDY) == 0);
107 HAL_WRITE_UINT32(base+AT91_US_THR, ch);
109 CYGARC_HAL_RESTORE_GP();
113 cyg_hal_plf_serial_getc_nonblock(void* __ch_data, cyg_uint8* ch)
115 channel_data_t* chan = (channel_data_t*)__ch_data;
116 cyg_uint8* base = chan->base;
120 HAL_READ_UINT32(base+AT91_US_CSR, stat);
121 if ((stat & AT91_US_CSR_RxRDY) == 0)
124 HAL_READ_UINT32(base+AT91_US_RHR, c);
125 *ch = (cyg_uint8)(c & 0xff);
131 cyg_hal_plf_serial_getc(void* __ch_data)
134 CYGARC_HAL_SAVE_GP();
136 while(!cyg_hal_plf_serial_getc_nonblock(__ch_data, &ch));
138 CYGARC_HAL_RESTORE_GP();
143 cyg_hal_plf_serial_write(void* __ch_data, const cyg_uint8* __buf,
146 CYGARC_HAL_SAVE_GP();
149 cyg_hal_plf_serial_putc(__ch_data, *__buf++);
151 CYGARC_HAL_RESTORE_GP();
155 cyg_hal_plf_serial_read(void* __ch_data, cyg_uint8* __buf, cyg_uint32 __len)
157 CYGARC_HAL_SAVE_GP();
160 *__buf++ = cyg_hal_plf_serial_getc(__ch_data);
162 CYGARC_HAL_RESTORE_GP();
166 cyg_hal_plf_serial_getc_timeout(void* __ch_data, cyg_uint8* ch)
169 channel_data_t* chan = (channel_data_t*)__ch_data;
171 CYGARC_HAL_SAVE_GP();
173 delay_count = chan->msec_timeout * 10; // delay in .1 ms steps
176 res = cyg_hal_plf_serial_getc_nonblock(__ch_data, ch);
177 if (res || 0 == delay_count--)
180 CYGACC_CALL_IF_DELAY_US(100);
183 CYGARC_HAL_RESTORE_GP();
188 cyg_hal_plf_serial_control(void *__ch_data, __comm_control_cmd_t __func, ...)
190 static int irq_state = 0;
191 channel_data_t* chan = (channel_data_t*)__ch_data;
192 cyg_uint8* base = ((channel_data_t*)__ch_data)->base;
194 CYGARC_HAL_SAVE_GP();
197 case __COMMCTL_IRQ_ENABLE:
199 HAL_INTERRUPT_ACKNOWLEDGE(chan->isr_vector);
200 HAL_INTERRUPT_UNMASK(chan->isr_vector);
201 HAL_WRITE_UINT32(base+AT91_US_IER, AT91_US_IER_RxRDY);
203 case __COMMCTL_IRQ_DISABLE:
206 HAL_INTERRUPT_MASK(chan->isr_vector);
207 HAL_WRITE_UINT32(base+AT91_US_IDR, AT91_US_IER_RxRDY);
209 case __COMMCTL_DBG_ISR_VECTOR:
210 ret = chan->isr_vector;
212 case __COMMCTL_SET_TIMEOUT:
216 va_start(ap, __func);
218 ret = chan->msec_timeout;
219 chan->msec_timeout = va_arg(ap, cyg_uint32);
226 CYGARC_HAL_RESTORE_GP();
231 cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc,
232 CYG_ADDRWORD __vector, CYG_ADDRWORD __data)
235 channel_data_t* chan = (channel_data_t*)__ch_data;
239 CYGARC_HAL_SAVE_GP();
242 HAL_READ_UINT32(chan->base+AT91_US_CSR, stat);
243 if ( (stat & AT91_US_CSR_RxRDY) != 0 ) {
245 HAL_READ_UINT32(chan->base+AT91_US_RHR, c);
246 ch = (cyg_uint8)(c & 0xff);
247 if( cyg_hal_is_break( &ch , 1 ) )
250 res = CYG_ISR_HANDLED;
253 HAL_INTERRUPT_ACKNOWLEDGE(chan->isr_vector);
255 CYGARC_HAL_RESTORE_GP();
259 static channel_data_t at91_ser_channels[2] = {
260 { (cyg_uint8*)AT91_USART0, 1000, CYGNUM_HAL_INTERRUPT_USART0},
261 { (cyg_uint8*)AT91_USART1, 1000, CYGNUM_HAL_INTERRUPT_USART1}
265 cyg_hal_plf_serial_init(void)
267 hal_virtual_comm_table_t* comm;
270 cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
273 cyg_hal_plf_serial_init_channel(&at91_ser_channels[0]);
274 #if CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 1
275 cyg_hal_plf_serial_init_channel(&at91_ser_channels[1]);
278 // Setup procs in the vector table
281 CYGACC_CALL_IF_SET_CONSOLE_COMM(0);
282 comm = CYGACC_CALL_IF_CONSOLE_PROCS();
283 CYGACC_COMM_IF_CH_DATA_SET(*comm, &at91_ser_channels[0]);
284 CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
285 CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
286 CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
287 CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
288 CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
289 CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
290 CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
292 #if CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 1
294 CYGACC_CALL_IF_SET_CONSOLE_COMM(1);
295 comm = CYGACC_CALL_IF_CONSOLE_PROCS();
296 CYGACC_COMM_IF_CH_DATA_SET(*comm, &at91_ser_channels[1]);
297 CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
298 CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
299 CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
300 CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
301 CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
302 CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
303 CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
306 // Restore original console
307 CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
311 cyg_hal_plf_comms_init(void)
313 static int initialized = 0;
320 cyg_hal_plf_serial_init();
323 //-----------------------------------------------------------------------------