1 # ====================================================================
5 # Atmel AT91 HAL package configuration data
7 # ====================================================================
8 #####ECOSGPLCOPYRIGHTBEGIN####
9 ## -------------------------------------------
10 ## This file is part of eCos, the Embedded Configurable Operating System.
11 ## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
12 ## Copyright (C) 2003 Nick Garnett <nickg@calivar.com>
14 ## eCos is free software; you can redistribute it and/or modify it under
15 ## the terms of the GNU General Public License as published by the Free
16 ## Software Foundation; either version 2 or (at your option) any later version.
18 ## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
19 ## WARRANTY; without even the implied warranty of MERCHANTABILITY or
20 ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
23 ## You should have received a copy of the GNU General Public License along
24 ## with eCos; if not, write to the Free Software Foundation, Inc.,
25 ## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
27 ## As a special exception, if other files instantiate templates or use macros
28 ## or inline functions from this file, or you compile this file and link it
29 ## with other works to produce a work based on this file, this file does not
30 ## by itself cause the resulting work to be covered by the GNU General Public
31 ## License. However the source code for this file must still be made available
32 ## in accordance with section (3) of the GNU General Public License.
34 ## This exception does not invalidate any other reasons why a work based on
35 ## this file might be covered by the GNU General Public License.
37 ## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
38 ## at http://sources.redhat.com/ecos/ecos-license/
39 ## -------------------------------------------
40 #####ECOSGPLCOPYRIGHTEND####
41 # ====================================================================
42 ######DESCRIPTIONBEGIN####
45 # Contributors: gthomas, tkoeller, tdrury, nickg
48 #####DESCRIPTIONEND####
50 # ====================================================================
52 cdl_package CYGPKG_HAL_ARM_AT91 {
53 display "Atmel AT91 variant HAL"
55 define_header hal_arm_at91.h
59 The AT91 HAL package provides the support needed to run
60 eCos on Atmel AT91 based targets."
64 implements CYGINT_HAL_DEBUG_GDB_STUBS
65 implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK
66 implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT
67 implements CYGINT_HAL_VIRTUAL_VECTOR_COMM_BAUD_SUPPORT
68 implements CYGINT_HAL_ARM_ARCH_ARM7
69 implements CYGINT_HAL_ARM_THUMB_ARCH
71 # Let the architectural HAL see this variant's files
73 puts $::cdl_system_header "#define CYGBLD_HAL_ARM_VAR_IO_H"
74 puts $::cdl_system_header "#define CYGBLD_HAL_ARM_VAR_ARCH_H"
77 cdl_option CYGHWR_HAL_ARM_AT91 {
78 display "AT91 variant used"
80 default_value {"R40807"}
81 legal_values {"R40807" "R40008" "M42800A" "M55800A" "JTST"
83 description "The AT91 microcontroller family has several variants,
84 the main differences being the amount of on-chip SRAM,
85 peripherals and their layout. This option allows the
86 platform HALs to select the specific microcontroller
90 cdl_option CYGHWR_HAL_ARM_AT91_FIQ {
91 display "handle FIQ as an IRQ"
95 Enable this option if you need to handle FIQ interrupts in the
96 normal way, i.e. a FIQ interrupt will be treated as a normal IRQ
97 using the highest priority"
100 cdl_interface CYGINT_HAL_ARM_AT91_SYS_INTERRUPT {
101 display "AT91 core has multiplexed system interrupts"
103 Some AT91 cores have a system controller which multiplexes
104 many interrupts onto the system interrupt. When this interface
105 is enabled the variant hal will perform a second level
106 expansion of these interrupts"
109 cdl_interface CYGINT_HAL_ARM_AT91_PIT_HW {
110 display "Platform has a Periodic Interval Timer"
112 This interface if implemented by HALs for CPU cores which
113 have the Periodic Interval Timer."
116 cdl_option CYGBLD_HAL_ARM_AT91_TIMER_TC {
117 display "Use Timer Counter for eCos Clock"
120 requires !CYGBLD_HAL_ARM_AT91_TIMER_PIT
123 Use a Timer Counter Channel to generate the eCos Clock."
126 cdl_option CYGBLD_HAL_ARM_AT91_TIMER_PIT {
127 display "Use Periodic Interval Timer for eCos Clock"
129 default_value !CYGBLD_HAL_ARM_AT91_TIMER_TC
130 requires !CYGBLD_HAL_ARM_AT91_TIMER_TC
131 active_if CYGINT_HAL_ARM_AT91_PIT_HW
134 Use Periodic Interval Timer to generate the eCos Clock."
137 cdl_interface CYGINT_HAL_ARM_AT91_SERIAL_DBG_HW {
138 display "Platform has the DBG serial port"
140 Some varients of the AT91 have a dedicated debug serial
141 port. The HALs of such a varient should implement this interface
142 so allowing the serial driver to the compiled"
145 cdl_option CYGBLD_HAL_ARM_AT91_SERIAL_DBG {
146 display "Enable the use of the DBG serial port"
148 active_if CYGINT_HAL_ARM_AT91_SERIAL_DBG_HW
149 active_if !CYGBLD_HAL_ARM_AT91_SERIAL_UART
150 requires CYGINT_HAL_ARM_AT91_SYS_INTERRUPT
153 compile hal_diag_dbg.c
154 requires CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL == 0
155 requires CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL == 0
158 The driver for the dedicated DBG UART will be compiled in the
159 varient HAL when this option is enabled."
162 cdl_option CYGBLD_HAL_ARM_AT91_SERIAL_UART {
163 display "Enable the use of the UARTS for debug output"
167 requires !CYGBLD_HAL_ARM_AT91_SERIAL_DBG
169 The driver for using the UARTS will be compiled in the
170 varient HAL when this option is enabled."
173 cdl_component CYGBLD_HAL_ARM_AT91_DCC {
174 display "Enable the use of the DCC for debug output"
177 compile hal_diag_dcc.c
179 A <serial> driver will be compiled and inserted into the
180 vector table which does I/O via the DCC. The DCC is part of
181 the JTAG interface and some JTAG devices made this interface
182 available via telnet etc."
184 cdl_option CYGBLD_HAL_ARM_AT91_DCC_CHANNEL {
185 display "Channel the DCC port should use in the VV table"
189 The DCC driver has to be registered in the VV table of
190 drivers. This option determines which entry in the
191 table it will take. The default value will overwride
192 the first serial port. "