1 /*=============================================================================
5 // HAL diagnostic output code
7 //=============================================================================
8 //####ECOSGPLCOPYRIGHTBEGIN####
9 // -------------------------------------------
10 // This file is part of eCos, the Embedded Configurable Operating System.
11 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
13 // eCos is free software; you can redistribute it and/or modify it under
14 // the terms of the GNU General Public License as published by the Free
15 // Software Foundation; either version 2 or (at your option) any later version.
17 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
18 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
19 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
22 // You should have received a copy of the GNU General Public License along
23 // with eCos; if not, write to the Free Software Foundation, Inc.,
24 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
26 // As a special exception, if other files instantiate templates or use macros
27 // or inline functions from this file, or you compile this file and link it
28 // with other works to produce a work based on this file, this file does not
29 // by itself cause the resulting work to be covered by the GNU General Public
30 // License. However the source code for this file must still be made available
31 // in accordance with section (3) of the GNU General Public License.
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34 // this file might be covered by the GNU General Public License.
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37 // at http://sources.redhat.com/ecos/ecos-license/
38 // -------------------------------------------
39 //####ECOSGPLCOPYRIGHTEND####
40 //=============================================================================
41 //#####DESCRIPTIONBEGIN####
44 // Contributors:jskov, gthomas
46 // Purpose: HAL diagnostic output
47 // Description: Implementations of HAL diagnostic output support.
49 //####DESCRIPTIONEND####
51 //===========================================================================*/
53 #include <pkgconf/hal.h>
54 #include CYGBLD_HAL_PLATFORM_H
56 #include <cyg/infra/cyg_type.h> // base types
58 #include <cyg/hal/hal_arch.h> // SAVE/RESTORE GP macros
59 #include <cyg/hal/hal_io.h> // IO macros
60 #include <cyg/hal/hal_if.h> // interface API
61 #include <cyg/hal/hal_intr.h> // HAL_ENABLE/MASK/UNMASK_INTERRUPTS
62 #include <cyg/hal/hal_misc.h> // Helper functions
63 #include <cyg/hal/drv_api.h> // CYG_ISR_HANDLED
64 #include <cyg/hal/hal_diag.h>
66 #include <cyg/hal/var_io.h> // USART registers
68 //-----------------------------------------------------------------------------
71 cyg_int32 msec_timeout;
76 //-----------------------------------------------------------------------------
79 cyg_hal_plf_serial_putc(void *__ch_data, char c);
82 cyg_hal_plf_serial_init_channel(void* __ch_data)
84 channel_data_t* chan = (channel_data_t*)__ch_data;
85 cyg_uint8* base = chan->base;
88 HAL_WRITE_UINT32(base+AT91_US_CR, AT91_US_CR_RxRESET | AT91_US_CR_TxRESET);
91 HAL_WRITE_UINT32(base+AT91_US_MR,
92 AT91_US_MR_CLOCK_MCK | AT91_US_MR_LENGTH_8 |
93 AT91_US_MR_PARITY_NONE | AT91_US_MR_STOP_1);
95 HAL_WRITE_UINT32(base+AT91_US_BRG, AT91_US_BAUD(chan->baud_rate));
98 HAL_WRITE_UINT32(base+AT91_US_CR, AT91_US_CR_RxENAB | AT91_US_CR_TxENAB);
103 cyg_hal_plf_serial_putc(void *__ch_data, char c)
105 cyg_uint8* base = ((channel_data_t*)__ch_data)->base;
106 cyg_uint32 status, ch;
107 CYGARC_HAL_SAVE_GP();
110 HAL_READ_UINT32(base+AT91_US_CSR, status);
111 } while ((status & AT91_US_CSR_TxRDY) == 0);
114 HAL_WRITE_UINT32(base+AT91_US_THR, ch);
116 CYGARC_HAL_RESTORE_GP();
120 cyg_hal_plf_serial_getc_nonblock(void* __ch_data, cyg_uint8* ch)
122 channel_data_t* chan = (channel_data_t*)__ch_data;
123 cyg_uint8* base = chan->base;
127 HAL_READ_UINT32(base+AT91_US_CSR, stat);
128 if ((stat & AT91_US_CSR_RxRDY) == 0)
131 HAL_READ_UINT32(base+AT91_US_RHR, c);
132 *ch = (cyg_uint8)(c & 0xff);
138 cyg_hal_plf_serial_getc(void* __ch_data)
141 CYGARC_HAL_SAVE_GP();
143 while(!cyg_hal_plf_serial_getc_nonblock(__ch_data, &ch));
145 CYGARC_HAL_RESTORE_GP();
150 cyg_hal_plf_serial_write(void* __ch_data, const cyg_uint8* __buf,
153 CYGARC_HAL_SAVE_GP();
156 cyg_hal_plf_serial_putc(__ch_data, *__buf++);
158 CYGARC_HAL_RESTORE_GP();
162 cyg_hal_plf_serial_read(void* __ch_data, cyg_uint8* __buf, cyg_uint32 __len)
164 CYGARC_HAL_SAVE_GP();
167 *__buf++ = cyg_hal_plf_serial_getc(__ch_data);
169 CYGARC_HAL_RESTORE_GP();
173 cyg_hal_plf_serial_getc_timeout(void* __ch_data, cyg_uint8* ch)
176 channel_data_t* chan = (channel_data_t*)__ch_data;
178 CYGARC_HAL_SAVE_GP();
180 delay_count = chan->msec_timeout * 10; // delay in .1 ms steps
183 res = cyg_hal_plf_serial_getc_nonblock(__ch_data, ch);
184 if (res || 0 == delay_count--)
187 CYGACC_CALL_IF_DELAY_US(100);
190 CYGARC_HAL_RESTORE_GP();
195 cyg_hal_plf_serial_control(void *__ch_data, __comm_control_cmd_t __func, ...)
197 static int irq_state = 0;
198 channel_data_t* chan = (channel_data_t*)__ch_data;
199 cyg_uint8* base = ((channel_data_t*)__ch_data)->base;
203 CYGARC_HAL_SAVE_GP();
204 va_start(ap, __func);
207 case __COMMCTL_GETBAUD:
208 ret = chan->baud_rate;
210 case __COMMCTL_SETBAUD:
211 chan->baud_rate = va_arg(ap, cyg_int32);
212 // Should we verify this value here?
213 cyg_hal_plf_serial_init_channel(chan);
216 case __COMMCTL_IRQ_ENABLE:
218 HAL_INTERRUPT_ACKNOWLEDGE(chan->isr_vector);
219 HAL_INTERRUPT_UNMASK(chan->isr_vector);
220 HAL_WRITE_UINT32(base+AT91_US_IER, AT91_US_IER_RxRDY);
222 case __COMMCTL_IRQ_DISABLE:
225 HAL_INTERRUPT_MASK(chan->isr_vector);
226 HAL_WRITE_UINT32(base+AT91_US_IDR, AT91_US_IER_RxRDY);
228 case __COMMCTL_DBG_ISR_VECTOR:
229 ret = chan->isr_vector;
231 case __COMMCTL_SET_TIMEOUT:
232 ret = chan->msec_timeout;
233 chan->msec_timeout = va_arg(ap, cyg_uint32);
239 CYGARC_HAL_RESTORE_GP();
244 cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc,
245 CYG_ADDRWORD __vector, CYG_ADDRWORD __data)
248 channel_data_t* chan = (channel_data_t*)__ch_data;
252 CYGARC_HAL_SAVE_GP();
255 HAL_READ_UINT32(chan->base+AT91_US_CSR, stat);
256 if ( (stat & AT91_US_CSR_RxRDY) != 0 ) {
258 HAL_READ_UINT32(chan->base+AT91_US_RHR, c);
259 ch = (cyg_uint8)(c & 0xff);
260 if( cyg_hal_is_break( &ch , 1 ) )
263 res = CYG_ISR_HANDLED;
266 HAL_INTERRUPT_ACKNOWLEDGE(chan->isr_vector);
268 CYGARC_HAL_RESTORE_GP();
272 static channel_data_t at91_ser_channels[3] = {
273 { (cyg_uint8*)AT91_USART0, 1000, CYGNUM_HAL_INTERRUPT_USART0, CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD},
274 { (cyg_uint8*)AT91_USART1, 1000, CYGNUM_HAL_INTERRUPT_USART1, CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD},
276 { (cyg_uint8*)AT91_USART2, 1000, CYGNUM_HAL_INTERRUPT_USART2, CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD}
281 cyg_hal_plf_serial_init(void)
283 hal_virtual_comm_table_t* comm;
286 cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
289 cyg_hal_plf_serial_init_channel(&at91_ser_channels[0]);
290 #if CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 1
291 cyg_hal_plf_serial_init_channel(&at91_ser_channels[1]);
293 #if CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 2
294 cyg_hal_plf_serial_init_channel(&at91_ser_channels[2]);
296 // Setup procs in the vector table
299 CYGACC_CALL_IF_SET_CONSOLE_COMM(0);
300 comm = CYGACC_CALL_IF_CONSOLE_PROCS();
301 CYGACC_COMM_IF_CH_DATA_SET(*comm, &at91_ser_channels[0]);
302 CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
303 CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
304 CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
305 CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
306 CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
307 CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
308 CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
310 #if CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 1
312 CYGACC_CALL_IF_SET_CONSOLE_COMM(1);
313 comm = CYGACC_CALL_IF_CONSOLE_PROCS();
314 CYGACC_COMM_IF_CH_DATA_SET(*comm, &at91_ser_channels[1]);
315 CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
316 CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
317 CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
318 CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
319 CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
320 CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
321 CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
323 #if CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 2
324 CYGACC_CALL_IF_SET_CONSOLE_COMM(2);
325 comm = CYGACC_CALL_IF_CONSOLE_PROCS();
326 CYGACC_COMM_IF_CH_DATA_SET(*comm, &at91_ser_channels[2]);
327 CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
328 CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
329 CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
330 CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
331 CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
332 CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
333 CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
336 // Restore original console
337 CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
341 cyg_hal_plf_comms_init(void)
343 static int initialized = 0;
350 cyg_hal_plf_serial_init();
354 hal_diag_led(int mask)
356 hal_at91_set_leds(mask);
359 //-----------------------------------------------------------------------------