1 /*==========================================================================
5 // HAL timer code using the Timer Counter
7 //==========================================================================
8 //####ECOSGPLCOPYRIGHTBEGIN####
9 // -------------------------------------------
10 // This file is part of eCos, the Embedded Configurable Operating System.
11 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
12 // Copyright (C) 2003 Nick Garnett <nickg@calivar.com>
14 // eCos is free software; you can redistribute it and/or modify it under
15 // the terms of the GNU General Public License as published by the Free
16 // Software Foundation; either version 2 or (at your option) any later version.
18 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
19 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
20 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
23 // You should have received a copy of the GNU General Public License along
24 // with eCos; if not, write to the Free Software Foundation, Inc.,
25 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
27 // As a special exception, if other files instantiate templates or use macros
28 // or inline functions from this file, or you compile this file and link it
29 // with other works to produce a work based on this file, this file does not
30 // by itself cause the resulting work to be covered by the GNU General Public
31 // License. However the source code for this file must still be made available
32 // in accordance with section (3) of the GNU General Public License.
34 // This exception does not invalidate any other reasons why a work based on
35 // this file might be covered by the GNU General Public License.
36 // -------------------------------------------
37 //####ECOSGPLCOPYRIGHTEND####
38 //==========================================================================
39 //#####DESCRIPTIONBEGIN####
42 // Contributors: gthomas, jskov, nickg, tkoeller
44 // Purpose: HAL board support
45 // Description: Implementations of HAL board interfaces
47 //####DESCRIPTIONEND####
49 //========================================================================*/
51 #include <pkgconf/hal.h>
53 #include <cyg/infra/cyg_type.h> // base types
54 #include <cyg/infra/cyg_ass.h> // assertion macros
56 #include <cyg/hal/hal_io.h> // IO macros
57 #include <cyg/hal/hal_arch.h> // Register state info
58 #include <cyg/hal/hal_intr.h> // necessary?
60 // -------------------------------------------------------------------------
63 static cyg_uint32 _period;
65 void hal_clock_initialize(cyg_uint32 period)
67 CYG_ADDRESS timer = AT91_TC+AT91_TC_TC0;
69 CYG_ASSERT(period < 0x10000, "Invalid clock period");
72 HAL_WRITE_UINT32(timer+AT91_TC_CCR, AT91_TC_CCR_CLKDIS);
75 HAL_WRITE_UINT32(timer+AT91_TC_CMR, AT91_TC_CMR_CPCTRG | // Reset counter on CPC
76 AT91_TC_CMR_CLKS_MCK32); // 1 MHz
77 HAL_WRITE_UINT32(timer+AT91_TC_RC, period);
80 HAL_WRITE_UINT32(timer+AT91_TC_CCR, AT91_TC_CCR_TRIG | AT91_TC_CCR_CLKEN);
82 // Enable timer 0 interrupt
83 HAL_WRITE_UINT32(timer+AT91_TC_IER, AT91_TC_IER_CPC);
86 void hal_clock_reset(cyg_uint32 vector, cyg_uint32 period)
88 CYG_ADDRESS timer = AT91_TC+AT91_TC_TC0;
91 CYG_ASSERT(period < 0x10000, "Invalid clock period");
93 HAL_READ_UINT32(timer+AT91_TC_SR, sr); // Clear interrupt
95 if (period != _period) {
96 hal_clock_initialize(period);
102 void hal_clock_read(cyg_uint32 *pvalue)
104 CYG_ADDRESS timer = AT91_TC+AT91_TC_TC0;
107 HAL_READ_UINT32(timer+AT91_TC_CV, val);
111 // -------------------------------------------------------------------------
113 // Delay for some number of micro-seconds
114 // Use timer #2 in MCLOCK/32 mode.
116 void hal_delay_us(cyg_int32 usecs)
120 #if defined(CYGHWR_HAL_ARM_AT91_JTST)
121 // TC2 is reserved for AD/DA. Use TC1 instead.
122 CYG_ADDRESS timer = AT91_TC+AT91_TC_TC1;
124 CYG_ADDRESS timer = AT91_TC+AT91_TC_TC2;
126 // Calculate how many timer ticks the required number of
127 // microseconds equate to. We do this calculation in 64 bit
128 // arithmetic to avoid overflow.
129 ticks = (((cyg_uint64)usecs) *
130 ((cyg_uint64)CYGNUM_HAL_ARM_AT91_CLOCK_SPEED))/32000000LL;
132 // CYG_ASSERT(ticks < (1 << 16), "Timer overflow");
134 if (ticks > (1 << 16))
135 ticks = (1 << 16) - 1;
141 HAL_WRITE_UINT32(timer+AT91_TC_CCR, AT91_TC_CCR_CLKDIS);
144 HAL_WRITE_UINT32(timer+AT91_TC_CMR, AT91_TC_CMR_CLKS_MCK32); // 1MHz
145 HAL_WRITE_UINT32(timer+AT91_TC_RA, 0);
146 HAL_WRITE_UINT32(timer+AT91_TC_RC, ticks);
148 // Clear status flags
149 HAL_READ_UINT32(timer+AT91_TC_SR, stat);
152 HAL_WRITE_UINT32(timer+AT91_TC_CCR, AT91_TC_CCR_TRIG | AT91_TC_CCR_CLKEN);
154 // Wait for the compare
156 HAL_READ_UINT32(timer+AT91_TC_SR, stat);
157 } while ((stat & AT91_TC_SR_CPC) == 0);