1 #ifndef CYGONCE_HAL_PLATFORM_INTS_H
2 #define CYGONCE_HAL_PLATFORM_INTS_H
3 //==========================================================================
7 // HAL Interrupt and clock assignments for E7T (AEB-2)
9 //==========================================================================
10 //####ECOSGPLCOPYRIGHTBEGIN####
11 // -------------------------------------------
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40 // -------------------------------------------
41 //####ECOSGPLCOPYRIGHTEND####
42 //==========================================================================
43 //#####DESCRIPTIONBEGIN####
46 // Contributors: gthomas
48 // Purpose: Define Interrupt support
49 // Description: The interrupt specifics for the AEB-1 board/platform are
52 // Usage: #include <cyg/hal/hal_platform_ints.h>
56 //####DESCRIPTIONEND####
58 //==========================================================================
60 #define CYGNUM_HAL_INTERRUPT_EXT0 0
61 #define CYGNUM_HAL_INTERRUPT_EXT1 1
62 #define CYGNUM_HAL_INTERRUPT_EXT2 2
63 #define CYGNUM_HAL_INTERRUPT_EXT3 3
64 #define CYGNUM_HAL_INTERRUPT_UART0_TX 4
65 #define CYGNUM_HAL_INTERRUPT_UART0_RX 5
66 #define CYGNUM_HAL_INTERRUPT_UART1_TX 6
67 #define CYGNUM_HAL_INTERRUPT_UART1_RX 7
68 #define CYGNUM_HAL_INTERRUPT_GDMA0 8
69 #define CYGNUM_HAL_INTERRUPT_GDMA1 9
70 #define CYGNUM_HAL_INTERRUPT_TIMER0 10
71 #define CYGNUM_HAL_INTERRUPT_TIMER1 11
72 #define CYGNUM_HAL_INTERRUPT_HDLCA_TX 12
73 #define CYGNUM_HAL_INTERRUPT_HDLCA_RX 13
74 #define CYGNUM_HAL_INTERRUPT_HDLCB_TX 14
75 #define CYGNUM_HAL_INTERRUPT_HDLCB_RX 15
76 #define CYGNUM_HAL_INTERRUPT_ETH_BDMA_TX 16
77 #define CYGNUM_HAL_INTERRUPT_ETH_BDMA_RX 17
78 #define CYGNUM_HAL_INTERRUPT_ETH_MAC_TX 18
79 #define CYGNUM_HAL_INTERRUPT_ETH_MAC_RX 19
80 #define CYGNUM_HAL_INTERRUPT_I2C 20
82 #define CYGNUM_HAL_ISR_MIN 0
83 #define CYGNUM_HAL_ISR_MAX CYGNUM_HAL_INTERRUPT_I2C
84 #define CYGNUM_HAL_ISR_COUNT (CYGNUM_HAL_ISR_MAX - CYGNUM_HAL_ISR_MIN + 1)
86 // The vector used by the Real time clock
87 #define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_TIMER0
90 //----------------------------------------------------------------------------
92 #define HAL_PLATFORM_RESET()
94 #define HAL_PLATFORM_RESET_ENTRY 0x01820000
96 #endif // CYGONCE_HAL_PLATFORM_INTS_H