1 #ifndef CYGONCE_HAL_BOARD_PLATFORM_PLF_MMAP_H
2 #define CYGONCE_HAL_BOARD_PLATFORM_PLF_MMAP_H
3 //=============================================================================
7 // Platform specific memory map support
9 //=============================================================================
10 //####ECOSGPLCOPYRIGHTBEGIN####
11 // -------------------------------------------
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40 // -------------------------------------------
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42 //===========================================================================
44 #include <cyg/hal/hal_misc.h>
45 #include CYGHWR_MEMORY_LAYOUT_H
47 // Get the pagesize for a particular virtual address:
49 // This does not depend on the vaddr.
50 #define HAL_MM_PAGESIZE(vaddr, pagesize) CYG_MACRO_START \
54 // Get the physical address from a virtual address:
55 #define HAL_VIRT_TO_PHYS_ADDRESS(vaddr, paddr) \
57 (paddr) = hal_virt_to_phy(vaddr); \
61 * translate the virtual address of ram space to physical address
62 * It is dependent on the implementation of hal_mmu_init
64 #ifndef RAM_BANK0_SIZE
65 #warning using SDRAM_SIZE for RAM_BANK0_SIZE
66 #define RAM_BANK0_SIZE SDRAM_SIZE
69 static unsigned long __inline__ hal_virt_to_phy(unsigned long virt)
71 if (((virt & 0xF0000000) == CSD0_BASE_ADDR) ||
72 ((virt & 0xF0000000) == UNCACHED_RAM_BASE_VIRT)) {
75 if (virt < SDRAM_SIZE) {
76 return virt | (virt < RAM_BANK0_SIZE ? CSD0_BASE_ADDR : CSD1_BASE_ADDR);
78 if ((virt & 0xF0000000) == UNCACHED_RAM_BASE_VIRT) {
79 if (virt >= RAM_BANK0_SIZE) {
80 virt = virt - CSD0_BASE_ADDR + CSD1_BASE_ADDR - RAM_BANK0_SIZE;
87 * remap the physical address of ram space to uncacheable virtual address space
88 * It is dependent on the implementation of hal_mmu_init
90 static unsigned long __inline__ hal_ioremap_nocache(unsigned long phy)
92 /* 0xb0000000 .. (0xb0000000 + SDRAM_SIZE) is
93 * uncacheable memory space which is mapped to SDRAM
95 if ((phy & 0xF0000000) == CSD0_BASE_ADDR) {
96 phy = (phy - CSD0_BASE_ADDR) | UNCACHED_RAM_BASE_VIRT;
98 if ((phy & 0xF0000000) == CSD1_BASE_ADDR) {
99 phy = (phy - CSD1_BASE_ADDR + CSD0_BASE_ADDR + RAM_BANK0_SIZE) | UNCACHED_RAM_BASE_VIRT;
104 #endif // CYGONCE_HAL_BOARD_PLATFORM_PLF_MMAP_H