1 #ifndef CYGONCE_HAL_SA11X0_PLATFORM_PLF_MMAP_H
2 #define CYGONCE_HAL_SA11X0_PLATFORM_PLF_MMAP_H
3 /*=============================================================================
7 // Platform specific memory map support
9 //=============================================================================
10 //####ECOSGPLCOPYRIGHTBEGIN####
11 // -------------------------------------------
12 // This file is part of eCos, the Embedded Configurable Operating System.
13 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
15 // eCos is free software; you can redistribute it and/or modify it under
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21 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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26 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 // As a special exception, if other files instantiate templates or use macros
29 // or inline functions from this file, or you compile this file and link it
30 // with other works to produce a work based on this file, this file does not
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32 // License. However the source code for this file must still be made available
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40 // -------------------------------------------
41 //####ECOSGPLCOPYRIGHTEND####
42 //=============================================================================
43 //#####DESCRIPTIONBEGIN####
48 // Purpose: Intel SA11x0 series platform-specific memory mapping macros
49 // Description: Macros to convert a cached, virtual address to
50 // 1) an uncached adddress for the same memory (if available)
51 // 2) the equivalent physical address for giving to external
52 // hardware eg. DMA engines.
54 // NB: this mapping is expressed here statically, independent
55 // of the actual mapping installed in the MMAP table. So if
56 // someone changes that, or its initialisation is changed,
57 // then this module must change. This is intended to be
58 // efficient at a cost of generality. It is also intended to
59 // be called with constants (such as &my_struct) as input
60 // args, so that all the work can be done at compile time,
61 // with optimization on.
63 // Usage: #include <cyg/hal/hal_cache.h>
64 // (which includes this file itself)
66 //####DESCRIPTIONEND####
68 //===========================================================================*/
70 #include <cyg/hal/hal_misc.h>
72 // Get the pagesize for a particular virtual address:
74 // This does not depend on the vaddr.
75 #define HAL_MM_PAGESIZE( vaddr, pagesize ) CYG_MACRO_START \
78 // Get the physical address from a virtual address:
80 // Only RAM and ROM are mapped; we just pass through all other values,
81 // rather than detecting nonexistent areas here.
83 #define HAL_VIRT_TO_PHYS_ADDRESS( vaddr, paddr ) CYG_MACRO_START \
84 cyg_uint32 _v_ = (cyg_uint32)(vaddr); \
85 if ( 32 * SZ_1M > _v_ ) /* 32Mb of SDRAM Bank 0 from 0-32Mb */ \
86 _v_ += 0xc00u * SZ_1M; \
87 else if ( 0x500u * SZ_1M > _v_ ) /* Space between RAM and mapped ROM */\
89 else if ( 0x520u * SZ_1M > _v_ ) /* Mapped boot ROM size 32Mb */ \
90 _v_ -= 0x500u * SZ_1M; \
91 else if ( 0xf00u * SZ_1M > _v_ ) /* Space between ROM and mapped I/O */\
93 else if ( 0xf10u * SZ_1M > _v_ ) /* Mapped I/O size 16Mb */ \
94 _v_ = (_v_ - 0xf00u * SZ_1M) + (0x080u * SZ_1M); \
95 else /* Rest of it */ \
100 // Get the virtual address for a physical address:
102 // Only RAM and ROM are mapped; we just pass through all other values,
103 // rather than detecting nonexistent areas here.
105 #define HAL_PHYS_TO_VIRT_ADDRESS( paddr, vaddr ) CYG_MACRO_START \
106 cyg_uint32 _p_ = (cyg_uint32)(paddr); \
107 if ( 32 * SZ_1M > _p_ ) /* 32Mb Boot ROM mapped to 0x500Mb */ \
108 _p_ += 0x500u * SZ_1M; \
109 else if ( 0x080u * SZ_1M > _p_ ) /* Space between ROM and I/O */ \
111 else if ( 0x090u * SZ_1M > _p_ ) /* I/O size 16Mb */ \
112 _p_ = (_p_ - 0x080u * SZ_1M) + (0xf00u * SZ_1M); \
113 else if ( 0xc00u * SZ_1M > _p_ ) /* Space between I/O and SDRAM */ \
115 else if ( 0xc20u * SZ_1M > _p_ ) /* Raw RAM size 32Mb */ \
116 _p_ -= 0xc00u * SZ_1M; \
117 else /* Rest of it */ \
123 // Get a non-cacheable address for accessing the same store as a virtual
124 // (assumed cachable) address:
126 // Only RAM is mapped: ROM is only available cachable, everything else is
127 // not cachable anyway.
129 #define HAL_VIRT_TO_UNCACHED_ADDRESS( vaddr, uaddr ) CYG_MACRO_START \
130 cyg_uint32 _v_ = (cyg_uint32)(vaddr); \
131 if ( 32 * SZ_1M > _v_ ) /* 32Mb of SDRAM Bank 0 from 0-32Mb */ \
132 _v_ += 0xc00u * SZ_1M; \
133 else /* Everything else is already uncacheable or is ROM */ \
137 //---------------------------------------------------------------------------
138 #endif // CYGONCE_HAL_SA11X0_PLATFORM_PLF_MMAP_H