1 #ifndef CYGONCE_HAL_MM_H
2 #define CYGONCE_HAL_MM_H
4 //=============================================================================
8 // ARM SA11x0 MM common definitions
10 //=============================================================================
11 //####ECOSGPLCOPYRIGHTBEGIN####
12 // -------------------------------------------
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41 // -------------------------------------------
42 //####ECOSGPLCOPYRIGHTEND####
43 //=============================================================================
44 //#####DESCRIPTIONBEGIN####
48 // Travis C. Furrer <furrer@mit.edu>
50 // Purpose: ARM SA11x0 MM common definitions
51 // Description: The macros defined here provide common definitions for
52 // memory management initialization.
54 // #include <cyg/hal/hal_mm.h>
58 //####DESCRIPTIONEND####
60 //=============================================================================
63 // -------------------------------------------------------------------------
64 // MMU initialization:
66 // These structures are laid down in memory to define the translation
71 * SA-1100 Translation Table Base Bit Masks
73 #define ARM_TRANSLATION_TABLE_MASK 0xFFFFC000
76 * SA-1100 Domain Access Control Bit Masks
78 #define ARM_ACCESS_TYPE_NO_ACCESS(domain_num) (0x0 << (domain_num)*2)
79 #define ARM_ACCESS_TYPE_CLIENT(domain_num) (0x1 << (domain_num)*2)
80 #define ARM_ACCESS_TYPE_MANAGER(domain_num) (0x3 << (domain_num)*2)
82 struct ARM_MMU_FIRST_LEVEL_FAULT {
84 unsigned int sbz : 30;
86 #define ARM_MMU_FIRST_LEVEL_FAULT_ID 0x0
88 struct ARM_MMU_FIRST_LEVEL_PAGE_TABLE {
91 unsigned int domain : 4;
93 unsigned int base_address : 23;
95 #define ARM_MMU_FIRST_LEVEL_PAGE_TABLE_ID 0x1
97 struct ARM_MMU_FIRST_LEVEL_SECTION {
101 unsigned int imp : 1;
102 unsigned int domain : 4;
103 unsigned int sbz0 : 1;
105 unsigned int sbz1 : 8;
106 unsigned int base_address : 12;
108 #define ARM_MMU_FIRST_LEVEL_SECTION_ID 0x2
110 struct ARM_MMU_FIRST_LEVEL_RESERVED {
112 unsigned int sbz : 30;
114 #define ARM_MMU_FIRST_LEVEL_RESERVED_ID 0x3
116 #define ARM_MMU_FIRST_LEVEL_DESCRIPTOR_ADDRESS(ttb_base, table_index) \
117 (unsigned long *)((unsigned long)(ttb_base) + ((table_index) << 2))
119 #define ARM_FIRST_LEVEL_PAGE_TABLE_SIZE 0x4000
121 #define ARM_MMU_SECTION(ttb_base, actual_base, virtual_base, \
122 cacheable, bufferable, perm) \
124 register union ARM_MMU_FIRST_LEVEL_DESCRIPTOR desc; \
127 desc.section.id = ARM_MMU_FIRST_LEVEL_SECTION_ID; \
128 desc.section.domain = 0; \
129 desc.section.c = (cacheable); \
130 desc.section.b = (bufferable); \
131 desc.section.ap = (perm); \
132 desc.section.base_address = (actual_base); \
133 *ARM_MMU_FIRST_LEVEL_DESCRIPTOR_ADDRESS(ttb_base, (virtual_base)) \
137 #define X_ARM_MMU_SECTION(abase,vbase,size,cache,buff,access) \
138 { int i; int j = abase; int k = vbase; \
139 for (i = size; i > 0 ; i--,j++,k++) \
141 ARM_MMU_SECTION(ttb_base, j, k, cache, buff, access); \
145 union ARM_MMU_FIRST_LEVEL_DESCRIPTOR {
147 struct ARM_MMU_FIRST_LEVEL_FAULT fault;
148 struct ARM_MMU_FIRST_LEVEL_PAGE_TABLE page_table;
149 struct ARM_MMU_FIRST_LEVEL_SECTION section;
150 struct ARM_MMU_FIRST_LEVEL_RESERVED reserved;
153 #define ARM_UNCACHEABLE 0
154 #define ARM_CACHEABLE 1
155 #define ARM_UNBUFFERABLE 0
156 #define ARM_BUFFERABLE 1
158 #define ARM_ACCESS_PERM_NONE_NONE 0
159 #define ARM_ACCESS_PERM_RO_NONE 0
160 #define ARM_ACCESS_PERM_RO_RO 0
161 #define ARM_ACCESS_PERM_RW_NONE 1
162 #define ARM_ACCESS_PERM_RW_RO 2
163 #define ARM_ACCESS_PERM_RW_RW 3
166 * Initialization for the Domain Access Control Register
168 #define ARM_ACCESS_DACR_DEFAULT ( \
169 ARM_ACCESS_TYPE_MANAGER(0) | \
170 ARM_ACCESS_TYPE_NO_ACCESS(1) | \
171 ARM_ACCESS_TYPE_NO_ACCESS(2) | \
172 ARM_ACCESS_TYPE_NO_ACCESS(3) | \
173 ARM_ACCESS_TYPE_NO_ACCESS(4) | \
174 ARM_ACCESS_TYPE_NO_ACCESS(5) | \
175 ARM_ACCESS_TYPE_NO_ACCESS(6) | \
176 ARM_ACCESS_TYPE_NO_ACCESS(7) | \
177 ARM_ACCESS_TYPE_NO_ACCESS(8) | \
178 ARM_ACCESS_TYPE_NO_ACCESS(9) | \
179 ARM_ACCESS_TYPE_NO_ACCESS(10) | \
180 ARM_ACCESS_TYPE_NO_ACCESS(11) | \
181 ARM_ACCESS_TYPE_NO_ACCESS(12) | \
182 ARM_ACCESS_TYPE_NO_ACCESS(13) | \
183 ARM_ACCESS_TYPE_NO_ACCESS(14) | \
184 ARM_ACCESS_TYPE_NO_ACCESS(15) )
186 // ------------------------------------------------------------------------
187 #endif // ifndef CYGONCE_HAL_MM_H