1 #ifndef CYGONCE_HAL_PLF_INTR_H
2 #define CYGONCE_HAL_PLF_INTR_H
4 //==========================================================================
8 // Platform specific interrupt and clock support
11 //==========================================================================
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42 // -------------------------------------------
43 //####ECOSGPLCOPYRIGHTEND####
44 //==========================================================================
46 #include <pkgconf/hal.h>
47 #include <cyg/infra/cyg_type.h>
49 //--------------------------------------------------------------------------
52 /* The vector used by the Real time clock */
54 #define CYGNUM_HAL_INTERRUPT_RTC (CYGNUM_HAL_VECTOR_TMR4)
56 //---------------------------------------------------------------------------
59 /* The mcf5272 has 4 timers 0-3. Define the timer number that we want */
60 /* to use for the OS's clock. */
62 #define CYGNUM_HAL_RTC_TIMER_NUM (3)
64 /* Set the timer to generate 1 ms or 1000000 ns period interrupts. */
66 #define HAL_M68K_MCF52xx_MCF5272_CLOCK_NS 1000000
67 #if CYGNUM_HAL_RTC_PERIOD != HAL_M68K_MCF52xx_MCF5272_CLOCK_NS
68 #warning Unexpected clock period for this board!!!
71 /* Initialize the timer to generate an interrupt every 1 ms. Use the */
72 /* system clock divided by 16 as the source. Using 11*3 as the prescaler */
73 /* gives a 8 us counter. When this counter reaches 125 (1 ms) generate an */
76 #define HAL_CLOCK_INITIALIZE(_period_) \
78 MCF5272_SIM->timer[CYGNUM_HAL_RTC_TIMER_NUM].tmr = 0x0000; \
79 MCF5272_SIM->timer[CYGNUM_HAL_RTC_TIMER_NUM].trr = 125-1; \
80 MCF5272_SIM->timer[CYGNUM_HAL_RTC_TIMER_NUM].tcn = 0; \
81 MCF5272_SIM->timer[CYGNUM_HAL_RTC_TIMER_NUM].ter = 0x0003; \
82 MCF5272_SIM->timer[CYGNUM_HAL_RTC_TIMER_NUM].tmr = \
83 (((3*11)-1) << MCF5272_TIMER_TMR_PS_BIT) | \
84 (0 << MCF5272_TIMER_TMR_CE_BIT) | \
85 (0 << MCF5272_TIMER_TMR_OM_BIT) | \
86 (1 << MCF5272_TIMER_TMR_ORI_BIT) | \
87 (1 << MCF5272_TIMER_TMR_FRR_BIT) | \
88 (2 << MCF5272_TIMER_TMR_CLK_BIT) | \
89 (1 << MCF5272_TIMER_TMR_RST_BIT); \
92 /* We must clear the bit in the timer event register before we can get */
93 /* another interrupt. */
95 #define HAL_CLOCK_RESET( _vector_, _period_ ) \
97 MCF5272_SIM->timer[CYGNUM_HAL_RTC_TIMER_NUM].ter = 0x0002; \
100 /* Read the current counter from the timer. */
102 #define HAL_CLOCK_READ( _pvalue_ ) \
104 *(_pvalue_) = MCF5272_SIM->timer[CYGNUM_HAL_RTC_TIMER_NUM].tcn; \
107 //---------------------------------------------------------------------------
108 #endif // ifndef CYGONCE_HAL_PLF_INTR_H