1 //==========================================================================
2 //####ECOSGPLCOPYRIGHTBEGIN####
3 // -------------------------------------------
4 // This file is part of eCos, the Embedded Configurable Operating System.
5 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
7 // eCos is free software; you can redistribute it and/or modify it under
8 // the terms of the GNU General Public License as published by the Free
9 // Software Foundation; either version 2 or (at your option) any later version.
11 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
12 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 // You should have received a copy of the GNU General Public License along
17 // with eCos; if not, write to the Free Software Foundation, Inc.,
18 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
20 // As a special exception, if other files instantiate templates or use macros
21 // or inline functions from this file, or you compile this file and link it
22 // with other works to produce a work based on this file, this file does not
23 // by itself cause the resulting work to be covered by the GNU General Public
24 // License. However the source code for this file must still be made available
25 // in accordance with section (3) of the GNU General Public License.
27 // This exception does not invalidate any other reasons why a work based on
28 // this file might be covered by the GNU General Public License.
30 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
31 // at http://sources.redhat.com/ecos/ecos-license/
32 // -------------------------------------------
33 //####ECOSGPLCOPYRIGHTEND####
34 //==========================================================================
36 #include <cyg/infra/cyg_type.h>
37 #include <pkgconf/hal.h>
38 #include <cyg/hal/hal_startup.h>
39 #include <cyg/hal/hal_memmap.h>
40 #include <cyg/hal/hal_arch.h>
42 /*****************************************************************************
43 var_init_cache_acr -- Initialize the cache and access control registers
53 *****************************************************************************/
54 static void var_init_cache_acr(void)
57 // Invalidate and disable the cache and ACRs.
59 mcf52xx_wr_cacr((CYG_WORD32)0x01000000);
60 mcf52xx_wr_acr0((CYG_WORD32)0);
61 mcf52xx_wr_acr1((CYG_WORD32)0);
63 // Call a routine to set up the cache and ACRs for this specific
70 /*****************************************************************************
71 var_reset -- Variant-specific reset vector initialization routine
73 This routine must be called with interrupts disabled.
83 *****************************************************************************/
87 // Initialize the processor's vector base register.
89 mcf52xx_wr_vbr((CYG_WORD32)__ramvec_start);
91 // Initialize the cache and access control registers.
95 // Do any processor-specific reset initialization.