packages/hal/mips/atlas/v2_0/include/plf_intr.h

   1 #ifndef CYGONCE_HAL_PLF_INTR_H
   2 #define CYGONCE_HAL_PLF_INTR_H
   3
   4 //==========================================================================
   5 //
   6 //      plf_intr.h
   7 //
   8 //      Atlas Interrupt and clock support
   9 //
  10 //==========================================================================
  11 //####ECOSGPLCOPYRIGHTBEGIN####
  12 // -------------------------------------------
  13 // This file is part of eCos, the Embedded Configurable Operating System.
  14 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
  15 //
  16 // eCos is free software; you can redistribute it and/or modify it under
  17 // the terms of the GNU General Public License as published by the Free
  18 // Software Foundation; either version 2 or (at your option) any later version.
  19 //
  20 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
  21 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
  22 // FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  23 // for more details.
  24 //
  25 // You should have received a copy of the GNU General Public License along
  26 // with eCos; if not, write to the Free Software Foundation, Inc.,
  27 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  28 //
  29 // As a special exception, if other files instantiate templates or use macros
  30 // or inline functions from this file, or you compile this file and link it
  31 // with other works to produce a work based on this file, this file does not
  32 // by itself cause the resulting work to be covered by the GNU General Public
  33 // License. However the source code for this file must still be made available
  34 // in accordance with section (3) of the GNU General Public License.
  35 //
  36 // This exception does not invalidate any other reasons why a work based on
  37 // this file might be covered by the GNU General Public License.
  38 //
  39 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
  40 // at http://sources.redhat.com/ecos/ecos-license/
  41 // -------------------------------------------
  42 //####ECOSGPLCOPYRIGHTEND####
  43 //==========================================================================
  44 //#####DESCRIPTIONBEGIN####
  45 //
  46 // Author(s):    nickg
  47 // Contributors: nickg, jskov,
  48 //               gthomas, jlarmour, dmoseley, michael anburaj <michaelanburaj@hotmail.com>
  49 // Date:         2000-06-06
  50 // Purpose:      Define Interrupt support
  51 // Description:  The macros defined here provide the HAL APIs for handling
  52 //               interrupts and the clock for the Atlas board.
  53 //
  54 // Usage:
  55 //              #include <cyg/hal/plf_intr.h>
  56 //              ...
  57 //
  58 //
  59 //####DESCRIPTIONEND####
  60 //
  61 //==========================================================================
  62
  63 #include <pkgconf/hal.h>
  64
  65 // First an assembly safe part
  66
  67 //--------------------------------------------------------------------------
  68 // Interrupt vectors.
  69
  70 #ifndef CYGHWR_HAL_INTERRUPT_VECTORS_DEFINED
  71
  72 // These are decoded via the IP bits of the cause
  73 // register when an external interrupt is delivered.
  74
  75 #define CYGNUM_HAL_INTERRUPT_SER                 0
  76 #define CYGNUM_HAL_INTERRUPT_TIM0                1
  77 #define CYGNUM_HAL_INTERRUPT_2                   2
  78 #define CYGNUM_HAL_INTERRUPT_3                   3
  79 #define CYGNUM_HAL_INTERRUPT_FPGA_RTC            4
  80 #define CYGNUM_HAL_INTERRUPT_COREHI              5
  81 #define CYGNUM_HAL_INTERRUPT_CORELO              6
  82 #define CYGNUM_HAL_INTERRUPT_7                   7
  83 #define CYGNUM_HAL_INTERRUPT_PCIA                8
  84 #define CYGNUM_HAL_INTERRUPT_PCIB                9
  85 #define CYGNUM_HAL_INTERRUPT_PCIC               10
  86 #define CYGNUM_HAL_INTERRUPT_PCID               11
  87 #define CYGNUM_HAL_INTERRUPT_ENUM               12
  88 #define CYGNUM_HAL_INTERRUPT_DEG                13
  89 #define CYGNUM_HAL_INTERRUPT_ATXFAIL            14
  90 #define CYGNUM_HAL_INTERRUPT_INTA               15
  91 #define CYGNUM_HAL_INTERRUPT_INTB               16
  92 #define CYGNUM_HAL_INTERRUPT_INTC               17
  93 #define CYGNUM_HAL_INTERRUPT_INTD               18
  94 #define CYGNUM_HAL_INTERRUPT_SERR               19
  95 #define CYGNUM_HAL_INTERRUPT_HW1                20
  96 #define CYGNUM_HAL_INTERRUPT_HW2                21
  97 #define CYGNUM_HAL_INTERRUPT_HW3                22
  98 #define CYGNUM_HAL_INTERRUPT_HW4                23
  99 #define CYGNUM_HAL_INTERRUPT_HW5                24
 100
 101 // Min/Max ISR numbers and how many there are
 102 #define CYGNUM_HAL_ISR_MIN                     0
 103 #define CYGNUM_HAL_ISR_MAX                     24
 104 #define CYGNUM_HAL_ISR_COUNT                   25
 105
 106 #define CYGNUM_HAL_INTERRUPT_DEBUG_UART        CYGNUM_HAL_INTERRUPT_SER
 107
 108 #define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_HW5
 109
 110 #define CYGHWR_HAL_INTERRUPT_VECTORS_DEFINED
 111
 112 #endif
 113
 114
 115 //--------------------------------------------------------------------------
 116 #ifndef __ASSEMBLER__
 117
 118 #include <cyg/infra/cyg_type.h>
 119
 120 //--------------------------------------------------------------------------
 121 // Interrupt controller access.
 122
 123 #ifndef CYGHWR_HAL_INTERRUPT_CONTROLLER_ACCESS_DEFINED
 124
 125 // Array which stores the configured priority levels for the configured
 126 // interrupts.
 127 externC volatile CYG_BYTE hal_interrupt_level[CYGNUM_HAL_ISR_COUNT];
 128
 129 #define HAL_INTERRUPT_MASK( _vector_ )                                  \
 130 {                                                                       \
 131     cyg_uint32 __vector = _vector_;                                     \
 132                                                                         \
 133     if( (_vector_) < CYGNUM_HAL_INTERRUPT_HW1 )                         \
 134         HAL_WRITE_UINT32( HAL_ATLAS_INTRSTEN, (1<<(_vector_)) );        \
 135     else                                                                \
 136     {                                                                   \
 137         __vector -= (CYGNUM_HAL_INTERRUPT_HW1-1);                       \
 138                                                                         \
 139         asm volatile (                                                  \
 140             "mfc0   $3,$12\n"                                           \
 141             "la     $2,0x00000400\n"                                    \
 142             "sllv   $2,$2,%0\n"                                         \
 143             "nor    $2,$2,$0\n"                                         \
 144             "and    $3,$3,$2\n"                                         \
 145             "mtc0   $3,$12\n"                                           \
 146             "nop; nop; nop\n"                                           \
 147             :                                                           \
 148             : "r"(__vector)                                             \
 149             : "$2", "$3"                                                \
 150             );                                                          \
 151     }                                                                   \
 152 }
 153
 154 #define HAL_INTERRUPT_UNMASK( _vector_ )                                \
 155 {                                                                       \
 156     cyg_uint32 __vector = _vector_;                                     \
 157                                                                         \
 158     if( (__vector) < CYGNUM_HAL_INTERRUPT_HW1 )                         \
 159     {                                                                   \
 160         HAL_WRITE_UINT32( HAL_ATLAS_INTSETEN, (1<<(__vector)) );        \
 161         __vector = 0;                                                   \
 162     }                                                                   \
 163     else                                                                \
 164         __vector -= (CYGNUM_HAL_INTERRUPT_HW1-1);                       \
 165                                                                         \
 166     asm volatile (                                                      \
 167         "mfc0   $3,$12\n"                                               \
 168         "la     $2,0x00000400\n"                                        \
 169         "sllv   $2,$2,%0\n"                                             \
 170         "or     $3,$3,$2\n"                                             \
 171         "mtc0   $3,$12\n"                                               \
 172         "nop; nop; nop\n"                                               \
 173         :                                                               \
 174         : "r"(__vector)                                                 \
 175         : "$2", "$3"                                                    \
 176         );                                                              \
 177 }
 178
 179 #define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ )           \
 180 {                                                       \
 181     cyg_uint32 __vector = _vector_;                     \
 182                                                         \
 183     if( __vector >= CYGNUM_HAL_INTERRUPT_HW1 )          \
 184         __vector -= (CYGNUM_HAL_INTERRUPT_HW1-1);       \
 185     else                                                \
 186         __vector = 0;                                   \
 187                                                         \
 188     asm volatile (                                      \
 189         "mfc0   $3,$13\n"                               \
 190         "la     $2,0x00000400\n"                        \
 191         "sllv   $2,$2,%0\n"                             \
 192         "nor    $2,$2,$0\n"                             \
 193         "and    $3,$3,$2\n"                             \
 194         "mtc0   $3,$13\n"                               \
 195         "nop; nop; nop\n"                               \
 196         :                                               \
 197         : "r"(__vector)                                 \
 198         : "$2", "$3"                                    \
 199         );                                              \
 200                                                         \
 201 }
 202
 203 #define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ )   \
 204 {                                                            \
 205 }
 206
 207 #define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ )         \
 208 {                                                            \
 209 }
 210
 211 #define CYGHWR_HAL_INTERRUPT_CONTROLLER_ACCESS_DEFINED
 212
 213 #endif
 214
 215
 216 //--------------------------------------------------------------------------
 217 // Control-C support.
 218
 219 #if defined(CYGDBG_HAL_MIPS_DEBUG_GDB_CTRLC_SUPPORT)
 220
 221 # define CYGHWR_HAL_GDB_PORT_VECTOR CYGNUM_HAL_INTERRUPT_SER
 222
 223 externC cyg_uint32 hal_ctrlc_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data);
 224
 225 # define HAL_CTRLC_ISR hal_ctrlc_isr
 226
 227 #endif
 228
 229
 230 //----------------------------------------------------------------------------
 231 // Reset.
 232 #ifndef CYGHWR_HAL_RESET_DEFINED
 233 extern void hal_atlas_reset( void );
 234 #define CYGHWR_HAL_RESET_DEFINED
 235 #define HAL_PLATFORM_RESET()             hal_atlas_reset()
 236
 237 #define HAL_PLATFORM_RESET_ENTRY 0xbfc00000
 238
 239 #endif // CYGHWR_HAL_RESET_DEFINED
 240
 241 #endif // __ASSEMBLER__
 242
 243 //--------------------------------------------------------------------------
 244 #endif // ifndef CYGONCE_HAL_PLF_INTR_H
 245 // End of plf_intr.h