1 2004-04-22 Jani Monoses <jani@iv.ro>
3 * cdl/hal_mips_vr4300.cdl :
4 Invoke tail with stricter syntax that works in latest coreutils.
6 2003-04-10 Nick Garnett <nickg@balti.calivar.com>
9 Added libsupc++.a to GROUP() directive for GCC versions later than
12 2001-12-05 Nick Garnett <nickg@redhat.com>
14 * include/variant.inc: Add ifdef around cache clearing code to
15 only do this in non-RAM-startup configurations. If this is done in
16 a RAM-startup configuration, it can play merry havoc with the
17 state of things like RedBoot's network stack.
18 We now assume, for RAM applications, that our loader has
19 initialized the cache.
21 2001-10-12 Nick Garnett <nickg@redhat.com>
23 * src/mips_vr4300.ld (SECTION_rom_vectors): Updated this section
24 to make ROM startup work.
25 Note: this still does not fix all ROM startup problems, since the
26 ROM is still too slow to execute code from at anything like a
29 2001-10-01 Jonathan Larmour <jlarmour@redhat.com>
31 * cdl/hal_mips_vr4300.cdl: Define endianness in platform CDL instead.
33 2001-09-10 Nick Garnett <nickg@redhat.com>
35 * src/mips_vr4300.ld: Added .2ram sections to data section needed
38 2001-09-07 Nick Garnett <nickg@redhat.com>
40 * include/variant.inc: Added definition of INITIAL_SR_VAR.
42 * include/var_arch.h (CYG_HAL_GDB_REG): Returned GDB registers to
45 * cdl/hal_mips_vr4300.cdl: Added endianness configuration.
46 Currently the VRC4373 platform is big endian for historical
47 reasons, while the VRC4375 platform is little endian.
49 2000-09-01 Jonathan Larmour <jlarmour@redhat.com>
51 * include/var_arch.h (CYG_HAL_GDB_REG): vr4300 GDB stubs now use
52 32-bits internally to represent registers
54 2000-06-21 Nick Garnett <nickg@cygnus.co.uk>
57 Switched to new table definition mechanism.
59 2000-02-23 Jonathan Larmour <jlarmour@redhat.co.uk>
61 * include/var_cache.h: Don't need to conditionalize on vr4300
63 2000-02-16 Jesper Skov <jskov@redhat.com>
65 * cdl/hal_mips_vr4300.cdl: removed fix me
67 2000-01-28 Gary Thomas <gthomas@cygnus.co.uk>
69 * src/mips_vr4300.ld: Add support for network package.
71 2000-01-14 Nick Garnett <nickg@cygnus.co.uk>
73 * include/pkgconf/hal_mips_vr4300.h:
74 Added define for CYGHWR_HAL_MIPS_64BIT so that all vr4300 targets
75 save and restore 64 bit register values.
77 * cdl/hal_mips_vr4300.cdl:
78 Added option for CYGHWR_HAL_MIPS_64BIT so that all vr4300 targets
79 save and restore 64 bit register values.
81 1999-12-21 Jonathan Larmour <jlarmour@cygnus.co.uk>
83 * cdl/hal_mips_vr4300.cdl: Some cosmetic layout changes and fixed typos
84 Ensure we "puts" to correct CDL header
86 1999-12-02 John Dallaway <jld@cygnus.co.uk>
88 * cdl/hal_mips_vr4300.cdl:
90 Use the <PACKAGE> token in custom rules.
92 1999-12-01 John Dallaway <jld@cygnus.co.uk>
94 * cdl/hal_mips_vr4300.cdl:
96 Use the <PREFIX> token in custom rules.
98 1999-11-04 John Dallaway <jld@cygnus.co.uk>
100 * cdl/hal_mips_vr4300.cdl:
102 Output custom rule dependency information to .deps files in
103 the current directory.
105 Dispense with the need to create a 'src' sub-directory.
107 1999-11-02 Jesper Skov <jskov@cygnus.co.uk>
109 * cdl/hal_mips_vr4300.cdl: Added.
111 1999-10-25 Nick Garnett <nickg@cygnus.co.uk>
113 * include/var_cache.h: The single nop added on 10-21 seems to
114 cause exceptions on the vrc4373 board but not on others. Extended
115 this to three nops, which seem to work on all boards.
117 1999-10-22 Nick Garnett <nickg@cygnus.co.uk>
119 * include/var_intr.h: Removed superfluous placeholder ifdef.
121 1999-10-21 Nick Garnett <nickg@cygnus.co.uk>
123 * include/var_cache.h: Added an extra nop after reading the
124 config0 register. In some boards we get an exception when reloading
125 it if we don't have this here. Something to do with coprocessor
128 1999-10-06 Jonathan Larmour <jlarmour@cygnus.co.uk>
130 * src/PKGconf.mak: Don't create extras.o here any more
132 1999-10-05 Nick Garnett <nickg@cygnus.co.uk>
134 * src/PKGconf.mak: Switched link command for libextras over to big
137 * include/pkgconf/hal_mips_vr4300.h: Added definition of
138 CYGPKG_HAL_MIPS_MSBFIRST.
140 * include/variant.inc: Set BE bit in config0 register depending on
141 definitions of CYGPKG_HAL_MIPS_[L|M]SBFIRST.
143 1999-09-09 Nick Garnett <nickg@cygnus.co.uk>
145 * src/mips_vr4300.ld:
146 Extended size of .rom_vectors section to 0x800 bytes for ROMRAM
147 startup so that when it is copied down into RAM, the VSR and
148 vector tables are zeroed automatically.
150 * include/variant.inc:
151 Moved cache macros here so that code to initialize the caches is
154 1999-09-08 Jonathan Larmour <jlarmour@cygnus.co.uk>
156 * src/mips_vr4300.ld: Discard debug vector - it doesn't exist on the
159 1999-08-05 Jonathan Larmour <jlarmour@cygnus.co.uk>
161 * include/variant.inc: VR4300 is a mips 3 processor, so always allow
164 1999-07-15 Jonathan Larmour <jlarmour@cygnus.co.uk>
166 * include/variant.inc: Rename CYG_HAL_MIPS_FSR_INIT to
167 CYG_HAL_MIPS_FCSR_INIT since that's closer to its documented name
169 1999-07-09 Jonathan Larmour <jlarmour@cygnus.co.uk>
171 * include/var_cache.h: Define HAL_ICACHE_IS_ENABLED() to be the same
172 as HAL_DCACHE_IS_ENABLED()
174 1999-06-25 Nick Garnett <nickg@cygnus.co.uk>
176 * include/variant.inc:
177 Added initializer for FPU FSR register.
179 1999-06-17 Nick Garnett <nickg@cygnus.co.uk>
181 * include/var_cache.h: Added defines to disable generic code for
182 cache lock support in hal_cache.h. The vr4300 does not have cache
185 1999-06-17 Jesper Skov <jskov@cygnus.co.uk>
187 * src/mips_vr4300.ld: Removed below workaround.
189 1999-06-16 Jesper Skov <jskov@cygnus.co.uk>
191 * src/mips_vr4300.ld: Suppress .mdebug in the final output.
193 1999-05-28 Nick Garnett <nickg@cygnus.co.uk>
195 * src/mips_vr4300.ld:
196 Removed references to CYG_HAL_STARTUP_STUBS
198 1999-05-27 Nick Garnett <nickg@cygnus.co.uk>
200 * include/var_cache.h (HAL_DCACHE_IS_ENABLED): Added an
201 implementation of this macro.
203 1999-05-21 Nick Garnett <nickg@cygnus.co.uk>
205 * src/var_misc.c (hal_variant_init): Added enables for caches.
207 * src/mips_vr4300.ld: Added definition of SECTION_rom_vectors()
208 for ROMRAM and STUBS startups.
210 * include/variant.inc: Added an initial value for config0.
212 * include/var_cache.h: Added enable and disable macros for data
213 and instruction caches.
215 1999-05-13 Nick Garnett <nickg@cygnus.co.uk>
217 Imported whole directory tree into main trunk of repository.
219 1999-05-11 Nick Garnett <nickg@cygnus.co.uk>
222 * include/imp_arch.h:
223 * include/imp_intr.h:
224 * include/imp_cache.h:
227 * include/var_arch.h:
228 * include/var_intr.h:
229 * include/var_cache.h:
230 * include/variant.inc:
233 "Imp" and "Impl" files renamed to "var" and "variant" equivalents.
235 * include/pkgconf/hal_vr4300.h
236 * include/pkgconf/hal_mips_vr4300.h
237 Config file hal_vr4300.h renamed to hal_mips_vr4300.h so that it
238 matches the name synthesized by pkgconf.tcl.
240 * src/mips_vr4300.ld:
241 Moved VSR table and vector table to 0x800XXXXX.
243 1999-05-11 Gary Thomas <gthomas@cygnus.co.uk>
246 * src/mips_vr4300.ld: Change CTOR sort order - fixes problems
247 with uItron initialization.
249 1999-04-29 Nick Garnett <nickg@cygnus.co.uk>
252 * src/mips_vr4300.ld: Added definitions of hal_vsr_table and
253 hal_virtual_vector_table. These are currently at 0x806XXXXX but
254 will be moved to 0x800XXXXX when we can make proper ROMs.
256 1999-04-27 John Dallaway <jld@cygnus.co.uk>
259 * src/PKGconf.mak: Force generation of little-endian extras.o
261 1999-04-23 Nick Garnett <nickg@cygnus.co.uk>
264 * include/pkgconf/hal_vr4300.h: Added some CPU characterization
265 definitions for the benefit of the generic mips HAL.
267 * include/imp_arch.h: Added this file. It contains configuration
268 and redefinitions for stuff in hal_arch.h.
270 1999-04-21 Nick Garnett <nickg@cygnus.co.uk>
273 * src/imp_misc.c: Added this file to contain
274 hal_implementation_init().
276 * src/PKGconf.mak (COMPILE): Added imp_misc.c.
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