1 //==========================================================================
5 // HAL platform miscellaneous functions
7 //==========================================================================
8 //####ECOSGPLCOPYRIGHTBEGIN####
9 // -------------------------------------------
10 // This file is part of eCos, the Embedded Configurable Operating System.
11 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
13 // eCos is free software; you can redistribute it and/or modify it under
14 // the terms of the GNU General Public License as published by the Free
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19 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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24 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
26 // As a special exception, if other files instantiate templates or use macros
27 // or inline functions from this file, or you compile this file and link it
28 // with other works to produce a work based on this file, this file does not
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30 // License. However the source code for this file must still be made available
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34 // this file might be covered by the GNU General Public License.
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37 // at http://sources.redhat.com/ecos/ecos-license/
38 // -------------------------------------------
39 //####ECOSGPLCOPYRIGHTEND####
40 //==========================================================================
41 //#####DESCRIPTIONBEGIN####
44 // Contributors: nickg, jlarmour, dhowells
46 // Purpose: HAL miscellaneous functions
47 // Description: This file contains miscellaneous functions provided by the
50 //####DESCRIPTIONEND####
52 //========================================================================*/
54 #include <pkgconf/hal.h>
56 #include <cyg/infra/cyg_type.h> // Base types
57 #include <cyg/infra/cyg_trac.h> // tracing macros
58 #include <cyg/infra/cyg_ass.h> // assertion macros
60 #include <cyg/hal/hal_arch.h> // architectural definitions
62 #include <cyg/hal/hal_intr.h> // Interrupt handling
64 #include <cyg/hal/hal_cache.h> // Cache handling
66 #include <cyg/hal/hal_if.h>
67 #include <cyg/hal/hal_misc.h>
69 #include <cyg/hal/plf_io.h>
71 /*------------------------------------------------------------------------*/
73 cyg_uint8 cyg_hal_plf_led_val(CYG_WORD hexdig)
75 static cyg_uint8 map[] = {
93 return map[(hexdig & 0xF)];
96 /*------------------------------------------------------------------------*/
98 void hal_platform_init(void)
100 HAL_WRITE_UINT8(HAL_LED_ADDRESS, cyg_hal_plf_led_val(8));
102 #if defined(CYG_HAL_STARTUP_ROM)
103 // Note that the hardware seems to come up with the
104 // caches containing random data. Hence they must be
105 // invalidated before being enabled.
106 // However, we only do this if we are in ROM. If we are
107 // in RAM, then we leave the caches in the state chosen
108 // by the ROM monitor. If we enable them when the monitor
109 // is not expecting it, we can end up breaking things if the
110 // monitor is not doing cache flushes.
112 //HAL_ICACHE_INVALIDATE_ALL();
113 //HAL_ICACHE_ENABLE();
114 //HAL_DCACHE_INVALIDATE_ALL();
115 //HAL_DCACHE_ENABLE();
118 // Set up eCos/ROM interfaces
121 #if defined(CYGPKG_KERNEL) && \
122 defined(CYGFUN_HAL_COMMON_KERNEL_SUPPORT) && \
123 defined(CYGSEM_HAL_USE_ROM_MONITOR_GDB_stubs)
125 extern void patch_dbg_syscalls(void * vector);
126 patch_dbg_syscalls( (void *)(&hal_virtual_vector_table[0]) );
129 #if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT)
131 static void hal_ctrlc_isr_init(void);
132 hal_ctrlc_isr_init();
137 /*------------------------------------------------------------------------*/
138 /* Control C ISR support */
140 #if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) && \
141 !defined(CYGSEM_HAL_VIRTUAL_VECTOR_SUPPORT)
143 #if CYGHWR_HAL_MN10300_AM33_STB_GDB_PORT == 0
145 // We use serial0 on AM33
146 #define SERIAL_CR ((volatile cyg_uint16 *)0xd4002000)
147 #define SERIAL_ICR ((volatile cyg_uint8 *) 0xd4002004)
148 #define SERIAL_TXR ((volatile cyg_uint8 *) 0xd4002008)
149 #define SERIAL_RXR ((volatile cyg_uint8 *) 0xd4002009)
150 #define SERIAL_SR ((volatile cyg_uint16 *)0xd400200c)
152 // Timer 1 provided baud rate divisor
153 #define TIMER_MD ((volatile cyg_uint8 *)0xd4003000)
154 #define TIMER_BR ((volatile cyg_uint8 *)0xd4003010)
155 #define TIMER_CR ((volatile cyg_uint8 *)0xd4003020)
157 #define SIO_LSTAT_TRDY 0x20
158 #define SIO_LSTAT_RRDY 0x10
162 #error Unsupported GDB port
166 struct Hal_SavedRegisters *hal_saved_interrupt_state;
168 static void hal_ctrlc_isr_init(void)
172 // HAL_READ_UINT16( SERIAL_CR, cr );
174 // HAL_WRITE_UINT16( SERIAL_CR, cr );
175 HAL_INTERRUPT_SET_LEVEL( CYGHWR_HAL_GDB_PORT_VECTOR, 4 );
176 HAL_INTERRUPT_UNMASK( CYGHWR_HAL_GDB_PORT_VECTOR );
179 cyg_uint32 hal_ctrlc_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data)
184 HAL_INTERRUPT_ACKNOWLEDGE( CYGHWR_HAL_GDB_PORT_VECTOR );
186 HAL_READ_UINT16( SERIAL_SR, sr );
188 if( sr & SIO_LSTAT_RRDY )
190 HAL_READ_UINT8( SERIAL_RXR, c);
192 if( cyg_hal_is_break( &c , 1 ) )
193 cyg_hal_user_break( (CYG_ADDRWORD *)hal_saved_interrupt_state );
202 /*------------------------------------------------------------------------*/
203 /* End of plf_misc.c */