1 ##=============================================================================
5 ## CSB281 board hardware setup
7 ##=============================================================================
8 #####ECOSGPLCOPYRIGHTBEGIN####
9 ## -------------------------------------------
10 ## This file is part of eCos, the Embedded Configurable Operating System.
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12 ## Copyright (C) 2002, 2003 Gary Thomas
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39 ## -------------------------------------------
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41 ##=============================================================================
42 #######DESCRIPTIONBEGIN####
47 ## Purpose: CSB281 board hardware setup
48 ## Description: This file contains any code needed to initialize the
49 ## hardware on a Cogent CSB281 (PowerPC 8245) board.
51 ######DESCRIPTIONEND####
53 ##=============================================================================
55 #include <pkgconf/system.h>
56 #include <pkgconf/hal.h>
57 #include <pkgconf/hal_powerpc.h>
58 #include <pkgconf/hal_powerpc_csb281.h>
60 #include <cyg/hal/arch.inc> /* register symbols et al */
61 #include <cyg/hal/ppc_regs.h> /* on-chip resource layout, special */
63 #------------------------------------------------------------------------------
65 // LED macro uses r23, r25: r4 left alone
83 #------------------------------------------------------------------------------
85 FUNC_START( hal_hardware_init )
87 // Basic hardware initialization
89 bl 10f // Gets position independent address of table
91 #ifndef CYG_HAL_STARTUP_RAM
92 .long 0x80000080, 0x00000000 // MSAR1 - SDRAM Bank 0 start
93 .long 0x80000090, 0x0000003F // MEAR1 - SDRAM Bank 0 end
94 .long 0x800000A0, 0x00000001 // MBEN1 - SDRAM Bank 1 enable
95 .long 0x800000F0, 0x88000000 // MCCR1 - SDRAM control (no GO)
96 .long 0x800000F4, 0x1E00023C // MCCR2 - Timing
97 .long 0x800000F8, 0xB6000000 // MCCR3
98 .long 0x800000FC, 0x35B03334 // MCCR4
99 .long 0x800000F0, 0x88080000 // MCCR1 - SDRAM control (GO)
100 .long 0x800000D0, 0xB4000000 // ERCR1
101 .long 0x800000D4, 0xBCF7B1E3 // ERCR2
102 .long 0x800000D8, 0x7000000D // RCS2 - 0x70000000..0x71FFFFFF
103 .long 0x800000DC, 0x7800000D // RCS3 - 0x78000000..0x79FFFFFF
105 .long 0x80000078, _CSB281_EUMBBAR // EUMBBAR - machine registers
106 .long 0x800000A8, 0xFF141110 // PICR1 - RCS0 local, Big Endian, DEC/TB
107 .long 0x800000AC, 0x08000000 // PICR2
108 .long 0x80000070, 0x0000001A // ODCR - SDRAM driver control
111 mflr r3 // Pointer to initialization table
113 lwi r4,_CSB281_PCI_CONFIG_ADDR
114 lwi r5,_CSB281_PCI_CONFIG_DATA
115 20: lwzu r6,4(r3) // Register address
116 lwzu r7,4(r3) // Data
118 beq 30f // end of table?
119 stwbrx r6,0,r4 // Set address
120 stwbrx r7,0,r5 // value
124 # set the decrementer to maxint
129 #ifdef CYG_HAL_STARTUP_ROMRAM
130 // Copy image from ROM to RAM
133 lwi r5,0x00FFFFFF // ROM/FLASH base
134 and r3,r3,r5 // segment relative
135 lwi r6,_hal_hardware_init_done
137 sub r6,r3,r6 // Absolute address
138 add r6,r6,r4 // FLASH address
139 lwi r7,0 // where to copy to
140 lwi r8,__ram_data_end
150 FUNC_END( hal_hardware_init )
152 #------------------------------------------------------------------------------