1 #ifndef CYGONCE_HAL_PLATFORM_INC
2 #define CYGONCE_HAL_PLATFORM_INC
3 ##=============================================================================
7 ## SH/CQ7708 board assembler header file
9 ##=============================================================================
10 #####ECOSGPLCOPYRIGHTBEGIN####
11 ## -------------------------------------------
12 ## This file is part of eCos, the Embedded Configurable Operating System.
13 ## Copyright (C) 2003 Bart Veer
14 ## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
16 ## eCos is free software; you can redistribute it and/or modify it under
17 ## the terms of the GNU General Public License as published by the Free
18 ## Software Foundation; either version 2 or (at your option) any later version.
20 ## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
21 ## WARRANTY; without even the implied warranty of MERCHANTABILITY or
22 ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
25 ## You should have received a copy of the GNU General Public License along
26 ## with eCos; if not, write to the Free Software Foundation, Inc.,
27 ## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
29 ## As a special exception, if other files instantiate templates or use macros
30 ## or inline functions from this file, or you compile this file and link it
31 ## with other works to produce a work based on this file, this file does not
32 ## by itself cause the resulting work to be covered by the GNU General Public
33 ## License. However the source code for this file must still be made available
34 ## in accordance with section (3) of the GNU General Public License.
36 ## This exception does not invalidate any other reasons why a work based on
37 ## this file might be covered by the GNU General Public License.
39 ## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
40 ## at http://sources.redhat.com/ecos/ecos-license/
41 ## -------------------------------------------
42 #####ECOSGPLCOPYRIGHTEND####
43 ##=============================================================================
44 #######DESCRIPTIONBEGIN####
49 ## Purpose: SH/CQ7708 board definitions.
50 ## Description: This file contains various definitions and macros that are
51 ## useful for writing assembly code for the SH/CQ7708 board.
53 ## #include <cyg/hal/platform.inc>
57 ######DESCRIPTIONEND####
59 ##=============================================================================
61 #include <pkgconf/hal.h>
63 #include <cyg/hal/sh_offsets.inc>
64 #include <cyg/hal/sh_regs.h>
66 #------------------------------------------------------------------------------
67 # Hardware initialization.
69 .macro hal_hardware_init
70 // Set up the Bus State Controller
71 mova BSC_settings_table,r0
73 1: mov.w @r3+,r0 // Address (or zero)
78 mov.w r1,@r0 // delay slot
83 # These are the settings set by the ROM Monitor.
85 .word (CYGARC_REG_FRQCR & 0x0000FFFF)
86 .word CYGARC_REG_FRQCR_INIT
88 # BCR1: Areas 3 are SDRAM
89 .word (CYGARC_REG_BCR1 & 0x0000FFFF)
91 # BCR2: Bus size of areas 2,4 are 8 bits
92 .word (CYGARC_REG_BCR2 & 0x0000FFFF)
94 # WCR1: 3 wait-state cycles inserted for all areas
95 .word (CYGARC_REG_WCR1 & 0x0000FFFF)
97 # WCR2: cs0=8wait cs1=0wait cs2=0wait cs3=2wait cs4=4wait */
98 .word (CYGARC_REG_WCR2 & 0x0000FFFF)
100 # MCR: dram setting 10 bit
101 .word (CYGARC_REG_MCR & 0x0000FFFF)
103 # RTCSR: refresh timer control
104 .word (CYGARC_REG_RTCSR & 0x0000FFFF)
105 .word (0xa500 | 0x0010)
106 # RTCOR: refresh time constant
107 .word (CYGARC_REG_RTCOR & 0x0000FFFF)
108 .word (0xa500 | 0x003a)
117 #------------------------------------------------------------------------------
118 # Monitor initialization.
120 #ifndef CYGPKG_HAL_SH_MON_DEFINED
122 #if defined(CYG_HAL_STARTUP_ROM) || \
123 ( defined(CYG_HAL_STARTUP_RAM) && \
124 !defined(CYGSEM_HAL_USE_ROM_MONITOR))
126 # If we are starting up from ROM, or we are starting in
127 # RAM and NOT using a ROM monitor, initialize the VSR table.
130 mov.l $hal_vsr_table,r3
131 # Write exception vectors
132 mov.l $cyg_hal_default_exception_vsr,r4
133 mov #CYGNUM_HAL_VSR_EXCEPTION_COUNT,r5
138 # Write interrupt vector
139 mov.l $cyg_hal_default_interrupt_vsr,r4
140 mov.l $hal_vsr_table,r3
141 add #CYGNUM_HAL_VECTOR_INTERRUPT*4,r3
147 SYM_PTR_REF(cyg_hal_default_exception_vsr)
148 SYM_PTR_REF(cyg_hal_default_interrupt_vsr)
149 SYM_PTR_REF(hal_vsr_table)
153 #elif defined(CYG_HAL_STARTUP_RAM) && defined(CYGSEM_HAL_USE_ROM_MONITOR)
155 # Initialize the VSR table entries
156 # We only take control of the interrupt vector,
157 # the rest are left to the ROM for now...
160 # Write interrupt vector
161 mov.l $hal_vsr_table,r3
162 mov.l $cyg_hal_default_interrupt_vsr,r4
163 add #CYGNUM_HAL_VECTOR_INTERRUPT*4,r3
169 SYM_PTR_REF(cyg_hal_default_interrupt_vsr)
170 SYM_PTR_REF(hal_vsr_table)
182 #define CYGPKG_HAL_SH_MON_DEFINED
184 #endif // CYGPKG_HAL_SH_MON_DEFINED
186 #endif // CYGONCE_HAL_PLATFORM_INC