1 #ifndef CYGONCE_VAR_SH_REGS_H
2 #define CYGONCE_VAR_SH_REGS_H
3 //=============================================================================
9 //=============================================================================
10 //####ECOSGPLCOPYRIGHTBEGIN####
11 // -------------------------------------------
12 // This file is part of eCos, the Embedded Configurable Operating System.
13 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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21 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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40 // -------------------------------------------
41 //####ECOSGPLCOPYRIGHTEND####
42 //=============================================================================
43 //#####DESCRIPTIONBEGIN####
48 // Purpose: Define CPU memory mapped registers etc.
49 // Usage: #include <cyg/hal/sh_regs.h>
51 // This file describes registers for on-core modules found in all
52 // the SH3 CPUs supported by the HAL. For each CPU is defined a
53 // module specification file (mod_<CPU model number>.h) which lists
54 // modules (and their version if applicable) included in that
55 // particular CPU model. Note that the versioning is ad hoc;
56 // it doesn't reflect Hitachi internal versioning in any way.
58 //####DESCRIPTIONEND####
60 //=============================================================================
62 // Find out which modules are supported by the chosen CPU
63 #include <pkgconf/system.h>
64 #include CYGBLD_HAL_CPU_MODULES_H
66 //==========================================================================
68 //==========================================================================
70 //--------------------------------------------------------------------------
72 #define CYGARC_REG_SR_MD 0x40000000
73 #define CYGARC_REG_SR_RB 0x20000000
74 #define CYGARC_REG_SR_BL 0x10000000
75 #define CYGARC_REG_SR_M 0x00000200
76 #define CYGARC_REG_SR_Q 0x00000100
77 #define CYGARC_REG_SR_IMASK 0x000000f0
78 #define CYGARC_REG_SR_I3 0x00000080
79 #define CYGARC_REG_SR_I2 0x00000040
80 #define CYGARC_REG_SR_I1 0x00000020
81 #define CYGARC_REG_SR_I0 0x00000010
82 #define CYGARC_REG_SR_S 0x00000002
83 #define CYGARC_REG_SR_T 0x00000001
86 //==========================================================================
88 //==========================================================================
90 #include <cyg/hal/mod_regs_bsc.h>
91 #include <cyg/hal/mod_regs_cac.h>
92 #include <cyg/hal/mod_regs_cpg.h>
93 #include <cyg/hal/mod_regs_intc.h>
94 #include <cyg/hal/mod_regs_mmu.h>
95 #include <cyg/hal/mod_regs_rtc.h>
96 #include <cyg/hal/mod_regs_ser.h>
97 #include <cyg/hal/mod_regs_tmu.h>
98 #include <cyg/hal/mod_regs_ubc.h>
100 #ifdef CYGARC_SH_MOD_DMAC
101 #include <cyg/hal/mod_regs_dma.h>
103 #ifdef CYGARC_SH_MOD_PFC
104 #include <cyg/hal/mod_regs_pfc.h>
107 //--------------------------------------------------------------------------
108 #endif // ifndef CYGONCE_VAR_SH_REGS_H