1 //=============================================================================
5 // UBC (user break controller) Module register definitions
7 //=============================================================================
8 //####ECOSGPLCOPYRIGHTBEGIN####
9 // -------------------------------------------
10 // This file is part of eCos, the Embedded Configurable Operating System.
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13 // eCos is free software; you can redistribute it and/or modify it under
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27 // or inline functions from this file, or you compile this file and link it
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38 // -------------------------------------------
39 //####ECOSGPLCOPYRIGHTEND####
40 //=============================================================================
41 //#####DESCRIPTIONBEGIN####
47 //####DESCRIPTIONEND####
49 //=============================================================================
51 //--------------------------------------------------------------------------
53 #define CYGARC_REG_BARA 0xFF200000 // 32 bit
54 #define CYGARC_REG_BAMRA 0xFF200004 // 8 bit
55 #define CYGARC_REG_BBRA 0xFF200008 // 16 bit
56 #define CYGARC_REG_BARB 0xFF20000C // 32 bit
57 #define CYGARC_REG_BAMRB 0xFF200010 // 8 bit
59 #define CYGARC_REG_BBRB 0xFF200014 // 16 bit
60 #define CYGARC_REG_BDRB 0xFF200018 // 32 bit
61 #define CYGARC_REG_BDMRB 0xFF20001C // 32 bit
63 #define CYGARC_REG_BRCR 0xFF200020 // 16 bit
66 #define CYGARC_REG_BRCR_CMFA 0x8000 // condition match flag A
67 #define CYGARC_REG_BRCR_CMFB 0x4000 // condition match flag B
68 #define CYGARC_REG_BRCR_PCBA 0x0400 // post execute channel A
69 #define CYGARC_REG_BRCR_DBEB 0x0080 // data break enable B
70 #define CYGARC_REG_BRCR_PCBB 0x0040 // post execute channel B
71 #define CYGARC_REG_BRCR_SEQ 0x0008 // sequence condition select
72 #define CYGARC_REG_BRCR_UBDE 0x0001 // User Break Debug Enable
73 #define CYGARC_REG_BRCR_ONE_STEP (CYGARC_REG_BRCR_PCBA)
75 #if defined(CYGARC_SH_MOD_UBC) && (CYGARC_SH_MOD_UBC == 1)
76 #define CYGARC_REG_BAMRA_BASMA 0x04 // BASRA masked
77 #define CYGARC_REG_BAMRA_BARA_10BIT 0x01 // Lowest 10 bit masked
78 #define CYGARC_REG_BAMRA_BARA_12BIT 0x02 // Lowest 12 bit masked
79 #define CYGARC_REG_BAMRA_BARA_MASKED 0x03 // All bits masked
80 #define CYGARC_REG_BAMRA_BARA_16BIT 0x08 // Lowest 16 bit masked
81 #define CYGARC_REG_BAMRA_BARA_20BIT 0x09 // Lowest 20 bit masked
83 #define CYGARC_REG_BAMRA_BARA_UNMASKED (0x00|CYGARC_REG_BAMRA_BASMA) // BARA not masked, ignore ASID
86 // mask is fully configurable in other versions of the UBC
89 #define CYGARC_REG_BBRA_DFETCH 0x0020 // Break on DFETCH
90 #define CYGARC_REG_BBRA_IFETCH 0x0010 // Break on IFETCH
91 #define CYGARC_REG_BBRA_WRITE 0x0008 // Break on WRITE
92 #define CYGARC_REG_BBRA_READ 0x0004 // Break on READ
93 #define CYGARC_REG_BBRA_SIZE_QUAD 0x0040 // Break on quad word access
94 #define CYGARC_REG_BBRA_SIZE_LONG 0x0003 // Break on long word access
95 #define CYGARC_REG_BBRA_SIZE_WORD 0x0002 // Break on word access
96 #define CYGARC_REG_BBRA_SIZE_BYTE 0x0001 // Break on byte access
97 #define CYGARC_REG_BBRA_SIZE_ANY 0x0000 // Break on any size