2 * Copyright (c) 1999, 2002 Greg Haerr <greg@censoft.com>
3 * Copyright (c) 1991 David I. Bell
4 * Permission is granted to use, distribute, or modify this source,
5 * provided that this copyright notice remains intact.
7 * Alternate EGA/VGA Screen Driver Init, direct hw programming
13 #define ROMFONT 0 /* =0 no bios rom fonts available*/
18 #define ROMFONT 1 /* =1 uses PC rom fonts */
22 /* Define one and only one of the following to be nonzero*/
23 #define VGA_ET4000 0 /* TSENG LABS ET4000 chip 800x600*/
24 #define VGA_STANDARD 1 /* standard VGA 640x480*/
25 #define EGA_STANDARD 0 /* standard EGA 640x350*/
31 #define RAM_SCAN_LINES 32 /* number of scan lines in fonts in RAM */
32 #define FONT_CHARS 256 /* number of characters in font tables */
33 #define CHAR_WIDTH 8 /* number of pixels for character width */
48 #define DATA_ROTATE 3 /* register number for data rotate */
60 extern FARADDR rom_char_addr; /* address of ROM font*/
61 extern int ROM_CHAR_HEIGHT; /* ROM character height*/
65 extern REGIO graphics_on[];
66 extern REGIO graph_off[];
69 void ega_hwinit(void);
70 void ega_hwterm(void);
73 static void writeregs(REGIO *rp);
74 static void out_word(unsigned int p,unsigned int d);
75 static void setmode(int mode);
80 writeregs(graphics_on);
88 /* Copy character table from ROM back into bit plane 2 before turning
91 out_word(SEQREG, 0x0100); /* syn reset */
92 out_word(SEQREG, 0x0402); /* cpu writes only to map 2 */
93 out_word(SEQREG, 0x0704); /* sequential addressing */
94 out_word(SEQREG, 0x0300); /* clear synchronous reset */
96 out_word(GRREG, 0x0204); /* select map 2 for CPU reads */
97 out_word(GRREG, 0x0005); /* disable odd-even addressing */
107 srcoffset = rom_char_addr;
108 destoffset = EGA_BASE;
109 for (ch = 0; ch < FONT_CHARS; ch++) {
110 for(row = 0; row < ROM_CHAR_HEIGHT; row++) {
111 data = GETBYTE_FP(srcoffset++);
112 PUTBYTE_FP(destoffset++, data);
114 destoffset += (RAM_SCAN_LINES - ROM_CHAR_HEIGHT);
119 /* Finally set the registers back for text mode. */
120 writeregs(graph_off);
123 /* Set the graphics registers as indicated by the given table */
127 for (; rp->action != DONE; rp++) {
128 switch (rp->action) {
133 HAL_READ_UINT8(rp->port1, x);
140 outp(rp->port1, rp->data1);
142 outp(rp->port2, rp->data2);
148 /* Output a word to an I/O port. */
150 out_word(unsigned int p,unsigned int d)
153 outp(p + 1, (d >> 8) & 0xff);
157 /* Values for the data rotate register to implement drawing modes. */
158 static unsigned char mode_table[MWMODE_MAX + 1] = {
159 0x00, 0x18, 0x10, 0x08, /* COPY, XOR, AND, OR implemented*/
160 0x00, 0x00, 0x00, 0x00, /* no VGA HW for other modes*/
161 0x00, 0x00, 0x00, 0x00,
162 0x00, 0x00, 0x00, 0x00,
165 /* Set the drawing mode.
166 * This is either SET, OR, AND, or XOR.
171 if (mode > MWMODE_MAX)
173 outp(GRREG, DATA_ROTATE);
174 outp(GRVAL, mode_table[mode]);
180 /* VGA 800x600 16-color graphics (BIOS mode 0x29).
182 static REGIO graphics_on[] = {
184 IN, ATTRREG, 0, 0, 0,
186 /* Disable palette */
187 OUT, PALREG, 0, 0, 0,
189 /* Reset sequencer regs */
190 OUT, SEQREG, 0, SEQVAL, 0,
191 OUT, SEQREG, 1, SEQVAL, 1,
192 OUT, SEQREG, 2, SEQVAL, 0x0f,
193 OUT, SEQREG, 3, SEQVAL, 0,
194 OUT, SEQREG, 4, SEQVAL, 6,
197 OUT, GENREG1, 0xe3, 0, 0,
199 /* Sequencer enable */
200 OUT, SEQREG, 0, SEQVAL, 0x03,
202 /* Unprotect crtc regs 0-7 */
203 OUT, CRTCREG, 0x11, CRTCVAL, 0,
206 OUT, CRTCREG, 0, CRTCVAL, 0x7a,
207 OUT, CRTCREG, 1, CRTCVAL, 0x63,
208 OUT, CRTCREG, 2, CRTCVAL, 0x64,
209 OUT, CRTCREG, 3, CRTCVAL, 0x1d,
210 OUT, CRTCREG, 4, CRTCVAL, 0x68,
211 OUT, CRTCREG, 5, CRTCVAL, 0x9a,
212 OUT, CRTCREG, 6, CRTCVAL, 0x78,
213 OUT, CRTCREG, 7, CRTCVAL, 0xf0,
214 OUT, CRTCREG, 8, CRTCVAL, 0x00,
215 OUT, CRTCREG, 9, CRTCVAL, 0x60,
216 OUT, CRTCREG, 10, CRTCVAL, 0x00,
217 OUT, CRTCREG, 11, CRTCVAL, 0x00,
218 OUT, CRTCREG, 12, CRTCVAL, 0x00,
219 OUT, CRTCREG, 13, CRTCVAL, 0x00,
220 OUT, CRTCREG, 14, CRTCVAL, 0x00,
221 OUT, CRTCREG, 15, CRTCVAL, 0x00,
222 OUT, CRTCREG, 16, CRTCVAL, 0x5c,
223 OUT, CRTCREG, 17, CRTCVAL, 0x8e,
224 OUT, CRTCREG, 18, CRTCVAL, 0x57,
225 OUT, CRTCREG, 19, CRTCVAL, 0x32,
226 OUT, CRTCREG, 20, CRTCVAL, 0x00,
227 OUT, CRTCREG, 21, CRTCVAL, 0x5b,
228 OUT, CRTCREG, 22, CRTCVAL, 0x75,
229 OUT, CRTCREG, 23, CRTCVAL, 0xc3,
230 OUT, CRTCREG, 24, CRTCVAL, 0xff,
232 /* Graphics controller */
233 OUT, GENREG2, 0x00, 0, 0,
234 OUT, GENREG3, 0x01, 0, 0,
235 OUT, GRREG, 0, GRVAL, 0x00,
236 OUT, GRREG, 1, GRVAL, 0x00,
237 OUT, GRREG, 2, GRVAL, 0x00,
238 OUT, GRREG, 3, GRVAL, 0x00,
239 OUT, GRREG, 4, GRVAL, 0x00,
240 OUT, GRREG, 5, GRVAL, 0x00,
241 OUT, GRREG, 6, GRVAL, 0x05,
242 OUT, GRREG, 7, GRVAL, 0x0f,
243 OUT, GRREG, 8, GRVAL, 0xff,
245 /* Reset attribute flip/flop */
246 IN, ATTRREG, 0, 0, 0,
249 OUT, PALREG, 0, PALREG, 0x00,
250 OUT, PALREG, 1, PALREG, 0x01,
251 OUT, PALREG, 2, PALREG, 0x02,
252 OUT, PALREG, 3, PALREG, 0x03,
253 OUT, PALREG, 4, PALREG, 0x04,
254 OUT, PALREG, 5, PALREG, 0x05,
255 OUT, PALREG, 6, PALREG, 0x06,
256 OUT, PALREG, 7, PALREG, 0x07,
257 OUT, PALREG, 8, PALREG, 0x38,
258 OUT, PALREG, 9, PALREG, 0x39,
259 OUT, PALREG, 10, PALREG, 0x3a,
260 OUT, PALREG, 11, PALREG, 0x3b,
261 OUT, PALREG, 12, PALREG, 0x3c,
262 OUT, PALREG, 13, PALREG, 0x3d,
263 OUT, PALREG, 14, PALREG, 0x3e,
264 OUT, PALREG, 15, PALREG, 0x3f,
265 OUT, PALREG, 16, PALREG, 0x01,
266 OUT, PALREG, 17, PALREG, 0x00,
267 OUT, PALREG, 18, PALREG, 0x0f,
268 OUT, PALREG, 19, PALREG, 0x00,
271 OUT, PALREG, 0x20, 0, 0,
278 /* VGA 80x25 text (BIOS mode 3).
280 static REGIO graph_off[] = {
282 IN, ATTRREG, 0, 0, 0,
284 /* Disable palette */
285 OUT, PALREG, 0, 0, 0,
287 /* Reset sequencer regs */
288 OUT, SEQREG, 0, SEQVAL, 1,
289 OUT, SEQREG, 1, SEQVAL, 1,
290 OUT, SEQREG, 2, SEQVAL, 3,
291 OUT, SEQREG, 3, SEQVAL, 0,
292 OUT, SEQREG, 4, SEQVAL, 2,
295 OUT, GENREG1, 0x63, 0, 0,
297 /* Sequencer enable */
298 OUT, SEQREG, 0, SEQVAL, 3,
300 /* Unprotect crtc regs 0-7 */
301 OUT, CRTCREG, 0x11, CRTCVAL, 0,
304 OUT, CRTCREG, 0, CRTCVAL, 0x5f, /* horiz total */
305 OUT, CRTCREG, 1, CRTCVAL, 0x4f, /* horiz end */
306 OUT, CRTCREG, 2, CRTCVAL, 0x50, /* horiz blank */
307 OUT, CRTCREG, 3, CRTCVAL, 0x82, /* end blank */
308 OUT, CRTCREG, 4, CRTCVAL, 0x55, /* horiz retrace */
309 OUT, CRTCREG, 5, CRTCVAL, 0x81, /* end retrace */
310 OUT, CRTCREG, 6, CRTCVAL, 0xbf, /* vert total */
311 OUT, CRTCREG, 7, CRTCVAL, 0x1f, /* overflows */
312 OUT, CRTCREG, 8, CRTCVAL, 0x00, /* row scan */
313 OUT, CRTCREG, 9, CRTCVAL, 0x4f, /* max scan line */
314 OUT, CRTCREG, 10, CRTCVAL, 0x00, /* cursor start */
315 OUT, CRTCREG, 11, CRTCVAL, 0x0f, /* cursor end */
316 OUT, CRTCREG, 12, CRTCVAL, 0x0e, /* start high addr */
317 OUT, CRTCREG, 13, CRTCVAL, 0xb0, /* low addr */
318 OUT, CRTCREG, 14, CRTCVAL, 0x16, /* cursor high */
319 OUT, CRTCREG, 15, CRTCVAL, 0x30, /* cursor low */
320 OUT, CRTCREG, 16, CRTCVAL, 0x9c, /* vert retrace */
321 OUT, CRTCREG, 17, CRTCVAL, 0x8e, /* retrace end */
322 OUT, CRTCREG, 18, CRTCVAL, 0x8f, /* vert end */
323 OUT, CRTCREG, 19, CRTCVAL, 0x28, /* offset */
324 OUT, CRTCREG, 20, CRTCVAL, 0x1f, /* underline */
325 OUT, CRTCREG, 21, CRTCVAL, 0x96, /* vert blank */
326 OUT, CRTCREG, 22, CRTCVAL, 0xb9, /* end blank */
327 OUT, CRTCREG, 23, CRTCVAL, 0xa3, /* crt mode */
328 OUT, CRTCREG, 24, CRTCVAL, 0xff, /* line compare */
330 /* Graphics controller */
331 OUT, GENREG2, 0x00, 0, 0,
332 OUT, GENREG3, 0x01, 0, 0,
333 OUT, GRREG, 0, GRVAL, 0x00,
334 OUT, GRREG, 1, GRVAL, 0x00,
335 OUT, GRREG, 2, GRVAL, 0x00,
336 OUT, GRREG, 3, GRVAL, 0x00,
337 OUT, GRREG, 4, GRVAL, 0x00,
338 OUT, GRREG, 5, GRVAL, 0x10,
339 OUT, GRREG, 6, GRVAL, 0x0e,
340 OUT, GRREG, 7, GRVAL, 0x00,
341 OUT, GRREG, 8, GRVAL, 0xff,
343 /* Reset attribute flip/flop */
344 IN, ATTRREG, 0, 0, 0,
347 OUT, PALREG, 0, PALREG, 0x00,
348 OUT, PALREG, 1, PALREG, 0x01,
349 OUT, PALREG, 2, PALREG, 0x02,
350 OUT, PALREG, 3, PALREG, 0x03,
351 OUT, PALREG, 4, PALREG, 0x04,
352 OUT, PALREG, 5, PALREG, 0x05,
353 OUT, PALREG, 6, PALREG, 0x06,
354 OUT, PALREG, 7, PALREG, 0x07,
355 OUT, PALREG, 8, PALREG, 0x10,
356 OUT, PALREG, 9, PALREG, 0x11,
357 OUT, PALREG, 10, PALREG, 0x12,
358 OUT, PALREG, 11, PALREG, 0x13,
359 OUT, PALREG, 12, PALREG, 0x14,
360 OUT, PALREG, 13, PALREG, 0x15,
361 OUT, PALREG, 14, PALREG, 0x16,
362 OUT, PALREG, 15, PALREG, 0x17,
363 OUT, PALREG, 16, PALREG, 0x08,
364 OUT, PALREG, 17, PALREG, 0x00,
365 OUT, PALREG, 18, PALREG, 0x0f,
366 OUT, PALREG, 19, PALREG, 0x00,
369 OUT, PALREG, 0x20, 0, 0,
380 /* VGA 640x480 16-color graphics (BIOS mode 0x12).
382 static REGIO graphics_on[] = {
384 IN, ATTRREG, 0, 0, 0,
386 /* Disable palette */
387 OUT, PALREG, 0, 0, 0,
389 /* Reset sequencer regs */
390 OUT, SEQREG, 0, SEQVAL, 0,
391 OUT, SEQREG, 1, SEQVAL, 1,
392 OUT, SEQREG, 2, SEQVAL, 0x0f,
393 OUT, SEQREG, 3, SEQVAL, 0,
394 OUT, SEQREG, 4, SEQVAL, 6,
397 OUT, GENREG1, 0xe3, 0, 0,
399 /* Sequencer enable */
400 OUT, SEQREG, 0, SEQVAL, 0x03,
402 /* Unprotect crtc regs 0-7 */
403 OUT, CRTCREG, 0x11, CRTCVAL, 0,
406 OUT, CRTCREG, 0, CRTCVAL, 0x5f,
407 OUT, CRTCREG, 1, CRTCVAL, 0x4f,
408 OUT, CRTCREG, 2, CRTCVAL, 0x50,
409 OUT, CRTCREG, 3, CRTCVAL, 0x82,
410 OUT, CRTCREG, 4, CRTCVAL, 0x54,
411 OUT, CRTCREG, 5, CRTCVAL, 0x80,
412 OUT, CRTCREG, 6, CRTCVAL, 0x0b,
413 OUT, CRTCREG, 7, CRTCVAL, 0x3e,
414 OUT, CRTCREG, 8, CRTCVAL, 0x00,
415 OUT, CRTCREG, 9, CRTCVAL, 0x40,
416 OUT, CRTCREG, 10, CRTCVAL, 0x00,
417 OUT, CRTCREG, 11, CRTCVAL, 0x00,
418 OUT, CRTCREG, 12, CRTCVAL, 0x00,
419 OUT, CRTCREG, 13, CRTCVAL, 0x00,
420 OUT, CRTCREG, 14, CRTCVAL, 0x00,
421 OUT, CRTCREG, 15, CRTCVAL, 0x59,
422 OUT, CRTCREG, 16, CRTCVAL, 0xea,
423 OUT, CRTCREG, 17, CRTCVAL, 0x8c,
424 OUT, CRTCREG, 18, CRTCVAL, 0xdf,
425 OUT, CRTCREG, 19, CRTCVAL, 0x28,
426 OUT, CRTCREG, 20, CRTCVAL, 0x00,
427 OUT, CRTCREG, 21, CRTCVAL, 0xe7,
428 OUT, CRTCREG, 22, CRTCVAL, 0x04,
429 OUT, CRTCREG, 23, CRTCVAL, 0xe3,
430 OUT, CRTCREG, 24, CRTCVAL, 0xff,
432 /* Graphics controller */
433 OUT, GENREG2, 0x00, 0, 0,
434 OUT, GENREG3, 0x01, 0, 0,
435 OUT, GRREG, 0, GRVAL, 0x00,
437 // bartv: the original value 0x00 appeared to leave all planes disabled.
438 OUT, GRREG, 1, GRVAL, 0x00,
440 OUT, GRREG, 1, GRVAL, 0x0F,
442 OUT, GRREG, 2, GRVAL, 0x00,
443 OUT, GRREG, 3, GRVAL, 0x00,
444 OUT, GRREG, 4, GRVAL, 0x00,
445 OUT, GRREG, 5, GRVAL, 0x00,
446 OUT, GRREG, 6, GRVAL, 0x05,
447 OUT, GRREG, 7, GRVAL, 0x0f,
448 OUT, GRREG, 8, GRVAL, 0xff,
450 /* Reset attribute flip/flop */
451 IN, ATTRREG, 0, 0, 0,
454 OUT, PALREG, 0, PALREG, 0x00,
455 OUT, PALREG, 1, PALREG, 0x01,
456 OUT, PALREG, 2, PALREG, 0x02,
457 OUT, PALREG, 3, PALREG, 0x03,
458 OUT, PALREG, 4, PALREG, 0x04,
459 OUT, PALREG, 5, PALREG, 0x05,
460 OUT, PALREG, 6, PALREG, 0x06,
461 OUT, PALREG, 7, PALREG, 0x07,
462 OUT, PALREG, 8, PALREG, 0x38,
463 OUT, PALREG, 9, PALREG, 0x39,
464 OUT, PALREG, 10, PALREG, 0x3a,
465 OUT, PALREG, 11, PALREG, 0x3b,
466 OUT, PALREG, 12, PALREG, 0x3c,
467 OUT, PALREG, 13, PALREG, 0x3d,
468 OUT, PALREG, 14, PALREG, 0x3e,
469 OUT, PALREG, 15, PALREG, 0x3f,
470 OUT, PALREG, 16, PALREG, 0x01,
471 OUT, PALREG, 17, PALREG, 0x00,
472 OUT, PALREG, 18, PALREG, 0x0f,
473 OUT, PALREG, 19, PALREG, 0x00,
476 OUT, PALREG, 0x20, 0, 0,
483 /* VGA 80x25 text (BIOS mode 3).
485 static REGIO graph_off[] = {
487 IN, ATTRREG, 0, 0, 0,
489 /* Disable palette */
490 OUT, PALREG, 0, 0, 0,
492 /* Reset sequencer regs */
493 OUT, SEQREG, 0, SEQVAL, 1,
494 OUT, SEQREG, 1, SEQVAL, 1,
495 OUT, SEQREG, 2, SEQVAL, 3,
496 OUT, SEQREG, 3, SEQVAL, 0,
497 OUT, SEQREG, 4, SEQVAL, 2,
500 OUT, GENREG1, 0x63, 0, 0,
502 /* Sequencer enable */
503 OUT, SEQREG, 0, SEQVAL, 3,
505 /* Unprotect crtc regs 0-7 */
506 OUT, CRTCREG, 0x11, CRTCVAL, 0,
509 OUT, CRTCREG, 0, CRTCVAL, 0x5f, /* horiz total */
510 OUT, CRTCREG, 1, CRTCVAL, 0x4f, /* horiz end */
511 OUT, CRTCREG, 2, CRTCVAL, 0x50, /* horiz blank */
512 OUT, CRTCREG, 3, CRTCVAL, 0x82, /* end blank */
513 OUT, CRTCREG, 4, CRTCVAL, 0x55, /* horiz retrace */
514 OUT, CRTCREG, 5, CRTCVAL, 0x81, /* end retrace */
515 OUT, CRTCREG, 6, CRTCVAL, 0xbf, /* vert total */
516 OUT, CRTCREG, 7, CRTCVAL, 0x1f, /* overflows */
517 OUT, CRTCREG, 8, CRTCVAL, 0x00, /* row scan */
518 OUT, CRTCREG, 9, CRTCVAL, 0x4f, /* max scan line */
519 OUT, CRTCREG, 10, CRTCVAL, 0x00, /* cursor start */
520 OUT, CRTCREG, 11, CRTCVAL, 0x0f, /* cursor end */
521 OUT, CRTCREG, 12, CRTCVAL, 0x0e, /* start high addr */
522 OUT, CRTCREG, 13, CRTCVAL, 0xb0, /* low addr */
523 OUT, CRTCREG, 14, CRTCVAL, 0x16, /* cursor high */
524 OUT, CRTCREG, 15, CRTCVAL, 0x30, /* cursor low */
525 OUT, CRTCREG, 16, CRTCVAL, 0x9c, /* vert retrace */
526 OUT, CRTCREG, 17, CRTCVAL, 0x8e, /* retrace end */
527 OUT, CRTCREG, 18, CRTCVAL, 0x8f, /* vert end */
528 OUT, CRTCREG, 19, CRTCVAL, 0x28, /* offset */
529 OUT, CRTCREG, 20, CRTCVAL, 0x1f, /* underline */
530 OUT, CRTCREG, 21, CRTCVAL, 0x96, /* vert blank */
531 OUT, CRTCREG, 22, CRTCVAL, 0xb9, /* end blank */
532 OUT, CRTCREG, 23, CRTCVAL, 0xa3, /* crt mode */
533 OUT, CRTCREG, 24, CRTCVAL, 0xff, /* line compare */
535 /* Graphics controller */
536 OUT, GENREG2, 0x00, 0, 0,
537 OUT, GENREG3, 0x01, 0, 0,
538 OUT, GRREG, 0, GRVAL, 0x00,
539 OUT, GRREG, 1, GRVAL, 0x00,
540 OUT, GRREG, 2, GRVAL, 0x00,
541 OUT, GRREG, 3, GRVAL, 0x00,
542 OUT, GRREG, 4, GRVAL, 0x00,
543 OUT, GRREG, 5, GRVAL, 0x10,
544 OUT, GRREG, 6, GRVAL, 0x0e,
545 OUT, GRREG, 7, GRVAL, 0x00,
546 OUT, GRREG, 8, GRVAL, 0xff,
548 /* Reset attribute flip/flop */
549 IN, ATTRREG, 0, 0, 0,
552 OUT, PALREG, 0, PALREG, 0x00,
553 OUT, PALREG, 1, PALREG, 0x01,
554 OUT, PALREG, 2, PALREG, 0x02,
555 OUT, PALREG, 3, PALREG, 0x03,
556 OUT, PALREG, 4, PALREG, 0x04,
557 OUT, PALREG, 5, PALREG, 0x05,
558 OUT, PALREG, 6, PALREG, 0x06,
559 OUT, PALREG, 7, PALREG, 0x07,
560 OUT, PALREG, 8, PALREG, 0x10,
561 OUT, PALREG, 9, PALREG, 0x11,
562 OUT, PALREG, 10, PALREG, 0x12,
563 OUT, PALREG, 11, PALREG, 0x13,
564 OUT, PALREG, 12, PALREG, 0x14,
565 OUT, PALREG, 13, PALREG, 0x15,
566 OUT, PALREG, 14, PALREG, 0x16,
567 OUT, PALREG, 15, PALREG, 0x17,
568 OUT, PALREG, 16, PALREG, 0x08,
569 OUT, PALREG, 17, PALREG, 0x00,
570 OUT, PALREG, 18, PALREG, 0x0f,
571 OUT, PALREG, 19, PALREG, 0x00,
574 OUT, PALREG, 0x20, 0, 0,
585 /* EGA 640x350 16-color graphics (BIOS mode 0x10).
587 static REGIO graphics_on[] = {
589 IN, ATTRREG, 0, 0, 0,
591 /* Disable palette */
592 OUT, PALREG, 0, 0, 0,
594 /* Reset sequencer regs */
595 OUT, SEQREG, 0, SEQVAL, 0,
596 OUT, SEQREG, 1, SEQVAL, 1,
597 OUT, SEQREG, 2, SEQVAL, 0x0f,
598 OUT, SEQREG, 3, SEQVAL, 0,
599 OUT, SEQREG, 4, SEQVAL, 6,
602 OUT, GENREG1, 0xa7, 0, 0,
604 /* Sequencer enable */
605 OUT, SEQREG, 0, SEQVAL, 0x03,
607 /* Unprotect crtc regs 0-7 */
608 OUT, CRTCREG, 0x11, CRTCVAL, 0,
611 OUT, CRTCREG, 0, CRTCVAL, 0x5b,
612 OUT, CRTCREG, 1, CRTCVAL, 0x4f,
613 OUT, CRTCREG, 2, CRTCVAL, 0x53,
614 OUT, CRTCREG, 3, CRTCVAL, 0x37,
615 OUT, CRTCREG, 4, CRTCVAL, 0x52,
616 OUT, CRTCREG, 5, CRTCVAL, 0x00,
617 OUT, CRTCREG, 6, CRTCVAL, 0x6c,
618 OUT, CRTCREG, 7, CRTCVAL, 0x1f,
619 OUT, CRTCREG, 8, CRTCVAL, 0x00,
620 OUT, CRTCREG, 9, CRTCVAL, 0x00,
621 OUT, CRTCREG, 10, CRTCVAL, 0x00,
622 OUT, CRTCREG, 11, CRTCVAL, 0x00,
623 OUT, CRTCREG, 12, CRTCVAL, 0x00,
624 OUT, CRTCREG, 13, CRTCVAL, 0x00,
625 OUT, CRTCREG, 14, CRTCVAL, 0x00,
626 OUT, CRTCREG, 15, CRTCVAL, 0x00,
627 OUT, CRTCREG, 16, CRTCVAL, 0x5e,
628 OUT, CRTCREG, 17, CRTCVAL, 0x2b,
629 OUT, CRTCREG, 18, CRTCVAL, 0x5d,
630 OUT, CRTCREG, 19, CRTCVAL, 0x28,
631 OUT, CRTCREG, 20, CRTCVAL, 0x0f,
632 OUT, CRTCREG, 21, CRTCVAL, 0x5f,
633 OUT, CRTCREG, 22, CRTCVAL, 0x0a,
634 OUT, CRTCREG, 23, CRTCVAL, 0xe3,
635 OUT, CRTCREG, 24, CRTCVAL, 0xff,
637 /* Graphics controller */
638 OUT, GENREG2, 0x00, 0, 0,
639 OUT, GENREG3, 0x01, 0, 0,
640 OUT, GRREG, 0, GRVAL, 0x00,
641 OUT, GRREG, 1, GRVAL, 0x00,
642 OUT, GRREG, 2, GRVAL, 0x00,
643 OUT, GRREG, 3, GRVAL, 0x00,
644 OUT, GRREG, 4, GRVAL, 0x00,
645 OUT, GRREG, 5, GRVAL, 0x00,
646 OUT, GRREG, 6, GRVAL, 0x05,
647 OUT, GRREG, 7, GRVAL, 0x0f,
648 OUT, GRREG, 8, GRVAL, 0xff,
650 /* Reset attribute flip/flop */
651 IN, ATTRREG, 0, 0, 0,
654 OUT, PALREG, 0, PALREG, 0x00,
655 OUT, PALREG, 1, PALREG, 0x01,
656 OUT, PALREG, 2, PALREG, 0x02,
657 OUT, PALREG, 3, PALREG, 0x03,
658 OUT, PALREG, 4, PALREG, 0x04,
659 OUT, PALREG, 5, PALREG, 0x05,
660 OUT, PALREG, 6, PALREG, 0x06,
661 OUT, PALREG, 7, PALREG, 0x07,
662 OUT, PALREG, 8, PALREG, 0x38,
663 OUT, PALREG, 9, PALREG, 0x39,
664 OUT, PALREG, 10, PALREG, 0x3a,
665 OUT, PALREG, 11, PALREG, 0x3b,
666 OUT, PALREG, 12, PALREG, 0x3c,
667 OUT, PALREG, 13, PALREG, 0x3d,
668 OUT, PALREG, 14, PALREG, 0x3e,
669 OUT, PALREG, 15, PALREG, 0x3f,
670 OUT, PALREG, 16, PALREG, 0x01,
671 OUT, PALREG, 17, PALREG, 0x00,
672 OUT, PALREG, 18, PALREG, 0x0f,
673 OUT, PALREG, 19, PALREG, 0x00,
676 OUT, PALREG, 0x20, 0, 0,
683 /* EGA 80x25 text (BIOS mode 3).
685 static REGIO graph_off[] = {
687 IN, ATTRREG, 0, 0, 0,
689 /* Disable palette */
690 OUT, PALREG, 0, 0, 0,
692 /* Reset sequencer regs */
693 OUT, SEQREG, 0, SEQVAL, 1,
694 OUT, SEQREG, 1, SEQVAL, 1,
695 OUT, SEQREG, 2, SEQVAL, 3,
696 OUT, SEQREG, 3, SEQVAL, 0,
697 OUT, SEQREG, 4, SEQVAL, 3,
700 OUT, GENREG1, 0xa7, 0, 0,
702 /* Sequencer enable */
703 OUT, SEQREG, 0, SEQVAL, 3,
706 OUT, CRTCREG, 0, CRTCVAL, 0x5b, /* horiz total */
707 OUT, CRTCREG, 1, CRTCVAL, 0x4f, /* horiz end */
708 OUT, CRTCREG, 2, CRTCVAL, 0x53, /* horiz blank */
709 OUT, CRTCREG, 3, CRTCVAL, 0x37, /* end blank */
710 OUT, CRTCREG, 4, CRTCVAL, 0x51, /* horiz retrace */
711 OUT, CRTCREG, 5, CRTCVAL, 0x5b, /* end retrace */
712 OUT, CRTCREG, 6, CRTCVAL, 0x6c, /* vert total */
713 OUT, CRTCREG, 7, CRTCVAL, 0x1f, /* overflows */
714 OUT, CRTCREG, 8, CRTCVAL, 0x00, /* row scan */
715 OUT, CRTCREG, 9, CRTCVAL, 0x0d, /* max scan line */
716 OUT, CRTCREG, 10, CRTCVAL, 0x00, /* cursor start */
717 OUT, CRTCREG, 11, CRTCVAL, 0x0f, /* cursor end */
718 OUT, CRTCREG, 12, CRTCVAL, 0x00, /* start high addr */
719 OUT, CRTCREG, 13, CRTCVAL, 0x00, /* low addr */
720 OUT, CRTCREG, 14, CRTCVAL, 0x00, /* cursor high */
721 OUT, CRTCREG, 15, CRTCVAL, 0x00, /* cursor low */
722 OUT, CRTCREG, 16, CRTCVAL, 0x5e, /* vert retrace */
723 OUT, CRTCREG, 17, CRTCVAL, 0x2b, /* retrace end */
724 OUT, CRTCREG, 18, CRTCVAL, 0x5d, /* vert end */
725 OUT, CRTCREG, 19, CRTCVAL, 0x28, /* offset */
726 OUT, CRTCREG, 20, CRTCVAL, 0x0f, /* underline */
727 OUT, CRTCREG, 21, CRTCVAL, 0x5e, /* vert blank */
728 OUT, CRTCREG, 22, CRTCVAL, 0x0a, /* end blank */
729 OUT, CRTCREG, 23, CRTCVAL, 0xa3, /* crt mode */
730 OUT, CRTCREG, 24, CRTCVAL, 0xff, /* line compare */
732 /* Graphics controller */
733 OUT, GENREG2, 0x00, 0, 0,
734 OUT, GENREG3, 0x01, 0, 0,
735 OUT, GRREG, 0, GRVAL, 0x00,
736 OUT, GRREG, 1, GRVAL, 0x00,
737 OUT, GRREG, 2, GRVAL, 0x00,
738 OUT, GRREG, 3, GRVAL, 0x00,
739 OUT, GRREG, 4, GRVAL, 0x00,
740 OUT, GRREG, 5, GRVAL, 0x10,
741 OUT, GRREG, 6, GRVAL, 0x0e,
742 OUT, GRREG, 7, GRVAL, 0x00,
743 OUT, GRREG, 8, GRVAL, 0xff,
745 /* Reset attribute flip/flop */
746 IN, ATTRREG, 0, 0, 0,
749 OUT, PALREG, 0, PALREG, 0x00,
750 OUT, PALREG, 1, PALREG, 0x01,
751 OUT, PALREG, 2, PALREG, 0x02,
752 OUT, PALREG, 3, PALREG, 0x03,
753 OUT, PALREG, 4, PALREG, 0x04,
754 OUT, PALREG, 5, PALREG, 0x05,
755 OUT, PALREG, 6, PALREG, 0x14,
756 OUT, PALREG, 7, PALREG, 0x07,
757 OUT, PALREG, 8, PALREG, 0x38,
758 OUT, PALREG, 9, PALREG, 0x39,
759 OUT, PALREG, 10, PALREG, 0x3a,
760 OUT, PALREG, 11, PALREG, 0x3b,
761 OUT, PALREG, 12, PALREG, 0x3c,
762 OUT, PALREG, 13, PALREG, 0x3d,
763 OUT, PALREG, 14, PALREG, 0x3e,
764 OUT, PALREG, 15, PALREG, 0x3f,
765 OUT, PALREG, 16, PALREG, 0x08,
766 OUT, PALREG, 17, PALREG, 0x00,
767 OUT, PALREG, 18, PALREG, 0x0f,
768 OUT, PALREG, 19, PALREG, 0x00,
771 OUT, PALREG, 0x20, 0, 0,