sound/firewire/dice.c

   1 /*
   2  * TC Applied Technologies Digital Interface Communications Engine driver
   3  *
   4  * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
   5  * Licensed under the terms of the GNU General Public License, version 2.
   6  */
   7
   8 #include <linux/compat.h>
   9 #include <linux/completion.h>
  10 #include <linux/delay.h>
  11 #include <linux/device.h>
  12 #include <linux/firewire.h>
  13 #include <linux/firewire-constants.h>
  14 #include <linux/jiffies.h>
  15 #include <linux/module.h>
  16 #include <linux/mod_devicetable.h>
  17 #include <linux/mutex.h>
  18 #include <linux/slab.h>
  19 #include <linux/spinlock.h>
  20 #include <linux/wait.h>
  21 #include <sound/control.h>
  22 #include <sound/core.h>
  23 #include <sound/firewire.h>
  24 #include <sound/hwdep.h>
  25 #include <sound/info.h>
  26 #include <sound/initval.h>
  27 #include <sound/pcm.h>
  28 #include <sound/pcm_params.h>
  29 #include "amdtp.h"
  30 #include "iso-resources.h"
  31 #include "lib.h"
  32 #include "dice-interface.h"
  33
  34
  35 struct dice {
  36         struct snd_card *card;
  37         struct fw_unit *unit;
  38         spinlock_t lock;
  39         struct mutex mutex;
  40         unsigned int global_offset;
  41         unsigned int rx_offset;
  42         unsigned int clock_caps;
  43         unsigned int rx_channels[3];
  44         unsigned int rx_midi_ports[3];
  45         struct fw_address_handler notification_handler;
  46         int owner_generation;
  47         int dev_lock_count; /* > 0 driver, < 0 userspace */
  48         bool dev_lock_changed;
  49         bool global_enabled;
  50         struct completion clock_accepted;
  51         wait_queue_head_t hwdep_wait;
  52         u32 notification_bits;
  53         struct fw_iso_resources resources;
  54         struct amdtp_stream stream;
  55 };
  56
  57 MODULE_DESCRIPTION("DICE driver");
  58 MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
  59 MODULE_LICENSE("GPL v2");
  60
  61 static const unsigned int dice_rates[] = {
  62         /* mode 0 */
  63         [0] =  32000,
  64         [1] =  44100,
  65         [2] =  48000,
  66         /* mode 1 */
  67         [3] =  88200,
  68         [4] =  96000,
  69         /* mode 2 */
  70         [5] = 176400,
  71         [6] = 192000,
  72 };
  73
  74 static unsigned int rate_to_index(unsigned int rate)
  75 {
  76         unsigned int i;
  77
  78         for (i = 0; i < ARRAY_SIZE(dice_rates); ++i)
  79                 if (dice_rates[i] == rate)
  80                         return i;
  81
  82         return 0;
  83 }
  84
  85 static unsigned int rate_index_to_mode(unsigned int rate_index)
  86 {
  87         return ((int)rate_index - 1) / 2;
  88 }
  89
  90 static void dice_lock_changed(struct dice *dice)
  91 {
  92         dice->dev_lock_changed = true;
  93         wake_up(&dice->hwdep_wait);
  94 }
  95
  96 static int dice_try_lock(struct dice *dice)
  97 {
  98         int err;
  99
 100         spin_lock_irq(&dice->lock);
 101
 102         if (dice->dev_lock_count < 0) {
 103                 err = -EBUSY;
 104                 goto out;
 105         }
 106
 107         if (dice->dev_lock_count++ == 0)
 108                 dice_lock_changed(dice);
 109         err = 0;
 110
 111 out:
 112         spin_unlock_irq(&dice->lock);
 113
 114         return err;
 115 }
 116
 117 static void dice_unlock(struct dice *dice)
 118 {
 119         spin_lock_irq(&dice->lock);
 120
 121         if (WARN_ON(dice->dev_lock_count <= 0))
 122                 goto out;
 123
 124         if (--dice->dev_lock_count == 0)
 125                 dice_lock_changed(dice);
 126
 127 out:
 128         spin_unlock_irq(&dice->lock);
 129 }
 130
 131 static inline u64 global_address(struct dice *dice, unsigned int offset)
 132 {
 133         return DICE_PRIVATE_SPACE + dice->global_offset + offset;
 134 }
 135
 136 // TODO: rx index
 137 static inline u64 rx_address(struct dice *dice, unsigned int offset)
 138 {
 139         return DICE_PRIVATE_SPACE + dice->rx_offset + offset;
 140 }
 141
 142 static int dice_owner_set(struct dice *dice)
 143 {
 144         struct fw_device *device = fw_parent_device(dice->unit);
 145         __be64 *buffer;
 146         int err, errors = 0;
 147
 148         buffer = kmalloc(2 * 8, GFP_KERNEL);
 149         if (!buffer)
 150                 return -ENOMEM;
 151
 152         for (;;) {
 153                 buffer[0] = cpu_to_be64(OWNER_NO_OWNER);
 154                 buffer[1] = cpu_to_be64(
 155                         ((u64)device->card->node_id << OWNER_NODE_SHIFT) |
 156                         dice->notification_handler.offset);
 157
 158                 dice->owner_generation = device->generation;
 159                 smp_rmb(); /* node_id vs. generation */
 160                 err = snd_fw_transaction(dice->unit,
 161                                          TCODE_LOCK_COMPARE_SWAP,
 162                                          global_address(dice, GLOBAL_OWNER),
 163                                          buffer, 2 * 8,
 164                                          FW_FIXED_GENERATION |
 165                                                         dice->owner_generation);
 166
 167                 if (err == 0) {
 168                         if (buffer[0] != cpu_to_be64(OWNER_NO_OWNER)) {
 169                                 dev_err(&dice->unit->device,
 170                                         "device is already in use\n");
 171                                 err = -EBUSY;
 172                         }
 173                         break;
 174                 }
 175                 if (err != -EAGAIN || ++errors >= 3)
 176                         break;
 177
 178                 msleep(20);
 179         }
 180
 181         kfree(buffer);
 182
 183         return err;
 184 }
 185
 186 static int dice_owner_update(struct dice *dice)
 187 {
 188         struct fw_device *device = fw_parent_device(dice->unit);
 189         __be64 *buffer;
 190         int err;
 191
 192         if (dice->owner_generation == -1)
 193                 return 0;
 194
 195         buffer = kmalloc(2 * 8, GFP_KERNEL);
 196         if (!buffer)
 197                 return -ENOMEM;
 198
 199         buffer[0] = cpu_to_be64(OWNER_NO_OWNER);
 200         buffer[1] = cpu_to_be64(
 201                 ((u64)device->card->node_id << OWNER_NODE_SHIFT) |
 202                 dice->notification_handler.offset);
 203
 204         dice->owner_generation = device->generation;
 205         smp_rmb(); /* node_id vs. generation */
 206         err = snd_fw_transaction(dice->unit, TCODE_LOCK_COMPARE_SWAP,
 207                                  global_address(dice, GLOBAL_OWNER),
 208                                  buffer, 2 * 8,
 209                                  FW_FIXED_GENERATION | dice->owner_generation);
 210
 211         if (err == 0) {
 212                 if (buffer[0] != cpu_to_be64(OWNER_NO_OWNER)) {
 213                         dev_err(&dice->unit->device,
 214                                 "device is already in use\n");
 215                         err = -EBUSY;
 216                 }
 217         } else if (err == -EAGAIN) {
 218                 err = 0; /* try again later */
 219         }
 220
 221         kfree(buffer);
 222
 223         if (err < 0)
 224                 dice->owner_generation = -1;
 225
 226         return err;
 227 }
 228
 229 static void dice_owner_clear(struct dice *dice)
 230 {
 231         struct fw_device *device = fw_parent_device(dice->unit);
 232         __be64 *buffer;
 233
 234         buffer = kmalloc(2 * 8, GFP_KERNEL);
 235         if (!buffer)
 236                 return;
 237
 238         buffer[0] = cpu_to_be64(
 239                 ((u64)device->card->node_id << OWNER_NODE_SHIFT) |
 240                 dice->notification_handler.offset);
 241         buffer[1] = cpu_to_be64(OWNER_NO_OWNER);
 242         snd_fw_transaction(dice->unit, TCODE_LOCK_COMPARE_SWAP,
 243                            global_address(dice, GLOBAL_OWNER),
 244                            buffer, 2 * 8, FW_QUIET |
 245                            FW_FIXED_GENERATION | dice->owner_generation);
 246
 247         kfree(buffer);
 248
 249         dice->owner_generation = -1;
 250 }
 251
 252 static int dice_enable_set(struct dice *dice)
 253 {
 254         __be32 value;
 255         int err;
 256
 257         value = cpu_to_be32(1);
 258         err = snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST,
 259                                  global_address(dice, GLOBAL_ENABLE),
 260                                  &value, 4,
 261                                  FW_FIXED_GENERATION | dice->owner_generation);
 262         if (err < 0)
 263                 return err;
 264
 265         dice->global_enabled = true;
 266
 267         return 0;
 268 }
 269
 270 static void dice_enable_clear(struct dice *dice)
 271 {
 272         __be32 value;
 273
 274         if (!dice->global_enabled)
 275                 return;
 276
 277         value = 0;
 278         snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST,
 279                            global_address(dice, GLOBAL_ENABLE),
 280                            &value, 4, FW_QUIET |
 281                            FW_FIXED_GENERATION | dice->owner_generation);
 282
 283         dice->global_enabled = false;
 284 }
 285
 286 static void dice_notification(struct fw_card *card, struct fw_request *request,
 287                               int tcode, int destination, int source,
 288                               int generation, unsigned long long offset,
 289                               void *data, size_t length, void *callback_data)
 290 {
 291         struct dice *dice = callback_data;
 292         u32 bits;
 293         unsigned long flags;
 294
 295         if (tcode != TCODE_WRITE_QUADLET_REQUEST) {
 296                 fw_send_response(card, request, RCODE_TYPE_ERROR);
 297                 return;
 298         }
 299         if ((offset & 3) != 0) {
 300                 fw_send_response(card, request, RCODE_ADDRESS_ERROR);
 301                 return;
 302         }
 303
 304         bits = be32_to_cpup(data);
 305
 306         spin_lock_irqsave(&dice->lock, flags);
 307         dice->notification_bits |= bits;
 308         spin_unlock_irqrestore(&dice->lock, flags);
 309
 310         fw_send_response(card, request, RCODE_COMPLETE);
 311
 312         if (bits & NOTIFY_CLOCK_ACCEPTED)
 313                 complete(&dice->clock_accepted);
 314         wake_up(&dice->hwdep_wait);
 315 }
 316
 317 static int dice_rate_constraint(struct snd_pcm_hw_params *params,
 318                                 struct snd_pcm_hw_rule *rule)
 319 {
 320         struct dice *dice = rule->private;
 321         const struct snd_interval *channels =
 322                 hw_param_interval_c(params, SNDRV_PCM_HW_PARAM_CHANNELS);
 323         struct snd_interval *rate =
 324                 hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
 325         struct snd_interval allowed_rates = {
 326                 .min = UINT_MAX, .max = 0, .integer = 1
 327         };
 328         unsigned int i, mode;
 329
 330         for (i = 0; i < ARRAY_SIZE(dice_rates); ++i) {
 331                 mode = rate_index_to_mode(i);
 332                 if ((dice->clock_caps & (1 << i)) &&
 333                     snd_interval_test(channels, dice->rx_channels[mode])) {
 334                         allowed_rates.min = min(allowed_rates.min,
 335                                                 dice_rates[i]);
 336                         allowed_rates.max = max(allowed_rates.max,
 337                                                 dice_rates[i]);
 338                 }
 339         }
 340
 341         return snd_interval_refine(rate, &allowed_rates);
 342 }
 343
 344 static int dice_channels_constraint(struct snd_pcm_hw_params *params,
 345                                     struct snd_pcm_hw_rule *rule)
 346 {
 347         struct dice *dice = rule->private;
 348         const struct snd_interval *rate =
 349                 hw_param_interval_c(params, SNDRV_PCM_HW_PARAM_RATE);
 350         struct snd_interval *channels =
 351                 hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
 352         struct snd_interval allowed_channels = {
 353                 .min = UINT_MAX, .max = 0, .integer = 1
 354         };
 355         unsigned int i, mode;
 356
 357         for (i = 0; i < ARRAY_SIZE(dice_rates); ++i)
 358                 if ((dice->clock_caps & (1 << i)) &&
 359                     snd_interval_test(rate, dice_rates[i])) {
 360                         mode = rate_index_to_mode(i);
 361                         allowed_channels.min = min(allowed_channels.min,
 362                                                    dice->rx_channels[mode]);
 363                         allowed_channels.max = max(allowed_channels.max,
 364                                                    dice->rx_channels[mode]);
 365                 }
 366
 367         return snd_interval_refine(channels, &allowed_channels);
 368 }
 369
 370 static int dice_open(struct snd_pcm_substream *substream)
 371 {
 372         static const struct snd_pcm_hardware hardware = {
 373                 .info = SNDRV_PCM_INFO_MMAP |
 374                         SNDRV_PCM_INFO_MMAP_VALID |
 375                         SNDRV_PCM_INFO_BATCH |
 376                         SNDRV_PCM_INFO_INTERLEAVED |
 377                         SNDRV_PCM_INFO_BLOCK_TRANSFER,
 378                 .formats = AMDTP_OUT_PCM_FORMAT_BITS,
 379                 .channels_min = UINT_MAX,
 380                 .channels_max = 0,
 381                 .buffer_bytes_max = 16 * 1024 * 1024,
 382                 .period_bytes_min = 1,
 383                 .period_bytes_max = UINT_MAX,
 384                 .periods_min = 1,
 385                 .periods_max = UINT_MAX,
 386         };
 387         struct dice *dice = substream->private_data;
 388         struct snd_pcm_runtime *runtime = substream->runtime;
 389         unsigned int i;
 390         int err;
 391
 392         err = dice_try_lock(dice);
 393         if (err < 0)
 394                 goto error;
 395
 396         runtime->hw = hardware;
 397
 398         for (i = 0; i < ARRAY_SIZE(dice_rates); ++i)
 399                 if (dice->clock_caps & (1 << i))
 400                         runtime->hw.rates |=
 401                                 snd_pcm_rate_to_rate_bit(dice_rates[i]);
 402         snd_pcm_limit_hw_rates(runtime);
 403
 404         for (i = 0; i < 3; ++i)
 405                 if (dice->rx_channels[i]) {
 406                         runtime->hw.channels_min = min(runtime->hw.channels_min,
 407                                                        dice->rx_channels[i]);
 408                         runtime->hw.channels_max = max(runtime->hw.channels_max,
 409                                                        dice->rx_channels[i]);
 410                 }
 411
 412         err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
 413                                   dice_rate_constraint, dice,
 414                                   SNDRV_PCM_HW_PARAM_CHANNELS, -1);
 415         if (err < 0)
 416                 goto err_lock;
 417         err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
 418                                   dice_channels_constraint, dice,
 419                                   SNDRV_PCM_HW_PARAM_RATE, -1);
 420         if (err < 0)
 421                 goto err_lock;
 422
 423         err = amdtp_stream_add_pcm_hw_constraints(&dice->stream, runtime);
 424         if (err < 0)
 425                 goto err_lock;
 426
 427         return 0;
 428
 429 err_lock:
 430         dice_unlock(dice);
 431 error:
 432         return err;
 433 }
 434
 435 static int dice_close(struct snd_pcm_substream *substream)
 436 {
 437         struct dice *dice = substream->private_data;
 438
 439         dice_unlock(dice);
 440
 441         return 0;
 442 }
 443
 444 static int dice_stream_start_packets(struct dice *dice)
 445 {
 446         int err;
 447
 448         if (amdtp_stream_running(&dice->stream))
 449                 return 0;
 450
 451         err = amdtp_stream_start(&dice->stream, dice->resources.channel,
 452                                  fw_parent_device(dice->unit)->max_speed);
 453         if (err < 0)
 454                 return err;
 455
 456         err = dice_enable_set(dice);
 457         if (err < 0) {
 458                 amdtp_stream_stop(&dice->stream);
 459                 return err;
 460         }
 461
 462         return 0;
 463 }
 464
 465 static int dice_stream_start(struct dice *dice)
 466 {
 467         __be32 channel;
 468         int err;
 469
 470         if (!dice->resources.allocated) {
 471                 err = fw_iso_resources_allocate(&dice->resources,
 472                                 amdtp_stream_get_max_payload(&dice->stream),
 473                                 fw_parent_device(dice->unit)->max_speed);
 474                 if (err < 0)
 475                         goto error;
 476
 477                 channel = cpu_to_be32(dice->resources.channel);
 478                 err = snd_fw_transaction(dice->unit,
 479                                          TCODE_WRITE_QUADLET_REQUEST,
 480                                          rx_address(dice, RX_ISOCHRONOUS),
 481                                          &channel, 4, 0);
 482                 if (err < 0)
 483                         goto err_resources;
 484         }
 485
 486         err = dice_stream_start_packets(dice);
 487         if (err < 0)
 488                 goto err_rx_channel;
 489
 490         return 0;
 491
 492 err_rx_channel:
 493         channel = cpu_to_be32((u32)-1);
 494         snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST,
 495                            rx_address(dice, RX_ISOCHRONOUS), &channel, 4, 0);
 496 err_resources:
 497         fw_iso_resources_free(&dice->resources);
 498 error:
 499         return err;
 500 }
 501
 502 static void dice_stream_stop_packets(struct dice *dice)
 503 {
 504         if (amdtp_stream_running(&dice->stream)) {
 505                 dice_enable_clear(dice);
 506                 amdtp_stream_stop(&dice->stream);
 507         }
 508 }
 509
 510 static void dice_stream_stop(struct dice *dice)
 511 {
 512         __be32 channel;
 513
 514         dice_stream_stop_packets(dice);
 515
 516         if (!dice->resources.allocated)
 517                 return;
 518
 519         channel = cpu_to_be32((u32)-1);
 520         snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST,
 521                            rx_address(dice, RX_ISOCHRONOUS), &channel, 4, 0);
 522
 523         fw_iso_resources_free(&dice->resources);
 524 }
 525
 526 static int dice_change_rate(struct dice *dice, unsigned int clock_rate)
 527 {
 528         __be32 value;
 529         int err;
 530
 531         reinit_completion(&dice->clock_accepted);
 532
 533         value = cpu_to_be32(clock_rate | CLOCK_SOURCE_ARX1);
 534         err = snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST,
 535                                  global_address(dice, GLOBAL_CLOCK_SELECT),
 536                                  &value, 4, 0);
 537         if (err < 0)
 538                 return err;
 539
 540         if (!wait_for_completion_timeout(&dice->clock_accepted,
 541                                          msecs_to_jiffies(100)))
 542                 dev_warn(&dice->unit->device, "clock change timed out\n");
 543
 544         return 0;
 545 }
 546
 547 static int dice_hw_params(struct snd_pcm_substream *substream,
 548                           struct snd_pcm_hw_params *hw_params)
 549 {
 550         struct dice *dice = substream->private_data;
 551         unsigned int rate_index, mode, rate, channels, i;
 552         int err;
 553
 554         mutex_lock(&dice->mutex);
 555         dice_stream_stop(dice);
 556         mutex_unlock(&dice->mutex);
 557
 558         err = snd_pcm_lib_alloc_vmalloc_buffer(substream,
 559                                                params_buffer_bytes(hw_params));
 560         if (err < 0)
 561                 return err;
 562
 563         rate = params_rate(hw_params);
 564         rate_index = rate_to_index(rate);
 565         err = dice_change_rate(dice, rate_index << CLOCK_RATE_SHIFT);
 566         if (err < 0)
 567                 return err;
 568
 569         /*
 570          * At rates above 96 kHz, pretend that the stream runs at half the
 571          * actual sample rate with twice the number of channels; two samples
 572          * of a channel are stored consecutively in the packet. Requires
 573          * blocking mode and PCM buffer size should be aligned to SYT_INTERVAL.
 574          */
 575         channels = params_channels(hw_params);
 576         if (rate_index > 4) {
 577                 if (channels > AMDTP_MAX_CHANNELS_FOR_PCM / 2) {
 578                         err = -ENOSYS;
 579                         return err;
 580                 }
 581
 582                 for (i = 0; i < channels; i++) {
 583                         dice->stream.pcm_positions[i * 2] = i;
 584                         dice->stream.pcm_positions[i * 2 + 1] = i + channels;
 585                 }
 586
 587                 rate /= 2;
 588                 channels *= 2;
 589         }
 590
 591         mode = rate_index_to_mode(rate_index);
 592         amdtp_stream_set_parameters(&dice->stream, rate, channels,
 593                                     dice->rx_midi_ports[mode]);
 594         amdtp_stream_set_pcm_format(&dice->stream,
 595                                     params_format(hw_params));
 596
 597         return 0;
 598 }
 599
 600 static int dice_hw_free(struct snd_pcm_substream *substream)
 601 {
 602         struct dice *dice = substream->private_data;
 603
 604         mutex_lock(&dice->mutex);
 605         dice_stream_stop(dice);
 606         mutex_unlock(&dice->mutex);
 607
 608         return snd_pcm_lib_free_vmalloc_buffer(substream);
 609 }
 610
 611 static int dice_prepare(struct snd_pcm_substream *substream)
 612 {
 613         struct dice *dice = substream->private_data;
 614         int err;
 615
 616         mutex_lock(&dice->mutex);
 617
 618         if (amdtp_streaming_error(&dice->stream))
 619                 dice_stream_stop_packets(dice);
 620
 621         err = dice_stream_start(dice);
 622         if (err < 0) {
 623                 mutex_unlock(&dice->mutex);
 624                 return err;
 625         }
 626
 627         mutex_unlock(&dice->mutex);
 628
 629         amdtp_stream_pcm_prepare(&dice->stream);
 630
 631         return 0;
 632 }
 633
 634 static int dice_trigger(struct snd_pcm_substream *substream, int cmd)
 635 {
 636         struct dice *dice = substream->private_data;
 637         struct snd_pcm_substream *pcm;
 638
 639         switch (cmd) {
 640         case SNDRV_PCM_TRIGGER_START:
 641                 pcm = substream;
 642                 break;
 643         case SNDRV_PCM_TRIGGER_STOP:
 644                 pcm = NULL;
 645                 break;
 646         default:
 647                 return -EINVAL;
 648         }
 649         amdtp_stream_pcm_trigger(&dice->stream, pcm);
 650
 651         return 0;
 652 }
 653
 654 static snd_pcm_uframes_t dice_pointer(struct snd_pcm_substream *substream)
 655 {
 656         struct dice *dice = substream->private_data;
 657
 658         return amdtp_stream_pcm_pointer(&dice->stream);
 659 }
 660
 661 static int dice_create_pcm(struct dice *dice)
 662 {
 663         static struct snd_pcm_ops ops = {
 664                 .open      = dice_open,
 665                 .close     = dice_close,
 666                 .ioctl     = snd_pcm_lib_ioctl,
 667                 .hw_params = dice_hw_params,
 668                 .hw_free   = dice_hw_free,
 669                 .prepare   = dice_prepare,
 670                 .trigger   = dice_trigger,
 671                 .pointer   = dice_pointer,
 672                 .page      = snd_pcm_lib_get_vmalloc_page,
 673                 .mmap      = snd_pcm_lib_mmap_vmalloc,
 674         };
 675         struct snd_pcm *pcm;
 676         int err;
 677
 678         err = snd_pcm_new(dice->card, "DICE", 0, 1, 0, &pcm);
 679         if (err < 0)
 680                 return err;
 681         pcm->private_data = dice;
 682         strcpy(pcm->name, dice->card->shortname);
 683         pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream->ops = &ops;
 684
 685         return 0;
 686 }
 687
 688 static long dice_hwdep_read(struct snd_hwdep *hwdep, char __user *buf,
 689                             long count, loff_t *offset)
 690 {
 691         struct dice *dice = hwdep->private_data;
 692         DEFINE_WAIT(wait);
 693         union snd_firewire_event event;
 694
 695         spin_lock_irq(&dice->lock);
 696
 697         while (!dice->dev_lock_changed && dice->notification_bits == 0) {
 698                 prepare_to_wait(&dice->hwdep_wait, &wait, TASK_INTERRUPTIBLE);
 699                 spin_unlock_irq(&dice->lock);
 700                 schedule();
 701                 finish_wait(&dice->hwdep_wait, &wait);
 702                 if (signal_pending(current))
 703                         return -ERESTARTSYS;
 704                 spin_lock_irq(&dice->lock);
 705         }
 706
 707         memset(&event, 0, sizeof(event));
 708         if (dice->dev_lock_changed) {
 709                 event.lock_status.type = SNDRV_FIREWIRE_EVENT_LOCK_STATUS;
 710                 event.lock_status.status = dice->dev_lock_count > 0;
 711                 dice->dev_lock_changed = false;
 712
 713                 count = min(count, (long)sizeof(event.lock_status));
 714         } else {
 715                 event.dice_notification.type = SNDRV_FIREWIRE_EVENT_DICE_NOTIFICATION;
 716                 event.dice_notification.notification = dice->notification_bits;
 717                 dice->notification_bits = 0;
 718
 719                 count = min(count, (long)sizeof(event.dice_notification));
 720         }
 721
 722         spin_unlock_irq(&dice->lock);
 723
 724         if (copy_to_user(buf, &event, count))
 725                 return -EFAULT;
 726
 727         return count;
 728 }
 729
 730 static unsigned int dice_hwdep_poll(struct snd_hwdep *hwdep, struct file *file,
 731                                     poll_table *wait)
 732 {
 733         struct dice *dice = hwdep->private_data;
 734         unsigned int events;
 735
 736         poll_wait(file, &dice->hwdep_wait, wait);
 737
 738         spin_lock_irq(&dice->lock);
 739         if (dice->dev_lock_changed || dice->notification_bits != 0)
 740                 events = POLLIN | POLLRDNORM;
 741         else
 742                 events = 0;
 743         spin_unlock_irq(&dice->lock);
 744
 745         return events;
 746 }
 747
 748 static int dice_hwdep_get_info(struct dice *dice, void __user *arg)
 749 {
 750         struct fw_device *dev = fw_parent_device(dice->unit);
 751         struct snd_firewire_get_info info;
 752
 753         memset(&info, 0, sizeof(info));
 754         info.type = SNDRV_FIREWIRE_TYPE_DICE;
 755         info.card = dev->card->index;
 756         *(__be32 *)&info.guid[0] = cpu_to_be32(dev->config_rom[3]);
 757         *(__be32 *)&info.guid[4] = cpu_to_be32(dev->config_rom[4]);
 758         strlcpy(info.device_name, dev_name(&dev->device),
 759                 sizeof(info.device_name));
 760
 761         if (copy_to_user(arg, &info, sizeof(info)))
 762                 return -EFAULT;
 763
 764         return 0;
 765 }
 766
 767 static int dice_hwdep_lock(struct dice *dice)
 768 {
 769         int err;
 770
 771         spin_lock_irq(&dice->lock);
 772
 773         if (dice->dev_lock_count == 0) {
 774                 dice->dev_lock_count = -1;
 775                 err = 0;
 776         } else {
 777                 err = -EBUSY;
 778         }
 779
 780         spin_unlock_irq(&dice->lock);
 781
 782         return err;
 783 }
 784
 785 static int dice_hwdep_unlock(struct dice *dice)
 786 {
 787         int err;
 788
 789         spin_lock_irq(&dice->lock);
 790
 791         if (dice->dev_lock_count == -1) {
 792                 dice->dev_lock_count = 0;
 793                 err = 0;
 794         } else {
 795                 err = -EBADFD;
 796         }
 797
 798         spin_unlock_irq(&dice->lock);
 799
 800         return err;
 801 }
 802
 803 static int dice_hwdep_release(struct snd_hwdep *hwdep, struct file *file)
 804 {
 805         struct dice *dice = hwdep->private_data;
 806
 807         spin_lock_irq(&dice->lock);
 808         if (dice->dev_lock_count == -1)
 809                 dice->dev_lock_count = 0;
 810         spin_unlock_irq(&dice->lock);
 811
 812         return 0;
 813 }
 814
 815 static int dice_hwdep_ioctl(struct snd_hwdep *hwdep, struct file *file,
 816                             unsigned int cmd, unsigned long arg)
 817 {
 818         struct dice *dice = hwdep->private_data;
 819
 820         switch (cmd) {
 821         case SNDRV_FIREWIRE_IOCTL_GET_INFO:
 822                 return dice_hwdep_get_info(dice, (void __user *)arg);
 823         case SNDRV_FIREWIRE_IOCTL_LOCK:
 824                 return dice_hwdep_lock(dice);
 825         case SNDRV_FIREWIRE_IOCTL_UNLOCK:
 826                 return dice_hwdep_unlock(dice);
 827         default:
 828                 return -ENOIOCTLCMD;
 829         }
 830 }
 831
 832 #ifdef CONFIG_COMPAT
 833 static int dice_hwdep_compat_ioctl(struct snd_hwdep *hwdep, struct file *file,
 834                                    unsigned int cmd, unsigned long arg)
 835 {
 836         return dice_hwdep_ioctl(hwdep, file, cmd,
 837                                 (unsigned long)compat_ptr(arg));
 838 }
 839 #else
 840 #define dice_hwdep_compat_ioctl NULL
 841 #endif
 842
 843 static int dice_create_hwdep(struct dice *dice)
 844 {
 845         static const struct snd_hwdep_ops ops = {
 846                 .read         = dice_hwdep_read,
 847                 .release      = dice_hwdep_release,
 848                 .poll         = dice_hwdep_poll,
 849                 .ioctl        = dice_hwdep_ioctl,
 850                 .ioctl_compat = dice_hwdep_compat_ioctl,
 851         };
 852         struct snd_hwdep *hwdep;
 853         int err;
 854
 855         err = snd_hwdep_new(dice->card, "DICE", 0, &hwdep);
 856         if (err < 0)
 857                 return err;
 858         strcpy(hwdep->name, "DICE");
 859         hwdep->iface = SNDRV_HWDEP_IFACE_FW_DICE;
 860         hwdep->ops = ops;
 861         hwdep->private_data = dice;
 862         hwdep->exclusive = true;
 863
 864         return 0;
 865 }
 866
 867 static int dice_proc_read_mem(struct dice *dice, void *buffer,
 868                               unsigned int offset_q, unsigned int quadlets)
 869 {
 870         unsigned int i;
 871         int err;
 872
 873         err = snd_fw_transaction(dice->unit, TCODE_READ_BLOCK_REQUEST,
 874                                  DICE_PRIVATE_SPACE + 4 * offset_q,
 875                                  buffer, 4 * quadlets, 0);
 876         if (err < 0)
 877                 return err;
 878
 879         for (i = 0; i < quadlets; ++i)
 880                 be32_to_cpus(&((u32 *)buffer)[i]);
 881
 882         return 0;
 883 }
 884
 885 static const char *str_from_array(const char *const strs[], unsigned int count,
 886                                   unsigned int i)
 887 {
 888         if (i < count)
 889                 return strs[i];
 890         else
 891                 return "(unknown)";
 892 }
 893
 894 static void dice_proc_fixup_string(char *s, unsigned int size)
 895 {
 896         unsigned int i;
 897
 898         for (i = 0; i < size; i += 4)
 899                 cpu_to_le32s((u32 *)(s + i));
 900
 901         for (i = 0; i < size - 2; ++i) {
 902                 if (s[i] == '\0')
 903                         return;
 904                 if (s[i] == '\\' && s[i + 1] == '\\') {
 905                         s[i + 2] = '\0';
 906                         return;
 907                 }
 908         }
 909         s[size - 1] = '\0';
 910 }
 911
 912 static void dice_proc_read(struct snd_info_entry *entry,
 913                            struct snd_info_buffer *buffer)
 914 {
 915         static const char *const section_names[5] = {
 916                 "global", "tx", "rx", "ext_sync", "unused2"
 917         };
 918         static const char *const clock_sources[] = {
 919                 "aes1", "aes2", "aes3", "aes4", "aes", "adat", "tdif",
 920                 "wc", "arx1", "arx2", "arx3", "arx4", "internal"
 921         };
 922         static const char *const rates[] = {
 923                 "32000", "44100", "48000", "88200", "96000", "176400", "192000",
 924                 "any low", "any mid", "any high", "none"
 925         };
 926         struct dice *dice = entry->private_data;
 927         u32 sections[ARRAY_SIZE(section_names) * 2];
 928         struct {
 929                 u32 number;
 930                 u32 size;
 931         } tx_rx_header;
 932         union {
 933                 struct {
 934                         u32 owner_hi, owner_lo;
 935                         u32 notification;
 936                         char nick_name[NICK_NAME_SIZE];
 937                         u32 clock_select;
 938                         u32 enable;
 939                         u32 status;
 940                         u32 extended_status;
 941                         u32 sample_rate;
 942                         u32 version;
 943                         u32 clock_caps;
 944                         char clock_source_names[CLOCK_SOURCE_NAMES_SIZE];
 945                 } global;
 946                 struct {
 947                         u32 iso;
 948                         u32 number_audio;
 949                         u32 number_midi;
 950                         u32 speed;
 951                         char names[TX_NAMES_SIZE];
 952                         u32 ac3_caps;
 953                         u32 ac3_enable;
 954                 } tx;
 955                 struct {
 956                         u32 iso;
 957                         u32 seq_start;
 958                         u32 number_audio;
 959                         u32 number_midi;
 960                         char names[RX_NAMES_SIZE];
 961                         u32 ac3_caps;
 962                         u32 ac3_enable;
 963                 } rx;
 964                 struct {
 965                         u32 clock_source;
 966                         u32 locked;
 967                         u32 rate;
 968                         u32 adat_user_data;
 969                 } ext_sync;
 970         } buf;
 971         unsigned int quadlets, stream, i;
 972
 973         if (dice_proc_read_mem(dice, sections, 0, ARRAY_SIZE(sections)) < 0)
 974                 return;
 975         snd_iprintf(buffer, "sections:\n");
 976         for (i = 0; i < ARRAY_SIZE(section_names); ++i)
 977                 snd_iprintf(buffer, "  %s: offset %u, size %u\n",
 978                             section_names[i],
 979                             sections[i * 2], sections[i * 2 + 1]);
 980
 981         quadlets = min_t(u32, sections[1], sizeof(buf.global) / 4);
 982         if (dice_proc_read_mem(dice, &buf.global, sections[0], quadlets) < 0)
 983                 return;
 984         snd_iprintf(buffer, "global:\n");
 985         snd_iprintf(buffer, "  owner: %04x:%04x%08x\n",
 986                     buf.global.owner_hi >> 16,
 987                     buf.global.owner_hi & 0xffff, buf.global.owner_lo);
 988         snd_iprintf(buffer, "  notification: %08x\n", buf.global.notification);
 989         dice_proc_fixup_string(buf.global.nick_name, NICK_NAME_SIZE);
 990         snd_iprintf(buffer, "  nick name: %s\n", buf.global.nick_name);
 991         snd_iprintf(buffer, "  clock select: %s %s\n",
 992                     str_from_array(clock_sources, ARRAY_SIZE(clock_sources),
 993                                    buf.global.clock_select & CLOCK_SOURCE_MASK),
 994                     str_from_array(rates, ARRAY_SIZE(rates),
 995                                    (buf.global.clock_select & CLOCK_RATE_MASK)
 996                                    >> CLOCK_RATE_SHIFT));
 997         snd_iprintf(buffer, "  enable: %u\n", buf.global.enable);
 998         snd_iprintf(buffer, "  status: %slocked %s\n",
 999                     buf.global.status & STATUS_SOURCE_LOCKED ? "" : "un",
1000                     str_from_array(rates, ARRAY_SIZE(rates),
1001                                    (buf.global.status &
1002                                     STATUS_NOMINAL_RATE_MASK)
1003                                    >> CLOCK_RATE_SHIFT));
1004         snd_iprintf(buffer, "  ext status: %08x\n", buf.global.extended_status);
1005         snd_iprintf(buffer, "  sample rate: %u\n", buf.global.sample_rate);
1006         snd_iprintf(buffer, "  version: %u.%u.%u.%u\n",
1007                     (buf.global.version >> 24) & 0xff,
1008                     (buf.global.version >> 16) & 0xff,
1009                     (buf.global.version >>  8) & 0xff,
1010                     (buf.global.version >>  0) & 0xff);
1011         if (quadlets >= 90) {
1012                 snd_iprintf(buffer, "  clock caps:");
1013                 for (i = 0; i <= 6; ++i)
1014                         if (buf.global.clock_caps & (1 << i))
1015                                 snd_iprintf(buffer, " %s", rates[i]);
1016                 for (i = 0; i <= 12; ++i)
1017                         if (buf.global.clock_caps & (1 << (16 + i)))
1018                                 snd_iprintf(buffer, " %s", clock_sources[i]);
1019                 snd_iprintf(buffer, "\n");
1020                 dice_proc_fixup_string(buf.global.clock_source_names,
1021                                        CLOCK_SOURCE_NAMES_SIZE);
1022                 snd_iprintf(buffer, "  clock source names: %s\n",
1023                             buf.global.clock_source_names);
1024         }
1025
1026         if (dice_proc_read_mem(dice, &tx_rx_header, sections[2], 2) < 0)
1027                 return;
1028         quadlets = min_t(u32, tx_rx_header.size, sizeof(buf.tx) / 4);
1029         for (stream = 0; stream < tx_rx_header.number; ++stream) {
1030                 if (dice_proc_read_mem(dice, &buf.tx, sections[2] + 2 +
1031                                        stream * tx_rx_header.size,
1032                                        quadlets) < 0)
1033                         break;
1034                 snd_iprintf(buffer, "tx %u:\n", stream);
1035                 snd_iprintf(buffer, "  iso channel: %d\n", (int)buf.tx.iso);
1036                 snd_iprintf(buffer, "  audio channels: %u\n",
1037                             buf.tx.number_audio);
1038                 snd_iprintf(buffer, "  midi ports: %u\n", buf.tx.number_midi);
1039                 snd_iprintf(buffer, "  speed: S%u\n", 100u << buf.tx.speed);
1040                 if (quadlets >= 68) {
1041                         dice_proc_fixup_string(buf.tx.names, TX_NAMES_SIZE);
1042                         snd_iprintf(buffer, "  names: %s\n", buf.tx.names);
1043                 }
1044                 if (quadlets >= 70) {
1045                         snd_iprintf(buffer, "  ac3 caps: %08x\n",
1046                                     buf.tx.ac3_caps);
1047                         snd_iprintf(buffer, "  ac3 enable: %08x\n",
1048                                     buf.tx.ac3_enable);
1049                 }
1050         }
1051
1052         if (dice_proc_read_mem(dice, &tx_rx_header, sections[4], 2) < 0)
1053                 return;
1054         quadlets = min_t(u32, tx_rx_header.size, sizeof(buf.rx) / 4);
1055         for (stream = 0; stream < tx_rx_header.number; ++stream) {
1056                 if (dice_proc_read_mem(dice, &buf.rx, sections[4] + 2 +
1057                                        stream * tx_rx_header.size,
1058                                        quadlets) < 0)
1059                         break;
1060                 snd_iprintf(buffer, "rx %u:\n", stream);
1061                 snd_iprintf(buffer, "  iso channel: %d\n", (int)buf.rx.iso);
1062                 snd_iprintf(buffer, "  sequence start: %u\n", buf.rx.seq_start);
1063                 snd_iprintf(buffer, "  audio channels: %u\n",
1064                             buf.rx.number_audio);
1065                 snd_iprintf(buffer, "  midi ports: %u\n", buf.rx.number_midi);
1066                 if (quadlets >= 68) {
1067                         dice_proc_fixup_string(buf.rx.names, RX_NAMES_SIZE);
1068                         snd_iprintf(buffer, "  names: %s\n", buf.rx.names);
1069                 }
1070                 if (quadlets >= 70) {
1071                         snd_iprintf(buffer, "  ac3 caps: %08x\n",
1072                                     buf.rx.ac3_caps);
1073                         snd_iprintf(buffer, "  ac3 enable: %08x\n",
1074                                     buf.rx.ac3_enable);
1075                 }
1076         }
1077
1078         quadlets = min_t(u32, sections[7], sizeof(buf.ext_sync) / 4);
1079         if (quadlets >= 4) {
1080                 if (dice_proc_read_mem(dice, &buf.ext_sync,
1081                                        sections[6], 4) < 0)
1082                         return;
1083                 snd_iprintf(buffer, "ext status:\n");
1084                 snd_iprintf(buffer, "  clock source: %s\n",
1085                             str_from_array(clock_sources,
1086                                            ARRAY_SIZE(clock_sources),
1087                                            buf.ext_sync.clock_source));
1088                 snd_iprintf(buffer, "  locked: %u\n", buf.ext_sync.locked);
1089                 snd_iprintf(buffer, "  rate: %s\n",
1090                             str_from_array(rates, ARRAY_SIZE(rates),
1091                                            buf.ext_sync.rate));
1092                 snd_iprintf(buffer, "  adat user data: ");
1093                 if (buf.ext_sync.adat_user_data & ADAT_USER_DATA_NO_DATA)
1094                         snd_iprintf(buffer, "-\n");
1095                 else
1096                         snd_iprintf(buffer, "%x\n",
1097                                     buf.ext_sync.adat_user_data);
1098         }
1099 }
1100
1101 static void dice_create_proc(struct dice *dice)
1102 {
1103         struct snd_info_entry *entry;
1104
1105         if (!snd_card_proc_new(dice->card, "dice", &entry))
1106                 snd_info_set_text_ops(entry, dice, dice_proc_read);
1107 }
1108
1109 static void dice_card_free(struct snd_card *card)
1110 {
1111         struct dice *dice = card->private_data;
1112
1113         amdtp_stream_destroy(&dice->stream);
1114         fw_core_remove_address_handler(&dice->notification_handler);
1115         mutex_destroy(&dice->mutex);
1116 }
1117
1118 #define OUI_WEISS               0x001c6a
1119
1120 #define DICE_CATEGORY_ID        0x04
1121 #define WEISS_CATEGORY_ID       0x00
1122
1123 static int dice_interface_check(struct fw_unit *unit)
1124 {
1125         static const int min_values[10] = {
1126                 10, 0x64 / 4,
1127                 10, 0x18 / 4,
1128                 10, 0x18 / 4,
1129                 0, 0,
1130                 0, 0,
1131         };
1132         struct fw_device *device = fw_parent_device(unit);
1133         struct fw_csr_iterator it;
1134         int key, value, vendor = -1, model = -1, err;
1135         unsigned int category, i;
1136         __be32 pointers[ARRAY_SIZE(min_values)];
1137         __be32 tx_data[4];
1138         __be32 version;
1139
1140         /*
1141          * Check that GUID and unit directory are constructed according to DICE
1142          * rules, i.e., that the specifier ID is the GUID's OUI, and that the
1143          * GUID chip ID consists of the 8-bit category ID, the 10-bit product
1144          * ID, and a 22-bit serial number.
1145          */
1146         fw_csr_iterator_init(&it, unit->directory);
1147         while (fw_csr_iterator_next(&it, &key, &value)) {
1148                 switch (key) {
1149                 case CSR_SPECIFIER_ID:
1150                         vendor = value;
1151                         break;
1152                 case CSR_MODEL:
1153                         model = value;
1154                         break;
1155                 }
1156         }
1157         if (vendor == OUI_WEISS)
1158                 category = WEISS_CATEGORY_ID;
1159         else
1160                 category = DICE_CATEGORY_ID;
1161         if (device->config_rom[3] != ((vendor << 8) | category) ||
1162             device->config_rom[4] >> 22 != model)
1163                 return -ENODEV;
1164
1165         /*
1166          * Check that the sub address spaces exist and are located inside the
1167          * private address space.  The minimum values are chosen so that all
1168          * minimally required registers are included.
1169          */
1170         err = snd_fw_transaction(unit, TCODE_READ_BLOCK_REQUEST,
1171                                  DICE_PRIVATE_SPACE,
1172                                  pointers, sizeof(pointers), 0);
1173         if (err < 0)
1174                 return -ENODEV;
1175         for (i = 0; i < ARRAY_SIZE(pointers); ++i) {
1176                 value = be32_to_cpu(pointers[i]);
1177                 if (value < min_values[i] || value >= 0x40000)
1178                         return -ENODEV;
1179         }
1180
1181         /* We support playback only. Let capture devices be handled by FFADO. */
1182         err = snd_fw_transaction(unit, TCODE_READ_BLOCK_REQUEST,
1183                                  DICE_PRIVATE_SPACE +
1184                                  be32_to_cpu(pointers[2]) * 4,
1185                                  tx_data, sizeof(tx_data), 0);
1186         if (err < 0 || (tx_data[0] && tx_data[3]))
1187                 return -ENODEV;
1188
1189         /*
1190          * Check that the implemented DICE driver specification major version
1191          * number matches.
1192          */
1193         err = snd_fw_transaction(unit, TCODE_READ_QUADLET_REQUEST,
1194                                  DICE_PRIVATE_SPACE +
1195                                  be32_to_cpu(pointers[0]) * 4 + GLOBAL_VERSION,
1196                                  &version, 4, 0);
1197         if (err < 0)
1198                 return -ENODEV;
1199         if ((version & cpu_to_be32(0xff000000)) != cpu_to_be32(0x01000000)) {
1200                 dev_err(&unit->device,
1201                         "unknown DICE version: 0x%08x\n", be32_to_cpu(version));
1202                 return -ENODEV;
1203         }
1204
1205         return 0;
1206 }
1207
1208 static int highest_supported_mode_rate(struct dice *dice, unsigned int mode)
1209 {
1210         int i;
1211
1212         for (i = ARRAY_SIZE(dice_rates) - 1; i >= 0; --i)
1213                 if ((dice->clock_caps & (1 << i)) &&
1214                     rate_index_to_mode(i) == mode)
1215                         return i;
1216
1217         return -1;
1218 }
1219
1220 static int dice_read_mode_params(struct dice *dice, unsigned int mode)
1221 {
1222         __be32 values[2];
1223         int rate_index, err;
1224
1225         rate_index = highest_supported_mode_rate(dice, mode);
1226         if (rate_index < 0) {
1227                 dice->rx_channels[mode] = 0;
1228                 dice->rx_midi_ports[mode] = 0;
1229                 return 0;
1230         }
1231
1232         err = dice_change_rate(dice, rate_index << CLOCK_RATE_SHIFT);
1233         if (err < 0)
1234                 return err;
1235
1236         err = snd_fw_transaction(dice->unit, TCODE_READ_BLOCK_REQUEST,
1237                                  rx_address(dice, RX_NUMBER_AUDIO),
1238                                  values, 2 * 4, 0);
1239         if (err < 0)
1240                 return err;
1241
1242         dice->rx_channels[mode]   = be32_to_cpu(values[0]);
1243         dice->rx_midi_ports[mode] = be32_to_cpu(values[1]);
1244
1245         return 0;
1246 }
1247
1248 static int dice_read_params(struct dice *dice)
1249 {
1250         __be32 pointers[6];
1251         __be32 value;
1252         int mode, err;
1253
1254         err = snd_fw_transaction(dice->unit, TCODE_READ_BLOCK_REQUEST,
1255                                  DICE_PRIVATE_SPACE,
1256                                  pointers, sizeof(pointers), 0);
1257         if (err < 0)
1258                 return err;
1259
1260         dice->global_offset = be32_to_cpu(pointers[0]) * 4;
1261         dice->rx_offset = be32_to_cpu(pointers[4]) * 4;
1262
1263         /* some very old firmwares don't tell about their clock support */
1264         if (be32_to_cpu(pointers[1]) * 4 >= GLOBAL_CLOCK_CAPABILITIES + 4) {
1265                 err = snd_fw_transaction(
1266                                 dice->unit, TCODE_READ_QUADLET_REQUEST,
1267                                 global_address(dice, GLOBAL_CLOCK_CAPABILITIES),
1268                                 &value, 4, 0);
1269                 if (err < 0)
1270                         return err;
1271                 dice->clock_caps = be32_to_cpu(value);
1272         } else {
1273                 /* this should be supported by any device */
1274                 dice->clock_caps = CLOCK_CAP_RATE_44100 |
1275                                    CLOCK_CAP_RATE_48000 |
1276                                    CLOCK_CAP_SOURCE_ARX1 |
1277                                    CLOCK_CAP_SOURCE_INTERNAL;
1278         }
1279
1280         for (mode = 2; mode >= 0; --mode) {
1281                 err = dice_read_mode_params(dice, mode);
1282                 if (err < 0)
1283                         return err;
1284         }
1285
1286         return 0;
1287 }
1288
1289 static void dice_card_strings(struct dice *dice)
1290 {
1291         struct snd_card *card = dice->card;
1292         struct fw_device *dev = fw_parent_device(dice->unit);
1293         char vendor[32], model[32];
1294         unsigned int i;
1295         int err;
1296
1297         strcpy(card->driver, "DICE");
1298
1299         strcpy(card->shortname, "DICE");
1300         BUILD_BUG_ON(NICK_NAME_SIZE < sizeof(card->shortname));
1301         err = snd_fw_transaction(dice->unit, TCODE_READ_BLOCK_REQUEST,
1302                                  global_address(dice, GLOBAL_NICK_NAME),
1303                                  card->shortname, sizeof(card->shortname), 0);
1304         if (err >= 0) {
1305                 /* DICE strings are returned in "always-wrong" endianness */
1306                 BUILD_BUG_ON(sizeof(card->shortname) % 4 != 0);
1307                 for (i = 0; i < sizeof(card->shortname); i += 4)
1308                         swab32s((u32 *)&card->shortname[i]);
1309                 card->shortname[sizeof(card->shortname) - 1] = '\0';
1310         }
1311
1312         strcpy(vendor, "?");
1313         fw_csr_string(dev->config_rom + 5, CSR_VENDOR, vendor, sizeof(vendor));
1314         strcpy(model, "?");
1315         fw_csr_string(dice->unit->directory, CSR_MODEL, model, sizeof(model));
1316         snprintf(card->longname, sizeof(card->longname),
1317                  "%s %s (serial %u) at %s, S%d",
1318                  vendor, model, dev->config_rom[4] & 0x3fffff,
1319                  dev_name(&dice->unit->device), 100 << dev->max_speed);
1320
1321         strcpy(card->mixername, "DICE");
1322 }
1323
1324 static int dice_probe(struct fw_unit *unit, const struct ieee1394_device_id *id)
1325 {
1326         struct snd_card *card;
1327         struct dice *dice;
1328         __be32 clock_sel;
1329         int err;
1330
1331         err = dice_interface_check(unit);
1332         if (err < 0)
1333                 return err;
1334
1335         err = snd_card_new(&unit->device, -1, NULL, THIS_MODULE,
1336                            sizeof(*dice), &card);
1337         if (err < 0)
1338                 return err;
1339
1340         dice = card->private_data;
1341         dice->card = card;
1342         spin_lock_init(&dice->lock);
1343         mutex_init(&dice->mutex);
1344         dice->unit = unit;
1345         init_completion(&dice->clock_accepted);
1346         init_waitqueue_head(&dice->hwdep_wait);
1347
1348         dice->notification_handler.length = 4;
1349         dice->notification_handler.address_callback = dice_notification;
1350         dice->notification_handler.callback_data = dice;
1351         err = fw_core_add_address_handler(&dice->notification_handler,
1352                                           &fw_high_memory_region);
1353         if (err < 0)
1354                 goto err_mutex;
1355
1356         err = dice_owner_set(dice);
1357         if (err < 0)
1358                 goto err_notification_handler;
1359
1360         err = dice_read_params(dice);
1361         if (err < 0)
1362                 goto err_owner;
1363
1364         err = fw_iso_resources_init(&dice->resources, unit);
1365         if (err < 0)
1366                 goto err_owner;
1367         dice->resources.channels_mask = 0x00000000ffffffffuLL;
1368
1369         err = amdtp_stream_init(&dice->stream, unit, AMDTP_OUT_STREAM,
1370                                 CIP_BLOCKING);
1371         if (err < 0)
1372                 goto err_resources;
1373
1374         card->private_free = dice_card_free;
1375
1376         dice_card_strings(dice);
1377
1378         err = snd_fw_transaction(unit, TCODE_READ_QUADLET_REQUEST,
1379                                  global_address(dice, GLOBAL_CLOCK_SELECT),
1380                                  &clock_sel, 4, 0);
1381         if (err < 0)
1382                 goto error;
1383         clock_sel &= cpu_to_be32(~CLOCK_SOURCE_MASK);
1384         clock_sel |= cpu_to_be32(CLOCK_SOURCE_ARX1);
1385         err = snd_fw_transaction(unit, TCODE_WRITE_QUADLET_REQUEST,
1386                                  global_address(dice, GLOBAL_CLOCK_SELECT),
1387                                  &clock_sel, 4, 0);
1388         if (err < 0)
1389                 goto error;
1390
1391         err = dice_create_pcm(dice);
1392         if (err < 0)
1393                 goto error;
1394
1395         err = dice_create_hwdep(dice);
1396         if (err < 0)
1397                 goto error;
1398
1399         dice_create_proc(dice);
1400
1401         err = snd_card_register(card);
1402         if (err < 0)
1403                 goto error;
1404
1405         dev_set_drvdata(&unit->device, dice);
1406
1407         return 0;
1408
1409 err_resources:
1410         fw_iso_resources_destroy(&dice->resources);
1411 err_owner:
1412         dice_owner_clear(dice);
1413 err_notification_handler:
1414         fw_core_remove_address_handler(&dice->notification_handler);
1415 err_mutex:
1416         mutex_destroy(&dice->mutex);
1417 error:
1418         snd_card_free(card);
1419         return err;
1420 }
1421
1422 static void dice_remove(struct fw_unit *unit)
1423 {
1424         struct dice *dice = dev_get_drvdata(&unit->device);
1425
1426         amdtp_stream_pcm_abort(&dice->stream);
1427
1428         snd_card_disconnect(dice->card);
1429
1430         mutex_lock(&dice->mutex);
1431
1432         dice_stream_stop(dice);
1433         dice_owner_clear(dice);
1434
1435         mutex_unlock(&dice->mutex);
1436
1437         snd_card_free_when_closed(dice->card);
1438 }
1439
1440 static void dice_bus_reset(struct fw_unit *unit)
1441 {
1442         struct dice *dice = dev_get_drvdata(&unit->device);
1443
1444         /*
1445          * On a bus reset, the DICE firmware disables streaming and then goes
1446          * off contemplating its own navel for hundreds of milliseconds before
1447          * it can react to any of our attempts to reenable streaming.  This
1448          * means that we lose synchronization anyway, so we force our streams
1449          * to stop so that the application can restart them in an orderly
1450          * manner.
1451          */
1452         amdtp_stream_pcm_abort(&dice->stream);
1453
1454         mutex_lock(&dice->mutex);
1455
1456         dice->global_enabled = false;
1457         dice_stream_stop_packets(dice);
1458
1459         dice_owner_update(dice);
1460
1461         fw_iso_resources_update(&dice->resources);
1462
1463         mutex_unlock(&dice->mutex);
1464 }
1465
1466 #define DICE_INTERFACE  0x000001
1467
1468 static const struct ieee1394_device_id dice_id_table[] = {
1469         {
1470                 .match_flags = IEEE1394_MATCH_VERSION,
1471                 .version     = DICE_INTERFACE,
1472         },
1473         { }
1474 };
1475 MODULE_DEVICE_TABLE(ieee1394, dice_id_table);
1476
1477 static struct fw_driver dice_driver = {
1478         .driver   = {
1479                 .owner  = THIS_MODULE,
1480                 .name   = KBUILD_MODNAME,
1481                 .bus    = &fw_bus_type,
1482         },
1483         .probe    = dice_probe,
1484         .update   = dice_bus_reset,
1485         .remove   = dice_remove,
1486         .id_table = dice_id_table,
1487 };
1488
1489 static int __init alsa_dice_init(void)
1490 {
1491         return driver_register(&dice_driver.driver);
1492 }
1493
1494 static void __exit alsa_dice_exit(void)
1495 {
1496         driver_unregister(&dice_driver.driver);
1497 }
1498
1499 module_init(alsa_dice_init);
1500 module_exit(alsa_dice_exit);