]> git.karo-electronics.de Git - karo-tx-linux.git/blob - sound/firewire/dice.c
ALSA: dice: get rate-dependent parameters
[karo-tx-linux.git] / sound / firewire / dice.c
1 /*
2  * TC Applied Technologies Digital Interface Communications Engine driver
3  *
4  * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
5  * Licensed under the terms of the GNU General Public License, version 2.
6  */
7
8 #include <linux/compat.h>
9 #include <linux/completion.h>
10 #include <linux/delay.h>
11 #include <linux/device.h>
12 #include <linux/firewire.h>
13 #include <linux/firewire-constants.h>
14 #include <linux/jiffies.h>
15 #include <linux/module.h>
16 #include <linux/mod_devicetable.h>
17 #include <linux/mutex.h>
18 #include <linux/slab.h>
19 #include <linux/spinlock.h>
20 #include <linux/wait.h>
21 #include <sound/control.h>
22 #include <sound/core.h>
23 #include <sound/firewire.h>
24 #include <sound/hwdep.h>
25 #include <sound/initval.h>
26 #include <sound/pcm.h>
27 #include <sound/pcm_params.h>
28 #include "amdtp.h"
29 #include "iso-resources.h"
30 #include "lib.h"
31 #include "dice-interface.h"
32
33
34 struct dice {
35         struct snd_card *card;
36         struct fw_unit *unit;
37         spinlock_t lock;
38         struct mutex mutex;
39         unsigned int global_offset;
40         unsigned int rx_offset;
41         unsigned int clock_caps;
42         unsigned int rx_channels[3];
43         unsigned int rx_midi_ports[3];
44         struct fw_address_handler notification_handler;
45         int owner_generation;
46         int dev_lock_count; /* > 0 driver, < 0 userspace */
47         bool dev_lock_changed;
48         bool global_enabled;
49         struct completion clock_accepted;
50         wait_queue_head_t hwdep_wait;
51         u32 notification_bits;
52         struct fw_iso_resources resources;
53         struct amdtp_out_stream stream;
54 };
55
56 MODULE_DESCRIPTION("DICE driver");
57 MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
58 MODULE_LICENSE("GPL v2");
59
60 static const unsigned int dice_rates[] = {
61         /* mode 0 */
62         [0] =  32000,
63         [1] =  44100,
64         [2] =  48000,
65         /* mode 1 */
66         [3] =  88200,
67         [4] =  96000,
68         /* mode 2 */
69         [5] = 176400,
70         [6] = 192000,
71 };
72
73 static unsigned int rate_index_to_mode(unsigned int rate_index)
74 {
75         return ((int)rate_index - 1) / 2;
76 }
77
78 static void dice_lock_changed(struct dice *dice)
79 {
80         dice->dev_lock_changed = true;
81         wake_up(&dice->hwdep_wait);
82 }
83
84 static int dice_try_lock(struct dice *dice)
85 {
86         int err;
87
88         spin_lock_irq(&dice->lock);
89
90         if (dice->dev_lock_count < 0) {
91                 err = -EBUSY;
92                 goto out;
93         }
94
95         if (dice->dev_lock_count++ == 0)
96                 dice_lock_changed(dice);
97         err = 0;
98
99 out:
100         spin_unlock_irq(&dice->lock);
101
102         return err;
103 }
104
105 static void dice_unlock(struct dice *dice)
106 {
107         spin_lock_irq(&dice->lock);
108
109         if (WARN_ON(dice->dev_lock_count <= 0))
110                 goto out;
111
112         if (--dice->dev_lock_count == 0)
113                 dice_lock_changed(dice);
114
115 out:
116         spin_unlock_irq(&dice->lock);
117 }
118
119 static inline u64 global_address(struct dice *dice, unsigned int offset)
120 {
121         return DICE_PRIVATE_SPACE + dice->global_offset + offset;
122 }
123
124 // TODO: rx index
125 static inline u64 rx_address(struct dice *dice, unsigned int offset)
126 {
127         return DICE_PRIVATE_SPACE + dice->rx_offset + offset;
128 }
129
130 static int dice_owner_set(struct dice *dice)
131 {
132         struct fw_device *device = fw_parent_device(dice->unit);
133         __be64 *buffer;
134         int err, errors = 0;
135
136         buffer = kmalloc(2 * 8, GFP_KERNEL);
137         if (!buffer)
138                 return -ENOMEM;
139
140         for (;;) {
141                 buffer[0] = cpu_to_be64(OWNER_NO_OWNER);
142                 buffer[1] = cpu_to_be64(
143                         ((u64)device->card->node_id << OWNER_NODE_SHIFT) |
144                         dice->notification_handler.offset);
145
146                 dice->owner_generation = device->generation;
147                 smp_rmb(); /* node_id vs. generation */
148                 err = snd_fw_transaction(dice->unit,
149                                          TCODE_LOCK_COMPARE_SWAP,
150                                          global_address(dice, GLOBAL_OWNER),
151                                          buffer, 2 * 8,
152                                          FW_FIXED_GENERATION |
153                                                         dice->owner_generation);
154
155                 if (err == 0) {
156                         if (buffer[0] != cpu_to_be64(OWNER_NO_OWNER)) {
157                                 dev_err(&dice->unit->device,
158                                         "device is already in use\n");
159                                 err = -EBUSY;
160                         }
161                         break;
162                 }
163                 if (err != -EAGAIN || ++errors >= 3)
164                         break;
165
166                 msleep(20);
167         }
168
169         kfree(buffer);
170
171         return err;
172 }
173
174 static int dice_owner_update(struct dice *dice)
175 {
176         struct fw_device *device = fw_parent_device(dice->unit);
177         __be64 *buffer;
178         int err;
179
180         if (dice->owner_generation == -1)
181                 return 0;
182
183         buffer = kmalloc(2 * 8, GFP_KERNEL);
184         if (!buffer)
185                 return -ENOMEM;
186
187         buffer[0] = cpu_to_be64(OWNER_NO_OWNER);
188         buffer[1] = cpu_to_be64(
189                 ((u64)device->card->node_id << OWNER_NODE_SHIFT) |
190                 dice->notification_handler.offset);
191
192         dice->owner_generation = device->generation;
193         smp_rmb(); /* node_id vs. generation */
194         err = snd_fw_transaction(dice->unit, TCODE_LOCK_COMPARE_SWAP,
195                                  global_address(dice, GLOBAL_OWNER),
196                                  buffer, 2 * 8,
197                                  FW_FIXED_GENERATION | dice->owner_generation);
198
199         if (err == 0) {
200                 if (buffer[0] != cpu_to_be64(OWNER_NO_OWNER)) {
201                         dev_err(&dice->unit->device,
202                                 "device is already in use\n");
203                         err = -EBUSY;
204                 }
205         } else if (err == -EAGAIN) {
206                 err = 0; /* try again later */
207         }
208
209         kfree(buffer);
210
211         if (err < 0)
212                 dice->owner_generation = -1;
213
214         return err;
215 }
216
217 static void dice_owner_clear(struct dice *dice)
218 {
219         struct fw_device *device = fw_parent_device(dice->unit);
220         __be64 *buffer;
221
222         buffer = kmalloc(2 * 8, GFP_KERNEL);
223         if (!buffer)
224                 return;
225
226         buffer[0] = cpu_to_be64(
227                 ((u64)device->card->node_id << OWNER_NODE_SHIFT) |
228                 dice->notification_handler.offset);
229         buffer[1] = cpu_to_be64(OWNER_NO_OWNER);
230         snd_fw_transaction(dice->unit, TCODE_LOCK_COMPARE_SWAP,
231                            global_address(dice, GLOBAL_OWNER),
232                            buffer, 2 * 8, FW_QUIET |
233                            FW_FIXED_GENERATION | dice->owner_generation);
234
235         kfree(buffer);
236
237         dice->owner_generation = -1;
238 }
239
240 static int dice_enable_set(struct dice *dice)
241 {
242         __be32 value;
243         int err;
244
245         value = cpu_to_be32(1);
246         err = snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST,
247                                  global_address(dice, GLOBAL_ENABLE),
248                                  &value, 4,
249                                  FW_FIXED_GENERATION | dice->owner_generation);
250         if (err < 0)
251                 return err;
252
253         dice->global_enabled = true;
254
255         return 0;
256 }
257
258 static void dice_enable_clear(struct dice *dice)
259 {
260         __be32 value;
261
262         if (!dice->global_enabled)
263                 return;
264
265         value = 0;
266         snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST,
267                            global_address(dice, GLOBAL_ENABLE),
268                            &value, 4, FW_QUIET |
269                            FW_FIXED_GENERATION | dice->owner_generation);
270
271         dice->global_enabled = false;
272 }
273
274 static void dice_notification(struct fw_card *card, struct fw_request *request,
275                               int tcode, int destination, int source,
276                               int generation, unsigned long long offset,
277                               void *data, size_t length, void *callback_data)
278 {
279         struct dice *dice = callback_data;
280         u32 bits;
281         unsigned long flags;
282
283         if (tcode != TCODE_WRITE_QUADLET_REQUEST) {
284                 fw_send_response(card, request, RCODE_TYPE_ERROR);
285                 return;
286         }
287         if ((offset & 3) != 0) {
288                 fw_send_response(card, request, RCODE_ADDRESS_ERROR);
289                 return;
290         }
291
292         bits = be32_to_cpup(data);
293
294         spin_lock_irqsave(&dice->lock, flags);
295         dice->notification_bits |= bits;
296         spin_unlock_irqrestore(&dice->lock, flags);
297
298         fw_send_response(card, request, RCODE_COMPLETE);
299
300         if (bits & NOTIFY_CLOCK_ACCEPTED)
301                 complete(&dice->clock_accepted);
302         wake_up(&dice->hwdep_wait);
303 }
304
305 static int dice_open(struct snd_pcm_substream *substream)
306 {
307         static const struct snd_pcm_hardware hardware = {
308                 .info = SNDRV_PCM_INFO_MMAP |
309                         SNDRV_PCM_INFO_MMAP_VALID |
310                         SNDRV_PCM_INFO_BATCH |
311                         SNDRV_PCM_INFO_INTERLEAVED |
312                         SNDRV_PCM_INFO_BLOCK_TRANSFER,
313                 .formats = AMDTP_OUT_PCM_FORMAT_BITS,
314                 .buffer_bytes_max = 16 * 1024 * 1024,
315                 .period_bytes_min = 1,
316                 .period_bytes_max = UINT_MAX,
317                 .periods_min = 1,
318                 .periods_max = UINT_MAX,
319         };
320         struct dice *dice = substream->private_data;
321         struct snd_pcm_runtime *runtime = substream->runtime;
322         __be32 clock_sel, data[2];
323         unsigned int rate_index, number_audio, number_midi;
324         int err;
325
326         err = dice_try_lock(dice);
327         if (err < 0)
328                 goto error;
329
330         err = snd_fw_transaction(dice->unit, TCODE_READ_QUADLET_REQUEST,
331                                  global_address(dice, GLOBAL_CLOCK_SELECT),
332                                  &clock_sel, 4, 0);
333         if (err < 0)
334                 goto err_lock;
335         rate_index = (be32_to_cpu(clock_sel) & CLOCK_RATE_MASK)
336                                                         >> CLOCK_RATE_SHIFT;
337         if (rate_index >= ARRAY_SIZE(dice_rates)) {
338                 err = -ENXIO;
339                 goto err_lock;
340         }
341
342         err = snd_fw_transaction(dice->unit, TCODE_READ_BLOCK_REQUEST,
343                                  rx_address(dice, RX_NUMBER_AUDIO),
344                                  data, 2 * 4, 0);
345         if (err < 0)
346                 goto err_lock;
347         number_audio = be32_to_cpu(data[0]);
348         number_midi = be32_to_cpu(data[1]);
349
350         runtime->hw = hardware;
351
352         runtime->hw.rates = snd_pcm_rate_to_rate_bit(dice_rates[rate_index]);
353         snd_pcm_limit_hw_rates(runtime);
354
355         runtime->hw.channels_min = number_audio;
356         runtime->hw.channels_max = number_audio;
357
358         amdtp_out_stream_set_parameters(&dice->stream, dice_rates[rate_index],
359                                         number_audio, number_midi);
360
361         err = snd_pcm_hw_constraint_step(runtime, 0,
362                                          SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
363                                          amdtp_syt_intervals[rate_index]);
364         if (err < 0)
365                 goto err_lock;
366         err = snd_pcm_hw_constraint_step(runtime, 0,
367                                          SNDRV_PCM_HW_PARAM_BUFFER_SIZE,
368                                          amdtp_syt_intervals[rate_index]);
369         if (err < 0)
370                 goto err_lock;
371
372         err = snd_pcm_hw_constraint_minmax(runtime,
373                                            SNDRV_PCM_HW_PARAM_PERIOD_TIME,
374                                            5000, UINT_MAX);
375         if (err < 0)
376                 goto err_lock;
377
378         err = snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
379         if (err < 0)
380                 goto err_lock;
381
382         return 0;
383
384 err_lock:
385         dice_unlock(dice);
386 error:
387         return err;
388 }
389
390 static int dice_close(struct snd_pcm_substream *substream)
391 {
392         struct dice *dice = substream->private_data;
393
394         dice_unlock(dice);
395
396         return 0;
397 }
398
399 static int dice_stream_start_packets(struct dice *dice)
400 {
401         int err;
402
403         if (amdtp_out_stream_running(&dice->stream))
404                 return 0;
405
406         err = amdtp_out_stream_start(&dice->stream, dice->resources.channel,
407                                      fw_parent_device(dice->unit)->max_speed);
408         if (err < 0)
409                 return err;
410
411         err = dice_enable_set(dice);
412         if (err < 0) {
413                 amdtp_out_stream_stop(&dice->stream);
414                 return err;
415         }
416
417         return 0;
418 }
419
420 static int dice_stream_start(struct dice *dice)
421 {
422         __be32 channel;
423         int err;
424
425         if (!dice->resources.allocated) {
426                 err = fw_iso_resources_allocate(&dice->resources,
427                                 amdtp_out_stream_get_max_payload(&dice->stream),
428                                 fw_parent_device(dice->unit)->max_speed);
429                 if (err < 0)
430                         goto error;
431
432                 channel = cpu_to_be32(dice->resources.channel);
433                 err = snd_fw_transaction(dice->unit,
434                                          TCODE_WRITE_QUADLET_REQUEST,
435                                          rx_address(dice, RX_ISOCHRONOUS),
436                                          &channel, 4, 0);
437                 if (err < 0)
438                         goto err_resources;
439         }
440
441         err = dice_stream_start_packets(dice);
442         if (err < 0)
443                 goto err_rx_channel;
444
445         return 0;
446
447 err_rx_channel:
448         channel = cpu_to_be32((u32)-1);
449         snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST,
450                            rx_address(dice, RX_ISOCHRONOUS), &channel, 4, 0);
451 err_resources:
452         fw_iso_resources_free(&dice->resources);
453 error:
454         return err;
455 }
456
457 static void dice_stream_stop_packets(struct dice *dice)
458 {
459         if (amdtp_out_stream_running(&dice->stream)) {
460                 dice_enable_clear(dice);
461                 amdtp_out_stream_stop(&dice->stream);
462         }
463 }
464
465 static void dice_stream_stop(struct dice *dice)
466 {
467         __be32 channel;
468
469         dice_stream_stop_packets(dice);
470
471         if (!dice->resources.allocated)
472                 return;
473
474         channel = cpu_to_be32((u32)-1);
475         snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST,
476                            rx_address(dice, RX_ISOCHRONOUS), &channel, 4, 0);
477
478         fw_iso_resources_free(&dice->resources);
479 }
480
481 static int dice_change_rate(struct dice *dice, unsigned int clock_rate)
482 {
483         __be32 value;
484         int err;
485
486         INIT_COMPLETION(dice->clock_accepted);
487
488         value = cpu_to_be32(clock_rate | CLOCK_SOURCE_ARX1);
489         err = snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST,
490                                  global_address(dice, GLOBAL_CLOCK_SELECT),
491                                  &value, 4, 0);
492         if (err < 0)
493                 return err;
494
495         wait_for_completion_timeout(&dice->clock_accepted,
496                                     msecs_to_jiffies(100));
497
498         return 0;
499 }
500
501 static int dice_hw_params(struct snd_pcm_substream *substream,
502                           struct snd_pcm_hw_params *hw_params)
503 {
504         struct dice *dice = substream->private_data;
505         int err;
506
507         mutex_lock(&dice->mutex);
508         dice_stream_stop(dice);
509         mutex_unlock(&dice->mutex);
510
511         err = snd_pcm_lib_alloc_vmalloc_buffer(substream,
512                                                params_buffer_bytes(hw_params));
513         if (err < 0)
514                 goto error;
515
516         amdtp_out_stream_set_pcm_format(&dice->stream,
517                                         params_format(hw_params));
518
519         return 0;
520
521 error:
522         return err;
523 }
524
525 static int dice_hw_free(struct snd_pcm_substream *substream)
526 {
527         struct dice *dice = substream->private_data;
528
529         mutex_lock(&dice->mutex);
530         dice_stream_stop(dice);
531         mutex_unlock(&dice->mutex);
532
533         return snd_pcm_lib_free_vmalloc_buffer(substream);
534 }
535
536 static int dice_prepare(struct snd_pcm_substream *substream)
537 {
538         struct dice *dice = substream->private_data;
539         int err;
540
541         mutex_lock(&dice->mutex);
542
543         if (amdtp_out_streaming_error(&dice->stream))
544                 dice_stream_stop_packets(dice);
545
546         err = dice_stream_start(dice);
547         if (err < 0) {
548                 mutex_unlock(&dice->mutex);
549                 return err;
550         }
551
552         mutex_unlock(&dice->mutex);
553
554         amdtp_out_stream_pcm_prepare(&dice->stream);
555
556         return 0;
557 }
558
559 static int dice_trigger(struct snd_pcm_substream *substream, int cmd)
560 {
561         struct dice *dice = substream->private_data;
562         struct snd_pcm_substream *pcm;
563
564         switch (cmd) {
565         case SNDRV_PCM_TRIGGER_START:
566                 pcm = substream;
567                 break;
568         case SNDRV_PCM_TRIGGER_STOP:
569                 pcm = NULL;
570                 break;
571         default:
572                 return -EINVAL;
573         }
574         amdtp_out_stream_pcm_trigger(&dice->stream, pcm);
575
576         return 0;
577 }
578
579 static snd_pcm_uframes_t dice_pointer(struct snd_pcm_substream *substream)
580 {
581         struct dice *dice = substream->private_data;
582
583         return amdtp_out_stream_pcm_pointer(&dice->stream);
584 }
585
586 static int dice_create_pcm(struct dice *dice)
587 {
588         static struct snd_pcm_ops ops = {
589                 .open      = dice_open,
590                 .close     = dice_close,
591                 .ioctl     = snd_pcm_lib_ioctl,
592                 .hw_params = dice_hw_params,
593                 .hw_free   = dice_hw_free,
594                 .prepare   = dice_prepare,
595                 .trigger   = dice_trigger,
596                 .pointer   = dice_pointer,
597                 .page      = snd_pcm_lib_get_vmalloc_page,
598                 .mmap      = snd_pcm_lib_mmap_vmalloc,
599         };
600         struct snd_pcm *pcm;
601         int err;
602
603         err = snd_pcm_new(dice->card, "DICE", 0, 1, 0, &pcm);
604         if (err < 0)
605                 return err;
606         pcm->private_data = dice;
607         strcpy(pcm->name, dice->card->shortname);
608         pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream->ops = &ops;
609
610         return 0;
611 }
612
613 static long dice_hwdep_read(struct snd_hwdep *hwdep, char __user *buf,
614                             long count, loff_t *offset)
615 {
616         struct dice *dice = hwdep->private_data;
617         DEFINE_WAIT(wait);
618         union snd_firewire_event event;
619
620         spin_lock_irq(&dice->lock);
621
622         while (!dice->dev_lock_changed && dice->notification_bits == 0) {
623                 prepare_to_wait(&dice->hwdep_wait, &wait, TASK_INTERRUPTIBLE);
624                 spin_unlock_irq(&dice->lock);
625                 schedule();
626                 finish_wait(&dice->hwdep_wait, &wait);
627                 if (signal_pending(current))
628                         return -ERESTARTSYS;
629                 spin_lock_irq(&dice->lock);
630         }
631
632         memset(&event, 0, sizeof(event));
633         if (dice->dev_lock_changed) {
634                 event.lock_status.type = SNDRV_FIREWIRE_EVENT_LOCK_STATUS;
635                 event.lock_status.status = dice->dev_lock_count > 0;
636                 dice->dev_lock_changed = false;
637
638                 count = min(count, (long)sizeof(event.lock_status));
639         } else {
640                 event.dice_notification.type = SNDRV_FIREWIRE_EVENT_DICE_NOTIFICATION;
641                 event.dice_notification.notification = dice->notification_bits;
642                 dice->notification_bits = 0;
643
644                 count = min(count, (long)sizeof(event.dice_notification));
645         }
646
647         spin_unlock_irq(&dice->lock);
648
649         if (copy_to_user(buf, &event, count))
650                 return -EFAULT;
651
652         return count;
653 }
654
655 static unsigned int dice_hwdep_poll(struct snd_hwdep *hwdep, struct file *file,
656                                     poll_table *wait)
657 {
658         struct dice *dice = hwdep->private_data;
659         unsigned int events;
660
661         poll_wait(file, &dice->hwdep_wait, wait);
662
663         spin_lock_irq(&dice->lock);
664         if (dice->dev_lock_changed || dice->notification_bits != 0)
665                 events = POLLIN | POLLRDNORM;
666         else
667                 events = 0;
668         spin_unlock_irq(&dice->lock);
669
670         return events;
671 }
672
673 static int dice_hwdep_get_info(struct dice *dice, void __user *arg)
674 {
675         struct fw_device *dev = fw_parent_device(dice->unit);
676         struct snd_firewire_get_info info;
677
678         memset(&info, 0, sizeof(info));
679         info.type = SNDRV_FIREWIRE_TYPE_DICE;
680         info.card = dev->card->index;
681         *(__be32 *)&info.guid[0] = cpu_to_be32(dev->config_rom[3]);
682         *(__be32 *)&info.guid[4] = cpu_to_be32(dev->config_rom[4]);
683         strlcpy(info.device_name, dev_name(&dev->device),
684                 sizeof(info.device_name));
685
686         if (copy_to_user(arg, &info, sizeof(info)))
687                 return -EFAULT;
688
689         return 0;
690 }
691
692 static int dice_hwdep_lock(struct dice *dice)
693 {
694         int err;
695
696         spin_lock_irq(&dice->lock);
697
698         if (dice->dev_lock_count == 0) {
699                 dice->dev_lock_count = -1;
700                 err = 0;
701         } else {
702                 err = -EBUSY;
703         }
704
705         spin_unlock_irq(&dice->lock);
706
707         return err;
708 }
709
710 static int dice_hwdep_unlock(struct dice *dice)
711 {
712         int err;
713
714         spin_lock_irq(&dice->lock);
715
716         if (dice->dev_lock_count == -1) {
717                 dice->dev_lock_count = 0;
718                 err = 0;
719         } else {
720                 err = -EBADFD;
721         }
722
723         spin_unlock_irq(&dice->lock);
724
725         return err;
726 }
727
728 static int dice_hwdep_release(struct snd_hwdep *hwdep, struct file *file)
729 {
730         struct dice *dice = hwdep->private_data;
731
732         spin_lock_irq(&dice->lock);
733         if (dice->dev_lock_count == -1)
734                 dice->dev_lock_count = 0;
735         spin_unlock_irq(&dice->lock);
736
737         return 0;
738 }
739
740 static int dice_hwdep_ioctl(struct snd_hwdep *hwdep, struct file *file,
741                             unsigned int cmd, unsigned long arg)
742 {
743         struct dice *dice = hwdep->private_data;
744
745         switch (cmd) {
746         case SNDRV_FIREWIRE_IOCTL_GET_INFO:
747                 return dice_hwdep_get_info(dice, (void __user *)arg);
748         case SNDRV_FIREWIRE_IOCTL_LOCK:
749                 return dice_hwdep_lock(dice);
750         case SNDRV_FIREWIRE_IOCTL_UNLOCK:
751                 return dice_hwdep_unlock(dice);
752         default:
753                 return -ENOIOCTLCMD;
754         }
755 }
756
757 #ifdef CONFIG_COMPAT
758 static int dice_hwdep_compat_ioctl(struct snd_hwdep *hwdep, struct file *file,
759                                    unsigned int cmd, unsigned long arg)
760 {
761         return dice_hwdep_ioctl(hwdep, file, cmd,
762                                 (unsigned long)compat_ptr(arg));
763 }
764 #else
765 #define dice_hwdep_compat_ioctl NULL
766 #endif
767
768 static int dice_create_hwdep(struct dice *dice)
769 {
770         static const struct snd_hwdep_ops ops = {
771                 .read         = dice_hwdep_read,
772                 .release      = dice_hwdep_release,
773                 .poll         = dice_hwdep_poll,
774                 .ioctl        = dice_hwdep_ioctl,
775                 .ioctl_compat = dice_hwdep_compat_ioctl,
776         };
777         struct snd_hwdep *hwdep;
778         int err;
779
780         err = snd_hwdep_new(dice->card, "DICE", 0, &hwdep);
781         if (err < 0)
782                 return err;
783         strcpy(hwdep->name, "DICE");
784         hwdep->iface = SNDRV_HWDEP_IFACE_FW_DICE;
785         hwdep->ops = ops;
786         hwdep->private_data = dice;
787         hwdep->exclusive = true;
788
789         return 0;
790 }
791
792 static void dice_card_free(struct snd_card *card)
793 {
794         struct dice *dice = card->private_data;
795
796         amdtp_out_stream_destroy(&dice->stream);
797         fw_core_remove_address_handler(&dice->notification_handler);
798         mutex_destroy(&dice->mutex);
799 }
800
801 #define DICE_CATEGORY_ID 0x04
802
803 static int dice_interface_check(struct fw_unit *unit)
804 {
805         static const int min_values[10] = {
806                 10, 0x64 / 4,
807                 10, 0x18 / 4,
808                 10, 0x18 / 4,
809                 0, 0,
810                 0, 0,
811         };
812         struct fw_device *device = fw_parent_device(unit);
813         struct fw_csr_iterator it;
814         int key, value, vendor = -1, model = -1, err;
815         unsigned int i;
816         __be32 pointers[ARRAY_SIZE(min_values)];
817         __be32 version;
818
819         /*
820          * Check that GUID and unit directory are constructed according to DICE
821          * rules, i.e., that the specifier ID is the GUID's OUI, and that the
822          * GUID chip ID consists of the 8-bit DICE category ID, the 10-bit
823          * product ID, and a 22-bit serial number.
824          */
825         fw_csr_iterator_init(&it, unit->directory);
826         while (fw_csr_iterator_next(&it, &key, &value)) {
827                 switch (key) {
828                 case CSR_SPECIFIER_ID:
829                         vendor = value;
830                         break;
831                 case CSR_MODEL:
832                         model = value;
833                         break;
834                 }
835         }
836         if (device->config_rom[3] != ((vendor << 8) | DICE_CATEGORY_ID) ||
837             device->config_rom[4] >> 22 != model)
838                 return -ENODEV;
839
840         /*
841          * Check that the sub address spaces exist and are located inside the
842          * private address space.  The minimum values are chosen so that all
843          * minimally required registers are included.
844          */
845         err = snd_fw_transaction(unit, TCODE_READ_BLOCK_REQUEST,
846                                  DICE_PRIVATE_SPACE,
847                                  pointers, sizeof(pointers), 0);
848         if (err < 0)
849                 return -ENODEV;
850         for (i = 0; i < ARRAY_SIZE(pointers); ++i) {
851                 value = be32_to_cpu(pointers[i]);
852                 if (value < min_values[i] || value >= 0x40000)
853                         return -ENODEV;
854         }
855
856         /*
857          * Check that the implemented DICE driver specification major version
858          * number matches.
859          */
860         err = snd_fw_transaction(unit, TCODE_READ_QUADLET_REQUEST,
861                                  DICE_PRIVATE_SPACE +
862                                  be32_to_cpu(pointers[0]) * 4 + GLOBAL_VERSION,
863                                  &version, 4, 0);
864         if (err < 0)
865                 return -ENODEV;
866         if ((version & cpu_to_be32(0xff000000)) != cpu_to_be32(0x01000000)) {
867                 dev_err(&unit->device,
868                         "unknown DICE version: 0x%08x\n", be32_to_cpu(version));
869                 return -ENODEV;
870         }
871
872         return 0;
873 }
874
875 static int highest_supported_mode_rate(struct dice *dice, unsigned int mode)
876 {
877         int i;
878
879         for (i = ARRAY_SIZE(dice_rates) - 1; i >= 0; --i)
880                 if ((dice->clock_caps & (1 << i)) &&
881                     rate_index_to_mode(i) == mode)
882                         return i;
883
884         return -1;
885 }
886
887 static int dice_read_mode_params(struct dice *dice, unsigned int mode)
888 {
889         __be32 values[2];
890         int rate_index, err;
891
892         rate_index = highest_supported_mode_rate(dice, mode);
893         if (rate_index < 0) {
894                 dice->rx_channels[mode] = 0;
895                 dice->rx_midi_ports[mode] = 0;
896                 return 0;
897         }
898
899         err = dice_change_rate(dice, rate_index << CLOCK_RATE_SHIFT);
900         if (err < 0)
901                 return err;
902
903         err = snd_fw_transaction(dice->unit, TCODE_READ_BLOCK_REQUEST,
904                                  rx_address(dice, RX_NUMBER_AUDIO),
905                                  values, 2 * 4, 0);
906         if (err < 0)
907                 return err;
908
909         dice->rx_channels[mode]   = be32_to_cpu(values[0]);
910         dice->rx_midi_ports[mode] = be32_to_cpu(values[1]);
911
912         return 0;
913 }
914
915 static int dice_read_params(struct dice *dice)
916 {
917         __be32 pointers[6];
918         __be32 value;
919         int mode, err;
920
921         err = snd_fw_transaction(dice->unit, TCODE_READ_BLOCK_REQUEST,
922                                  DICE_PRIVATE_SPACE,
923                                  pointers, sizeof(pointers), 0);
924         if (err < 0)
925                 return err;
926
927         dice->global_offset = be32_to_cpu(pointers[0]) * 4;
928         dice->rx_offset = be32_to_cpu(pointers[4]) * 4;
929
930         /* some very old firmwares don't tell about their clock support */
931         if (be32_to_cpu(pointers[1]) * 4 >= GLOBAL_CLOCK_CAPABILITIES + 4) {
932                 err = snd_fw_transaction(
933                                 dice->unit, TCODE_READ_QUADLET_REQUEST,
934                                 global_address(dice, GLOBAL_CLOCK_CAPABILITIES),
935                                 &value, 4, 0);
936                 if (err < 0)
937                         return err;
938                 dice->clock_caps = be32_to_cpu(value);
939         } else {
940                 /* this should be supported by any device */
941                 dice->clock_caps = CLOCK_CAP_RATE_44100 |
942                                    CLOCK_CAP_RATE_48000 |
943                                    CLOCK_CAP_SOURCE_ARX1 |
944                                    CLOCK_CAP_SOURCE_INTERNAL;
945         }
946
947         for (mode = 2; mode >= 0; --mode) {
948                 err = dice_read_mode_params(dice, mode);
949                 if (err < 0)
950                         return err;
951         }
952
953         return 0;
954 }
955
956 static void dice_card_strings(struct dice *dice)
957 {
958         struct snd_card *card = dice->card;
959         struct fw_device *dev = fw_parent_device(dice->unit);
960         char vendor[32], model[32];
961         unsigned int i;
962         int err;
963
964         strcpy(card->driver, "DICE");
965
966         strcpy(card->shortname, "DICE");
967         BUILD_BUG_ON(NICK_NAME_SIZE < sizeof(card->shortname));
968         err = snd_fw_transaction(dice->unit, TCODE_READ_BLOCK_REQUEST,
969                                  global_address(dice, GLOBAL_NICK_NAME),
970                                  card->shortname, sizeof(card->shortname), 0);
971         if (err >= 0) {
972                 /* DICE strings are returned in "always-wrong" endianness */
973                 BUILD_BUG_ON(sizeof(card->shortname) % 4 != 0);
974                 for (i = 0; i < sizeof(card->shortname); i += 4)
975                         swab32s((u32 *)&card->shortname[i]);
976                 card->shortname[sizeof(card->shortname) - 1] = '\0';
977         }
978
979         strcpy(vendor, "?");
980         fw_csr_string(dev->config_rom + 5, CSR_VENDOR, vendor, sizeof(vendor));
981         strcpy(model, "?");
982         fw_csr_string(dice->unit->directory, CSR_MODEL, model, sizeof(model));
983         snprintf(card->longname, sizeof(card->longname),
984                  "%s %s (serial %u) at %s, S%d",
985                  vendor, model, dev->config_rom[4] & 0x3fffff,
986                  dev_name(&dice->unit->device), 100 << dev->max_speed);
987
988         strcpy(card->mixername, "DICE");
989 }
990
991 static int dice_probe(struct fw_unit *unit, const struct ieee1394_device_id *id)
992 {
993         struct snd_card *card;
994         struct dice *dice;
995         __be32 clock_sel;
996         int err;
997
998         err = dice_interface_check(unit);
999         if (err < 0)
1000                 return err;
1001
1002         err = snd_card_create(-1, NULL, THIS_MODULE, sizeof(*dice), &card);
1003         if (err < 0)
1004                 return err;
1005         snd_card_set_dev(card, &unit->device);
1006
1007         dice = card->private_data;
1008         dice->card = card;
1009         spin_lock_init(&dice->lock);
1010         mutex_init(&dice->mutex);
1011         dice->unit = unit;
1012         init_completion(&dice->clock_accepted);
1013         init_waitqueue_head(&dice->hwdep_wait);
1014
1015         dice->notification_handler.length = 4;
1016         dice->notification_handler.address_callback = dice_notification;
1017         dice->notification_handler.callback_data = dice;
1018         err = fw_core_add_address_handler(&dice->notification_handler,
1019                                           &fw_high_memory_region);
1020         if (err < 0)
1021                 goto err_mutex;
1022
1023         err = dice_owner_set(dice);
1024         if (err < 0)
1025                 goto err_notification_handler;
1026
1027         err = dice_read_params(dice);
1028         if (err < 0)
1029                 goto err_owner;
1030
1031         err = fw_iso_resources_init(&dice->resources, unit);
1032         if (err < 0)
1033                 goto err_owner;
1034         dice->resources.channels_mask = 0x00000000ffffffffuLL;
1035
1036         err = amdtp_out_stream_init(&dice->stream, unit,
1037                                     CIP_BLOCKING | CIP_HI_DUALWIRE);
1038         if (err < 0)
1039                 goto err_resources;
1040
1041         card->private_free = dice_card_free;
1042
1043         dice_card_strings(dice);
1044
1045         err = snd_fw_transaction(unit, TCODE_READ_QUADLET_REQUEST,
1046                                  global_address(dice, GLOBAL_CLOCK_SELECT),
1047                                  &clock_sel, 4, 0);
1048         if (err < 0)
1049                 goto error;
1050         clock_sel &= cpu_to_be32(~CLOCK_SOURCE_MASK);
1051         clock_sel |= cpu_to_be32(CLOCK_SOURCE_ARX1);
1052         err = snd_fw_transaction(unit, TCODE_WRITE_QUADLET_REQUEST,
1053                                  global_address(dice, GLOBAL_CLOCK_SELECT),
1054                                  &clock_sel, 4, 0);
1055         if (err < 0)
1056                 goto error;
1057
1058         err = dice_create_pcm(dice);
1059         if (err < 0)
1060                 goto error;
1061
1062         err = dice_create_hwdep(dice);
1063         if (err < 0)
1064                 goto error;
1065
1066         err = snd_card_register(card);
1067         if (err < 0)
1068                 goto error;
1069
1070         dev_set_drvdata(&unit->device, dice);
1071
1072         return 0;
1073
1074 err_resources:
1075         fw_iso_resources_destroy(&dice->resources);
1076 err_owner:
1077         dice_owner_clear(dice);
1078 err_notification_handler:
1079         fw_core_remove_address_handler(&dice->notification_handler);
1080 err_mutex:
1081         mutex_destroy(&dice->mutex);
1082 error:
1083         snd_card_free(card);
1084         return err;
1085 }
1086
1087 static void dice_remove(struct fw_unit *unit)
1088 {
1089         struct dice *dice = dev_get_drvdata(&unit->device);
1090
1091         amdtp_out_stream_pcm_abort(&dice->stream);
1092
1093         snd_card_disconnect(dice->card);
1094
1095         mutex_lock(&dice->mutex);
1096
1097         dice_stream_stop(dice);
1098         dice_owner_clear(dice);
1099
1100         mutex_unlock(&dice->mutex);
1101
1102         snd_card_free_when_closed(dice->card);
1103 }
1104
1105 static void dice_bus_reset(struct fw_unit *unit)
1106 {
1107         struct dice *dice = dev_get_drvdata(&unit->device);
1108
1109         /*
1110          * On a bus reset, the DICE firmware disables streaming and then goes
1111          * off contemplating its own navel for hundreds of milliseconds before
1112          * it can react to any of our attempts to reenable streaming.  This
1113          * means that we lose synchronization anyway, so we force our streams
1114          * to stop so that the application can restart them in an orderly
1115          * manner.
1116          */
1117         amdtp_out_stream_pcm_abort(&dice->stream);
1118
1119         mutex_lock(&dice->mutex);
1120
1121         dice->global_enabled = false;
1122         dice_stream_stop_packets(dice);
1123
1124         dice_owner_update(dice);
1125
1126         fw_iso_resources_update(&dice->resources);
1127
1128         mutex_unlock(&dice->mutex);
1129 }
1130
1131 #define DICE_INTERFACE  0x000001
1132
1133 static const struct ieee1394_device_id dice_id_table[] = {
1134         {
1135                 .match_flags = IEEE1394_MATCH_VERSION,
1136                 .version     = DICE_INTERFACE,
1137         },
1138         { }
1139 };
1140 MODULE_DEVICE_TABLE(ieee1394, dice_id_table);
1141
1142 static struct fw_driver dice_driver = {
1143         .driver   = {
1144                 .owner  = THIS_MODULE,
1145                 .name   = KBUILD_MODNAME,
1146                 .bus    = &fw_bus_type,
1147         },
1148         .probe    = dice_probe,
1149         .update   = dice_bus_reset,
1150         .remove   = dice_remove,
1151         .id_table = dice_id_table,
1152 };
1153
1154 static int __init alsa_dice_init(void)
1155 {
1156         return driver_register(&dice_driver.driver);
1157 }
1158
1159 static void __exit alsa_dice_exit(void)
1160 {
1161         driver_unregister(&dice_driver.driver);
1162 }
1163
1164 module_init(alsa_dice_init);
1165 module_exit(alsa_dice_exit);