1 /* Analog Devices 1889 audio driver
3 * This is a driver for the AD1889 PCI audio chipset found
4 * on the HP PA-RISC [BCJ]-xxx0 workstations.
6 * Copyright (C) 2004-2005, Kyle McMartin <kyle@parisc-linux.org>
7 * Copyright (C) 2005, Thibaut Varene <varenet@parisc-linux.org>
8 * Based on the OSS AD1889 driver by Randolph Chung <tausq@debian.org>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License, version 2, as
12 * published by the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 * Do we need to take care of CCS register?
25 * Maybe we could use finer grained locking (separate locks for pb/cap)?
27 * Control Interface (mixer) support
28 * Better AC97 support (VSR...)?
32 * SG DMA support (this will need *a lot* of work)
35 #include <linux/init.h>
36 #include <linux/pci.h>
37 #include <linux/dma-mapping.h>
38 #include <linux/slab.h>
39 #include <linux/interrupt.h>
40 #include <linux/compiler.h>
41 #include <linux/delay.h>
42 #include <linux/module.h>
44 #include <sound/core.h>
45 #include <sound/pcm.h>
46 #include <sound/initval.h>
47 #include <sound/ac97_codec.h>
52 #include "ac97/ac97_id.h"
54 #define AD1889_DRVVER "Version: 1.7"
56 MODULE_AUTHOR("Kyle McMartin <kyle@parisc-linux.org>, Thibaut Varene <t-bone@parisc-linux.org>");
57 MODULE_DESCRIPTION("Analog Devices AD1889 ALSA sound driver");
58 MODULE_LICENSE("GPL");
59 MODULE_SUPPORTED_DEVICE("{{Analog Devices,AD1889}}");
61 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
62 module_param_array(index, int, NULL, 0444);
63 MODULE_PARM_DESC(index, "Index value for the AD1889 soundcard.");
65 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
66 module_param_array(id, charp, NULL, 0444);
67 MODULE_PARM_DESC(id, "ID string for the AD1889 soundcard.");
69 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
70 module_param_array(enable, bool, NULL, 0444);
71 MODULE_PARM_DESC(enable, "Enable AD1889 soundcard.");
73 static char *ac97_quirk[SNDRV_CARDS];
74 module_param_array(ac97_quirk, charp, NULL, 0444);
75 MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
77 #define DEVNAME "ad1889"
78 #define PFX DEVNAME ": "
80 /* keep track of some hw registers */
81 struct ad1889_register_state {
82 u16 reg; /* reg setup */
83 u32 addr; /* dma base address */
84 unsigned long size; /* DMA buffer size */
88 struct snd_card *card;
95 struct snd_ac97 *ac97;
96 struct snd_ac97_bus *ac97_bus;
98 struct snd_info_entry *proc;
100 struct snd_pcm_substream *psubs;
101 struct snd_pcm_substream *csubs;
103 /* playback register state */
104 struct ad1889_register_state wave;
105 struct ad1889_register_state ramc;
111 ad1889_readw(struct snd_ad1889 *chip, unsigned reg)
113 return readw(chip->iobase + reg);
117 ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val)
119 writew(val, chip->iobase + reg);
123 ad1889_readl(struct snd_ad1889 *chip, unsigned reg)
125 return readl(chip->iobase + reg);
129 ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val)
131 writel(val, chip->iobase + reg);
135 ad1889_unmute(struct snd_ad1889 *chip)
138 st = ad1889_readw(chip, AD_DS_WADA) &
139 ~(AD_DS_WADA_RWAM | AD_DS_WADA_LWAM);
140 ad1889_writew(chip, AD_DS_WADA, st);
141 ad1889_readw(chip, AD_DS_WADA);
145 ad1889_mute(struct snd_ad1889 *chip)
148 st = ad1889_readw(chip, AD_DS_WADA) | AD_DS_WADA_RWAM | AD_DS_WADA_LWAM;
149 ad1889_writew(chip, AD_DS_WADA, st);
150 ad1889_readw(chip, AD_DS_WADA);
154 ad1889_load_adc_buffer_address(struct snd_ad1889 *chip, u32 address)
156 ad1889_writel(chip, AD_DMA_ADCBA, address);
157 ad1889_writel(chip, AD_DMA_ADCCA, address);
161 ad1889_load_adc_buffer_count(struct snd_ad1889 *chip, u32 count)
163 ad1889_writel(chip, AD_DMA_ADCBC, count);
164 ad1889_writel(chip, AD_DMA_ADCCC, count);
168 ad1889_load_adc_interrupt_count(struct snd_ad1889 *chip, u32 count)
170 ad1889_writel(chip, AD_DMA_ADCIB, count);
171 ad1889_writel(chip, AD_DMA_ADCIC, count);
175 ad1889_load_wave_buffer_address(struct snd_ad1889 *chip, u32 address)
177 ad1889_writel(chip, AD_DMA_WAVBA, address);
178 ad1889_writel(chip, AD_DMA_WAVCA, address);
182 ad1889_load_wave_buffer_count(struct snd_ad1889 *chip, u32 count)
184 ad1889_writel(chip, AD_DMA_WAVBC, count);
185 ad1889_writel(chip, AD_DMA_WAVCC, count);
189 ad1889_load_wave_interrupt_count(struct snd_ad1889 *chip, u32 count)
191 ad1889_writel(chip, AD_DMA_WAVIB, count);
192 ad1889_writel(chip, AD_DMA_WAVIC, count);
196 ad1889_channel_reset(struct snd_ad1889 *chip, unsigned int channel)
200 if (channel & AD_CHAN_WAV) {
201 /* Disable wave channel */
202 reg = ad1889_readw(chip, AD_DS_WSMC) & ~AD_DS_WSMC_WAEN;
203 ad1889_writew(chip, AD_DS_WSMC, reg);
204 chip->wave.reg = reg;
207 reg = ad1889_readw(chip, AD_DMA_WAV);
208 reg &= AD_DMA_IM_DIS;
210 ad1889_writew(chip, AD_DMA_WAV, reg);
212 /* clear IRQ and address counters and pointers */
213 ad1889_load_wave_buffer_address(chip, 0x0);
214 ad1889_load_wave_buffer_count(chip, 0x0);
215 ad1889_load_wave_interrupt_count(chip, 0x0);
218 ad1889_readw(chip, AD_DMA_WAV);
221 if (channel & AD_CHAN_ADC) {
222 /* Disable ADC channel */
223 reg = ad1889_readw(chip, AD_DS_RAMC) & ~AD_DS_RAMC_ADEN;
224 ad1889_writew(chip, AD_DS_RAMC, reg);
225 chip->ramc.reg = reg;
227 reg = ad1889_readw(chip, AD_DMA_ADC);
228 reg &= AD_DMA_IM_DIS;
230 ad1889_writew(chip, AD_DMA_ADC, reg);
232 ad1889_load_adc_buffer_address(chip, 0x0);
233 ad1889_load_adc_buffer_count(chip, 0x0);
234 ad1889_load_adc_interrupt_count(chip, 0x0);
237 ad1889_readw(chip, AD_DMA_ADC);
242 snd_ad1889_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
244 struct snd_ad1889 *chip = ac97->private_data;
245 return ad1889_readw(chip, AD_AC97_BASE + reg);
249 snd_ad1889_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
251 struct snd_ad1889 *chip = ac97->private_data;
252 ad1889_writew(chip, AD_AC97_BASE + reg, val);
256 snd_ad1889_ac97_ready(struct snd_ad1889 *chip)
258 int retry = 400; /* average needs 352 msec */
260 while (!(ad1889_readw(chip, AD_AC97_ACIC) & AD_AC97_ACIC_ACRDY)
264 dev_err(chip->card->dev, "[%s] Link is not ready.\n",
268 dev_dbg(chip->card->dev, "[%s] ready after %d ms\n", __func__, 400 - retry);
274 snd_ad1889_hw_params(struct snd_pcm_substream *substream,
275 struct snd_pcm_hw_params *hw_params)
277 return snd_pcm_lib_malloc_pages(substream,
278 params_buffer_bytes(hw_params));
282 snd_ad1889_hw_free(struct snd_pcm_substream *substream)
284 return snd_pcm_lib_free_pages(substream);
287 static struct snd_pcm_hardware snd_ad1889_playback_hw = {
288 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
289 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER,
290 .formats = SNDRV_PCM_FMTBIT_S16_LE,
291 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
292 .rate_min = 8000, /* docs say 7000, but we're lazy */
296 .buffer_bytes_max = BUFFER_BYTES_MAX,
297 .period_bytes_min = PERIOD_BYTES_MIN,
298 .period_bytes_max = PERIOD_BYTES_MAX,
299 .periods_min = PERIODS_MIN,
300 .periods_max = PERIODS_MAX,
304 static struct snd_pcm_hardware snd_ad1889_capture_hw = {
305 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
306 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER,
307 .formats = SNDRV_PCM_FMTBIT_S16_LE,
308 .rates = SNDRV_PCM_RATE_48000,
309 .rate_min = 48000, /* docs say we could to VSR, but we're lazy */
313 .buffer_bytes_max = BUFFER_BYTES_MAX,
314 .period_bytes_min = PERIOD_BYTES_MIN,
315 .period_bytes_max = PERIOD_BYTES_MAX,
316 .periods_min = PERIODS_MIN,
317 .periods_max = PERIODS_MAX,
322 snd_ad1889_playback_open(struct snd_pcm_substream *ss)
324 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
325 struct snd_pcm_runtime *rt = ss->runtime;
328 rt->hw = snd_ad1889_playback_hw;
334 snd_ad1889_capture_open(struct snd_pcm_substream *ss)
336 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
337 struct snd_pcm_runtime *rt = ss->runtime;
340 rt->hw = snd_ad1889_capture_hw;
346 snd_ad1889_playback_close(struct snd_pcm_substream *ss)
348 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
354 snd_ad1889_capture_close(struct snd_pcm_substream *ss)
356 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
362 snd_ad1889_playback_prepare(struct snd_pcm_substream *ss)
364 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
365 struct snd_pcm_runtime *rt = ss->runtime;
366 unsigned int size = snd_pcm_lib_buffer_bytes(ss);
367 unsigned int count = snd_pcm_lib_period_bytes(ss);
370 ad1889_channel_reset(chip, AD_CHAN_WAV);
372 reg = ad1889_readw(chip, AD_DS_WSMC);
374 /* Mask out 16-bit / Stereo */
375 reg &= ~(AD_DS_WSMC_WA16 | AD_DS_WSMC_WAST);
377 if (snd_pcm_format_width(rt->format) == 16)
378 reg |= AD_DS_WSMC_WA16;
380 if (rt->channels > 1)
381 reg |= AD_DS_WSMC_WAST;
383 /* let's make sure we don't clobber ourselves */
384 spin_lock_irq(&chip->lock);
386 chip->wave.size = size;
387 chip->wave.reg = reg;
388 chip->wave.addr = rt->dma_addr;
390 ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg);
392 /* Set sample rates on the codec */
393 ad1889_writew(chip, AD_DS_WAS, rt->rate);
396 ad1889_load_wave_buffer_address(chip, chip->wave.addr);
397 ad1889_load_wave_buffer_count(chip, size);
398 ad1889_load_wave_interrupt_count(chip, count);
401 ad1889_readw(chip, AD_DS_WSMC);
403 spin_unlock_irq(&chip->lock);
405 dev_dbg(chip->card->dev,
406 "prepare playback: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n",
407 chip->wave.addr, count, size, reg, rt->rate);
412 snd_ad1889_capture_prepare(struct snd_pcm_substream *ss)
414 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
415 struct snd_pcm_runtime *rt = ss->runtime;
416 unsigned int size = snd_pcm_lib_buffer_bytes(ss);
417 unsigned int count = snd_pcm_lib_period_bytes(ss);
420 ad1889_channel_reset(chip, AD_CHAN_ADC);
422 reg = ad1889_readw(chip, AD_DS_RAMC);
424 /* Mask out 16-bit / Stereo */
425 reg &= ~(AD_DS_RAMC_AD16 | AD_DS_RAMC_ADST);
427 if (snd_pcm_format_width(rt->format) == 16)
428 reg |= AD_DS_RAMC_AD16;
430 if (rt->channels > 1)
431 reg |= AD_DS_RAMC_ADST;
433 /* let's make sure we don't clobber ourselves */
434 spin_lock_irq(&chip->lock);
436 chip->ramc.size = size;
437 chip->ramc.reg = reg;
438 chip->ramc.addr = rt->dma_addr;
440 ad1889_writew(chip, AD_DS_RAMC, chip->ramc.reg);
443 ad1889_load_adc_buffer_address(chip, chip->ramc.addr);
444 ad1889_load_adc_buffer_count(chip, size);
445 ad1889_load_adc_interrupt_count(chip, count);
448 ad1889_readw(chip, AD_DS_RAMC);
450 spin_unlock_irq(&chip->lock);
452 dev_dbg(chip->card->dev,
453 "prepare capture: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n",
454 chip->ramc.addr, count, size, reg, rt->rate);
458 /* this is called in atomic context with IRQ disabled.
459 Must be as fast as possible and not sleep.
460 DMA should be *triggered* by this call.
461 The WSMC "WAEN" bit triggers DMA Wave On/Off */
463 snd_ad1889_playback_trigger(struct snd_pcm_substream *ss, int cmd)
466 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
468 wsmc = ad1889_readw(chip, AD_DS_WSMC);
471 case SNDRV_PCM_TRIGGER_START:
472 /* enable DMA loop & interrupts */
473 ad1889_writew(chip, AD_DMA_WAV, AD_DMA_LOOP | AD_DMA_IM_CNT);
474 wsmc |= AD_DS_WSMC_WAEN;
475 /* 1 to clear CHSS bit */
476 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_WAVS);
479 case SNDRV_PCM_TRIGGER_STOP:
481 wsmc &= ~AD_DS_WSMC_WAEN;
488 chip->wave.reg = wsmc;
489 ad1889_writew(chip, AD_DS_WSMC, wsmc);
490 ad1889_readw(chip, AD_DS_WSMC); /* flush */
492 /* reset the chip when STOP - will disable IRQs */
493 if (cmd == SNDRV_PCM_TRIGGER_STOP)
494 ad1889_channel_reset(chip, AD_CHAN_WAV);
499 /* this is called in atomic context with IRQ disabled.
500 Must be as fast as possible and not sleep.
501 DMA should be *triggered* by this call.
502 The RAMC "ADEN" bit triggers DMA ADC On/Off */
504 snd_ad1889_capture_trigger(struct snd_pcm_substream *ss, int cmd)
507 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
509 ramc = ad1889_readw(chip, AD_DS_RAMC);
512 case SNDRV_PCM_TRIGGER_START:
513 /* enable DMA loop & interrupts */
514 ad1889_writew(chip, AD_DMA_ADC, AD_DMA_LOOP | AD_DMA_IM_CNT);
515 ramc |= AD_DS_RAMC_ADEN;
516 /* 1 to clear CHSS bit */
517 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_ADCS);
519 case SNDRV_PCM_TRIGGER_STOP:
520 ramc &= ~AD_DS_RAMC_ADEN;
526 chip->ramc.reg = ramc;
527 ad1889_writew(chip, AD_DS_RAMC, ramc);
528 ad1889_readw(chip, AD_DS_RAMC); /* flush */
530 /* reset the chip when STOP - will disable IRQs */
531 if (cmd == SNDRV_PCM_TRIGGER_STOP)
532 ad1889_channel_reset(chip, AD_CHAN_ADC);
537 /* Called in atomic context with IRQ disabled */
538 static snd_pcm_uframes_t
539 snd_ad1889_playback_pointer(struct snd_pcm_substream *ss)
542 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
544 if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN)))
547 ptr = ad1889_readl(chip, AD_DMA_WAVCA);
548 ptr -= chip->wave.addr;
550 if (snd_BUG_ON(ptr >= chip->wave.size))
553 return bytes_to_frames(ss->runtime, ptr);
556 /* Called in atomic context with IRQ disabled */
557 static snd_pcm_uframes_t
558 snd_ad1889_capture_pointer(struct snd_pcm_substream *ss)
561 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
563 if (unlikely(!(chip->ramc.reg & AD_DS_RAMC_ADEN)))
566 ptr = ad1889_readl(chip, AD_DMA_ADCCA);
567 ptr -= chip->ramc.addr;
569 if (snd_BUG_ON(ptr >= chip->ramc.size))
572 return bytes_to_frames(ss->runtime, ptr);
575 static struct snd_pcm_ops snd_ad1889_playback_ops = {
576 .open = snd_ad1889_playback_open,
577 .close = snd_ad1889_playback_close,
578 .ioctl = snd_pcm_lib_ioctl,
579 .hw_params = snd_ad1889_hw_params,
580 .hw_free = snd_ad1889_hw_free,
581 .prepare = snd_ad1889_playback_prepare,
582 .trigger = snd_ad1889_playback_trigger,
583 .pointer = snd_ad1889_playback_pointer,
586 static struct snd_pcm_ops snd_ad1889_capture_ops = {
587 .open = snd_ad1889_capture_open,
588 .close = snd_ad1889_capture_close,
589 .ioctl = snd_pcm_lib_ioctl,
590 .hw_params = snd_ad1889_hw_params,
591 .hw_free = snd_ad1889_hw_free,
592 .prepare = snd_ad1889_capture_prepare,
593 .trigger = snd_ad1889_capture_trigger,
594 .pointer = snd_ad1889_capture_pointer,
598 snd_ad1889_interrupt(int irq, void *dev_id)
601 struct snd_ad1889 *chip = dev_id;
603 st = ad1889_readl(chip, AD_DMA_DISR);
606 ad1889_writel(chip, AD_DMA_DISR, st);
613 if (st & (AD_DMA_DISR_PMAI|AD_DMA_DISR_PTAI))
614 dev_dbg(chip->card->dev,
615 "Unexpected master or target abort interrupt!\n");
617 if ((st & AD_DMA_DISR_WAVI) && chip->psubs)
618 snd_pcm_period_elapsed(chip->psubs);
619 if ((st & AD_DMA_DISR_ADCI) && chip->csubs)
620 snd_pcm_period_elapsed(chip->csubs);
626 snd_ad1889_pcm_init(struct snd_ad1889 *chip, int device)
631 err = snd_pcm_new(chip->card, chip->card->driver, device, 1, 1, &pcm);
635 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
636 &snd_ad1889_playback_ops);
637 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
638 &snd_ad1889_capture_ops);
640 pcm->private_data = chip;
642 strcpy(pcm->name, chip->card->shortname);
648 err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
649 snd_dma_pci_data(chip->pci),
650 BUFFER_BYTES_MAX / 2,
654 dev_err(chip->card->dev, "buffer allocation error: %d\n", err);
662 snd_ad1889_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
664 struct snd_ad1889 *chip = entry->private_data;
668 reg = ad1889_readw(chip, AD_DS_WSMC);
669 snd_iprintf(buffer, "Wave output: %s\n",
670 (reg & AD_DS_WSMC_WAEN) ? "enabled" : "disabled");
671 snd_iprintf(buffer, "Wave Channels: %s\n",
672 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
673 snd_iprintf(buffer, "Wave Quality: %d-bit linear\n",
674 (reg & AD_DS_WSMC_WA16) ? 16 : 8);
676 /* WARQ is at offset 12 */
677 tmp = (reg & AD_DS_WSMC_WARQ) ?
678 ((((reg & AD_DS_WSMC_WARQ) >> 12) & 0x01) ? 12 : 18) : 4;
679 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
681 snd_iprintf(buffer, "Wave FIFO: %d %s words\n\n", tmp,
682 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
685 snd_iprintf(buffer, "Synthesis output: %s\n",
686 reg & AD_DS_WSMC_SYEN ? "enabled" : "disabled");
688 /* SYRQ is at offset 4 */
689 tmp = (reg & AD_DS_WSMC_SYRQ) ?
690 ((((reg & AD_DS_WSMC_SYRQ) >> 4) & 0x01) ? 12 : 18) : 4;
691 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
693 snd_iprintf(buffer, "Synthesis FIFO: %d %s words\n\n", tmp,
694 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
696 reg = ad1889_readw(chip, AD_DS_RAMC);
697 snd_iprintf(buffer, "ADC input: %s\n",
698 (reg & AD_DS_RAMC_ADEN) ? "enabled" : "disabled");
699 snd_iprintf(buffer, "ADC Channels: %s\n",
700 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
701 snd_iprintf(buffer, "ADC Quality: %d-bit linear\n",
702 (reg & AD_DS_RAMC_AD16) ? 16 : 8);
704 /* ACRQ is at offset 4 */
705 tmp = (reg & AD_DS_RAMC_ACRQ) ?
706 ((((reg & AD_DS_RAMC_ACRQ) >> 4) & 0x01) ? 12 : 18) : 4;
707 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
709 snd_iprintf(buffer, "ADC FIFO: %d %s words\n\n", tmp,
710 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
712 snd_iprintf(buffer, "Resampler input: %s\n",
713 reg & AD_DS_RAMC_REEN ? "enabled" : "disabled");
715 /* RERQ is at offset 12 */
716 tmp = (reg & AD_DS_RAMC_RERQ) ?
717 ((((reg & AD_DS_RAMC_RERQ) >> 12) & 0x01) ? 12 : 18) : 4;
718 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
720 snd_iprintf(buffer, "Resampler FIFO: %d %s words\n\n", tmp,
721 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
724 /* doc says LSB represents -1.5dB, but the max value (-94.5dB)
725 suggests that LSB is -3dB, which is more coherent with the logarithmic
726 nature of the dB scale */
727 reg = ad1889_readw(chip, AD_DS_WADA);
728 snd_iprintf(buffer, "Left: %s, -%d dB\n",
729 (reg & AD_DS_WADA_LWAM) ? "mute" : "unmute",
730 ((reg & AD_DS_WADA_LWAA) >> 8) * 3);
731 reg = ad1889_readw(chip, AD_DS_WADA);
732 snd_iprintf(buffer, "Right: %s, -%d dB\n",
733 (reg & AD_DS_WADA_RWAM) ? "mute" : "unmute",
734 (reg & AD_DS_WADA_RWAA) * 3);
736 reg = ad1889_readw(chip, AD_DS_WAS);
737 snd_iprintf(buffer, "Wave samplerate: %u Hz\n", reg);
738 reg = ad1889_readw(chip, AD_DS_RES);
739 snd_iprintf(buffer, "Resampler samplerate: %u Hz\n", reg);
743 snd_ad1889_proc_init(struct snd_ad1889 *chip)
745 struct snd_info_entry *entry;
747 if (!snd_card_proc_new(chip->card, chip->card->driver, &entry))
748 snd_info_set_text_ops(entry, chip, snd_ad1889_proc_read);
751 static struct ac97_quirk ac97_quirks[] = {
753 .subvendor = 0x11d4, /* AD */
754 .subdevice = 0x1889, /* AD1889 */
755 .codec_id = AC97_ID_AD1819,
757 .type = AC97_TUNE_HP_ONLY
763 snd_ad1889_ac97_xinit(struct snd_ad1889 *chip)
767 reg = ad1889_readw(chip, AD_AC97_ACIC);
768 reg |= AD_AC97_ACIC_ACRD; /* Reset Disable */
769 ad1889_writew(chip, AD_AC97_ACIC, reg);
770 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */
772 /* Interface Enable */
773 reg |= AD_AC97_ACIC_ACIE;
774 ad1889_writew(chip, AD_AC97_ACIC, reg);
776 snd_ad1889_ac97_ready(chip);
778 /* Audio Stream Output | Variable Sample Rate Mode */
779 reg = ad1889_readw(chip, AD_AC97_ACIC);
780 reg |= AD_AC97_ACIC_ASOE | AD_AC97_ACIC_VSRM;
781 ad1889_writew(chip, AD_AC97_ACIC, reg);
782 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */
787 snd_ad1889_ac97_bus_free(struct snd_ac97_bus *bus)
789 struct snd_ad1889 *chip = bus->private_data;
790 chip->ac97_bus = NULL;
794 snd_ad1889_ac97_free(struct snd_ac97 *ac97)
796 struct snd_ad1889 *chip = ac97->private_data;
801 snd_ad1889_ac97_init(struct snd_ad1889 *chip, const char *quirk_override)
804 struct snd_ac97_template ac97;
805 static struct snd_ac97_bus_ops ops = {
806 .write = snd_ad1889_ac97_write,
807 .read = snd_ad1889_ac97_read,
810 /* doing that here, it works. */
811 snd_ad1889_ac97_xinit(chip);
813 err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus);
817 chip->ac97_bus->private_free = snd_ad1889_ac97_bus_free;
819 memset(&ac97, 0, sizeof(ac97));
820 ac97.private_data = chip;
821 ac97.private_free = snd_ad1889_ac97_free;
822 ac97.pci = chip->pci;
824 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97);
828 snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override);
834 snd_ad1889_free(struct snd_ad1889 *chip)
839 spin_lock_irq(&chip->lock);
843 /* Turn off interrupt on count and zero DMA registers */
844 ad1889_channel_reset(chip, AD_CHAN_WAV | AD_CHAN_ADC);
846 /* clear DISR. If we don't, we'd better jump off the Eiffel Tower */
847 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PTAI | AD_DMA_DISR_PMAI);
848 ad1889_readl(chip, AD_DMA_DISR); /* flush, dammit! */
850 spin_unlock_irq(&chip->lock);
853 free_irq(chip->irq, chip);
856 iounmap(chip->iobase);
857 pci_release_regions(chip->pci);
858 pci_disable_device(chip->pci);
864 snd_ad1889_dev_free(struct snd_device *device)
866 struct snd_ad1889 *chip = device->device_data;
867 return snd_ad1889_free(chip);
871 snd_ad1889_init(struct snd_ad1889 *chip)
873 ad1889_writew(chip, AD_DS_CCS, AD_DS_CCS_CLKEN); /* turn on clock */
874 ad1889_readw(chip, AD_DS_CCS); /* flush posted write */
878 /* enable Master and Target abort interrupts */
879 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PMAE | AD_DMA_DISR_PTAE);
885 snd_ad1889_create(struct snd_card *card,
887 struct snd_ad1889 **rchip)
891 struct snd_ad1889 *chip;
892 static struct snd_device_ops ops = {
893 .dev_free = snd_ad1889_dev_free,
898 if ((err = pci_enable_device(pci)) < 0)
901 /* check PCI availability (32bit DMA) */
902 if (pci_set_dma_mask(pci, DMA_BIT_MASK(32)) < 0 ||
903 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(32)) < 0) {
904 dev_err(card->dev, "error setting 32-bit DMA mask.\n");
905 pci_disable_device(pci);
909 /* allocate chip specific data with zero-filled memory */
910 if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) {
911 pci_disable_device(pci);
916 card->private_data = chip;
920 /* (1) PCI resource allocation */
921 if ((err = pci_request_regions(pci, card->driver)) < 0)
924 chip->bar = pci_resource_start(pci, 0);
925 chip->iobase = pci_ioremap_bar(pci, 0);
926 if (chip->iobase == NULL) {
927 dev_err(card->dev, "unable to reserve region.\n");
934 spin_lock_init(&chip->lock); /* only now can we call ad1889_free */
936 if (request_irq(pci->irq, snd_ad1889_interrupt,
937 IRQF_SHARED, KBUILD_MODNAME, chip)) {
938 dev_err(card->dev, "cannot obtain IRQ %d\n", pci->irq);
939 snd_ad1889_free(chip);
943 chip->irq = pci->irq;
944 synchronize_irq(chip->irq);
946 /* (2) initialization of the chip hardware */
947 if ((err = snd_ad1889_init(chip)) < 0) {
948 snd_ad1889_free(chip);
952 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
953 snd_ad1889_free(chip);
963 pci_disable_device(pci);
969 snd_ad1889_probe(struct pci_dev *pci,
970 const struct pci_device_id *pci_id)
974 struct snd_card *card;
975 struct snd_ad1889 *chip;
978 if (devno >= SNDRV_CARDS)
980 if (!enable[devno]) {
986 err = snd_card_new(&pci->dev, index[devno], id[devno], THIS_MODULE,
988 /* XXX REVISIT: we can probably allocate chip in this call */
992 strcpy(card->driver, "AD1889");
993 strcpy(card->shortname, "Analog Devices AD1889");
996 err = snd_ad1889_create(card, pci, &chip);
1001 sprintf(card->longname, "%s at 0x%lx irq %i",
1002 card->shortname, chip->bar, chip->irq);
1005 /* register AC97 mixer */
1006 err = snd_ad1889_ac97_init(chip, ac97_quirk[devno]);
1010 err = snd_ad1889_pcm_init(chip, 0);
1014 /* register proc interface */
1015 snd_ad1889_proc_init(chip);
1018 err = snd_card_register(card);
1023 pci_set_drvdata(pci, card);
1029 snd_card_free(card);
1034 snd_ad1889_remove(struct pci_dev *pci)
1036 snd_card_free(pci_get_drvdata(pci));
1039 static const struct pci_device_id snd_ad1889_ids[] = {
1040 { PCI_DEVICE(PCI_VENDOR_ID_ANALOG_DEVICES, PCI_DEVICE_ID_AD1889JS) },
1043 MODULE_DEVICE_TABLE(pci, snd_ad1889_ids);
1045 static struct pci_driver ad1889_pci_driver = {
1046 .name = KBUILD_MODNAME,
1047 .id_table = snd_ad1889_ids,
1048 .probe = snd_ad1889_probe,
1049 .remove = snd_ad1889_remove,
1052 module_pci_driver(ad1889_pci_driver);