2 * Universal Interface for Intel High Definition Audio Codec
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the Free
8 * Software Foundation; either version 2 of the License, or (at your option)
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc., 59
18 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21 #ifndef __SOUND_HDA_CODEC_H
22 #define __SOUND_HDA_CODEC_H
24 #include <sound/info.h>
25 #include <sound/control.h>
26 #include <sound/pcm.h>
27 #include <sound/hwdep.h>
32 #define AC_NODE_ROOT 0x00
35 * function group types
38 AC_GRP_AUDIO_FUNCTION = 0x01,
39 AC_GRP_MODEM_FUNCTION = 0x02,
46 AC_WID_AUD_OUT, /* Audio Out */
47 AC_WID_AUD_IN, /* Audio In */
48 AC_WID_AUD_MIX, /* Audio Mixer */
49 AC_WID_AUD_SEL, /* Audio Selector */
50 AC_WID_PIN, /* Pin Complex */
51 AC_WID_POWER, /* Power */
52 AC_WID_VOL_KNB, /* Volume Knob */
53 AC_WID_BEEP, /* Beep Generator */
54 AC_WID_VENDOR = 0x0f /* Vendor specific */
60 #define AC_VERB_GET_STREAM_FORMAT 0x0a00
61 #define AC_VERB_GET_AMP_GAIN_MUTE 0x0b00
62 #define AC_VERB_GET_PROC_COEF 0x0c00
63 #define AC_VERB_GET_COEF_INDEX 0x0d00
64 #define AC_VERB_PARAMETERS 0x0f00
65 #define AC_VERB_GET_CONNECT_SEL 0x0f01
66 #define AC_VERB_GET_CONNECT_LIST 0x0f02
67 #define AC_VERB_GET_PROC_STATE 0x0f03
68 #define AC_VERB_GET_SDI_SELECT 0x0f04
69 #define AC_VERB_GET_POWER_STATE 0x0f05
70 #define AC_VERB_GET_CONV 0x0f06
71 #define AC_VERB_GET_PIN_WIDGET_CONTROL 0x0f07
72 #define AC_VERB_GET_UNSOLICITED_RESPONSE 0x0f08
73 #define AC_VERB_GET_PIN_SENSE 0x0f09
74 #define AC_VERB_GET_BEEP_CONTROL 0x0f0a
75 #define AC_VERB_GET_EAPD_BTLENABLE 0x0f0c
76 #define AC_VERB_GET_DIGI_CONVERT_1 0x0f0d
77 #define AC_VERB_GET_DIGI_CONVERT_2 0x0f0e /* unused */
78 #define AC_VERB_GET_VOLUME_KNOB_CONTROL 0x0f0f
80 #define AC_VERB_GET_GPIO_DATA 0x0f15
81 #define AC_VERB_GET_GPIO_MASK 0x0f16
82 #define AC_VERB_GET_GPIO_DIRECTION 0x0f17
83 #define AC_VERB_GET_GPIO_WAKE_MASK 0x0f18
84 #define AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK 0x0f19
85 #define AC_VERB_GET_GPIO_STICKY_MASK 0x0f1a
86 #define AC_VERB_GET_CONFIG_DEFAULT 0x0f1c
88 #define AC_VERB_GET_SUBSYSTEM_ID 0x0f20
89 #define AC_VERB_GET_CVT_CHAN_COUNT 0x0f2d
90 #define AC_VERB_GET_HDMI_DIP_SIZE 0x0f2e
91 #define AC_VERB_GET_HDMI_ELDD 0x0f2f
92 #define AC_VERB_GET_HDMI_DIP_INDEX 0x0f30
93 #define AC_VERB_GET_HDMI_DIP_DATA 0x0f31
94 #define AC_VERB_GET_HDMI_DIP_XMIT 0x0f32
95 #define AC_VERB_GET_HDMI_CP_CTRL 0x0f33
96 #define AC_VERB_GET_HDMI_CHAN_SLOT 0x0f34
97 #define AC_VERB_GET_DEVICE_SEL 0xf35
98 #define AC_VERB_GET_DEVICE_LIST 0xf36
103 #define AC_VERB_SET_STREAM_FORMAT 0x200
104 #define AC_VERB_SET_AMP_GAIN_MUTE 0x300
105 #define AC_VERB_SET_PROC_COEF 0x400
106 #define AC_VERB_SET_COEF_INDEX 0x500
107 #define AC_VERB_SET_CONNECT_SEL 0x701
108 #define AC_VERB_SET_PROC_STATE 0x703
109 #define AC_VERB_SET_SDI_SELECT 0x704
110 #define AC_VERB_SET_POWER_STATE 0x705
111 #define AC_VERB_SET_CHANNEL_STREAMID 0x706
112 #define AC_VERB_SET_PIN_WIDGET_CONTROL 0x707
113 #define AC_VERB_SET_UNSOLICITED_ENABLE 0x708
114 #define AC_VERB_SET_PIN_SENSE 0x709
115 #define AC_VERB_SET_BEEP_CONTROL 0x70a
116 #define AC_VERB_SET_EAPD_BTLENABLE 0x70c
117 #define AC_VERB_SET_DIGI_CONVERT_1 0x70d
118 #define AC_VERB_SET_DIGI_CONVERT_2 0x70e
119 #define AC_VERB_SET_VOLUME_KNOB_CONTROL 0x70f
120 #define AC_VERB_SET_GPIO_DATA 0x715
121 #define AC_VERB_SET_GPIO_MASK 0x716
122 #define AC_VERB_SET_GPIO_DIRECTION 0x717
123 #define AC_VERB_SET_GPIO_WAKE_MASK 0x718
124 #define AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK 0x719
125 #define AC_VERB_SET_GPIO_STICKY_MASK 0x71a
126 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_0 0x71c
127 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_1 0x71d
128 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_2 0x71e
129 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_3 0x71f
130 #define AC_VERB_SET_EAPD 0x788
131 #define AC_VERB_SET_CODEC_RESET 0x7ff
132 #define AC_VERB_SET_CVT_CHAN_COUNT 0x72d
133 #define AC_VERB_SET_HDMI_DIP_INDEX 0x730
134 #define AC_VERB_SET_HDMI_DIP_DATA 0x731
135 #define AC_VERB_SET_HDMI_DIP_XMIT 0x732
136 #define AC_VERB_SET_HDMI_CP_CTRL 0x733
137 #define AC_VERB_SET_HDMI_CHAN_SLOT 0x734
138 #define AC_VERB_SET_DEVICE_SEL 0x735
143 #define AC_PAR_VENDOR_ID 0x00
144 #define AC_PAR_SUBSYSTEM_ID 0x01
145 #define AC_PAR_REV_ID 0x02
146 #define AC_PAR_NODE_COUNT 0x04
147 #define AC_PAR_FUNCTION_TYPE 0x05
148 #define AC_PAR_AUDIO_FG_CAP 0x08
149 #define AC_PAR_AUDIO_WIDGET_CAP 0x09
150 #define AC_PAR_PCM 0x0a
151 #define AC_PAR_STREAM 0x0b
152 #define AC_PAR_PIN_CAP 0x0c
153 #define AC_PAR_AMP_IN_CAP 0x0d
154 #define AC_PAR_CONNLIST_LEN 0x0e
155 #define AC_PAR_POWER_STATE 0x0f
156 #define AC_PAR_PROC_CAP 0x10
157 #define AC_PAR_GPIO_CAP 0x11
158 #define AC_PAR_AMP_OUT_CAP 0x12
159 #define AC_PAR_VOL_KNB_CAP 0x13
160 #define AC_PAR_DEVLIST_LEN 0x15
161 #define AC_PAR_HDMI_LPCM_CAP 0x20
164 * AC_VERB_PARAMETERS results (32bit)
167 /* Function Group Type */
168 #define AC_FGT_TYPE (0xff<<0)
169 #define AC_FGT_TYPE_SHIFT 0
170 #define AC_FGT_UNSOL_CAP (1<<8)
172 /* Audio Function Group Capabilities */
173 #define AC_AFG_OUT_DELAY (0xf<<0)
174 #define AC_AFG_IN_DELAY (0xf<<8)
175 #define AC_AFG_BEEP_GEN (1<<16)
177 /* Audio Widget Capabilities */
178 #define AC_WCAP_STEREO (1<<0) /* stereo I/O */
179 #define AC_WCAP_IN_AMP (1<<1) /* AMP-in present */
180 #define AC_WCAP_OUT_AMP (1<<2) /* AMP-out present */
181 #define AC_WCAP_AMP_OVRD (1<<3) /* AMP-parameter override */
182 #define AC_WCAP_FORMAT_OVRD (1<<4) /* format override */
183 #define AC_WCAP_STRIPE (1<<5) /* stripe */
184 #define AC_WCAP_PROC_WID (1<<6) /* Proc Widget */
185 #define AC_WCAP_UNSOL_CAP (1<<7) /* Unsol capable */
186 #define AC_WCAP_CONN_LIST (1<<8) /* connection list */
187 #define AC_WCAP_DIGITAL (1<<9) /* digital I/O */
188 #define AC_WCAP_POWER (1<<10) /* power control */
189 #define AC_WCAP_LR_SWAP (1<<11) /* L/R swap */
190 #define AC_WCAP_CP_CAPS (1<<12) /* content protection */
191 #define AC_WCAP_CHAN_CNT_EXT (7<<13) /* channel count ext */
192 #define AC_WCAP_DELAY (0xf<<16)
193 #define AC_WCAP_DELAY_SHIFT 16
194 #define AC_WCAP_TYPE (0xf<<20)
195 #define AC_WCAP_TYPE_SHIFT 20
197 /* supported PCM rates and bits */
198 #define AC_SUPPCM_RATES (0xfff << 0)
199 #define AC_SUPPCM_BITS_8 (1<<16)
200 #define AC_SUPPCM_BITS_16 (1<<17)
201 #define AC_SUPPCM_BITS_20 (1<<18)
202 #define AC_SUPPCM_BITS_24 (1<<19)
203 #define AC_SUPPCM_BITS_32 (1<<20)
205 /* supported PCM stream format */
206 #define AC_SUPFMT_PCM (1<<0)
207 #define AC_SUPFMT_FLOAT32 (1<<1)
208 #define AC_SUPFMT_AC3 (1<<2)
211 #define AC_GPIO_IO_COUNT (0xff<<0)
212 #define AC_GPIO_O_COUNT (0xff<<8)
213 #define AC_GPIO_O_COUNT_SHIFT 8
214 #define AC_GPIO_I_COUNT (0xff<<16)
215 #define AC_GPIO_I_COUNT_SHIFT 16
216 #define AC_GPIO_UNSOLICITED (1<<30)
217 #define AC_GPIO_WAKE (1<<31)
219 /* Converter stream, channel */
220 #define AC_CONV_CHANNEL (0xf<<0)
221 #define AC_CONV_STREAM (0xf<<4)
222 #define AC_CONV_STREAM_SHIFT 4
224 /* Input converter SDI select */
225 #define AC_SDI_SELECT (0xf<<0)
227 /* stream format id */
228 #define AC_FMT_CHAN_SHIFT 0
229 #define AC_FMT_CHAN_MASK (0x0f << 0)
230 #define AC_FMT_BITS_SHIFT 4
231 #define AC_FMT_BITS_MASK (7 << 4)
232 #define AC_FMT_BITS_8 (0 << 4)
233 #define AC_FMT_BITS_16 (1 << 4)
234 #define AC_FMT_BITS_20 (2 << 4)
235 #define AC_FMT_BITS_24 (3 << 4)
236 #define AC_FMT_BITS_32 (4 << 4)
237 #define AC_FMT_DIV_SHIFT 8
238 #define AC_FMT_DIV_MASK (7 << 8)
239 #define AC_FMT_MULT_SHIFT 11
240 #define AC_FMT_MULT_MASK (7 << 11)
241 #define AC_FMT_BASE_SHIFT 14
242 #define AC_FMT_BASE_48K (0 << 14)
243 #define AC_FMT_BASE_44K (1 << 14)
244 #define AC_FMT_TYPE_SHIFT 15
245 #define AC_FMT_TYPE_PCM (0 << 15)
246 #define AC_FMT_TYPE_NON_PCM (1 << 15)
248 /* Unsolicited response control */
249 #define AC_UNSOL_TAG (0x3f<<0)
250 #define AC_UNSOL_ENABLED (1<<7)
251 #define AC_USRSP_EN AC_UNSOL_ENABLED
253 /* Unsolicited responses */
254 #define AC_UNSOL_RES_TAG (0x3f<<26)
255 #define AC_UNSOL_RES_TAG_SHIFT 26
256 #define AC_UNSOL_RES_SUBTAG (0x1f<<21)
257 #define AC_UNSOL_RES_SUBTAG_SHIFT 21
258 #define AC_UNSOL_RES_ELDV (1<<1) /* ELD Data valid (for HDMI) */
259 #define AC_UNSOL_RES_PD (1<<0) /* pinsense detect */
260 #define AC_UNSOL_RES_CP_STATE (1<<1) /* content protection */
261 #define AC_UNSOL_RES_CP_READY (1<<0) /* content protection */
263 /* Pin widget capabilies */
264 #define AC_PINCAP_IMP_SENSE (1<<0) /* impedance sense capable */
265 #define AC_PINCAP_TRIG_REQ (1<<1) /* trigger required */
266 #define AC_PINCAP_PRES_DETECT (1<<2) /* presence detect capable */
267 #define AC_PINCAP_HP_DRV (1<<3) /* headphone drive capable */
268 #define AC_PINCAP_OUT (1<<4) /* output capable */
269 #define AC_PINCAP_IN (1<<5) /* input capable */
270 #define AC_PINCAP_BALANCE (1<<6) /* balanced I/O capable */
271 /* Note: This LR_SWAP pincap is defined in the Realtek ALC883 specification,
272 * but is marked reserved in the Intel HDA specification.
274 #define AC_PINCAP_LR_SWAP (1<<7) /* L/R swap */
275 /* Note: The same bit as LR_SWAP is newly defined as HDMI capability
276 * in HD-audio specification
278 #define AC_PINCAP_HDMI (1<<7) /* HDMI pin */
279 #define AC_PINCAP_DP (1<<24) /* DisplayPort pin, can
280 * coexist with AC_PINCAP_HDMI
282 #define AC_PINCAP_VREF (0x37<<8)
283 #define AC_PINCAP_VREF_SHIFT 8
284 #define AC_PINCAP_EAPD (1<<16) /* EAPD capable */
285 #define AC_PINCAP_HBR (1<<27) /* High Bit Rate */
286 /* Vref status (used in pin cap) */
287 #define AC_PINCAP_VREF_HIZ (1<<0) /* Hi-Z */
288 #define AC_PINCAP_VREF_50 (1<<1) /* 50% */
289 #define AC_PINCAP_VREF_GRD (1<<2) /* ground */
290 #define AC_PINCAP_VREF_80 (1<<4) /* 80% */
291 #define AC_PINCAP_VREF_100 (1<<5) /* 100% */
293 /* Amplifier capabilities */
294 #define AC_AMPCAP_OFFSET (0x7f<<0) /* 0dB offset */
295 #define AC_AMPCAP_OFFSET_SHIFT 0
296 #define AC_AMPCAP_NUM_STEPS (0x7f<<8) /* number of steps */
297 #define AC_AMPCAP_NUM_STEPS_SHIFT 8
298 #define AC_AMPCAP_STEP_SIZE (0x7f<<16) /* step size 0-32dB
301 #define AC_AMPCAP_STEP_SIZE_SHIFT 16
302 #define AC_AMPCAP_MUTE (1<<31) /* mute capable */
303 #define AC_AMPCAP_MUTE_SHIFT 31
305 /* driver-specific amp-caps: using bits 24-30 */
306 #define AC_AMPCAP_MIN_MUTE (1 << 30) /* min-volume = mute */
308 /* Connection list */
309 #define AC_CLIST_LENGTH (0x7f<<0)
310 #define AC_CLIST_LONG (1<<7)
312 /* Supported power status */
313 #define AC_PWRST_D0SUP (1<<0)
314 #define AC_PWRST_D1SUP (1<<1)
315 #define AC_PWRST_D2SUP (1<<2)
316 #define AC_PWRST_D3SUP (1<<3)
317 #define AC_PWRST_D3COLDSUP (1<<4)
318 #define AC_PWRST_S3D3COLDSUP (1<<29)
319 #define AC_PWRST_CLKSTOP (1<<30)
320 #define AC_PWRST_EPSS (1U<<31)
322 /* Power state values */
323 #define AC_PWRST_SETTING (0xf<<0)
324 #define AC_PWRST_ACTUAL (0xf<<4)
325 #define AC_PWRST_ACTUAL_SHIFT 4
326 #define AC_PWRST_D0 0x00
327 #define AC_PWRST_D1 0x01
328 #define AC_PWRST_D2 0x02
329 #define AC_PWRST_D3 0x03
330 #define AC_PWRST_ERROR (1<<8)
331 #define AC_PWRST_CLK_STOP_OK (1<<9)
332 #define AC_PWRST_SETTING_RESET (1<<10)
334 /* Processing capabilies */
335 #define AC_PCAP_BENIGN (1<<0)
336 #define AC_PCAP_NUM_COEF (0xff<<8)
337 #define AC_PCAP_NUM_COEF_SHIFT 8
339 /* Volume knobs capabilities */
340 #define AC_KNBCAP_NUM_STEPS (0x7f<<0)
341 #define AC_KNBCAP_DELTA (1<<7)
343 /* HDMI LPCM capabilities */
344 #define AC_LPCMCAP_48K_CP_CHNS (0x0f<<0) /* max channels w/ CP-on */
345 #define AC_LPCMCAP_48K_NO_CHNS (0x0f<<4) /* max channels w/o CP-on */
346 #define AC_LPCMCAP_48K_20BIT (1<<8) /* 20b bitrate supported */
347 #define AC_LPCMCAP_48K_24BIT (1<<9) /* 24b bitrate supported */
348 #define AC_LPCMCAP_96K_CP_CHNS (0x0f<<10) /* max channels w/ CP-on */
349 #define AC_LPCMCAP_96K_NO_CHNS (0x0f<<14) /* max channels w/o CP-on */
350 #define AC_LPCMCAP_96K_20BIT (1<<18) /* 20b bitrate supported */
351 #define AC_LPCMCAP_96K_24BIT (1<<19) /* 24b bitrate supported */
352 #define AC_LPCMCAP_192K_CP_CHNS (0x0f<<20) /* max channels w/ CP-on */
353 #define AC_LPCMCAP_192K_NO_CHNS (0x0f<<24) /* max channels w/o CP-on */
354 #define AC_LPCMCAP_192K_20BIT (1<<28) /* 20b bitrate supported */
355 #define AC_LPCMCAP_192K_24BIT (1<<29) /* 24b bitrate supported */
356 #define AC_LPCMCAP_44K (1<<30) /* 44.1kHz support */
357 #define AC_LPCMCAP_44K_MS (1<<31) /* 44.1kHz-multiplies support */
359 /* Display pin's device list length */
360 #define AC_DEV_LIST_LEN_MASK 0x3f
361 #define AC_MAX_DEV_LIST_LEN 64
368 #define AC_AMP_MUTE (1<<7)
369 #define AC_AMP_GAIN (0x7f)
370 #define AC_AMP_GET_INDEX (0xf<<0)
372 #define AC_AMP_GET_LEFT (1<<13)
373 #define AC_AMP_GET_RIGHT (0<<13)
374 #define AC_AMP_GET_OUTPUT (1<<15)
375 #define AC_AMP_GET_INPUT (0<<15)
377 #define AC_AMP_SET_INDEX (0xf<<8)
378 #define AC_AMP_SET_INDEX_SHIFT 8
379 #define AC_AMP_SET_RIGHT (1<<12)
380 #define AC_AMP_SET_LEFT (1<<13)
381 #define AC_AMP_SET_INPUT (1<<14)
382 #define AC_AMP_SET_OUTPUT (1<<15)
385 #define AC_DIG1_ENABLE (1<<0)
386 #define AC_DIG1_V (1<<1)
387 #define AC_DIG1_VCFG (1<<2)
388 #define AC_DIG1_EMPHASIS (1<<3)
389 #define AC_DIG1_COPYRIGHT (1<<4)
390 #define AC_DIG1_NONAUDIO (1<<5)
391 #define AC_DIG1_PROFESSIONAL (1<<6)
392 #define AC_DIG1_LEVEL (1<<7)
395 #define AC_DIG2_CC (0x7f<<0)
398 #define AC_DIG3_ICT (0xf<<0)
399 #define AC_DIG3_KAE (1<<7)
401 /* Pin widget control - 8bit */
402 #define AC_PINCTL_EPT (0x3<<0)
403 #define AC_PINCTL_EPT_NATIVE 0
404 #define AC_PINCTL_EPT_HBR 3
405 #define AC_PINCTL_VREFEN (0x7<<0)
406 #define AC_PINCTL_VREF_HIZ 0 /* Hi-Z */
407 #define AC_PINCTL_VREF_50 1 /* 50% */
408 #define AC_PINCTL_VREF_GRD 2 /* ground */
409 #define AC_PINCTL_VREF_80 4 /* 80% */
410 #define AC_PINCTL_VREF_100 5 /* 100% */
411 #define AC_PINCTL_IN_EN (1<<5)
412 #define AC_PINCTL_OUT_EN (1<<6)
413 #define AC_PINCTL_HP_EN (1<<7)
415 /* Pin sense - 32bit */
416 #define AC_PINSENSE_IMPEDANCE_MASK (0x7fffffff)
417 #define AC_PINSENSE_PRESENCE (1<<31)
418 #define AC_PINSENSE_ELDV (1<<30) /* ELD valid (HDMI) */
420 /* EAPD/BTL enable - 32bit */
421 #define AC_EAPDBTL_BALANCED (1<<0)
422 #define AC_EAPDBTL_EAPD (1<<1)
423 #define AC_EAPDBTL_LR_SWAP (1<<2)
426 #define AC_ELDD_ELD_VALID (1<<31)
427 #define AC_ELDD_ELD_DATA 0xff
430 #define AC_DIPSIZE_ELD_BUF (1<<3) /* ELD buf size of packet size */
431 #define AC_DIPSIZE_PACK_IDX (0x07<<0) /* packet index */
434 #define AC_DIPIDX_PACK_IDX (0x07<<5) /* packet idnex */
435 #define AC_DIPIDX_BYTE_IDX (0x1f<<0) /* byte index */
437 /* HDMI DIP xmit (transmit) control */
438 #define AC_DIPXMIT_MASK (0x3<<6)
439 #define AC_DIPXMIT_DISABLE (0x0<<6) /* disable xmit */
440 #define AC_DIPXMIT_ONCE (0x2<<6) /* xmit once then disable */
441 #define AC_DIPXMIT_BEST (0x3<<6) /* best effort */
443 /* HDMI content protection (CP) control */
444 #define AC_CPCTRL_CES (1<<9) /* current encryption state */
445 #define AC_CPCTRL_READY (1<<8) /* ready bit */
446 #define AC_CPCTRL_SUBTAG (0x1f<<3) /* subtag for unsol-resp */
447 #define AC_CPCTRL_STATE (3<<0) /* current CP request state */
449 /* Converter channel <-> HDMI slot mapping */
450 #define AC_CVTMAP_HDMI_SLOT (0xf<<0) /* HDMI slot number */
451 #define AC_CVTMAP_CHAN (0xf<<4) /* converter channel number */
453 /* configuration default - 32bit */
454 #define AC_DEFCFG_SEQUENCE (0xf<<0)
455 #define AC_DEFCFG_DEF_ASSOC (0xf<<4)
456 #define AC_DEFCFG_ASSOC_SHIFT 4
457 #define AC_DEFCFG_MISC (0xf<<8)
458 #define AC_DEFCFG_MISC_SHIFT 8
459 #define AC_DEFCFG_MISC_NO_PRESENCE (1<<0)
460 #define AC_DEFCFG_COLOR (0xf<<12)
461 #define AC_DEFCFG_COLOR_SHIFT 12
462 #define AC_DEFCFG_CONN_TYPE (0xf<<16)
463 #define AC_DEFCFG_CONN_TYPE_SHIFT 16
464 #define AC_DEFCFG_DEVICE (0xf<<20)
465 #define AC_DEFCFG_DEVICE_SHIFT 20
466 #define AC_DEFCFG_LOCATION (0x3f<<24)
467 #define AC_DEFCFG_LOCATION_SHIFT 24
468 #define AC_DEFCFG_PORT_CONN (0x3<<30)
469 #define AC_DEFCFG_PORT_CONN_SHIFT 30
471 /* Display pin's device list entry */
472 #define AC_DE_PD (1<<0)
473 #define AC_DE_ELDV (1<<1)
474 #define AC_DE_IA (1<<2)
476 /* device device types (0x0-0xf) */
483 AC_JACK_DIG_OTHER_OUT,
484 AC_JACK_MODEM_LINE_SIDE,
485 AC_JACK_MODEM_HAND_SIDE,
491 AC_JACK_DIG_OTHER_IN,
495 /* jack connection types (0x0-0xf) */
497 AC_JACK_CONN_UNKNOWN,
502 AC_JACK_CONN_OPTICAL,
503 AC_JACK_CONN_OTHER_DIGITAL,
504 AC_JACK_CONN_OTHER_ANALOG,
509 AC_JACK_CONN_OTHER = 0xf,
512 /* jack colors (0x0-0xf) */
514 AC_JACK_COLOR_UNKNOWN,
520 AC_JACK_COLOR_ORANGE,
521 AC_JACK_COLOR_YELLOW,
522 AC_JACK_COLOR_PURPLE,
524 AC_JACK_COLOR_WHITE = 0xe,
528 /* Jack location (0x0-0x3f) */
541 AC_JACK_LOC_EXTERNAL = 0x00,
542 AC_JACK_LOC_INTERNAL = 0x10,
543 AC_JACK_LOC_SEPARATE = 0x20,
544 AC_JACK_LOC_OTHER = 0x30,
547 /* external on primary chasis */
548 AC_JACK_LOC_REAR_PANEL = 0x07,
549 AC_JACK_LOC_DRIVE_BAY,
551 AC_JACK_LOC_RISER = 0x17,
555 AC_JACK_LOC_MOBILE_IN = 0x37,
556 AC_JACK_LOC_MOBILE_OUT,
559 /* Port connectivity (0-3) */
561 AC_JACK_PORT_COMPLEX,
567 /* max. codec address */
568 #define HDA_MAX_CODEC_ADDRESS 0x0f
575 unsigned int alloced;
576 unsigned int elem_size;
577 unsigned int alloc_align;
581 void *snd_array_new(struct snd_array *array);
582 void snd_array_free(struct snd_array *array);
583 static inline void snd_array_init(struct snd_array *array, unsigned int size,
586 array->elem_size = size;
587 array->alloc_align = align;
590 static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
592 return array->list + idx * array->elem_size;
595 static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
597 return (unsigned long)(ptr - array->list) / array->elem_size;
608 struct hda_pcm_stream;
609 struct hda_bus_unsolicited;
612 typedef u16 hda_nid_t;
616 /* send a single command */
617 int (*command)(struct hda_bus *bus, unsigned int cmd);
618 /* get a response from the last command */
619 unsigned int (*get_response)(struct hda_bus *bus, unsigned int addr);
620 /* free the private data */
621 void (*private_free)(struct hda_bus *);
622 /* attach a PCM stream */
623 int (*attach_pcm)(struct hda_bus *bus, struct hda_codec *codec,
624 struct hda_pcm *pcm);
625 /* reset bus for retry verb */
626 void (*bus_reset)(struct hda_bus *bus);
628 /* notify power-up/down from codec to controller */
629 void (*pm_notify)(struct hda_bus *bus, bool power_up);
631 #ifdef CONFIG_SND_HDA_DSP_LOADER
632 /* prepare DSP transfer */
633 int (*load_dsp_prepare)(struct hda_bus *bus, unsigned int format,
634 unsigned int byte_size,
635 struct snd_dma_buffer *bufp);
636 /* start/stop DSP transfer */
637 void (*load_dsp_trigger)(struct hda_bus *bus, bool start);
638 /* clean up DSP transfer */
639 void (*load_dsp_cleanup)(struct hda_bus *bus,
640 struct snd_dma_buffer *dmab);
644 /* template to pass to the bus constructor */
645 struct hda_bus_template {
648 const char *modelname;
650 struct hda_bus_ops ops;
656 * each controller needs to creata a hda_bus to assign the accessor.
657 * A hda_bus contains several codecs in the list codec_list.
660 struct snd_card *card;
662 /* copied from template */
665 const char *modelname;
667 struct hda_bus_ops ops;
669 /* codec linked list */
670 struct list_head codec_list;
671 /* link caddr -> codec */
672 struct hda_codec *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
674 struct mutex cmd_mutex;
675 struct mutex prepare_mutex;
677 /* unsolicited event queue */
678 struct hda_bus_unsolicited *unsol;
680 struct workqueue_struct *workq; /* common workqueue for codecs */
683 DECLARE_BITMAP(pcm_dev_bits, SNDRV_PCM_DEVICES);
686 unsigned int needs_damn_long_delay :1;
687 unsigned int allow_bus_reset:1; /* allow bus reset at fatal error */
688 unsigned int sync_write:1; /* sync after verb write */
689 /* status for codec/controller */
690 unsigned int shutdown :1; /* being unloaded */
691 unsigned int rirb_error:1; /* error in codec communication */
692 unsigned int response_reset:1; /* controller was reset */
693 unsigned int in_reset:1; /* during reset operation */
694 unsigned int power_keep_link_on:1; /* don't power off HDA link */
695 unsigned int no_response_fallback:1; /* don't fallback at RIRB error */
697 int primary_dig_out_type; /* primary digital out PCM type */
703 * Known codecs have the patch to build and set up the controls/PCMs
704 * better than the generic parser.
706 struct hda_codec_preset {
710 unsigned int subs_mask;
714 int (*patch)(struct hda_codec *codec);
717 struct hda_codec_preset_list {
718 const struct hda_codec_preset *preset;
719 struct module *owner;
720 struct list_head list;
724 int snd_hda_add_codec_preset(struct hda_codec_preset_list *preset);
725 int snd_hda_delete_codec_preset(struct hda_codec_preset_list *preset);
727 /* ops set by the preset patch */
728 struct hda_codec_ops {
729 int (*build_controls)(struct hda_codec *codec);
730 int (*build_pcms)(struct hda_codec *codec);
731 int (*init)(struct hda_codec *codec);
732 void (*free)(struct hda_codec *codec);
733 void (*unsol_event)(struct hda_codec *codec, unsigned int res);
734 void (*set_power_state)(struct hda_codec *codec, hda_nid_t fg,
735 unsigned int power_state);
737 int (*suspend)(struct hda_codec *codec);
738 int (*resume)(struct hda_codec *codec);
739 int (*check_power_status)(struct hda_codec *codec, hda_nid_t nid);
741 void (*reboot_notify)(struct hda_codec *codec);
744 /* record for amp information cache */
745 struct hda_cache_head {
746 u32 key:31; /* hash key */
748 u16 val; /* assigned value */
752 struct hda_amp_info {
753 struct hda_cache_head head;
754 u32 amp_caps; /* amp capabilities */
755 u16 vol[2]; /* current volume & mute */
758 struct hda_cache_rec {
759 u16 hash[64]; /* hash table for index */
760 struct snd_array buf; /* record entries */
765 int (*open)(struct hda_pcm_stream *info, struct hda_codec *codec,
766 struct snd_pcm_substream *substream);
767 int (*close)(struct hda_pcm_stream *info, struct hda_codec *codec,
768 struct snd_pcm_substream *substream);
769 int (*prepare)(struct hda_pcm_stream *info, struct hda_codec *codec,
770 unsigned int stream_tag, unsigned int format,
771 struct snd_pcm_substream *substream);
772 int (*cleanup)(struct hda_pcm_stream *info, struct hda_codec *codec,
773 struct snd_pcm_substream *substream);
774 unsigned int (*get_delay)(struct hda_pcm_stream *info,
775 struct hda_codec *codec,
776 struct snd_pcm_substream *substream);
779 /* PCM information for each substream */
780 struct hda_pcm_stream {
781 unsigned int substreams; /* number of substreams, 0 = not exist*/
782 unsigned int channels_min; /* min. number of channels */
783 unsigned int channels_max; /* max. number of channels */
784 hda_nid_t nid; /* default NID to query rates/formats/bps, or set up */
785 u32 rates; /* supported rates */
786 u64 formats; /* supported formats (SNDRV_PCM_FMTBIT_) */
787 unsigned int maxbps; /* supported max. bit per sample */
788 const struct snd_pcm_chmap_elem *chmap; /* chmap to override */
789 struct hda_pcm_ops ops;
801 /* for PCM creation */
804 struct hda_pcm_stream stream[2];
805 unsigned int pcm_type; /* HDA_PCM_TYPE_XXX */
806 int device; /* device number to assign */
807 struct snd_pcm *pcm; /* assigned PCM instance */
808 bool own_chmap; /* codec driver provides own channel maps */
811 /* codec information */
814 unsigned int addr; /* codec addr*/
815 struct list_head list; /* list point */
817 hda_nid_t afg; /* AFG node id */
818 hda_nid_t mfg; /* MFG node id */
829 /* detected preset */
830 const struct hda_codec_preset *preset;
831 struct module *owner;
832 const char *vendor_name; /* codec vendor name */
833 const char *chip_name; /* codec chip name */
834 const char *modelname; /* model name for preset */
837 struct hda_codec_ops patch_ops;
839 /* PCM to create, set by patch_ops.build_pcms callback */
840 unsigned int num_pcms;
841 struct hda_pcm *pcm_info;
843 /* codec specific info */
847 struct hda_beep *beep;
848 unsigned int beep_mode;
850 /* widget capabilities cache */
851 unsigned int num_nodes;
855 struct snd_array mixers; /* list of assigned mixer elements */
856 struct snd_array nids; /* list of mapped mixer elements */
858 struct hda_cache_rec amp_cache; /* cache for amp access */
859 struct hda_cache_rec cmd_cache; /* cache for other commands */
861 struct list_head conn_list; /* linked-list of connection-list */
863 struct mutex spdif_mutex;
864 struct mutex control_mutex;
865 struct mutex hash_mutex;
866 struct snd_array spdif_out;
867 unsigned int spdif_in_enable; /* SPDIF input enable? */
868 const hda_nid_t *slave_dig_outs; /* optional digital out slave widgets */
869 struct snd_array init_pins; /* initial (BIOS) pin configurations */
870 struct snd_array driver_pins; /* pin configs set by codec parser */
871 struct snd_array cvt_setups; /* audio convert setups */
873 #ifdef CONFIG_SND_HDA_HWDEP
874 struct mutex user_mutex;
875 struct snd_hwdep *hwdep; /* assigned hwdep device */
876 struct snd_array init_verbs; /* additional init verbs */
877 struct snd_array hints; /* additional hints */
878 struct snd_array user_pins; /* default pin configs to override */
882 unsigned int spdif_status_reset :1; /* needs to toggle SPDIF for each
884 * (e.g. Realtek codecs)
886 unsigned int pin_amp_workaround:1; /* pin out-amp takes index
887 * (e.g. Conexant codecs)
889 unsigned int single_adc_amp:1; /* adc in-amp takes no index
890 * (e.g. CX20549 codec)
892 unsigned int no_sticky_stream:1; /* no sticky-PCM stream assignment */
893 unsigned int pins_shutup:1; /* pins are shut up */
894 unsigned int no_trigger_sense:1; /* don't trigger at pin-sensing */
895 unsigned int no_jack_detect:1; /* Machine has no jack-detection */
896 unsigned int inv_eapd:1; /* broken h/w: inverted EAPD control */
897 unsigned int inv_jack_detect:1; /* broken h/w: inverted detection bit */
898 unsigned int pcm_format_first:1; /* PCM format must be set first */
899 unsigned int epss:1; /* supporting EPSS? */
900 unsigned int cached_write:1; /* write only to caches */
901 unsigned int dp_mst:1; /* support DP1.2 Multi-stream transport */
903 unsigned int power_on :1; /* current (global) power-state */
904 unsigned int d3_stop_clk:1; /* support D3 operation without BCLK */
905 unsigned int pm_down_notified:1; /* PM notified to controller */
906 unsigned int in_pm:1; /* suspend/resume being performed */
907 int power_transition; /* power-state in transition */
908 int power_count; /* current (global) power refcount */
909 struct delayed_work power_work; /* delayed task for powerdown */
910 unsigned long power_on_acct;
911 unsigned long power_off_acct;
912 unsigned long power_jiffies;
913 spinlock_t power_lock;
916 /* filter the requested power state per nid */
917 unsigned int (*power_filter)(struct hda_codec *codec, hda_nid_t nid,
918 unsigned int power_state);
920 /* codec-specific additional proc output */
921 void (*proc_widget_hook)(struct snd_info_buffer *buffer,
922 struct hda_codec *codec, hda_nid_t nid);
925 struct snd_array jacktbl;
926 unsigned long jackpoll_interval; /* In jiffies. Zero means no poll, rely on unsol events */
927 struct delayed_work jackpoll_work;
929 #ifdef CONFIG_SND_HDA_INPUT_JACK
931 struct snd_array jacks;
936 const struct hda_fixup *fixup_list;
937 const char *fixup_name;
939 /* additional init verbs */
940 struct snd_array verbs;
945 HDA_INPUT, HDA_OUTPUT
948 /* snd_hda_codec_read/write optional flags */
949 #define HDA_RW_NO_RESPONSE_FALLBACK (1 << 0)
954 int snd_hda_bus_new(struct snd_card *card, const struct hda_bus_template *temp,
955 struct hda_bus **busp);
956 int snd_hda_codec_new(struct hda_bus *bus, unsigned int codec_addr,
957 struct hda_codec **codecp);
958 int snd_hda_codec_configure(struct hda_codec *codec);
959 int snd_hda_codec_update_widgets(struct hda_codec *codec);
962 * low level functions
964 unsigned int snd_hda_codec_read(struct hda_codec *codec, hda_nid_t nid,
966 unsigned int verb, unsigned int parm);
967 int snd_hda_codec_write(struct hda_codec *codec, hda_nid_t nid, int flags,
968 unsigned int verb, unsigned int parm);
969 #define snd_hda_param_read(codec, nid, param) \
970 snd_hda_codec_read(codec, nid, 0, AC_VERB_PARAMETERS, param)
971 int snd_hda_get_sub_nodes(struct hda_codec *codec, hda_nid_t nid,
972 hda_nid_t *start_id);
973 int snd_hda_get_connections(struct hda_codec *codec, hda_nid_t nid,
974 hda_nid_t *conn_list, int max_conns);
976 snd_hda_get_num_conns(struct hda_codec *codec, hda_nid_t nid)
978 return snd_hda_get_connections(codec, nid, NULL, 0);
980 int snd_hda_get_num_raw_conns(struct hda_codec *codec, hda_nid_t nid);
981 int snd_hda_get_raw_connections(struct hda_codec *codec, hda_nid_t nid,
982 hda_nid_t *conn_list, int max_conns);
983 int snd_hda_get_conn_list(struct hda_codec *codec, hda_nid_t nid,
984 const hda_nid_t **listp);
985 int snd_hda_override_conn_list(struct hda_codec *codec, hda_nid_t nid, int nums,
986 const hda_nid_t *list);
987 int snd_hda_get_conn_index(struct hda_codec *codec, hda_nid_t mux,
988 hda_nid_t nid, int recursive);
989 int snd_hda_get_devices(struct hda_codec *codec, hda_nid_t nid,
990 u8 *dev_list, int max_devices);
991 int snd_hda_query_supported_pcm(struct hda_codec *codec, hda_nid_t nid,
992 u32 *ratesp, u64 *formatsp, unsigned int *bpsp);
1000 void snd_hda_sequence_write(struct hda_codec *codec,
1001 const struct hda_verb *seq);
1003 /* unsolicited event */
1004 int snd_hda_queue_unsol_event(struct hda_bus *bus, u32 res, u32 res_ex);
1007 int snd_hda_codec_write_cache(struct hda_codec *codec, hda_nid_t nid,
1008 int flags, unsigned int verb, unsigned int parm);
1009 void snd_hda_sequence_write_cache(struct hda_codec *codec,
1010 const struct hda_verb *seq);
1011 int snd_hda_codec_update_cache(struct hda_codec *codec, hda_nid_t nid,
1012 int flags, unsigned int verb, unsigned int parm);
1013 void snd_hda_codec_resume_cache(struct hda_codec *codec);
1014 /* both for cmd & amp caches */
1015 void snd_hda_codec_flush_cache(struct hda_codec *codec);
1017 /* the struct for codec->pin_configs */
1020 unsigned char ctrl; /* original pin control value */
1021 unsigned char target; /* target pin control value */
1022 unsigned int cfg; /* default configuration */
1025 unsigned int snd_hda_codec_get_pincfg(struct hda_codec *codec, hda_nid_t nid);
1026 int snd_hda_codec_set_pincfg(struct hda_codec *codec, hda_nid_t nid,
1028 int snd_hda_add_pincfg(struct hda_codec *codec, struct snd_array *list,
1029 hda_nid_t nid, unsigned int cfg); /* for hwdep */
1030 void snd_hda_shutup_pins(struct hda_codec *codec);
1032 /* SPDIF controls */
1033 struct hda_spdif_out {
1034 hda_nid_t nid; /* Converter nid values relate to */
1035 unsigned int status; /* IEC958 status bits */
1036 unsigned short ctls; /* SPDIF control bits */
1038 struct hda_spdif_out *snd_hda_spdif_out_of_nid(struct hda_codec *codec,
1040 void snd_hda_spdif_ctls_unassign(struct hda_codec *codec, int idx);
1041 void snd_hda_spdif_ctls_assign(struct hda_codec *codec, int idx, hda_nid_t nid);
1046 int snd_hda_build_controls(struct hda_bus *bus);
1047 int snd_hda_codec_build_controls(struct hda_codec *codec);
1052 int snd_hda_build_pcms(struct hda_bus *bus);
1053 int snd_hda_codec_build_pcms(struct hda_codec *codec);
1055 int snd_hda_codec_prepare(struct hda_codec *codec,
1056 struct hda_pcm_stream *hinfo,
1057 unsigned int stream,
1058 unsigned int format,
1059 struct snd_pcm_substream *substream);
1060 void snd_hda_codec_cleanup(struct hda_codec *codec,
1061 struct hda_pcm_stream *hinfo,
1062 struct snd_pcm_substream *substream);
1064 void snd_hda_codec_setup_stream(struct hda_codec *codec, hda_nid_t nid,
1066 int channel_id, int format);
1067 void __snd_hda_codec_cleanup_stream(struct hda_codec *codec, hda_nid_t nid,
1069 #define snd_hda_codec_cleanup_stream(codec, nid) \
1070 __snd_hda_codec_cleanup_stream(codec, nid, 0)
1071 unsigned int snd_hda_calc_stream_format(unsigned int rate,
1072 unsigned int channels,
1073 unsigned int format,
1074 unsigned int maxbps,
1075 unsigned short spdif_ctls);
1076 int snd_hda_is_supported_format(struct hda_codec *codec, hda_nid_t nid,
1077 unsigned int format);
1079 extern const struct snd_pcm_chmap_elem snd_pcm_2_1_chmaps[];
1084 void snd_hda_get_codec_name(struct hda_codec *codec, char *name, int namelen);
1085 void snd_hda_bus_reboot_notify(struct hda_bus *bus);
1086 void snd_hda_codec_set_power_to_all(struct hda_codec *codec, hda_nid_t fg,
1087 unsigned int power_state);
1089 int snd_hda_lock_devices(struct hda_bus *bus);
1090 void snd_hda_unlock_devices(struct hda_bus *bus);
1096 int snd_hda_suspend(struct hda_bus *bus);
1097 int snd_hda_resume(struct hda_bus *bus);
1101 int hda_call_check_power_status(struct hda_codec *codec, hda_nid_t nid)
1104 if (codec->patch_ops.check_power_status)
1105 return codec->patch_ops.check_power_status(codec, nid);
1111 * get widget information
1113 const char *snd_hda_get_jack_connectivity(u32 cfg);
1114 const char *snd_hda_get_jack_type(u32 cfg);
1115 const char *snd_hda_get_jack_location(u32 cfg);
1121 void snd_hda_power_save(struct hda_codec *codec, int delta, bool d3wait);
1122 void snd_hda_update_power_acct(struct hda_codec *codec);
1124 static inline void snd_hda_power_save(struct hda_codec *codec, int delta,
1129 * snd_hda_power_up - Power-up the codec
1130 * @codec: HD-audio codec
1132 * Increment the power-up counter and power up the hardware really when
1133 * not turned on yet.
1135 static inline void snd_hda_power_up(struct hda_codec *codec)
1137 snd_hda_power_save(codec, 1, false);
1141 * snd_hda_power_up_d3wait - Power-up the codec after waiting for any pending
1142 * D3 transition to complete. This differs from snd_hda_power_up() when
1143 * power_transition == -1. snd_hda_power_up sees this case as a nop,
1144 * snd_hda_power_up_d3wait waits for the D3 transition to complete then powers
1146 * @codec: HD-audio codec
1148 * Cancel any power down operation hapenning on the work queue, then power up.
1150 static inline void snd_hda_power_up_d3wait(struct hda_codec *codec)
1152 snd_hda_power_save(codec, 1, true);
1156 * snd_hda_power_down - Power-down the codec
1157 * @codec: HD-audio codec
1159 * Decrement the power-up counter and schedules the power-off work if
1160 * the counter rearches to zero.
1162 static inline void snd_hda_power_down(struct hda_codec *codec)
1164 snd_hda_power_save(codec, -1, false);
1168 * snd_hda_power_sync - Synchronize the power-save status
1169 * @codec: HD-audio codec
1171 * Synchronize the actual power state with the power account;
1172 * called when power_save parameter is changed
1174 static inline void snd_hda_power_sync(struct hda_codec *codec)
1176 snd_hda_power_save(codec, 0, false);
1179 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1183 int snd_hda_load_patch(struct hda_bus *bus, size_t size, const void *buf);
1186 #ifdef CONFIG_SND_HDA_DSP_LOADER
1188 snd_hda_codec_load_dsp_prepare(struct hda_codec *codec, unsigned int format,
1190 struct snd_dma_buffer *bufp)
1192 return codec->bus->ops.load_dsp_prepare(codec->bus, format, size, bufp);
1195 snd_hda_codec_load_dsp_trigger(struct hda_codec *codec, bool start)
1197 return codec->bus->ops.load_dsp_trigger(codec->bus, start);
1200 snd_hda_codec_load_dsp_cleanup(struct hda_codec *codec,
1201 struct snd_dma_buffer *dmab)
1203 return codec->bus->ops.load_dsp_cleanup(codec->bus, dmab);
1207 snd_hda_codec_load_dsp_prepare(struct hda_codec *codec, unsigned int format,
1209 struct snd_dma_buffer *bufp)
1214 snd_hda_codec_load_dsp_trigger(struct hda_codec *codec, bool start) {}
1216 snd_hda_codec_load_dsp_cleanup(struct hda_codec *codec,
1217 struct snd_dma_buffer *dmab) {}
1221 * Codec modularization
1224 /* Export symbols only for communication with codec drivers;
1225 * When built in kernel, all HD-audio drivers are supposed to be statically
1226 * linked to the kernel. Thus, the symbols don't have to (or shouldn't) be
1227 * exported unless it's built as a module.
1230 #define EXPORT_SYMBOL_HDA(sym) EXPORT_SYMBOL_GPL(sym)
1232 #define EXPORT_SYMBOL_HDA(sym)
1235 #endif /* __SOUND_HDA_CODEC_H */