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1 /*
2  *
3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
4  *
5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6  *  Copyright (c) 2006 ATI Technologies Inc.
7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
9  *
10  *  Authors:
11  *                      Wu Fengguang <wfg@linux.intel.com>
12  *
13  *  Maintained by:
14  *                      Wu Fengguang <wfg@linux.intel.com>
15  *
16  *  This program is free software; you can redistribute it and/or modify it
17  *  under the terms of the GNU General Public License as published by the Free
18  *  Software Foundation; either version 2 of the License, or (at your option)
19  *  any later version.
20  *
21  *  This program is distributed in the hope that it will be useful, but
22  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
23  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
24  *  for more details.
25  *
26  *  You should have received a copy of the GNU General Public License
27  *  along with this program; if not, write to the Free Software Foundation,
28  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
29  */
30
31 #include <linux/init.h>
32 #include <linux/delay.h>
33 #include <linux/slab.h>
34 #include <linux/module.h>
35 #include <sound/core.h>
36 #include <sound/jack.h>
37 #include <sound/asoundef.h>
38 #include <sound/tlv.h>
39 #include "hda_codec.h"
40 #include "hda_local.h"
41 #include "hda_jack.h"
42
43 static bool static_hdmi_pcm;
44 module_param(static_hdmi_pcm, bool, 0644);
45 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
46
47 #define is_haswell(codec)  ((codec)->vendor_id == 0x80862807)
48
49 struct hdmi_spec_per_cvt {
50         hda_nid_t cvt_nid;
51         int assigned;
52         unsigned int channels_min;
53         unsigned int channels_max;
54         u32 rates;
55         u64 formats;
56         unsigned int maxbps;
57 };
58
59 /* max. connections to a widget */
60 #define HDA_MAX_CONNECTIONS     32
61
62 struct hdmi_spec_per_pin {
63         hda_nid_t pin_nid;
64         int num_mux_nids;
65         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
66         hda_nid_t cvt_nid;
67
68         struct hda_codec *codec;
69         struct hdmi_eld sink_eld;
70         struct mutex lock;
71         struct delayed_work work;
72         struct snd_kcontrol *eld_ctl;
73         int repoll_count;
74         bool setup; /* the stream has been set up by prepare callback */
75         int channels; /* current number of channels */
76         bool non_pcm;
77         bool chmap_set;         /* channel-map override by ALSA API? */
78         unsigned char chmap[8]; /* ALSA API channel-map */
79         char pcm_name[8];       /* filled in build_pcm callbacks */
80 #ifdef CONFIG_PROC_FS
81         struct snd_info_entry *proc_entry;
82 #endif
83 };
84
85 struct hdmi_spec {
86         int num_cvts;
87         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
88         hda_nid_t cvt_nids[4]; /* only for haswell fix */
89
90         int num_pins;
91         struct snd_array pins; /* struct hdmi_spec_per_pin */
92         struct snd_array pcm_rec; /* struct hda_pcm */
93         unsigned int channels_max; /* max over all cvts */
94
95         struct hdmi_eld temp_eld;
96         /*
97          * Non-generic ATI/NVIDIA specific
98          */
99         struct hda_multi_out multiout;
100         struct hda_pcm_stream pcm_playback;
101 };
102
103
104 struct hdmi_audio_infoframe {
105         u8 type; /* 0x84 */
106         u8 ver;  /* 0x01 */
107         u8 len;  /* 0x0a */
108
109         u8 checksum;
110
111         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
112         u8 SS01_SF24;
113         u8 CXT04;
114         u8 CA;
115         u8 LFEPBL01_LSV36_DM_INH7;
116 };
117
118 struct dp_audio_infoframe {
119         u8 type; /* 0x84 */
120         u8 len;  /* 0x1b */
121         u8 ver;  /* 0x11 << 2 */
122
123         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
124         u8 SS01_SF24;
125         u8 CXT04;
126         u8 CA;
127         u8 LFEPBL01_LSV36_DM_INH7;
128 };
129
130 union audio_infoframe {
131         struct hdmi_audio_infoframe hdmi;
132         struct dp_audio_infoframe dp;
133         u8 bytes[0];
134 };
135
136 /*
137  * CEA speaker placement:
138  *
139  *        FLH       FCH        FRH
140  *  FLW    FL  FLC   FC   FRC   FR   FRW
141  *
142  *                                  LFE
143  *                     TC
144  *
145  *          RL  RLC   RC   RRC   RR
146  *
147  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
148  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
149  */
150 enum cea_speaker_placement {
151         FL  = (1 <<  0),        /* Front Left           */
152         FC  = (1 <<  1),        /* Front Center         */
153         FR  = (1 <<  2),        /* Front Right          */
154         FLC = (1 <<  3),        /* Front Left Center    */
155         FRC = (1 <<  4),        /* Front Right Center   */
156         RL  = (1 <<  5),        /* Rear Left            */
157         RC  = (1 <<  6),        /* Rear Center          */
158         RR  = (1 <<  7),        /* Rear Right           */
159         RLC = (1 <<  8),        /* Rear Left Center     */
160         RRC = (1 <<  9),        /* Rear Right Center    */
161         LFE = (1 << 10),        /* Low Frequency Effect */
162         FLW = (1 << 11),        /* Front Left Wide      */
163         FRW = (1 << 12),        /* Front Right Wide     */
164         FLH = (1 << 13),        /* Front Left High      */
165         FCH = (1 << 14),        /* Front Center High    */
166         FRH = (1 << 15),        /* Front Right High     */
167         TC  = (1 << 16),        /* Top Center           */
168 };
169
170 /*
171  * ELD SA bits in the CEA Speaker Allocation data block
172  */
173 static int eld_speaker_allocation_bits[] = {
174         [0] = FL | FR,
175         [1] = LFE,
176         [2] = FC,
177         [3] = RL | RR,
178         [4] = RC,
179         [5] = FLC | FRC,
180         [6] = RLC | RRC,
181         /* the following are not defined in ELD yet */
182         [7] = FLW | FRW,
183         [8] = FLH | FRH,
184         [9] = TC,
185         [10] = FCH,
186 };
187
188 struct cea_channel_speaker_allocation {
189         int ca_index;
190         int speakers[8];
191
192         /* derived values, just for convenience */
193         int channels;
194         int spk_mask;
195 };
196
197 /*
198  * ALSA sequence is:
199  *
200  *       surround40   surround41   surround50   surround51   surround71
201  * ch0   front left   =            =            =            =
202  * ch1   front right  =            =            =            =
203  * ch2   rear left    =            =            =            =
204  * ch3   rear right   =            =            =            =
205  * ch4                LFE          center       center       center
206  * ch5                                          LFE          LFE
207  * ch6                                                       side left
208  * ch7                                                       side right
209  *
210  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
211  */
212 static int hdmi_channel_mapping[0x32][8] = {
213         /* stereo */
214         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
215         /* 2.1 */
216         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
217         /* Dolby Surround */
218         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
219         /* surround40 */
220         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
221         /* 4ch */
222         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
223         /* surround41 */
224         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
225         /* surround50 */
226         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
227         /* surround51 */
228         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
229         /* 7.1 */
230         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
231 };
232
233 /*
234  * This is an ordered list!
235  *
236  * The preceding ones have better chances to be selected by
237  * hdmi_channel_allocation().
238  */
239 static struct cea_channel_speaker_allocation channel_allocations[] = {
240 /*                        channel:   7     6    5    4    3     2    1    0  */
241 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
242                                  /* 2.1 */
243 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
244                                  /* Dolby Surround */
245 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
246                                  /* surround40 */
247 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
248                                  /* surround41 */
249 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
250                                  /* surround50 */
251 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
252                                  /* surround51 */
253 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
254                                  /* 6.1 */
255 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
256                                  /* surround71 */
257 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
258
259 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
260 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
261 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
262 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
263 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
264 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
265 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
266 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
267 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
268 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
269 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
270 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
271 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
272 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
273 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
274 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
275 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
276 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
277 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
278 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
279 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
280 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
281 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
282 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
283 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
284 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
285 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
286 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
287 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
288 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
289 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
290 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
291 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
292 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
293 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
294 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
295 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
296 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
297 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
298 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
299 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
300 };
301
302
303 /*
304  * HDMI routines
305  */
306
307 #define get_pin(spec, idx) \
308         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
309 #define get_cvt(spec, idx) \
310         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
311 #define get_pcm_rec(spec, idx) \
312         ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
313
314 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
315 {
316         int pin_idx;
317
318         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
319                 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
320                         return pin_idx;
321
322         snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
323         return -EINVAL;
324 }
325
326 static int hinfo_to_pin_index(struct hdmi_spec *spec,
327                               struct hda_pcm_stream *hinfo)
328 {
329         int pin_idx;
330
331         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
332                 if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
333                         return pin_idx;
334
335         snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
336         return -EINVAL;
337 }
338
339 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
340 {
341         int cvt_idx;
342
343         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
344                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
345                         return cvt_idx;
346
347         snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
348         return -EINVAL;
349 }
350
351 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
352                         struct snd_ctl_elem_info *uinfo)
353 {
354         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
355         struct hdmi_spec *spec = codec->spec;
356         struct hdmi_spec_per_pin *per_pin;
357         struct hdmi_eld *eld;
358         int pin_idx;
359
360         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
361
362         pin_idx = kcontrol->private_value;
363         per_pin = get_pin(spec, pin_idx);
364         eld = &per_pin->sink_eld;
365
366         mutex_lock(&per_pin->lock);
367         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
368         mutex_unlock(&per_pin->lock);
369
370         return 0;
371 }
372
373 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
374                         struct snd_ctl_elem_value *ucontrol)
375 {
376         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
377         struct hdmi_spec *spec = codec->spec;
378         struct hdmi_spec_per_pin *per_pin;
379         struct hdmi_eld *eld;
380         int pin_idx;
381
382         pin_idx = kcontrol->private_value;
383         per_pin = get_pin(spec, pin_idx);
384         eld = &per_pin->sink_eld;
385
386         mutex_lock(&per_pin->lock);
387         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
388                 mutex_unlock(&per_pin->lock);
389                 snd_BUG();
390                 return -EINVAL;
391         }
392
393         memset(ucontrol->value.bytes.data, 0,
394                ARRAY_SIZE(ucontrol->value.bytes.data));
395         if (eld->eld_valid)
396                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
397                        eld->eld_size);
398         mutex_unlock(&per_pin->lock);
399
400         return 0;
401 }
402
403 static struct snd_kcontrol_new eld_bytes_ctl = {
404         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
405         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
406         .name = "ELD",
407         .info = hdmi_eld_ctl_info,
408         .get = hdmi_eld_ctl_get,
409 };
410
411 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
412                         int device)
413 {
414         struct snd_kcontrol *kctl;
415         struct hdmi_spec *spec = codec->spec;
416         int err;
417
418         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
419         if (!kctl)
420                 return -ENOMEM;
421         kctl->private_value = pin_idx;
422         kctl->id.device = device;
423
424         err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
425         if (err < 0)
426                 return err;
427
428         get_pin(spec, pin_idx)->eld_ctl = kctl;
429         return 0;
430 }
431
432 #ifdef BE_PARANOID
433 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
434                                 int *packet_index, int *byte_index)
435 {
436         int val;
437
438         val = snd_hda_codec_read(codec, pin_nid, 0,
439                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
440
441         *packet_index = val >> 5;
442         *byte_index = val & 0x1f;
443 }
444 #endif
445
446 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
447                                 int packet_index, int byte_index)
448 {
449         int val;
450
451         val = (packet_index << 5) | (byte_index & 0x1f);
452
453         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
454 }
455
456 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
457                                 unsigned char val)
458 {
459         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
460 }
461
462 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
463 {
464         /* Unmute */
465         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
466                 snd_hda_codec_write(codec, pin_nid, 0,
467                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
468         /* Enable pin out: some machines with GM965 gets broken output when
469          * the pin is disabled or changed while using with HDMI
470          */
471         snd_hda_codec_write(codec, pin_nid, 0,
472                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
473 }
474
475 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
476 {
477         return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
478                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
479 }
480
481 static void hdmi_set_channel_count(struct hda_codec *codec,
482                                    hda_nid_t cvt_nid, int chs)
483 {
484         if (chs != hdmi_get_channel_count(codec, cvt_nid))
485                 snd_hda_codec_write(codec, cvt_nid, 0,
486                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
487 }
488
489 /*
490  * ELD proc files
491  */
492
493 #ifdef CONFIG_PROC_FS
494 static void print_eld_info(struct snd_info_entry *entry,
495                            struct snd_info_buffer *buffer)
496 {
497         struct hdmi_spec_per_pin *per_pin = entry->private_data;
498
499         mutex_lock(&per_pin->lock);
500         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
501         mutex_unlock(&per_pin->lock);
502 }
503
504 static void write_eld_info(struct snd_info_entry *entry,
505                            struct snd_info_buffer *buffer)
506 {
507         struct hdmi_spec_per_pin *per_pin = entry->private_data;
508
509         mutex_lock(&per_pin->lock);
510         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
511         mutex_unlock(&per_pin->lock);
512 }
513
514 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
515 {
516         char name[32];
517         struct hda_codec *codec = per_pin->codec;
518         struct snd_info_entry *entry;
519         int err;
520
521         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
522         err = snd_card_proc_new(codec->bus->card, name, &entry);
523         if (err < 0)
524                 return err;
525
526         snd_info_set_text_ops(entry, per_pin, print_eld_info);
527         entry->c.text.write = write_eld_info;
528         entry->mode |= S_IWUSR;
529         per_pin->proc_entry = entry;
530
531         return 0;
532 }
533
534 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
535 {
536         if (!per_pin->codec->bus->shutdown && per_pin->proc_entry) {
537                 snd_device_free(per_pin->codec->bus->card, per_pin->proc_entry);
538                 per_pin->proc_entry = NULL;
539         }
540 }
541 #else
542 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
543                                int index)
544 {
545         return 0;
546 }
547 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
548 {
549 }
550 #endif
551
552 /*
553  * Channel mapping routines
554  */
555
556 /*
557  * Compute derived values in channel_allocations[].
558  */
559 static void init_channel_allocations(void)
560 {
561         int i, j;
562         struct cea_channel_speaker_allocation *p;
563
564         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
565                 p = channel_allocations + i;
566                 p->channels = 0;
567                 p->spk_mask = 0;
568                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
569                         if (p->speakers[j]) {
570                                 p->channels++;
571                                 p->spk_mask |= p->speakers[j];
572                         }
573         }
574 }
575
576 static int get_channel_allocation_order(int ca)
577 {
578         int i;
579
580         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
581                 if (channel_allocations[i].ca_index == ca)
582                         break;
583         }
584         return i;
585 }
586
587 /*
588  * The transformation takes two steps:
589  *
590  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
591  *            spk_mask => (channel_allocations[])         => ai->CA
592  *
593  * TODO: it could select the wrong CA from multiple candidates.
594 */
595 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
596 {
597         int i;
598         int ca = 0;
599         int spk_mask = 0;
600         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
601
602         /*
603          * CA defaults to 0 for basic stereo audio
604          */
605         if (channels <= 2)
606                 return 0;
607
608         /*
609          * expand ELD's speaker allocation mask
610          *
611          * ELD tells the speaker mask in a compact(paired) form,
612          * expand ELD's notions to match the ones used by Audio InfoFrame.
613          */
614         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
615                 if (eld->info.spk_alloc & (1 << i))
616                         spk_mask |= eld_speaker_allocation_bits[i];
617         }
618
619         /* search for the first working match in the CA table */
620         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
621                 if (channels == channel_allocations[i].channels &&
622                     (spk_mask & channel_allocations[i].spk_mask) ==
623                                 channel_allocations[i].spk_mask) {
624                         ca = channel_allocations[i].ca_index;
625                         break;
626                 }
627         }
628
629         if (!ca) {
630                 /* if there was no match, select the regular ALSA channel
631                  * allocation with the matching number of channels */
632                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
633                         if (channels == channel_allocations[i].channels) {
634                                 ca = channel_allocations[i].ca_index;
635                                 break;
636                         }
637                 }
638         }
639
640         snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
641         snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
642                     ca, channels, buf);
643
644         return ca;
645 }
646
647 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
648                                        hda_nid_t pin_nid)
649 {
650 #ifdef CONFIG_SND_DEBUG_VERBOSE
651         int i;
652         int slot;
653
654         for (i = 0; i < 8; i++) {
655                 slot = snd_hda_codec_read(codec, pin_nid, 0,
656                                                 AC_VERB_GET_HDMI_CHAN_SLOT, i);
657                 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
658                                                 slot >> 4, slot & 0xf);
659         }
660 #endif
661 }
662
663
664 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
665                                        hda_nid_t pin_nid,
666                                        bool non_pcm,
667                                        int ca)
668 {
669         struct cea_channel_speaker_allocation *ch_alloc;
670         int i;
671         int err;
672         int order;
673         int non_pcm_mapping[8];
674
675         order = get_channel_allocation_order(ca);
676         ch_alloc = &channel_allocations[order];
677
678         if (hdmi_channel_mapping[ca][1] == 0) {
679                 int hdmi_slot = 0;
680                 /* fill actual channel mappings in ALSA channel (i) order */
681                 for (i = 0; i < ch_alloc->channels; i++) {
682                         while (!ch_alloc->speakers[7 - hdmi_slot] && !WARN_ON(hdmi_slot >= 8))
683                                 hdmi_slot++; /* skip zero slots */
684
685                         hdmi_channel_mapping[ca][i] = (i << 4) | hdmi_slot++;
686                 }
687                 /* fill the rest of the slots with ALSA channel 0xf */
688                 for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++)
689                         if (!ch_alloc->speakers[7 - hdmi_slot])
690                                 hdmi_channel_mapping[ca][i++] = (0xf << 4) | hdmi_slot;
691         }
692
693         if (non_pcm) {
694                 for (i = 0; i < ch_alloc->channels; i++)
695                         non_pcm_mapping[i] = (i << 4) | i;
696                 for (; i < 8; i++)
697                         non_pcm_mapping[i] = (0xf << 4) | i;
698         }
699
700         for (i = 0; i < 8; i++) {
701                 err = snd_hda_codec_write(codec, pin_nid, 0,
702                                           AC_VERB_SET_HDMI_CHAN_SLOT,
703                                           non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
704                 if (err) {
705                         snd_printdd(KERN_NOTICE
706                                     "HDMI: channel mapping failed\n");
707                         break;
708                 }
709         }
710 }
711
712 struct channel_map_table {
713         unsigned char map;              /* ALSA API channel map position */
714         int spk_mask;                   /* speaker position bit mask */
715 };
716
717 static struct channel_map_table map_tables[] = {
718         { SNDRV_CHMAP_FL,       FL },
719         { SNDRV_CHMAP_FR,       FR },
720         { SNDRV_CHMAP_RL,       RL },
721         { SNDRV_CHMAP_RR,       RR },
722         { SNDRV_CHMAP_LFE,      LFE },
723         { SNDRV_CHMAP_FC,       FC },
724         { SNDRV_CHMAP_RLC,      RLC },
725         { SNDRV_CHMAP_RRC,      RRC },
726         { SNDRV_CHMAP_RC,       RC },
727         { SNDRV_CHMAP_FLC,      FLC },
728         { SNDRV_CHMAP_FRC,      FRC },
729         { SNDRV_CHMAP_FLH,      FLH },
730         { SNDRV_CHMAP_FRH,      FRH },
731         { SNDRV_CHMAP_FLW,      FLW },
732         { SNDRV_CHMAP_FRW,      FRW },
733         { SNDRV_CHMAP_TC,       TC },
734         { SNDRV_CHMAP_FCH,      FCH },
735         {} /* terminator */
736 };
737
738 /* from ALSA API channel position to speaker bit mask */
739 static int to_spk_mask(unsigned char c)
740 {
741         struct channel_map_table *t = map_tables;
742         for (; t->map; t++) {
743                 if (t->map == c)
744                         return t->spk_mask;
745         }
746         return 0;
747 }
748
749 /* from ALSA API channel position to CEA slot */
750 static int to_cea_slot(int ordered_ca, unsigned char pos)
751 {
752         int mask = to_spk_mask(pos);
753         int i;
754
755         if (mask) {
756                 for (i = 0; i < 8; i++) {
757                         if (channel_allocations[ordered_ca].speakers[7 - i] == mask)
758                                 return i;
759                 }
760         }
761
762         return -1;
763 }
764
765 /* from speaker bit mask to ALSA API channel position */
766 static int spk_to_chmap(int spk)
767 {
768         struct channel_map_table *t = map_tables;
769         for (; t->map; t++) {
770                 if (t->spk_mask == spk)
771                         return t->map;
772         }
773         return 0;
774 }
775
776 /* from CEA slot to ALSA API channel position */
777 static int from_cea_slot(int ordered_ca, unsigned char slot)
778 {
779         int mask = channel_allocations[ordered_ca].speakers[7 - slot];
780
781         return spk_to_chmap(mask);
782 }
783
784 /* get the CA index corresponding to the given ALSA API channel map */
785 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
786 {
787         int i, spks = 0, spk_mask = 0;
788
789         for (i = 0; i < chs; i++) {
790                 int mask = to_spk_mask(map[i]);
791                 if (mask) {
792                         spk_mask |= mask;
793                         spks++;
794                 }
795         }
796
797         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
798                 if ((chs == channel_allocations[i].channels ||
799                      spks == channel_allocations[i].channels) &&
800                     (spk_mask & channel_allocations[i].spk_mask) ==
801                                 channel_allocations[i].spk_mask)
802                         return channel_allocations[i].ca_index;
803         }
804         return -1;
805 }
806
807 /* set up the channel slots for the given ALSA API channel map */
808 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
809                                              hda_nid_t pin_nid,
810                                              int chs, unsigned char *map,
811                                              int ca)
812 {
813         int ordered_ca = get_channel_allocation_order(ca);
814         int alsa_pos, hdmi_slot;
815         int assignments[8] = {[0 ... 7] = 0xf};
816
817         for (alsa_pos = 0; alsa_pos < chs; alsa_pos++) {
818
819                 hdmi_slot = to_cea_slot(ordered_ca, map[alsa_pos]);
820
821                 if (hdmi_slot < 0)
822                         continue; /* unassigned channel */
823
824                 assignments[hdmi_slot] = alsa_pos;
825         }
826
827         for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++) {
828                 int val, err;
829
830                 val = (assignments[hdmi_slot] << 4) | hdmi_slot;
831                 err = snd_hda_codec_write(codec, pin_nid, 0,
832                                           AC_VERB_SET_HDMI_CHAN_SLOT, val);
833                 if (err)
834                         return -EINVAL;
835         }
836         return 0;
837 }
838
839 /* store ALSA API channel map from the current default map */
840 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
841 {
842         int i;
843         int ordered_ca = get_channel_allocation_order(ca);
844         for (i = 0; i < 8; i++) {
845                 if (i < channel_allocations[ordered_ca].channels)
846                         map[i] = from_cea_slot(ordered_ca, hdmi_channel_mapping[ca][i] & 0x0f);
847                 else
848                         map[i] = 0;
849         }
850 }
851
852 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
853                                        hda_nid_t pin_nid, bool non_pcm, int ca,
854                                        int channels, unsigned char *map,
855                                        bool chmap_set)
856 {
857         if (!non_pcm && chmap_set) {
858                 hdmi_manual_setup_channel_mapping(codec, pin_nid,
859                                                   channels, map, ca);
860         } else {
861                 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
862                 hdmi_setup_fake_chmap(map, ca);
863         }
864
865         hdmi_debug_channel_mapping(codec, pin_nid);
866 }
867
868 /*
869  * Audio InfoFrame routines
870  */
871
872 /*
873  * Enable Audio InfoFrame Transmission
874  */
875 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
876                                        hda_nid_t pin_nid)
877 {
878         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
879         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
880                                                 AC_DIPXMIT_BEST);
881 }
882
883 /*
884  * Disable Audio InfoFrame Transmission
885  */
886 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
887                                       hda_nid_t pin_nid)
888 {
889         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
890         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
891                                                 AC_DIPXMIT_DISABLE);
892 }
893
894 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
895 {
896 #ifdef CONFIG_SND_DEBUG_VERBOSE
897         int i;
898         int size;
899
900         size = snd_hdmi_get_eld_size(codec, pin_nid);
901         printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
902
903         for (i = 0; i < 8; i++) {
904                 size = snd_hda_codec_read(codec, pin_nid, 0,
905                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
906                 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
907         }
908 #endif
909 }
910
911 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
912 {
913 #ifdef BE_PARANOID
914         int i, j;
915         int size;
916         int pi, bi;
917         for (i = 0; i < 8; i++) {
918                 size = snd_hda_codec_read(codec, pin_nid, 0,
919                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
920                 if (size == 0)
921                         continue;
922
923                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
924                 for (j = 1; j < 1000; j++) {
925                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
926                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
927                         if (pi != i)
928                                 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
929                                                 bi, pi, i);
930                         if (bi == 0) /* byte index wrapped around */
931                                 break;
932                 }
933                 snd_printd(KERN_INFO
934                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
935                         i, size, j);
936         }
937 #endif
938 }
939
940 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
941 {
942         u8 *bytes = (u8 *)hdmi_ai;
943         u8 sum = 0;
944         int i;
945
946         hdmi_ai->checksum = 0;
947
948         for (i = 0; i < sizeof(*hdmi_ai); i++)
949                 sum += bytes[i];
950
951         hdmi_ai->checksum = -sum;
952 }
953
954 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
955                                       hda_nid_t pin_nid,
956                                       u8 *dip, int size)
957 {
958         int i;
959
960         hdmi_debug_dip_size(codec, pin_nid);
961         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
962
963         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
964         for (i = 0; i < size; i++)
965                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
966 }
967
968 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
969                                     u8 *dip, int size)
970 {
971         u8 val;
972         int i;
973
974         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
975                                                             != AC_DIPXMIT_BEST)
976                 return false;
977
978         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
979         for (i = 0; i < size; i++) {
980                 val = snd_hda_codec_read(codec, pin_nid, 0,
981                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
982                 if (val != dip[i])
983                         return false;
984         }
985
986         return true;
987 }
988
989 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
990                                        struct hdmi_spec_per_pin *per_pin,
991                                        bool non_pcm)
992 {
993         hda_nid_t pin_nid = per_pin->pin_nid;
994         int channels = per_pin->channels;
995         int active_channels;
996         struct hdmi_eld *eld;
997         int ca, ordered_ca;
998         union audio_infoframe ai;
999
1000         if (!channels)
1001                 return;
1002
1003         if (is_haswell(codec))
1004                 snd_hda_codec_write(codec, pin_nid, 0,
1005                                             AC_VERB_SET_AMP_GAIN_MUTE,
1006                                             AMP_OUT_UNMUTE);
1007
1008         eld = &per_pin->sink_eld;
1009         if (!eld->monitor_present)
1010                 return;
1011
1012         if (!non_pcm && per_pin->chmap_set)
1013                 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
1014         else
1015                 ca = hdmi_channel_allocation(eld, channels);
1016         if (ca < 0)
1017                 ca = 0;
1018
1019         ordered_ca = get_channel_allocation_order(ca);
1020         active_channels = channel_allocations[ordered_ca].channels;
1021
1022         hdmi_set_channel_count(codec, per_pin->cvt_nid, active_channels);
1023
1024         memset(&ai, 0, sizeof(ai));
1025         if (eld->info.conn_type == 0) { /* HDMI */
1026                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
1027
1028                 hdmi_ai->type           = 0x84;
1029                 hdmi_ai->ver            = 0x01;
1030                 hdmi_ai->len            = 0x0a;
1031                 hdmi_ai->CC02_CT47      = active_channels - 1;
1032                 hdmi_ai->CA             = ca;
1033                 hdmi_checksum_audio_infoframe(hdmi_ai);
1034         } else if (eld->info.conn_type == 1) { /* DisplayPort */
1035                 struct dp_audio_infoframe *dp_ai = &ai.dp;
1036
1037                 dp_ai->type             = 0x84;
1038                 dp_ai->len              = 0x1b;
1039                 dp_ai->ver              = 0x11 << 2;
1040                 dp_ai->CC02_CT47        = active_channels - 1;
1041                 dp_ai->CA               = ca;
1042         } else {
1043                 snd_printd("HDMI: unknown connection type at pin %d\n",
1044                             pin_nid);
1045                 return;
1046         }
1047
1048         /*
1049          * always configure channel mapping, it may have been changed by the
1050          * user in the meantime
1051          */
1052         hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
1053                                    channels, per_pin->chmap,
1054                                    per_pin->chmap_set);
1055
1056         /*
1057          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
1058          * sizeof(*dp_ai) to avoid partial match/update problems when
1059          * the user switches between HDMI/DP monitors.
1060          */
1061         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
1062                                         sizeof(ai))) {
1063                 snd_printdd("hdmi_setup_audio_infoframe: "
1064                             "pin=%d channels=%d ca=0x%02x\n",
1065                             pin_nid,
1066                             active_channels, ca);
1067                 hdmi_stop_infoframe_trans(codec, pin_nid);
1068                 hdmi_fill_audio_infoframe(codec, pin_nid,
1069                                             ai.bytes, sizeof(ai));
1070                 hdmi_start_infoframe_trans(codec, pin_nid);
1071         }
1072
1073         per_pin->non_pcm = non_pcm;
1074 }
1075
1076
1077 /*
1078  * Unsolicited events
1079  */
1080
1081 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
1082
1083 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
1084 {
1085         struct hdmi_spec *spec = codec->spec;
1086         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1087         int pin_nid;
1088         int pin_idx;
1089         struct hda_jack_tbl *jack;
1090         int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
1091
1092         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
1093         if (!jack)
1094                 return;
1095         pin_nid = jack->nid;
1096         jack->jack_dirty = 1;
1097
1098         _snd_printd(SND_PR_VERBOSE,
1099                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
1100                 codec->addr, pin_nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
1101                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
1102
1103         pin_idx = pin_nid_to_pin_index(spec, pin_nid);
1104         if (pin_idx < 0)
1105                 return;
1106
1107         hdmi_present_sense(get_pin(spec, pin_idx), 1);
1108         snd_hda_jack_report_sync(codec);
1109 }
1110
1111 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
1112 {
1113         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1114         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1115         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
1116         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
1117
1118         printk(KERN_INFO
1119                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1120                 codec->addr,
1121                 tag,
1122                 subtag,
1123                 cp_state,
1124                 cp_ready);
1125
1126         /* TODO */
1127         if (cp_state)
1128                 ;
1129         if (cp_ready)
1130                 ;
1131 }
1132
1133
1134 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1135 {
1136         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1137         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1138
1139         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1140                 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
1141                 return;
1142         }
1143
1144         if (subtag == 0)
1145                 hdmi_intrinsic_event(codec, res);
1146         else
1147                 hdmi_non_intrinsic_event(codec, res);
1148 }
1149
1150 static void haswell_verify_D0(struct hda_codec *codec,
1151                 hda_nid_t cvt_nid, hda_nid_t nid)
1152 {
1153         int pwr;
1154
1155         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1156          * thus pins could only choose converter 0 for use. Make sure the
1157          * converters are in correct power state */
1158         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
1159                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1160
1161         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
1162                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1163                                     AC_PWRST_D0);
1164                 msleep(40);
1165                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1166                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1167                 snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1168         }
1169 }
1170
1171 /*
1172  * Callbacks
1173  */
1174
1175 /* HBR should be Non-PCM, 8 channels */
1176 #define is_hbr_format(format) \
1177         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1178
1179 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1180                               hda_nid_t pin_nid, u32 stream_tag, int format)
1181 {
1182         int pinctl;
1183         int new_pinctl = 0;
1184
1185         if (is_haswell(codec))
1186                 haswell_verify_D0(codec, cvt_nid, pin_nid);
1187
1188         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1189                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1190                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1191
1192                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1193                 if (is_hbr_format(format))
1194                         new_pinctl |= AC_PINCTL_EPT_HBR;
1195                 else
1196                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
1197
1198                 snd_printdd("hdmi_setup_stream: "
1199                             "NID=0x%x, %spinctl=0x%x\n",
1200                             pin_nid,
1201                             pinctl == new_pinctl ? "" : "new-",
1202                             new_pinctl);
1203
1204                 if (pinctl != new_pinctl)
1205                         snd_hda_codec_write(codec, pin_nid, 0,
1206                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1207                                             new_pinctl);
1208
1209         }
1210         if (is_hbr_format(format) && !new_pinctl) {
1211                 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
1212                 return -EINVAL;
1213         }
1214
1215         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1216         return 0;
1217 }
1218
1219 static int hdmi_choose_cvt(struct hda_codec *codec,
1220                         int pin_idx, int *cvt_id, int *mux_id)
1221 {
1222         struct hdmi_spec *spec = codec->spec;
1223         struct hdmi_spec_per_pin *per_pin;
1224         struct hdmi_spec_per_cvt *per_cvt = NULL;
1225         int cvt_idx, mux_idx = 0;
1226
1227         per_pin = get_pin(spec, pin_idx);
1228
1229         /* Dynamically assign converter to stream */
1230         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1231                 per_cvt = get_cvt(spec, cvt_idx);
1232
1233                 /* Must not already be assigned */
1234                 if (per_cvt->assigned)
1235                         continue;
1236                 /* Must be in pin's mux's list of converters */
1237                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1238                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1239                                 break;
1240                 /* Not in mux list */
1241                 if (mux_idx == per_pin->num_mux_nids)
1242                         continue;
1243                 break;
1244         }
1245
1246         /* No free converters */
1247         if (cvt_idx == spec->num_cvts)
1248                 return -ENODEV;
1249
1250         if (cvt_id)
1251                 *cvt_id = cvt_idx;
1252         if (mux_id)
1253                 *mux_id = mux_idx;
1254
1255         return 0;
1256 }
1257
1258 static void haswell_config_cvts(struct hda_codec *codec,
1259                         hda_nid_t pin_nid, int mux_idx)
1260 {
1261         struct hdmi_spec *spec = codec->spec;
1262         hda_nid_t nid, end_nid;
1263         int cvt_idx, curr;
1264         struct hdmi_spec_per_cvt *per_cvt;
1265
1266         /* configure all pins, including "no physical connection" ones */
1267         end_nid = codec->start_nid + codec->num_nodes;
1268         for (nid = codec->start_nid; nid < end_nid; nid++) {
1269                 unsigned int wid_caps = get_wcaps(codec, nid);
1270                 unsigned int wid_type = get_wcaps_type(wid_caps);
1271
1272                 if (wid_type != AC_WID_PIN)
1273                         continue;
1274
1275                 if (nid == pin_nid)
1276                         continue;
1277
1278                 curr = snd_hda_codec_read(codec, nid, 0,
1279                                           AC_VERB_GET_CONNECT_SEL, 0);
1280                 if (curr != mux_idx)
1281                         continue;
1282
1283                 /* choose an unassigned converter. The conveters in the
1284                  * connection list are in the same order as in the codec.
1285                  */
1286                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1287                         per_cvt = get_cvt(spec, cvt_idx);
1288                         if (!per_cvt->assigned) {
1289                                 snd_printdd("choose cvt %d for pin nid %d\n",
1290                                         cvt_idx, nid);
1291                                 snd_hda_codec_write_cache(codec, nid, 0,
1292                                             AC_VERB_SET_CONNECT_SEL,
1293                                             cvt_idx);
1294                                 break;
1295                         }
1296                 }
1297         }
1298 }
1299
1300 /*
1301  * HDA PCM callbacks
1302  */
1303 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1304                          struct hda_codec *codec,
1305                          struct snd_pcm_substream *substream)
1306 {
1307         struct hdmi_spec *spec = codec->spec;
1308         struct snd_pcm_runtime *runtime = substream->runtime;
1309         int pin_idx, cvt_idx, mux_idx = 0;
1310         struct hdmi_spec_per_pin *per_pin;
1311         struct hdmi_eld *eld;
1312         struct hdmi_spec_per_cvt *per_cvt = NULL;
1313         int err;
1314
1315         /* Validate hinfo */
1316         pin_idx = hinfo_to_pin_index(spec, hinfo);
1317         if (snd_BUG_ON(pin_idx < 0))
1318                 return -EINVAL;
1319         per_pin = get_pin(spec, pin_idx);
1320         eld = &per_pin->sink_eld;
1321
1322         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1323         if (err < 0)
1324                 return err;
1325
1326         per_cvt = get_cvt(spec, cvt_idx);
1327         /* Claim converter */
1328         per_cvt->assigned = 1;
1329         per_pin->cvt_nid = per_cvt->cvt_nid;
1330         hinfo->nid = per_cvt->cvt_nid;
1331
1332         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1333                             AC_VERB_SET_CONNECT_SEL,
1334                             mux_idx);
1335
1336         /* configure unused pins to choose other converters */
1337         if (is_haswell(codec))
1338                 haswell_config_cvts(codec, per_pin->pin_nid, mux_idx);
1339
1340         snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1341
1342         /* Initially set the converter's capabilities */
1343         hinfo->channels_min = per_cvt->channels_min;
1344         hinfo->channels_max = per_cvt->channels_max;
1345         hinfo->rates = per_cvt->rates;
1346         hinfo->formats = per_cvt->formats;
1347         hinfo->maxbps = per_cvt->maxbps;
1348
1349         /* Restrict capabilities by ELD if this isn't disabled */
1350         if (!static_hdmi_pcm && eld->eld_valid) {
1351                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1352                 if (hinfo->channels_min > hinfo->channels_max ||
1353                     !hinfo->rates || !hinfo->formats) {
1354                         per_cvt->assigned = 0;
1355                         hinfo->nid = 0;
1356                         snd_hda_spdif_ctls_unassign(codec, pin_idx);
1357                         return -ENODEV;
1358                 }
1359         }
1360
1361         /* Store the updated parameters */
1362         runtime->hw.channels_min = hinfo->channels_min;
1363         runtime->hw.channels_max = hinfo->channels_max;
1364         runtime->hw.formats = hinfo->formats;
1365         runtime->hw.rates = hinfo->rates;
1366
1367         snd_pcm_hw_constraint_step(substream->runtime, 0,
1368                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1369         return 0;
1370 }
1371
1372 /*
1373  * HDA/HDMI auto parsing
1374  */
1375 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1376 {
1377         struct hdmi_spec *spec = codec->spec;
1378         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1379         hda_nid_t pin_nid = per_pin->pin_nid;
1380
1381         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1382                 snd_printk(KERN_WARNING
1383                            "HDMI: pin %d wcaps %#x "
1384                            "does not support connection list\n",
1385                            pin_nid, get_wcaps(codec, pin_nid));
1386                 return -EINVAL;
1387         }
1388
1389         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1390                                                         per_pin->mux_nids,
1391                                                         HDA_MAX_CONNECTIONS);
1392
1393         return 0;
1394 }
1395
1396 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1397 {
1398         struct hda_codec *codec = per_pin->codec;
1399         struct hdmi_spec *spec = codec->spec;
1400         struct hdmi_eld *eld = &spec->temp_eld;
1401         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1402         hda_nid_t pin_nid = per_pin->pin_nid;
1403         /*
1404          * Always execute a GetPinSense verb here, even when called from
1405          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1406          * response's PD bit is not the real PD value, but indicates that
1407          * the real PD value changed. An older version of the HD-audio
1408          * specification worked this way. Hence, we just ignore the data in
1409          * the unsolicited response to avoid custom WARs.
1410          */
1411         int present = snd_hda_pin_sense(codec, pin_nid);
1412         bool update_eld = false;
1413         bool eld_changed = false;
1414
1415         mutex_lock(&per_pin->lock);
1416         pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1417         if (pin_eld->monitor_present)
1418                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1419         else
1420                 eld->eld_valid = false;
1421
1422         _snd_printd(SND_PR_VERBOSE,
1423                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1424                 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1425
1426         if (eld->eld_valid) {
1427                 if (snd_hdmi_get_eld(codec, pin_nid, eld->eld_buffer,
1428                                                      &eld->eld_size) < 0)
1429                         eld->eld_valid = false;
1430                 else {
1431                         memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
1432                         if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
1433                                                     eld->eld_size) < 0)
1434                                 eld->eld_valid = false;
1435                 }
1436
1437                 if (eld->eld_valid) {
1438                         snd_hdmi_show_eld(&eld->info);
1439                         update_eld = true;
1440                 }
1441                 else if (repoll) {
1442                         queue_delayed_work(codec->bus->workq,
1443                                            &per_pin->work,
1444                                            msecs_to_jiffies(300));
1445                         goto unlock;
1446                 }
1447         }
1448
1449         if (pin_eld->eld_valid && !eld->eld_valid) {
1450                 update_eld = true;
1451                 eld_changed = true;
1452         }
1453         if (update_eld) {
1454                 bool old_eld_valid = pin_eld->eld_valid;
1455                 pin_eld->eld_valid = eld->eld_valid;
1456                 eld_changed = pin_eld->eld_size != eld->eld_size ||
1457                               memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1458                                      eld->eld_size) != 0;
1459                 if (eld_changed)
1460                         memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1461                                eld->eld_size);
1462                 pin_eld->eld_size = eld->eld_size;
1463                 pin_eld->info = eld->info;
1464
1465                 /* Haswell-specific workaround: re-setup when the transcoder is
1466                  * changed during the stream playback
1467                  */
1468                 if (is_haswell(codec) &&
1469                     eld->eld_valid && !old_eld_valid && per_pin->setup)
1470                         hdmi_setup_audio_infoframe(codec, per_pin,
1471                                                    per_pin->non_pcm);
1472         }
1473
1474         if (eld_changed)
1475                 snd_ctl_notify(codec->bus->card,
1476                                SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
1477                                &per_pin->eld_ctl->id);
1478  unlock:
1479         mutex_unlock(&per_pin->lock);
1480 }
1481
1482 static void hdmi_repoll_eld(struct work_struct *work)
1483 {
1484         struct hdmi_spec_per_pin *per_pin =
1485         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1486
1487         if (per_pin->repoll_count++ > 6)
1488                 per_pin->repoll_count = 0;
1489
1490         hdmi_present_sense(per_pin, per_pin->repoll_count);
1491 }
1492
1493 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1494                                              hda_nid_t nid);
1495
1496 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1497 {
1498         struct hdmi_spec *spec = codec->spec;
1499         unsigned int caps, config;
1500         int pin_idx;
1501         struct hdmi_spec_per_pin *per_pin;
1502         int err;
1503
1504         caps = snd_hda_query_pin_caps(codec, pin_nid);
1505         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1506                 return 0;
1507
1508         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1509         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1510                 return 0;
1511
1512         if (is_haswell(codec))
1513                 intel_haswell_fixup_connect_list(codec, pin_nid);
1514
1515         pin_idx = spec->num_pins;
1516         per_pin = snd_array_new(&spec->pins);
1517         if (!per_pin)
1518                 return -ENOMEM;
1519
1520         per_pin->pin_nid = pin_nid;
1521         per_pin->non_pcm = false;
1522
1523         err = hdmi_read_pin_conn(codec, pin_idx);
1524         if (err < 0)
1525                 return err;
1526
1527         spec->num_pins++;
1528
1529         return 0;
1530 }
1531
1532 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1533 {
1534         struct hdmi_spec *spec = codec->spec;
1535         struct hdmi_spec_per_cvt *per_cvt;
1536         unsigned int chans;
1537         int err;
1538
1539         chans = get_wcaps(codec, cvt_nid);
1540         chans = get_wcaps_channels(chans);
1541
1542         per_cvt = snd_array_new(&spec->cvts);
1543         if (!per_cvt)
1544                 return -ENOMEM;
1545
1546         per_cvt->cvt_nid = cvt_nid;
1547         per_cvt->channels_min = 2;
1548         if (chans <= 16) {
1549                 per_cvt->channels_max = chans;
1550                 if (chans > spec->channels_max)
1551                         spec->channels_max = chans;
1552         }
1553
1554         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1555                                           &per_cvt->rates,
1556                                           &per_cvt->formats,
1557                                           &per_cvt->maxbps);
1558         if (err < 0)
1559                 return err;
1560
1561         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1562                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1563         spec->num_cvts++;
1564
1565         return 0;
1566 }
1567
1568 static int hdmi_parse_codec(struct hda_codec *codec)
1569 {
1570         hda_nid_t nid;
1571         int i, nodes;
1572
1573         nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1574         if (!nid || nodes < 0) {
1575                 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1576                 return -EINVAL;
1577         }
1578
1579         for (i = 0; i < nodes; i++, nid++) {
1580                 unsigned int caps;
1581                 unsigned int type;
1582
1583                 caps = get_wcaps(codec, nid);
1584                 type = get_wcaps_type(caps);
1585
1586                 if (!(caps & AC_WCAP_DIGITAL))
1587                         continue;
1588
1589                 switch (type) {
1590                 case AC_WID_AUD_OUT:
1591                         hdmi_add_cvt(codec, nid);
1592                         break;
1593                 case AC_WID_PIN:
1594                         hdmi_add_pin(codec, nid);
1595                         break;
1596                 }
1597         }
1598
1599 #ifdef CONFIG_PM
1600         /* We're seeing some problems with unsolicited hot plug events on
1601          * PantherPoint after S3, if this is not enabled */
1602         if (codec->vendor_id == 0x80862806)
1603                 codec->bus->power_keep_link_on = 1;
1604         /*
1605          * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1606          * can be lost and presence sense verb will become inaccurate if the
1607          * HDA link is powered off at hot plug or hw initialization time.
1608          */
1609         else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1610               AC_PWRST_EPSS))
1611                 codec->bus->power_keep_link_on = 1;
1612 #endif
1613
1614         return 0;
1615 }
1616
1617 /*
1618  */
1619 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1620 {
1621         struct hda_spdif_out *spdif;
1622         bool non_pcm;
1623
1624         mutex_lock(&codec->spdif_mutex);
1625         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1626         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1627         mutex_unlock(&codec->spdif_mutex);
1628         return non_pcm;
1629 }
1630
1631
1632 /*
1633  * HDMI callbacks
1634  */
1635
1636 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1637                                            struct hda_codec *codec,
1638                                            unsigned int stream_tag,
1639                                            unsigned int format,
1640                                            struct snd_pcm_substream *substream)
1641 {
1642         hda_nid_t cvt_nid = hinfo->nid;
1643         struct hdmi_spec *spec = codec->spec;
1644         int pin_idx = hinfo_to_pin_index(spec, hinfo);
1645         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1646         hda_nid_t pin_nid = per_pin->pin_nid;
1647         bool non_pcm;
1648
1649         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1650         mutex_lock(&per_pin->lock);
1651         per_pin->channels = substream->runtime->channels;
1652         per_pin->setup = true;
1653
1654         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1655         mutex_unlock(&per_pin->lock);
1656
1657         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1658 }
1659
1660 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1661                                              struct hda_codec *codec,
1662                                              struct snd_pcm_substream *substream)
1663 {
1664         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1665         return 0;
1666 }
1667
1668 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1669                           struct hda_codec *codec,
1670                           struct snd_pcm_substream *substream)
1671 {
1672         struct hdmi_spec *spec = codec->spec;
1673         int cvt_idx, pin_idx;
1674         struct hdmi_spec_per_cvt *per_cvt;
1675         struct hdmi_spec_per_pin *per_pin;
1676
1677         if (hinfo->nid) {
1678                 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1679                 if (snd_BUG_ON(cvt_idx < 0))
1680                         return -EINVAL;
1681                 per_cvt = get_cvt(spec, cvt_idx);
1682
1683                 snd_BUG_ON(!per_cvt->assigned);
1684                 per_cvt->assigned = 0;
1685                 hinfo->nid = 0;
1686
1687                 pin_idx = hinfo_to_pin_index(spec, hinfo);
1688                 if (snd_BUG_ON(pin_idx < 0))
1689                         return -EINVAL;
1690                 per_pin = get_pin(spec, pin_idx);
1691
1692                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1693
1694                 mutex_lock(&per_pin->lock);
1695                 per_pin->chmap_set = false;
1696                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1697
1698                 per_pin->setup = false;
1699                 per_pin->channels = 0;
1700                 mutex_unlock(&per_pin->lock);
1701         }
1702
1703         return 0;
1704 }
1705
1706 static const struct hda_pcm_ops generic_ops = {
1707         .open = hdmi_pcm_open,
1708         .close = hdmi_pcm_close,
1709         .prepare = generic_hdmi_playback_pcm_prepare,
1710         .cleanup = generic_hdmi_playback_pcm_cleanup,
1711 };
1712
1713 /*
1714  * ALSA API channel-map control callbacks
1715  */
1716 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1717                                struct snd_ctl_elem_info *uinfo)
1718 {
1719         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1720         struct hda_codec *codec = info->private_data;
1721         struct hdmi_spec *spec = codec->spec;
1722         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1723         uinfo->count = spec->channels_max;
1724         uinfo->value.integer.min = 0;
1725         uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1726         return 0;
1727 }
1728
1729 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
1730                               unsigned int size, unsigned int __user *tlv)
1731 {
1732         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1733         struct hda_codec *codec = info->private_data;
1734         struct hdmi_spec *spec = codec->spec;
1735         unsigned int __user *dst;
1736         int chs, count = 0;
1737
1738         if (size < 8)
1739                 return -ENOMEM;
1740         if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
1741                 return -EFAULT;
1742         size -= 8;
1743         dst = tlv + 2;
1744         for (chs = 2; chs <= spec->channels_max; chs++) {
1745                 int i, c;
1746                 struct cea_channel_speaker_allocation *cap;
1747                 cap = channel_allocations;
1748                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
1749                         int chs_bytes = chs * 4;
1750                         if (cap->channels != chs)
1751                                 continue;
1752                         if (size < 8)
1753                                 return -ENOMEM;
1754                         if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) ||
1755                             put_user(chs_bytes, dst + 1))
1756                                 return -EFAULT;
1757                         dst += 2;
1758                         size -= 8;
1759                         count += 8;
1760                         if (size < chs_bytes)
1761                                 return -ENOMEM;
1762                         size -= chs_bytes;
1763                         count += chs_bytes;
1764                         for (c = 7; c >= 0; c--) {
1765                                 int spk = cap->speakers[c];
1766                                 if (!spk)
1767                                         continue;
1768                                 if (put_user(spk_to_chmap(spk), dst))
1769                                         return -EFAULT;
1770                                 dst++;
1771                         }
1772                 }
1773         }
1774         if (put_user(count, tlv + 1))
1775                 return -EFAULT;
1776         return 0;
1777 }
1778
1779 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
1780                               struct snd_ctl_elem_value *ucontrol)
1781 {
1782         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1783         struct hda_codec *codec = info->private_data;
1784         struct hdmi_spec *spec = codec->spec;
1785         int pin_idx = kcontrol->private_value;
1786         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1787         int i;
1788
1789         for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
1790                 ucontrol->value.integer.value[i] = per_pin->chmap[i];
1791         return 0;
1792 }
1793
1794 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
1795                               struct snd_ctl_elem_value *ucontrol)
1796 {
1797         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1798         struct hda_codec *codec = info->private_data;
1799         struct hdmi_spec *spec = codec->spec;
1800         int pin_idx = kcontrol->private_value;
1801         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1802         unsigned int ctl_idx;
1803         struct snd_pcm_substream *substream;
1804         unsigned char chmap[8];
1805         int i, ca, prepared = 0;
1806
1807         ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1808         substream = snd_pcm_chmap_substream(info, ctl_idx);
1809         if (!substream || !substream->runtime)
1810                 return 0; /* just for avoiding error from alsactl restore */
1811         switch (substream->runtime->status->state) {
1812         case SNDRV_PCM_STATE_OPEN:
1813         case SNDRV_PCM_STATE_SETUP:
1814                 break;
1815         case SNDRV_PCM_STATE_PREPARED:
1816                 prepared = 1;
1817                 break;
1818         default:
1819                 return -EBUSY;
1820         }
1821         memset(chmap, 0, sizeof(chmap));
1822         for (i = 0; i < ARRAY_SIZE(chmap); i++)
1823                 chmap[i] = ucontrol->value.integer.value[i];
1824         if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
1825                 return 0;
1826         ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
1827         if (ca < 0)
1828                 return -EINVAL;
1829         mutex_lock(&per_pin->lock);
1830         per_pin->chmap_set = true;
1831         memcpy(per_pin->chmap, chmap, sizeof(chmap));
1832         if (prepared)
1833                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1834         mutex_unlock(&per_pin->lock);
1835
1836         return 0;
1837 }
1838
1839 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1840 {
1841         struct hdmi_spec *spec = codec->spec;
1842         int pin_idx;
1843
1844         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1845                 struct hda_pcm *info;
1846                 struct hda_pcm_stream *pstr;
1847                 struct hdmi_spec_per_pin *per_pin;
1848
1849                 per_pin = get_pin(spec, pin_idx);
1850                 sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
1851                 info = snd_array_new(&spec->pcm_rec);
1852                 if (!info)
1853                         return -ENOMEM;
1854                 info->name = per_pin->pcm_name;
1855                 info->pcm_type = HDA_PCM_TYPE_HDMI;
1856                 info->own_chmap = true;
1857
1858                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1859                 pstr->substreams = 1;
1860                 pstr->ops = generic_ops;
1861                 /* other pstr fields are set in open */
1862         }
1863
1864         codec->num_pcms = spec->num_pins;
1865         codec->pcm_info = spec->pcm_rec.list;
1866
1867         return 0;
1868 }
1869
1870 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1871 {
1872         char hdmi_str[32] = "HDMI/DP";
1873         struct hdmi_spec *spec = codec->spec;
1874         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1875         int pcmdev = get_pcm_rec(spec, pin_idx)->device;
1876
1877         if (pcmdev > 0)
1878                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
1879         if (!is_jack_detectable(codec, per_pin->pin_nid))
1880                 strncat(hdmi_str, " Phantom",
1881                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
1882
1883         return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
1884 }
1885
1886 static int generic_hdmi_build_controls(struct hda_codec *codec)
1887 {
1888         struct hdmi_spec *spec = codec->spec;
1889         int err;
1890         int pin_idx;
1891
1892         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1893                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1894
1895                 err = generic_hdmi_build_jack(codec, pin_idx);
1896                 if (err < 0)
1897                         return err;
1898
1899                 err = snd_hda_create_dig_out_ctls(codec,
1900                                                   per_pin->pin_nid,
1901                                                   per_pin->mux_nids[0],
1902                                                   HDA_PCM_TYPE_HDMI);
1903                 if (err < 0)
1904                         return err;
1905                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1906
1907                 /* add control for ELD Bytes */
1908                 err = hdmi_create_eld_ctl(codec, pin_idx,
1909                                           get_pcm_rec(spec, pin_idx)->device);
1910
1911                 if (err < 0)
1912                         return err;
1913
1914                 hdmi_present_sense(per_pin, 0);
1915         }
1916
1917         /* add channel maps */
1918         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1919                 struct snd_pcm_chmap *chmap;
1920                 struct snd_kcontrol *kctl;
1921                 int i;
1922
1923                 if (!codec->pcm_info[pin_idx].pcm)
1924                         break;
1925                 err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
1926                                              SNDRV_PCM_STREAM_PLAYBACK,
1927                                              NULL, 0, pin_idx, &chmap);
1928                 if (err < 0)
1929                         return err;
1930                 /* override handlers */
1931                 chmap->private_data = codec;
1932                 kctl = chmap->kctl;
1933                 for (i = 0; i < kctl->count; i++)
1934                         kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
1935                 kctl->info = hdmi_chmap_ctl_info;
1936                 kctl->get = hdmi_chmap_ctl_get;
1937                 kctl->put = hdmi_chmap_ctl_put;
1938                 kctl->tlv.c = hdmi_chmap_ctl_tlv;
1939         }
1940
1941         return 0;
1942 }
1943
1944 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
1945 {
1946         struct hdmi_spec *spec = codec->spec;
1947         int pin_idx;
1948
1949         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1950                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1951
1952                 per_pin->codec = codec;
1953                 mutex_init(&per_pin->lock);
1954                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
1955                 eld_proc_new(per_pin, pin_idx);
1956         }
1957         return 0;
1958 }
1959
1960 static int generic_hdmi_init(struct hda_codec *codec)
1961 {
1962         struct hdmi_spec *spec = codec->spec;
1963         int pin_idx;
1964
1965         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1966                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1967                 hda_nid_t pin_nid = per_pin->pin_nid;
1968
1969                 hdmi_init_pin(codec, pin_nid);
1970                 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
1971         }
1972         return 0;
1973 }
1974
1975 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
1976 {
1977         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
1978         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
1979         snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
1980 }
1981
1982 static void hdmi_array_free(struct hdmi_spec *spec)
1983 {
1984         snd_array_free(&spec->pins);
1985         snd_array_free(&spec->cvts);
1986         snd_array_free(&spec->pcm_rec);
1987 }
1988
1989 static void generic_hdmi_free(struct hda_codec *codec)
1990 {
1991         struct hdmi_spec *spec = codec->spec;
1992         int pin_idx;
1993
1994         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1995                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1996
1997                 cancel_delayed_work(&per_pin->work);
1998                 eld_proc_free(per_pin);
1999         }
2000
2001         flush_workqueue(codec->bus->workq);
2002         hdmi_array_free(spec);
2003         kfree(spec);
2004 }
2005
2006 #ifdef CONFIG_PM
2007 static int generic_hdmi_resume(struct hda_codec *codec)
2008 {
2009         struct hdmi_spec *spec = codec->spec;
2010         int pin_idx;
2011
2012         generic_hdmi_init(codec);
2013         snd_hda_codec_resume_amp(codec);
2014         snd_hda_codec_resume_cache(codec);
2015
2016         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2017                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2018                 hdmi_present_sense(per_pin, 1);
2019         }
2020         return 0;
2021 }
2022 #endif
2023
2024 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2025         .init                   = generic_hdmi_init,
2026         .free                   = generic_hdmi_free,
2027         .build_pcms             = generic_hdmi_build_pcms,
2028         .build_controls         = generic_hdmi_build_controls,
2029         .unsol_event            = hdmi_unsol_event,
2030 #ifdef CONFIG_PM
2031         .resume                 = generic_hdmi_resume,
2032 #endif
2033 };
2034
2035
2036 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2037                                              hda_nid_t nid)
2038 {
2039         struct hdmi_spec *spec = codec->spec;
2040         hda_nid_t conns[4];
2041         int nconns;
2042
2043         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2044         if (nconns == spec->num_cvts &&
2045             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2046                 return;
2047
2048         /* override pins connection list */
2049         snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
2050         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2051 }
2052
2053 #define INTEL_VENDOR_NID 0x08
2054 #define INTEL_GET_VENDOR_VERB 0xf81
2055 #define INTEL_SET_VENDOR_VERB 0x781
2056 #define INTEL_EN_DP12                   0x02 /* enable DP 1.2 features */
2057 #define INTEL_EN_ALL_PIN_CVTS   0x01 /* enable 2nd & 3rd pins and convertors */
2058
2059 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2060                                           bool update_tree)
2061 {
2062         unsigned int vendor_param;
2063
2064         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2065                                 INTEL_GET_VENDOR_VERB, 0);
2066         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2067                 return;
2068
2069         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2070         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2071                                 INTEL_SET_VENDOR_VERB, vendor_param);
2072         if (vendor_param == -1)
2073                 return;
2074
2075         if (update_tree)
2076                 snd_hda_codec_update_widgets(codec);
2077 }
2078
2079 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2080 {
2081         unsigned int vendor_param;
2082
2083         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2084                                 INTEL_GET_VENDOR_VERB, 0);
2085         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2086                 return;
2087
2088         /* enable DP1.2 mode */
2089         vendor_param |= INTEL_EN_DP12;
2090         snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
2091                                 INTEL_SET_VENDOR_VERB, vendor_param);
2092 }
2093
2094 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2095  * Otherwise you may get severe h/w communication errors.
2096  */
2097 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2098                                 unsigned int power_state)
2099 {
2100         if (power_state == AC_PWRST_D0) {
2101                 intel_haswell_enable_all_pins(codec, false);
2102                 intel_haswell_fixup_enable_dp12(codec);
2103         }
2104
2105         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2106         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2107 }
2108
2109 static int patch_generic_hdmi(struct hda_codec *codec)
2110 {
2111         struct hdmi_spec *spec;
2112
2113         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2114         if (spec == NULL)
2115                 return -ENOMEM;
2116
2117         codec->spec = spec;
2118         hdmi_array_init(spec, 4);
2119
2120         if (is_haswell(codec)) {
2121                 intel_haswell_enable_all_pins(codec, true);
2122                 intel_haswell_fixup_enable_dp12(codec);
2123         }
2124
2125         if (hdmi_parse_codec(codec) < 0) {
2126                 codec->spec = NULL;
2127                 kfree(spec);
2128                 return -EINVAL;
2129         }
2130         codec->patch_ops = generic_hdmi_patch_ops;
2131         if (is_haswell(codec)) {
2132                 codec->patch_ops.set_power_state = haswell_set_power_state;
2133                 codec->dp_mst = true;
2134         }
2135
2136         generic_hdmi_init_per_pins(codec);
2137
2138         init_channel_allocations();
2139
2140         return 0;
2141 }
2142
2143 /*
2144  * Shared non-generic implementations
2145  */
2146
2147 static int simple_playback_build_pcms(struct hda_codec *codec)
2148 {
2149         struct hdmi_spec *spec = codec->spec;
2150         struct hda_pcm *info;
2151         unsigned int chans;
2152         struct hda_pcm_stream *pstr;
2153         struct hdmi_spec_per_cvt *per_cvt;
2154
2155         per_cvt = get_cvt(spec, 0);
2156         chans = get_wcaps(codec, per_cvt->cvt_nid);
2157         chans = get_wcaps_channels(chans);
2158
2159         info = snd_array_new(&spec->pcm_rec);
2160         if (!info)
2161                 return -ENOMEM;
2162         info->name = get_pin(spec, 0)->pcm_name;
2163         sprintf(info->name, "HDMI 0");
2164         info->pcm_type = HDA_PCM_TYPE_HDMI;
2165         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2166         *pstr = spec->pcm_playback;
2167         pstr->nid = per_cvt->cvt_nid;
2168         if (pstr->channels_max <= 2 && chans && chans <= 16)
2169                 pstr->channels_max = chans;
2170
2171         codec->num_pcms = 1;
2172         codec->pcm_info = info;
2173
2174         return 0;
2175 }
2176
2177 /* unsolicited event for jack sensing */
2178 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2179                                     unsigned int res)
2180 {
2181         snd_hda_jack_set_dirty_all(codec);
2182         snd_hda_jack_report_sync(codec);
2183 }
2184
2185 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2186  * as long as spec->pins[] is set correctly
2187  */
2188 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2189
2190 static int simple_playback_build_controls(struct hda_codec *codec)
2191 {
2192         struct hdmi_spec *spec = codec->spec;
2193         struct hdmi_spec_per_cvt *per_cvt;
2194         int err;
2195
2196         per_cvt = get_cvt(spec, 0);
2197         err = snd_hda_create_spdif_out_ctls(codec, per_cvt->cvt_nid,
2198                                             per_cvt->cvt_nid);
2199         if (err < 0)
2200                 return err;
2201         return simple_hdmi_build_jack(codec, 0);
2202 }
2203
2204 static int simple_playback_init(struct hda_codec *codec)
2205 {
2206         struct hdmi_spec *spec = codec->spec;
2207         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2208         hda_nid_t pin = per_pin->pin_nid;
2209
2210         snd_hda_codec_write(codec, pin, 0,
2211                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2212         /* some codecs require to unmute the pin */
2213         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2214                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2215                                     AMP_OUT_UNMUTE);
2216         snd_hda_jack_detect_enable(codec, pin, pin);
2217         return 0;
2218 }
2219
2220 static void simple_playback_free(struct hda_codec *codec)
2221 {
2222         struct hdmi_spec *spec = codec->spec;
2223
2224         hdmi_array_free(spec);
2225         kfree(spec);
2226 }
2227
2228 /*
2229  * Nvidia specific implementations
2230  */
2231
2232 #define Nv_VERB_SET_Channel_Allocation          0xF79
2233 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
2234 #define Nv_VERB_SET_Audio_Protection_On         0xF98
2235 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
2236
2237 #define nvhdmi_master_con_nid_7x        0x04
2238 #define nvhdmi_master_pin_nid_7x        0x05
2239
2240 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2241         /*front, rear, clfe, rear_surr */
2242         0x6, 0x8, 0xa, 0xc,
2243 };
2244
2245 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2246         /* set audio protect on */
2247         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2248         /* enable digital output on pin widget */
2249         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2250         {} /* terminator */
2251 };
2252
2253 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2254         /* set audio protect on */
2255         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2256         /* enable digital output on pin widget */
2257         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2258         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2259         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2260         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2261         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2262         {} /* terminator */
2263 };
2264
2265 #ifdef LIMITED_RATE_FMT_SUPPORT
2266 /* support only the safe format and rate */
2267 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
2268 #define SUPPORTED_MAXBPS        16
2269 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
2270 #else
2271 /* support all rates and formats */
2272 #define SUPPORTED_RATES \
2273         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2274         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2275          SNDRV_PCM_RATE_192000)
2276 #define SUPPORTED_MAXBPS        24
2277 #define SUPPORTED_FORMATS \
2278         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2279 #endif
2280
2281 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2282 {
2283         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2284         return 0;
2285 }
2286
2287 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2288 {
2289         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2290         return 0;
2291 }
2292
2293 static unsigned int channels_2_6_8[] = {
2294         2, 6, 8
2295 };
2296
2297 static unsigned int channels_2_8[] = {
2298         2, 8
2299 };
2300
2301 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2302         .count = ARRAY_SIZE(channels_2_6_8),
2303         .list = channels_2_6_8,
2304         .mask = 0,
2305 };
2306
2307 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2308         .count = ARRAY_SIZE(channels_2_8),
2309         .list = channels_2_8,
2310         .mask = 0,
2311 };
2312
2313 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2314                                     struct hda_codec *codec,
2315                                     struct snd_pcm_substream *substream)
2316 {
2317         struct hdmi_spec *spec = codec->spec;
2318         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2319
2320         switch (codec->preset->id) {
2321         case 0x10de0002:
2322         case 0x10de0003:
2323         case 0x10de0005:
2324         case 0x10de0006:
2325                 hw_constraints_channels = &hw_constraints_2_8_channels;
2326                 break;
2327         case 0x10de0007:
2328                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2329                 break;
2330         default:
2331                 break;
2332         }
2333
2334         if (hw_constraints_channels != NULL) {
2335                 snd_pcm_hw_constraint_list(substream->runtime, 0,
2336                                 SNDRV_PCM_HW_PARAM_CHANNELS,
2337                                 hw_constraints_channels);
2338         } else {
2339                 snd_pcm_hw_constraint_step(substream->runtime, 0,
2340                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2341         }
2342
2343         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2344 }
2345
2346 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2347                                      struct hda_codec *codec,
2348                                      struct snd_pcm_substream *substream)
2349 {
2350         struct hdmi_spec *spec = codec->spec;
2351         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2352 }
2353
2354 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2355                                        struct hda_codec *codec,
2356                                        unsigned int stream_tag,
2357                                        unsigned int format,
2358                                        struct snd_pcm_substream *substream)
2359 {
2360         struct hdmi_spec *spec = codec->spec;
2361         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2362                                              stream_tag, format, substream);
2363 }
2364
2365 static const struct hda_pcm_stream simple_pcm_playback = {
2366         .substreams = 1,
2367         .channels_min = 2,
2368         .channels_max = 2,
2369         .ops = {
2370                 .open = simple_playback_pcm_open,
2371                 .close = simple_playback_pcm_close,
2372                 .prepare = simple_playback_pcm_prepare
2373         },
2374 };
2375
2376 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2377         .build_controls = simple_playback_build_controls,
2378         .build_pcms = simple_playback_build_pcms,
2379         .init = simple_playback_init,
2380         .free = simple_playback_free,
2381         .unsol_event = simple_hdmi_unsol_event,
2382 };
2383
2384 static int patch_simple_hdmi(struct hda_codec *codec,
2385                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
2386 {
2387         struct hdmi_spec *spec;
2388         struct hdmi_spec_per_cvt *per_cvt;
2389         struct hdmi_spec_per_pin *per_pin;
2390
2391         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2392         if (!spec)
2393                 return -ENOMEM;
2394
2395         codec->spec = spec;
2396         hdmi_array_init(spec, 1);
2397
2398         spec->multiout.num_dacs = 0;  /* no analog */
2399         spec->multiout.max_channels = 2;
2400         spec->multiout.dig_out_nid = cvt_nid;
2401         spec->num_cvts = 1;
2402         spec->num_pins = 1;
2403         per_pin = snd_array_new(&spec->pins);
2404         per_cvt = snd_array_new(&spec->cvts);
2405         if (!per_pin || !per_cvt) {
2406                 simple_playback_free(codec);
2407                 return -ENOMEM;
2408         }
2409         per_cvt->cvt_nid = cvt_nid;
2410         per_pin->pin_nid = pin_nid;
2411         spec->pcm_playback = simple_pcm_playback;
2412
2413         codec->patch_ops = simple_hdmi_patch_ops;
2414
2415         return 0;
2416 }
2417
2418 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2419                                                     int channels)
2420 {
2421         unsigned int chanmask;
2422         int chan = channels ? (channels - 1) : 1;
2423
2424         switch (channels) {
2425         default:
2426         case 0:
2427         case 2:
2428                 chanmask = 0x00;
2429                 break;
2430         case 4:
2431                 chanmask = 0x08;
2432                 break;
2433         case 6:
2434                 chanmask = 0x0b;
2435                 break;
2436         case 8:
2437                 chanmask = 0x13;
2438                 break;
2439         }
2440
2441         /* Set the audio infoframe channel allocation and checksum fields.  The
2442          * channel count is computed implicitly by the hardware. */
2443         snd_hda_codec_write(codec, 0x1, 0,
2444                         Nv_VERB_SET_Channel_Allocation, chanmask);
2445
2446         snd_hda_codec_write(codec, 0x1, 0,
2447                         Nv_VERB_SET_Info_Frame_Checksum,
2448                         (0x71 - chan - chanmask));
2449 }
2450
2451 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2452                                    struct hda_codec *codec,
2453                                    struct snd_pcm_substream *substream)
2454 {
2455         struct hdmi_spec *spec = codec->spec;
2456         int i;
2457
2458         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2459                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2460         for (i = 0; i < 4; i++) {
2461                 /* set the stream id */
2462                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2463                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
2464                 /* set the stream format */
2465                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2466                                 AC_VERB_SET_STREAM_FORMAT, 0);
2467         }
2468
2469         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2470          * streams are disabled. */
2471         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2472
2473         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2474 }
2475
2476 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2477                                      struct hda_codec *codec,
2478                                      unsigned int stream_tag,
2479                                      unsigned int format,
2480                                      struct snd_pcm_substream *substream)
2481 {
2482         int chs;
2483         unsigned int dataDCC2, channel_id;
2484         int i;
2485         struct hdmi_spec *spec = codec->spec;
2486         struct hda_spdif_out *spdif;
2487         struct hdmi_spec_per_cvt *per_cvt;
2488
2489         mutex_lock(&codec->spdif_mutex);
2490         per_cvt = get_cvt(spec, 0);
2491         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2492
2493         chs = substream->runtime->channels;
2494
2495         dataDCC2 = 0x2;
2496
2497         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2498         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2499                 snd_hda_codec_write(codec,
2500                                 nvhdmi_master_con_nid_7x,
2501                                 0,
2502                                 AC_VERB_SET_DIGI_CONVERT_1,
2503                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2504
2505         /* set the stream id */
2506         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2507                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2508
2509         /* set the stream format */
2510         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2511                         AC_VERB_SET_STREAM_FORMAT, format);
2512
2513         /* turn on again (if needed) */
2514         /* enable and set the channel status audio/data flag */
2515         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2516                 snd_hda_codec_write(codec,
2517                                 nvhdmi_master_con_nid_7x,
2518                                 0,
2519                                 AC_VERB_SET_DIGI_CONVERT_1,
2520                                 spdif->ctls & 0xff);
2521                 snd_hda_codec_write(codec,
2522                                 nvhdmi_master_con_nid_7x,
2523                                 0,
2524                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2525         }
2526
2527         for (i = 0; i < 4; i++) {
2528                 if (chs == 2)
2529                         channel_id = 0;
2530                 else
2531                         channel_id = i * 2;
2532
2533                 /* turn off SPDIF once;
2534                  *otherwise the IEC958 bits won't be updated
2535                  */
2536                 if (codec->spdif_status_reset &&
2537                 (spdif->ctls & AC_DIG1_ENABLE))
2538                         snd_hda_codec_write(codec,
2539                                 nvhdmi_con_nids_7x[i],
2540                                 0,
2541                                 AC_VERB_SET_DIGI_CONVERT_1,
2542                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2543                 /* set the stream id */
2544                 snd_hda_codec_write(codec,
2545                                 nvhdmi_con_nids_7x[i],
2546                                 0,
2547                                 AC_VERB_SET_CHANNEL_STREAMID,
2548                                 (stream_tag << 4) | channel_id);
2549                 /* set the stream format */
2550                 snd_hda_codec_write(codec,
2551                                 nvhdmi_con_nids_7x[i],
2552                                 0,
2553                                 AC_VERB_SET_STREAM_FORMAT,
2554                                 format);
2555                 /* turn on again (if needed) */
2556                 /* enable and set the channel status audio/data flag */
2557                 if (codec->spdif_status_reset &&
2558                 (spdif->ctls & AC_DIG1_ENABLE)) {
2559                         snd_hda_codec_write(codec,
2560                                         nvhdmi_con_nids_7x[i],
2561                                         0,
2562                                         AC_VERB_SET_DIGI_CONVERT_1,
2563                                         spdif->ctls & 0xff);
2564                         snd_hda_codec_write(codec,
2565                                         nvhdmi_con_nids_7x[i],
2566                                         0,
2567                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2568                 }
2569         }
2570
2571         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2572
2573         mutex_unlock(&codec->spdif_mutex);
2574         return 0;
2575 }
2576
2577 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2578         .substreams = 1,
2579         .channels_min = 2,
2580         .channels_max = 8,
2581         .nid = nvhdmi_master_con_nid_7x,
2582         .rates = SUPPORTED_RATES,
2583         .maxbps = SUPPORTED_MAXBPS,
2584         .formats = SUPPORTED_FORMATS,
2585         .ops = {
2586                 .open = simple_playback_pcm_open,
2587                 .close = nvhdmi_8ch_7x_pcm_close,
2588                 .prepare = nvhdmi_8ch_7x_pcm_prepare
2589         },
2590 };
2591
2592 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2593 {
2594         struct hdmi_spec *spec;
2595         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2596                                     nvhdmi_master_pin_nid_7x);
2597         if (err < 0)
2598                 return err;
2599
2600         codec->patch_ops.init = nvhdmi_7x_init_2ch;
2601         /* override the PCM rates, etc, as the codec doesn't give full list */
2602         spec = codec->spec;
2603         spec->pcm_playback.rates = SUPPORTED_RATES;
2604         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2605         spec->pcm_playback.formats = SUPPORTED_FORMATS;
2606         return 0;
2607 }
2608
2609 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2610 {
2611         struct hdmi_spec *spec = codec->spec;
2612         int err = simple_playback_build_pcms(codec);
2613         if (!err) {
2614                 struct hda_pcm *info = get_pcm_rec(spec, 0);
2615                 info->own_chmap = true;
2616         }
2617         return err;
2618 }
2619
2620 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2621 {
2622         struct hdmi_spec *spec = codec->spec;
2623         struct hda_pcm *info;
2624         struct snd_pcm_chmap *chmap;
2625         int err;
2626
2627         err = simple_playback_build_controls(codec);
2628         if (err < 0)
2629                 return err;
2630
2631         /* add channel maps */
2632         info = get_pcm_rec(spec, 0);
2633         err = snd_pcm_add_chmap_ctls(info->pcm,
2634                                      SNDRV_PCM_STREAM_PLAYBACK,
2635                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
2636         if (err < 0)
2637                 return err;
2638         switch (codec->preset->id) {
2639         case 0x10de0002:
2640         case 0x10de0003:
2641         case 0x10de0005:
2642         case 0x10de0006:
2643                 chmap->channel_mask = (1U << 2) | (1U << 8);
2644                 break;
2645         case 0x10de0007:
2646                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2647         }
2648         return 0;
2649 }
2650
2651 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2652 {
2653         struct hdmi_spec *spec;
2654         int err = patch_nvhdmi_2ch(codec);
2655         if (err < 0)
2656                 return err;
2657         spec = codec->spec;
2658         spec->multiout.max_channels = 8;
2659         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2660         codec->patch_ops.init = nvhdmi_7x_init_8ch;
2661         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2662         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2663
2664         /* Initialize the audio infoframe channel mask and checksum to something
2665          * valid */
2666         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2667
2668         return 0;
2669 }
2670
2671 /*
2672  * ATI-specific implementations
2673  *
2674  * FIXME: we may omit the whole this and use the generic code once after
2675  * it's confirmed to work.
2676  */
2677
2678 #define ATIHDMI_CVT_NID         0x02    /* audio converter */
2679 #define ATIHDMI_PIN_NID         0x03    /* HDMI output pin */
2680
2681 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2682                                         struct hda_codec *codec,
2683                                         unsigned int stream_tag,
2684                                         unsigned int format,
2685                                         struct snd_pcm_substream *substream)
2686 {
2687         struct hdmi_spec *spec = codec->spec;
2688         struct hdmi_spec_per_cvt *per_cvt = get_cvt(spec, 0);
2689         int chans = substream->runtime->channels;
2690         int i, err;
2691
2692         err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
2693                                           substream);
2694         if (err < 0)
2695                 return err;
2696         snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
2697                             AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
2698         /* FIXME: XXX */
2699         for (i = 0; i < chans; i++) {
2700                 snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
2701                                     AC_VERB_SET_HDMI_CHAN_SLOT,
2702                                     (i << 4) | i);
2703         }
2704         return 0;
2705 }
2706
2707 static int patch_atihdmi(struct hda_codec *codec)
2708 {
2709         struct hdmi_spec *spec;
2710         int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
2711         if (err < 0)
2712                 return err;
2713         spec = codec->spec;
2714         spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
2715         return 0;
2716 }
2717
2718 /* VIA HDMI Implementation */
2719 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
2720 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
2721
2722 static int patch_via_hdmi(struct hda_codec *codec)
2723 {
2724         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
2725 }
2726
2727 /*
2728  * patch entries
2729  */
2730 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
2731 { .id = 0x1002793c, .name = "RS600 HDMI",       .patch = patch_atihdmi },
2732 { .id = 0x10027919, .name = "RS600 HDMI",       .patch = patch_atihdmi },
2733 { .id = 0x1002791a, .name = "RS690/780 HDMI",   .patch = patch_atihdmi },
2734 { .id = 0x1002aa01, .name = "R6xx HDMI",        .patch = patch_generic_hdmi },
2735 { .id = 0x10951390, .name = "SiI1390 HDMI",     .patch = patch_generic_hdmi },
2736 { .id = 0x10951392, .name = "SiI1392 HDMI",     .patch = patch_generic_hdmi },
2737 { .id = 0x17e80047, .name = "Chrontel HDMI",    .patch = patch_generic_hdmi },
2738 { .id = 0x10de0002, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
2739 { .id = 0x10de0003, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
2740 { .id = 0x10de0005, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
2741 { .id = 0x10de0006, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
2742 { .id = 0x10de0007, .name = "MCP79/7A HDMI",    .patch = patch_nvhdmi_8ch_7x },
2743 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP",   .patch = patch_generic_hdmi },
2744 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP",   .patch = patch_generic_hdmi },
2745 { .id = 0x10de000c, .name = "MCP89 HDMI",       .patch = patch_generic_hdmi },
2746 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP",   .patch = patch_generic_hdmi },
2747 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP",   .patch = patch_generic_hdmi },
2748 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP",   .patch = patch_generic_hdmi },
2749 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP",   .patch = patch_generic_hdmi },
2750 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP",   .patch = patch_generic_hdmi },
2751 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP",   .patch = patch_generic_hdmi },
2752 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP",   .patch = patch_generic_hdmi },
2753 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP",   .patch = patch_generic_hdmi },
2754 /* 17 is known to be absent */
2755 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP",   .patch = patch_generic_hdmi },
2756 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP",   .patch = patch_generic_hdmi },
2757 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP",   .patch = patch_generic_hdmi },
2758 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP",   .patch = patch_generic_hdmi },
2759 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP",   .patch = patch_generic_hdmi },
2760 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP",   .patch = patch_generic_hdmi },
2761 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP",   .patch = patch_generic_hdmi },
2762 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP",   .patch = patch_generic_hdmi },
2763 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP",   .patch = patch_generic_hdmi },
2764 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP",   .patch = patch_generic_hdmi },
2765 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP",   .patch = patch_generic_hdmi },
2766 { .id = 0x10de0060, .name = "GPU 60 HDMI/DP",   .patch = patch_generic_hdmi },
2767 { .id = 0x10de0067, .name = "MCP67 HDMI",       .patch = patch_nvhdmi_2ch },
2768 { .id = 0x10de8001, .name = "MCP73 HDMI",       .patch = patch_nvhdmi_2ch },
2769 { .id = 0x11069f80, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
2770 { .id = 0x11069f81, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
2771 { .id = 0x11069f84, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
2772 { .id = 0x11069f85, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
2773 { .id = 0x80860054, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
2774 { .id = 0x80862801, .name = "Bearlake HDMI",    .patch = patch_generic_hdmi },
2775 { .id = 0x80862802, .name = "Cantiga HDMI",     .patch = patch_generic_hdmi },
2776 { .id = 0x80862803, .name = "Eaglelake HDMI",   .patch = patch_generic_hdmi },
2777 { .id = 0x80862804, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
2778 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
2779 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
2780 { .id = 0x80862807, .name = "Haswell HDMI",     .patch = patch_generic_hdmi },
2781 { .id = 0x80862880, .name = "CedarTrail HDMI",  .patch = patch_generic_hdmi },
2782 { .id = 0x80862882, .name = "Valleyview2 HDMI", .patch = patch_generic_hdmi },
2783 { .id = 0x808629fb, .name = "Crestline HDMI",   .patch = patch_generic_hdmi },
2784 {} /* terminator */
2785 };
2786
2787 MODULE_ALIAS("snd-hda-codec-id:1002793c");
2788 MODULE_ALIAS("snd-hda-codec-id:10027919");
2789 MODULE_ALIAS("snd-hda-codec-id:1002791a");
2790 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
2791 MODULE_ALIAS("snd-hda-codec-id:10951390");
2792 MODULE_ALIAS("snd-hda-codec-id:10951392");
2793 MODULE_ALIAS("snd-hda-codec-id:10de0002");
2794 MODULE_ALIAS("snd-hda-codec-id:10de0003");
2795 MODULE_ALIAS("snd-hda-codec-id:10de0005");
2796 MODULE_ALIAS("snd-hda-codec-id:10de0006");
2797 MODULE_ALIAS("snd-hda-codec-id:10de0007");
2798 MODULE_ALIAS("snd-hda-codec-id:10de000a");
2799 MODULE_ALIAS("snd-hda-codec-id:10de000b");
2800 MODULE_ALIAS("snd-hda-codec-id:10de000c");
2801 MODULE_ALIAS("snd-hda-codec-id:10de000d");
2802 MODULE_ALIAS("snd-hda-codec-id:10de0010");
2803 MODULE_ALIAS("snd-hda-codec-id:10de0011");
2804 MODULE_ALIAS("snd-hda-codec-id:10de0012");
2805 MODULE_ALIAS("snd-hda-codec-id:10de0013");
2806 MODULE_ALIAS("snd-hda-codec-id:10de0014");
2807 MODULE_ALIAS("snd-hda-codec-id:10de0015");
2808 MODULE_ALIAS("snd-hda-codec-id:10de0016");
2809 MODULE_ALIAS("snd-hda-codec-id:10de0018");
2810 MODULE_ALIAS("snd-hda-codec-id:10de0019");
2811 MODULE_ALIAS("snd-hda-codec-id:10de001a");
2812 MODULE_ALIAS("snd-hda-codec-id:10de001b");
2813 MODULE_ALIAS("snd-hda-codec-id:10de001c");
2814 MODULE_ALIAS("snd-hda-codec-id:10de0040");
2815 MODULE_ALIAS("snd-hda-codec-id:10de0041");
2816 MODULE_ALIAS("snd-hda-codec-id:10de0042");
2817 MODULE_ALIAS("snd-hda-codec-id:10de0043");
2818 MODULE_ALIAS("snd-hda-codec-id:10de0044");
2819 MODULE_ALIAS("snd-hda-codec-id:10de0051");
2820 MODULE_ALIAS("snd-hda-codec-id:10de0060");
2821 MODULE_ALIAS("snd-hda-codec-id:10de0067");
2822 MODULE_ALIAS("snd-hda-codec-id:10de8001");
2823 MODULE_ALIAS("snd-hda-codec-id:11069f80");
2824 MODULE_ALIAS("snd-hda-codec-id:11069f81");
2825 MODULE_ALIAS("snd-hda-codec-id:11069f84");
2826 MODULE_ALIAS("snd-hda-codec-id:11069f85");
2827 MODULE_ALIAS("snd-hda-codec-id:17e80047");
2828 MODULE_ALIAS("snd-hda-codec-id:80860054");
2829 MODULE_ALIAS("snd-hda-codec-id:80862801");
2830 MODULE_ALIAS("snd-hda-codec-id:80862802");
2831 MODULE_ALIAS("snd-hda-codec-id:80862803");
2832 MODULE_ALIAS("snd-hda-codec-id:80862804");
2833 MODULE_ALIAS("snd-hda-codec-id:80862805");
2834 MODULE_ALIAS("snd-hda-codec-id:80862806");
2835 MODULE_ALIAS("snd-hda-codec-id:80862807");
2836 MODULE_ALIAS("snd-hda-codec-id:80862880");
2837 MODULE_ALIAS("snd-hda-codec-id:80862882");
2838 MODULE_ALIAS("snd-hda-codec-id:808629fb");
2839
2840 MODULE_LICENSE("GPL");
2841 MODULE_DESCRIPTION("HDMI HD-audio codec");
2842 MODULE_ALIAS("snd-hda-codec-intelhdmi");
2843 MODULE_ALIAS("snd-hda-codec-nvhdmi");
2844 MODULE_ALIAS("snd-hda-codec-atihdmi");
2845
2846 static struct hda_codec_preset_list intel_list = {
2847         .preset = snd_hda_preset_hdmi,
2848         .owner = THIS_MODULE,
2849 };
2850
2851 static int __init patch_hdmi_init(void)
2852 {
2853         return snd_hda_add_codec_preset(&intel_list);
2854 }
2855
2856 static void __exit patch_hdmi_exit(void)
2857 {
2858         snd_hda_delete_codec_preset(&intel_list);
2859 }
2860
2861 module_init(patch_hdmi_init)
2862 module_exit(patch_hdmi_exit)