3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6 * Copyright (c) 2006 ATI Technologies Inc.
7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
11 * Wu Fengguang <wfg@linux.intel.com>
14 * Wu Fengguang <wfg@linux.intel.com>
16 * This program is free software; you can redistribute it and/or modify it
17 * under the terms of the GNU General Public License as published by the Free
18 * Software Foundation; either version 2 of the License, or (at your option)
21 * This program is distributed in the hope that it will be useful, but
22 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
23 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software Foundation,
28 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
31 #include <linux/init.h>
32 #include <linux/delay.h>
33 #include <linux/slab.h>
34 #include <linux/moduleparam.h>
35 #include <sound/core.h>
36 #include "hda_codec.h"
37 #include "hda_local.h"
39 static bool static_hdmi_pcm;
40 module_param(static_hdmi_pcm, bool, 0644);
41 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
44 * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
45 * could support two independent pipes, each of them can be connected to one or
46 * more ports (DVI, HDMI or DisplayPort).
48 * The HDA correspondence of pipes/ports are converter/pin nodes.
50 #define MAX_HDMI_CVTS 3
51 #define MAX_HDMI_PINS 3
56 hda_nid_t cvt[MAX_HDMI_CVTS+1]; /* audio sources */
57 hda_nid_t pin[MAX_HDMI_PINS+1]; /* audio sinks */
60 * source connection for each pin
62 hda_nid_t pin_cvt[MAX_HDMI_PINS+1];
65 * HDMI sink attached to each pin
67 struct hdmi_eld sink_eld[MAX_HDMI_PINS];
70 * export one pcm per pipe
72 struct hda_pcm pcm_rec[MAX_HDMI_CVTS];
73 struct hda_pcm_stream codec_pcm_pars[MAX_HDMI_CVTS];
78 struct hda_multi_out multiout;
79 struct hda_pcm_stream *pcm_playback;
82 /* PD bit indicates only the update, not the current state */
83 unsigned int old_pin_detect:1;
87 struct hdmi_audio_infoframe {
94 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
98 u8 LFEPBL01_LSV36_DM_INH7;
101 struct dp_audio_infoframe {
104 u8 ver; /* 0x11 << 2 */
106 u8 CC02_CT47; /* match with HDMI infoframe from this on */
110 u8 LFEPBL01_LSV36_DM_INH7;
113 union audio_infoframe {
114 struct hdmi_audio_infoframe hdmi;
115 struct dp_audio_infoframe dp;
120 * CEA speaker placement:
123 * FLW FL FLC FC FRC FR FRW
130 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
131 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
133 enum cea_speaker_placement {
134 FL = (1 << 0), /* Front Left */
135 FC = (1 << 1), /* Front Center */
136 FR = (1 << 2), /* Front Right */
137 FLC = (1 << 3), /* Front Left Center */
138 FRC = (1 << 4), /* Front Right Center */
139 RL = (1 << 5), /* Rear Left */
140 RC = (1 << 6), /* Rear Center */
141 RR = (1 << 7), /* Rear Right */
142 RLC = (1 << 8), /* Rear Left Center */
143 RRC = (1 << 9), /* Rear Right Center */
144 LFE = (1 << 10), /* Low Frequency Effect */
145 FLW = (1 << 11), /* Front Left Wide */
146 FRW = (1 << 12), /* Front Right Wide */
147 FLH = (1 << 13), /* Front Left High */
148 FCH = (1 << 14), /* Front Center High */
149 FRH = (1 << 15), /* Front Right High */
150 TC = (1 << 16), /* Top Center */
154 * ELD SA bits in the CEA Speaker Allocation data block
156 static int eld_speaker_allocation_bits[] = {
164 /* the following are not defined in ELD yet */
171 struct cea_channel_speaker_allocation {
175 /* derived values, just for convenience */
183 * surround40 surround41 surround50 surround51 surround71
184 * ch0 front left = = = =
185 * ch1 front right = = = =
186 * ch2 rear left = = = =
187 * ch3 rear right = = = =
188 * ch4 LFE center center center
193 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
195 static int hdmi_channel_mapping[0x32][8] = {
197 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
199 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
201 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
203 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
205 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
207 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
209 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
211 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
213 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
217 * This is an ordered list!
219 * The preceding ones have better chances to be selected by
220 * hdmi_channel_allocation().
222 static struct cea_channel_speaker_allocation channel_allocations[] = {
223 /* channel: 7 6 5 4 3 2 1 0 */
224 { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
226 { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
228 { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
230 { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
232 { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
234 { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
236 { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
238 { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
240 { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
242 { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
243 { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
244 { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
245 { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
246 { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
247 { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
248 { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
249 { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
250 { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
251 { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
252 { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
253 { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
254 { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
255 { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
256 { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
257 { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
258 { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
259 { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
260 { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
261 { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
262 { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
263 { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
264 { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
265 { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
266 { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
267 { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
268 { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
269 { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
270 { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
271 { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
272 { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
273 { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
274 { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
275 { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
276 { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
277 { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
278 { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
279 { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
280 { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
281 { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
282 { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
290 static int hda_node_index(hda_nid_t *nids, hda_nid_t nid)
294 for (i = 0; nids[i]; i++)
298 snd_printk(KERN_WARNING "HDMI: nid %d not registered\n", nid);
302 static void hdmi_get_show_eld(struct hda_codec *codec, hda_nid_t pin_nid,
303 struct hdmi_eld *eld)
305 if (!snd_hdmi_get_eld(eld, codec, pin_nid))
306 snd_hdmi_show_eld(eld);
310 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
311 int *packet_index, int *byte_index)
315 val = snd_hda_codec_read(codec, pin_nid, 0,
316 AC_VERB_GET_HDMI_DIP_INDEX, 0);
318 *packet_index = val >> 5;
319 *byte_index = val & 0x1f;
323 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
324 int packet_index, int byte_index)
328 val = (packet_index << 5) | (byte_index & 0x1f);
330 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
333 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
336 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
339 static void hdmi_enable_output(struct hda_codec *codec, hda_nid_t pin_nid)
342 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
343 snd_hda_codec_write(codec, pin_nid, 0,
344 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
346 snd_hda_codec_write(codec, pin_nid, 0,
347 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
350 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t nid)
352 return 1 + snd_hda_codec_read(codec, nid, 0,
353 AC_VERB_GET_CVT_CHAN_COUNT, 0);
356 static void hdmi_set_channel_count(struct hda_codec *codec,
357 hda_nid_t nid, int chs)
359 if (chs != hdmi_get_channel_count(codec, nid))
360 snd_hda_codec_write(codec, nid, 0,
361 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
366 * Channel mapping routines
370 * Compute derived values in channel_allocations[].
372 static void init_channel_allocations(void)
375 struct cea_channel_speaker_allocation *p;
377 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
378 p = channel_allocations + i;
381 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
382 if (p->speakers[j]) {
384 p->spk_mask |= p->speakers[j];
390 * The transformation takes two steps:
392 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
393 * spk_mask => (channel_allocations[]) => ai->CA
395 * TODO: it could select the wrong CA from multiple candidates.
397 static int hdmi_channel_allocation(struct hda_codec *codec, hda_nid_t nid,
400 struct hdmi_spec *spec = codec->spec;
401 struct hdmi_eld *eld;
405 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
408 * CA defaults to 0 for basic stereo audio
413 i = hda_node_index(spec->pin_cvt, nid);
416 eld = &spec->sink_eld[i];
419 * HDMI sink's ELD info cannot always be retrieved for now, e.g.
420 * in console or for audio devices. Assume the highest speakers
421 * configuration, to _not_ prohibit multi-channel audio playback.
424 eld->spk_alloc = 0xffff;
427 * expand ELD's speaker allocation mask
429 * ELD tells the speaker mask in a compact(paired) form,
430 * expand ELD's notions to match the ones used by Audio InfoFrame.
432 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
433 if (eld->spk_alloc & (1 << i))
434 spk_mask |= eld_speaker_allocation_bits[i];
437 /* search for the first working match in the CA table */
438 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
439 if (channels == channel_allocations[i].channels &&
440 (spk_mask & channel_allocations[i].spk_mask) ==
441 channel_allocations[i].spk_mask) {
442 ca = channel_allocations[i].ca_index;
447 snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
448 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
454 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
457 #ifdef CONFIG_SND_DEBUG_VERBOSE
461 for (i = 0; i < 8; i++) {
462 slot = snd_hda_codec_read(codec, pin_nid, 0,
463 AC_VERB_GET_HDMI_CHAN_SLOT, i);
464 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
465 slot >> 4, slot & 0xf);
471 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
478 if (hdmi_channel_mapping[ca][1] == 0) {
479 for (i = 0; i < channel_allocations[ca].channels; i++)
480 hdmi_channel_mapping[ca][i] = i | (i << 4);
482 hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
485 for (i = 0; i < 8; i++) {
486 err = snd_hda_codec_write(codec, pin_nid, 0,
487 AC_VERB_SET_HDMI_CHAN_SLOT,
488 hdmi_channel_mapping[ca][i]);
490 snd_printdd(KERN_NOTICE
491 "HDMI: channel mapping failed\n");
496 hdmi_debug_channel_mapping(codec, pin_nid);
501 * Audio InfoFrame routines
505 * Enable Audio InfoFrame Transmission
507 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
510 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
511 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
516 * Disable Audio InfoFrame Transmission
518 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
521 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
522 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
526 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
528 #ifdef CONFIG_SND_DEBUG_VERBOSE
532 size = snd_hdmi_get_eld_size(codec, pin_nid);
533 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
535 for (i = 0; i < 8; i++) {
536 size = snd_hda_codec_read(codec, pin_nid, 0,
537 AC_VERB_GET_HDMI_DIP_SIZE, i);
538 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
543 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
549 for (i = 0; i < 8; i++) {
550 size = snd_hda_codec_read(codec, pin_nid, 0,
551 AC_VERB_GET_HDMI_DIP_SIZE, i);
555 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
556 for (j = 1; j < 1000; j++) {
557 hdmi_write_dip_byte(codec, pin_nid, 0x0);
558 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
560 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
562 if (bi == 0) /* byte index wrapped around */
566 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
572 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
574 u8 *bytes = (u8 *)hdmi_ai;
578 hdmi_ai->checksum = 0;
580 for (i = 0; i < sizeof(*hdmi_ai); i++)
583 hdmi_ai->checksum = -sum;
586 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
592 hdmi_debug_dip_size(codec, pin_nid);
593 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
595 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
596 for (i = 0; i < size; i++)
597 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
600 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
606 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
610 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
611 for (i = 0; i < size; i++) {
612 val = snd_hda_codec_read(codec, pin_nid, 0,
613 AC_VERB_GET_HDMI_DIP_DATA, 0);
621 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, hda_nid_t nid,
622 struct snd_pcm_substream *substream)
624 struct hdmi_spec *spec = codec->spec;
626 int channels = substream->runtime->channels;
629 union audio_infoframe ai;
631 ca = hdmi_channel_allocation(codec, nid, channels);
633 for (i = 0; i < spec->num_pins; i++) {
634 if (spec->pin_cvt[i] != nid)
636 if (!spec->sink_eld[i].monitor_present)
639 pin_nid = spec->pin[i];
641 memset(&ai, 0, sizeof(ai));
642 if (spec->sink_eld[i].conn_type == 0) { /* HDMI */
643 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
645 hdmi_ai->type = 0x84;
648 hdmi_ai->CC02_CT47 = channels - 1;
650 hdmi_checksum_audio_infoframe(hdmi_ai);
651 } else if (spec->sink_eld[i].conn_type == 1) { /* DisplayPort */
652 struct dp_audio_infoframe *dp_ai = &ai.dp;
656 dp_ai->ver = 0x11 << 2;
657 dp_ai->CC02_CT47 = channels - 1;
660 snd_printd("HDMI: unknown connection type at pin %d\n",
666 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
667 * sizeof(*dp_ai) to avoid partial match/update problems when
668 * the user switches between HDMI/DP monitors.
670 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
672 snd_printdd("hdmi_setup_audio_infoframe: "
673 "cvt=%d pin=%d channels=%d\n",
676 hdmi_setup_channel_mapping(codec, pin_nid, ca);
677 hdmi_stop_infoframe_trans(codec, pin_nid);
678 hdmi_fill_audio_infoframe(codec, pin_nid,
679 ai.bytes, sizeof(ai));
680 hdmi_start_infoframe_trans(codec, pin_nid);
690 static void hdmi_present_sense(struct hda_codec *codec, hda_nid_t pin_nid,
691 struct hdmi_eld *eld);
693 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
695 struct hdmi_spec *spec = codec->spec;
696 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
697 int pind = !!(res & AC_UNSOL_RES_PD);
698 int eldv = !!(res & AC_UNSOL_RES_ELDV);
702 "HDMI hot plug event: Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
705 index = hda_node_index(spec->pin, tag);
709 if (spec->old_pin_detect) {
711 hdmi_present_sense(codec, tag, &spec->sink_eld[index]);
712 pind = spec->sink_eld[index].monitor_present;
715 spec->sink_eld[index].monitor_present = pind;
716 spec->sink_eld[index].eld_valid = eldv;
719 hdmi_get_show_eld(codec, spec->pin[index],
720 &spec->sink_eld[index]);
721 /* TODO: do real things about ELD */
725 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
727 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
728 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
729 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
730 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
733 "HDMI CP event: PIN=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
747 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
749 struct hdmi_spec *spec = codec->spec;
750 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
751 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
753 if (hda_node_index(spec->pin, tag) < 0) {
754 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
759 hdmi_intrinsic_event(codec, res);
761 hdmi_non_intrinsic_event(codec, res);
768 /* HBR should be Non-PCM, 8 channels */
769 #define is_hbr_format(format) \
770 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
772 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t nid,
773 u32 stream_tag, int format)
775 struct hdmi_spec *spec = codec->spec;
780 for (i = 0; i < spec->num_pins; i++) {
781 if (spec->pin_cvt[i] != nid)
783 if (!(snd_hda_query_pin_caps(codec, spec->pin[i]) & AC_PINCAP_HBR))
786 pinctl = snd_hda_codec_read(codec, spec->pin[i], 0,
787 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
789 new_pinctl = pinctl & ~AC_PINCTL_EPT;
790 if (is_hbr_format(format))
791 new_pinctl |= AC_PINCTL_EPT_HBR;
793 new_pinctl |= AC_PINCTL_EPT_NATIVE;
795 snd_printdd("hdmi_setup_stream: "
796 "NID=0x%x, %spinctl=0x%x\n",
798 pinctl == new_pinctl ? "" : "new-",
801 if (pinctl != new_pinctl)
802 snd_hda_codec_write(codec, spec->pin[i], 0,
803 AC_VERB_SET_PIN_WIDGET_CONTROL,
807 if (is_hbr_format(format) && !new_pinctl) {
808 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
812 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
819 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
820 struct hda_codec *codec,
821 struct snd_pcm_substream *substream)
823 struct hdmi_spec *spec = codec->spec;
824 struct hdmi_eld *eld;
825 struct hda_pcm_stream *codec_pars;
826 struct snd_pcm_runtime *runtime = substream->runtime;
829 for (idx = 0; idx < spec->num_cvts; idx++)
830 if (hinfo->nid == spec->cvt[idx])
832 if (snd_BUG_ON(idx >= spec->num_cvts) ||
833 snd_BUG_ON(idx >= spec->num_pins))
836 /* save the PCM info the codec provides */
837 codec_pars = &spec->codec_pcm_pars[idx];
838 if (!codec_pars->rates)
839 *codec_pars = *hinfo;
841 eld = &spec->sink_eld[idx];
842 if (!static_hdmi_pcm && eld->eld_valid && eld->sad_count > 0) {
843 hdmi_eld_update_pcm_info(eld, hinfo, codec_pars);
844 if (hinfo->channels_min > hinfo->channels_max ||
845 !hinfo->rates || !hinfo->formats)
848 /* fallback to the codec default */
849 hinfo->channels_max = codec_pars->channels_max;
850 hinfo->rates = codec_pars->rates;
851 hinfo->formats = codec_pars->formats;
852 hinfo->maxbps = codec_pars->maxbps;
854 /* store the updated parameters */
855 runtime->hw.channels_min = hinfo->channels_min;
856 runtime->hw.channels_max = hinfo->channels_max;
857 runtime->hw.formats = hinfo->formats;
858 runtime->hw.rates = hinfo->rates;
860 snd_pcm_hw_constraint_step(substream->runtime, 0,
861 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
866 * HDA/HDMI auto parsing
868 static int hdmi_read_pin_conn(struct hda_codec *codec, hda_nid_t pin_nid)
870 struct hdmi_spec *spec = codec->spec;
871 hda_nid_t conn_list[HDA_MAX_CONNECTIONS];
875 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
876 snd_printk(KERN_WARNING
877 "HDMI: pin %d wcaps %#x "
878 "does not support connection list\n",
879 pin_nid, get_wcaps(codec, pin_nid));
883 conn_len = snd_hda_get_connections(codec, pin_nid, conn_list,
884 HDA_MAX_CONNECTIONS);
886 curr = snd_hda_codec_read(codec, pin_nid, 0,
887 AC_VERB_GET_CONNECT_SEL, 0);
891 index = hda_node_index(spec->pin, pin_nid);
895 spec->pin_cvt[index] = conn_list[curr];
900 static void hdmi_present_sense(struct hda_codec *codec, hda_nid_t pin_nid,
901 struct hdmi_eld *eld)
903 int present = snd_hda_pin_sense(codec, pin_nid);
905 eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
906 eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
908 if (present & AC_PINSENSE_ELDV)
909 hdmi_get_show_eld(codec, pin_nid, eld);
912 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
914 struct hdmi_spec *spec = codec->spec;
916 if (spec->num_pins >= MAX_HDMI_PINS) {
917 snd_printk(KERN_WARNING
918 "HDMI: no space for pin %d\n", pin_nid);
922 hdmi_present_sense(codec, pin_nid, &spec->sink_eld[spec->num_pins]);
924 spec->pin[spec->num_pins] = pin_nid;
927 return hdmi_read_pin_conn(codec, pin_nid);
930 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t nid)
932 int i, found_pin = 0;
933 struct hdmi_spec *spec = codec->spec;
935 for (i = 0; i < spec->num_pins; i++)
936 if (nid == spec->pin_cvt[i]) {
942 snd_printdd("HDMI: Skipping node %d (no connection)\n", nid);
946 if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS))
949 spec->cvt[spec->num_cvts] = nid;
955 static int hdmi_parse_codec(struct hda_codec *codec)
959 int num_tmp_cvts = 0;
960 hda_nid_t tmp_cvt[MAX_HDMI_CVTS];
962 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
963 if (!nid || nodes < 0) {
964 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
968 for (i = 0; i < nodes; i++, nid++) {
973 caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP);
974 type = get_wcaps_type(caps);
976 if (!(caps & AC_WCAP_DIGITAL))
981 if (num_tmp_cvts >= MAX_HDMI_CVTS) {
982 snd_printk(KERN_WARNING
983 "HDMI: no space for converter %d\n", nid);
986 tmp_cvt[num_tmp_cvts] = nid;
990 caps = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
991 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
994 config = snd_hda_codec_read(codec, nid, 0,
995 AC_VERB_GET_CONFIG_DEFAULT, 0);
996 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
999 hdmi_add_pin(codec, nid);
1004 for (i = 0; i < num_tmp_cvts; i++)
1005 hdmi_add_cvt(codec, tmp_cvt[i]);
1008 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1009 * can be lost and presence sense verb will become inaccurate if the
1010 * HDA link is powered off at hot plug or hw initialization time.
1012 #ifdef CONFIG_SND_HDA_POWER_SAVE
1013 if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1015 codec->bus->power_keep_link_on = 1;
1023 static char *generic_hdmi_pcm_names[MAX_HDMI_CVTS] = {
1033 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1034 struct hda_codec *codec,
1035 unsigned int stream_tag,
1036 unsigned int format,
1037 struct snd_pcm_substream *substream)
1039 hdmi_set_channel_count(codec, hinfo->nid,
1040 substream->runtime->channels);
1042 hdmi_setup_audio_infoframe(codec, hinfo->nid, substream);
1044 return hdmi_setup_stream(codec, hinfo->nid, stream_tag, format);
1047 static struct hda_pcm_stream generic_hdmi_pcm_playback = {
1051 .open = hdmi_pcm_open,
1052 .prepare = generic_hdmi_playback_pcm_prepare,
1056 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1058 struct hdmi_spec *spec = codec->spec;
1059 struct hda_pcm *info = spec->pcm_rec;
1062 codec->num_pcms = spec->num_cvts;
1063 codec->pcm_info = info;
1065 for (i = 0; i < codec->num_pcms; i++, info++) {
1067 struct hda_pcm_stream *pstr;
1069 chans = get_wcaps(codec, spec->cvt[i]);
1070 chans = get_wcaps_channels(chans);
1072 info->name = generic_hdmi_pcm_names[i];
1073 info->pcm_type = HDA_PCM_TYPE_HDMI;
1074 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1075 if (spec->pcm_playback)
1076 *pstr = *spec->pcm_playback;
1078 *pstr = generic_hdmi_pcm_playback;
1079 pstr->nid = spec->cvt[i];
1080 if (pstr->channels_max <= 2 && chans && chans <= 16)
1081 pstr->channels_max = chans;
1087 static int generic_hdmi_build_controls(struct hda_codec *codec)
1089 struct hdmi_spec *spec = codec->spec;
1093 for (i = 0; i < codec->num_pcms; i++) {
1094 err = snd_hda_create_spdif_out_ctls(codec, spec->cvt[i]);
1102 static int generic_hdmi_init(struct hda_codec *codec)
1104 struct hdmi_spec *spec = codec->spec;
1107 for (i = 0; spec->pin[i]; i++) {
1108 hdmi_enable_output(codec, spec->pin[i]);
1109 snd_hda_codec_write(codec, spec->pin[i], 0,
1110 AC_VERB_SET_UNSOLICITED_ENABLE,
1111 AC_USRSP_EN | spec->pin[i]);
1116 static void generic_hdmi_free(struct hda_codec *codec)
1118 struct hdmi_spec *spec = codec->spec;
1121 for (i = 0; i < spec->num_pins; i++)
1122 snd_hda_eld_proc_free(codec, &spec->sink_eld[i]);
1127 static struct hda_codec_ops generic_hdmi_patch_ops = {
1128 .init = generic_hdmi_init,
1129 .free = generic_hdmi_free,
1130 .build_pcms = generic_hdmi_build_pcms,
1131 .build_controls = generic_hdmi_build_controls,
1132 .unsol_event = hdmi_unsol_event,
1135 static int patch_generic_hdmi(struct hda_codec *codec)
1137 struct hdmi_spec *spec;
1140 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1145 if (hdmi_parse_codec(codec) < 0) {
1150 codec->patch_ops = generic_hdmi_patch_ops;
1152 for (i = 0; i < spec->num_pins; i++)
1153 snd_hda_eld_proc_new(codec, &spec->sink_eld[i], i);
1155 init_channel_allocations();
1161 * Nvidia specific implementations
1164 #define Nv_VERB_SET_Channel_Allocation 0xF79
1165 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
1166 #define Nv_VERB_SET_Audio_Protection_On 0xF98
1167 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
1169 #define nvhdmi_master_con_nid_7x 0x04
1170 #define nvhdmi_master_pin_nid_7x 0x05
1172 static hda_nid_t nvhdmi_con_nids_7x[4] = {
1173 /*front, rear, clfe, rear_surr */
1177 static struct hda_verb nvhdmi_basic_init_7x[] = {
1178 /* set audio protect on */
1179 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1180 /* enable digital output on pin widget */
1181 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1182 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1183 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1184 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1185 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1189 #ifdef LIMITED_RATE_FMT_SUPPORT
1190 /* support only the safe format and rate */
1191 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
1192 #define SUPPORTED_MAXBPS 16
1193 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
1195 /* support all rates and formats */
1196 #define SUPPORTED_RATES \
1197 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1198 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
1199 SNDRV_PCM_RATE_192000)
1200 #define SUPPORTED_MAXBPS 24
1201 #define SUPPORTED_FORMATS \
1202 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
1205 static int nvhdmi_7x_init(struct hda_codec *codec)
1207 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x);
1211 static unsigned int channels_2_6_8[] = {
1215 static unsigned int channels_2_8[] = {
1219 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
1220 .count = ARRAY_SIZE(channels_2_6_8),
1221 .list = channels_2_6_8,
1225 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
1226 .count = ARRAY_SIZE(channels_2_8),
1227 .list = channels_2_8,
1231 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
1232 struct hda_codec *codec,
1233 struct snd_pcm_substream *substream)
1235 struct hdmi_spec *spec = codec->spec;
1236 struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
1238 switch (codec->preset->id) {
1243 hw_constraints_channels = &hw_constraints_2_8_channels;
1246 hw_constraints_channels = &hw_constraints_2_6_8_channels;
1252 if (hw_constraints_channels != NULL) {
1253 snd_pcm_hw_constraint_list(substream->runtime, 0,
1254 SNDRV_PCM_HW_PARAM_CHANNELS,
1255 hw_constraints_channels);
1257 snd_pcm_hw_constraint_step(substream->runtime, 0,
1258 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1261 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1264 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
1265 struct hda_codec *codec,
1266 struct snd_pcm_substream *substream)
1268 struct hdmi_spec *spec = codec->spec;
1269 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1272 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1273 struct hda_codec *codec,
1274 unsigned int stream_tag,
1275 unsigned int format,
1276 struct snd_pcm_substream *substream)
1278 struct hdmi_spec *spec = codec->spec;
1279 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1280 stream_tag, format, substream);
1283 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
1284 struct hda_codec *codec,
1285 struct snd_pcm_substream *substream)
1287 struct hdmi_spec *spec = codec->spec;
1290 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
1291 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
1292 for (i = 0; i < 4; i++) {
1293 /* set the stream id */
1294 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1295 AC_VERB_SET_CHANNEL_STREAMID, 0);
1296 /* set the stream format */
1297 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1298 AC_VERB_SET_STREAM_FORMAT, 0);
1301 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1304 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
1305 struct hda_codec *codec,
1306 unsigned int stream_tag,
1307 unsigned int format,
1308 struct snd_pcm_substream *substream)
1311 unsigned int dataDCC1, dataDCC2, chan, chanmask, channel_id;
1314 mutex_lock(&codec->spdif_mutex);
1316 chs = substream->runtime->channels;
1317 chan = chs ? (chs - 1) : 1;
1335 dataDCC1 = AC_DIG1_ENABLE | AC_DIG1_COPYRIGHT;
1338 /* set the Audio InforFrame Channel Allocation */
1339 snd_hda_codec_write(codec, 0x1, 0,
1340 Nv_VERB_SET_Channel_Allocation, chanmask);
1342 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
1343 if (codec->spdif_status_reset && (codec->spdif_ctls & AC_DIG1_ENABLE))
1344 snd_hda_codec_write(codec,
1345 nvhdmi_master_con_nid_7x,
1347 AC_VERB_SET_DIGI_CONVERT_1,
1348 codec->spdif_ctls & ~AC_DIG1_ENABLE & 0xff);
1350 /* set the stream id */
1351 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1352 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
1354 /* set the stream format */
1355 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1356 AC_VERB_SET_STREAM_FORMAT, format);
1358 /* turn on again (if needed) */
1359 /* enable and set the channel status audio/data flag */
1360 if (codec->spdif_status_reset && (codec->spdif_ctls & AC_DIG1_ENABLE)) {
1361 snd_hda_codec_write(codec,
1362 nvhdmi_master_con_nid_7x,
1364 AC_VERB_SET_DIGI_CONVERT_1,
1365 codec->spdif_ctls & 0xff);
1366 snd_hda_codec_write(codec,
1367 nvhdmi_master_con_nid_7x,
1369 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1372 for (i = 0; i < 4; i++) {
1378 /* turn off SPDIF once;
1379 *otherwise the IEC958 bits won't be updated
1381 if (codec->spdif_status_reset &&
1382 (codec->spdif_ctls & AC_DIG1_ENABLE))
1383 snd_hda_codec_write(codec,
1384 nvhdmi_con_nids_7x[i],
1386 AC_VERB_SET_DIGI_CONVERT_1,
1387 codec->spdif_ctls & ~AC_DIG1_ENABLE & 0xff);
1388 /* set the stream id */
1389 snd_hda_codec_write(codec,
1390 nvhdmi_con_nids_7x[i],
1392 AC_VERB_SET_CHANNEL_STREAMID,
1393 (stream_tag << 4) | channel_id);
1394 /* set the stream format */
1395 snd_hda_codec_write(codec,
1396 nvhdmi_con_nids_7x[i],
1398 AC_VERB_SET_STREAM_FORMAT,
1400 /* turn on again (if needed) */
1401 /* enable and set the channel status audio/data flag */
1402 if (codec->spdif_status_reset &&
1403 (codec->spdif_ctls & AC_DIG1_ENABLE)) {
1404 snd_hda_codec_write(codec,
1405 nvhdmi_con_nids_7x[i],
1407 AC_VERB_SET_DIGI_CONVERT_1,
1408 codec->spdif_ctls & 0xff);
1409 snd_hda_codec_write(codec,
1410 nvhdmi_con_nids_7x[i],
1412 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1416 /* set the Audio Info Frame Checksum */
1417 snd_hda_codec_write(codec, 0x1, 0,
1418 Nv_VERB_SET_Info_Frame_Checksum,
1419 (0x71 - chan - chanmask));
1421 mutex_unlock(&codec->spdif_mutex);
1425 static struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
1429 .nid = nvhdmi_master_con_nid_7x,
1430 .rates = SUPPORTED_RATES,
1431 .maxbps = SUPPORTED_MAXBPS,
1432 .formats = SUPPORTED_FORMATS,
1434 .open = simple_playback_pcm_open,
1435 .close = nvhdmi_8ch_7x_pcm_close,
1436 .prepare = nvhdmi_8ch_7x_pcm_prepare
1440 static struct hda_pcm_stream nvhdmi_pcm_playback_2ch = {
1444 .nid = nvhdmi_master_con_nid_7x,
1445 .rates = SUPPORTED_RATES,
1446 .maxbps = SUPPORTED_MAXBPS,
1447 .formats = SUPPORTED_FORMATS,
1449 .open = simple_playback_pcm_open,
1450 .close = simple_playback_pcm_close,
1451 .prepare = simple_playback_pcm_prepare
1455 static struct hda_codec_ops nvhdmi_patch_ops_8ch_7x = {
1456 .build_controls = generic_hdmi_build_controls,
1457 .build_pcms = generic_hdmi_build_pcms,
1458 .init = nvhdmi_7x_init,
1459 .free = generic_hdmi_free,
1462 static struct hda_codec_ops nvhdmi_patch_ops_2ch = {
1463 .build_controls = generic_hdmi_build_controls,
1464 .build_pcms = generic_hdmi_build_pcms,
1465 .init = nvhdmi_7x_init,
1466 .free = generic_hdmi_free,
1469 static int patch_nvhdmi_8ch_89(struct hda_codec *codec)
1471 struct hdmi_spec *spec;
1472 int err = patch_generic_hdmi(codec);
1477 spec->old_pin_detect = 1;
1481 static int patch_nvhdmi_2ch(struct hda_codec *codec)
1483 struct hdmi_spec *spec;
1485 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1491 spec->multiout.num_dacs = 0; /* no analog */
1492 spec->multiout.max_channels = 2;
1493 spec->multiout.dig_out_nid = nvhdmi_master_con_nid_7x;
1494 spec->old_pin_detect = 1;
1496 spec->cvt[0] = nvhdmi_master_con_nid_7x;
1497 spec->pcm_playback = &nvhdmi_pcm_playback_2ch;
1499 codec->patch_ops = nvhdmi_patch_ops_2ch;
1504 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
1506 struct hdmi_spec *spec;
1507 int err = patch_nvhdmi_2ch(codec);
1512 spec->multiout.max_channels = 8;
1513 spec->pcm_playback = &nvhdmi_pcm_playback_8ch_7x;
1514 codec->patch_ops = nvhdmi_patch_ops_8ch_7x;
1519 * ATI-specific implementations
1521 * FIXME: we may omit the whole this and use the generic code once after
1522 * it's confirmed to work.
1525 #define ATIHDMI_CVT_NID 0x02 /* audio converter */
1526 #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
1528 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1529 struct hda_codec *codec,
1530 unsigned int stream_tag,
1531 unsigned int format,
1532 struct snd_pcm_substream *substream)
1534 struct hdmi_spec *spec = codec->spec;
1535 int chans = substream->runtime->channels;
1538 err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
1542 snd_hda_codec_write(codec, spec->cvt[0], 0, AC_VERB_SET_CVT_CHAN_COUNT,
1545 for (i = 0; i < chans; i++) {
1546 snd_hda_codec_write(codec, spec->cvt[0], 0,
1547 AC_VERB_SET_HDMI_CHAN_SLOT,
1553 static struct hda_pcm_stream atihdmi_pcm_digital_playback = {
1557 .nid = ATIHDMI_CVT_NID,
1559 .open = simple_playback_pcm_open,
1560 .close = simple_playback_pcm_close,
1561 .prepare = atihdmi_playback_pcm_prepare
1565 static struct hda_verb atihdmi_basic_init[] = {
1566 /* enable digital output on pin widget */
1567 { 0x03, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },
1571 static int atihdmi_init(struct hda_codec *codec)
1573 struct hdmi_spec *spec = codec->spec;
1575 snd_hda_sequence_write(codec, atihdmi_basic_init);
1576 /* SI codec requires to unmute the pin */
1577 if (get_wcaps(codec, spec->pin[0]) & AC_WCAP_OUT_AMP)
1578 snd_hda_codec_write(codec, spec->pin[0], 0,
1579 AC_VERB_SET_AMP_GAIN_MUTE,
1584 static struct hda_codec_ops atihdmi_patch_ops = {
1585 .build_controls = generic_hdmi_build_controls,
1586 .build_pcms = generic_hdmi_build_pcms,
1587 .init = atihdmi_init,
1588 .free = generic_hdmi_free,
1592 static int patch_atihdmi(struct hda_codec *codec)
1594 struct hdmi_spec *spec;
1596 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1602 spec->multiout.num_dacs = 0; /* no analog */
1603 spec->multiout.max_channels = 2;
1604 spec->multiout.dig_out_nid = ATIHDMI_CVT_NID;
1606 spec->cvt[0] = ATIHDMI_CVT_NID;
1607 spec->pin[0] = ATIHDMI_PIN_NID;
1608 spec->pcm_playback = &atihdmi_pcm_digital_playback;
1610 codec->patch_ops = atihdmi_patch_ops;
1619 static struct hda_codec_preset snd_hda_preset_hdmi[] = {
1620 { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
1621 { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
1622 { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
1623 { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
1624 { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
1625 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
1626 { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
1627 { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
1628 { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
1629 { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
1630 { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
1631 { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
1632 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
1633 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
1634 { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_nvhdmi_8ch_89 },
1635 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
1636 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
1637 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
1638 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
1639 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
1640 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
1641 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
1642 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
1643 /* 17 is known to be absent */
1644 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
1645 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
1646 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
1647 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
1648 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
1649 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
1650 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
1651 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
1652 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
1653 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_nvhdmi_8ch_89 },
1654 { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
1655 { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
1656 { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
1657 { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
1658 { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
1659 { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
1660 { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
1661 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
1662 { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
1666 MODULE_ALIAS("snd-hda-codec-id:1002793c");
1667 MODULE_ALIAS("snd-hda-codec-id:10027919");
1668 MODULE_ALIAS("snd-hda-codec-id:1002791a");
1669 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
1670 MODULE_ALIAS("snd-hda-codec-id:10951390");
1671 MODULE_ALIAS("snd-hda-codec-id:10951392");
1672 MODULE_ALIAS("snd-hda-codec-id:10de0002");
1673 MODULE_ALIAS("snd-hda-codec-id:10de0003");
1674 MODULE_ALIAS("snd-hda-codec-id:10de0005");
1675 MODULE_ALIAS("snd-hda-codec-id:10de0006");
1676 MODULE_ALIAS("snd-hda-codec-id:10de0007");
1677 MODULE_ALIAS("snd-hda-codec-id:10de000a");
1678 MODULE_ALIAS("snd-hda-codec-id:10de000b");
1679 MODULE_ALIAS("snd-hda-codec-id:10de000c");
1680 MODULE_ALIAS("snd-hda-codec-id:10de000d");
1681 MODULE_ALIAS("snd-hda-codec-id:10de0010");
1682 MODULE_ALIAS("snd-hda-codec-id:10de0011");
1683 MODULE_ALIAS("snd-hda-codec-id:10de0012");
1684 MODULE_ALIAS("snd-hda-codec-id:10de0013");
1685 MODULE_ALIAS("snd-hda-codec-id:10de0014");
1686 MODULE_ALIAS("snd-hda-codec-id:10de0015");
1687 MODULE_ALIAS("snd-hda-codec-id:10de0016");
1688 MODULE_ALIAS("snd-hda-codec-id:10de0018");
1689 MODULE_ALIAS("snd-hda-codec-id:10de0019");
1690 MODULE_ALIAS("snd-hda-codec-id:10de001a");
1691 MODULE_ALIAS("snd-hda-codec-id:10de001b");
1692 MODULE_ALIAS("snd-hda-codec-id:10de001c");
1693 MODULE_ALIAS("snd-hda-codec-id:10de0040");
1694 MODULE_ALIAS("snd-hda-codec-id:10de0041");
1695 MODULE_ALIAS("snd-hda-codec-id:10de0042");
1696 MODULE_ALIAS("snd-hda-codec-id:10de0043");
1697 MODULE_ALIAS("snd-hda-codec-id:10de0044");
1698 MODULE_ALIAS("snd-hda-codec-id:10de0067");
1699 MODULE_ALIAS("snd-hda-codec-id:10de8001");
1700 MODULE_ALIAS("snd-hda-codec-id:17e80047");
1701 MODULE_ALIAS("snd-hda-codec-id:80860054");
1702 MODULE_ALIAS("snd-hda-codec-id:80862801");
1703 MODULE_ALIAS("snd-hda-codec-id:80862802");
1704 MODULE_ALIAS("snd-hda-codec-id:80862803");
1705 MODULE_ALIAS("snd-hda-codec-id:80862804");
1706 MODULE_ALIAS("snd-hda-codec-id:80862805");
1707 MODULE_ALIAS("snd-hda-codec-id:808629fb");
1709 MODULE_LICENSE("GPL");
1710 MODULE_DESCRIPTION("HDMI HD-audio codec");
1711 MODULE_ALIAS("snd-hda-codec-intelhdmi");
1712 MODULE_ALIAS("snd-hda-codec-nvhdmi");
1713 MODULE_ALIAS("snd-hda-codec-atihdmi");
1715 static struct hda_codec_preset_list intel_list = {
1716 .preset = snd_hda_preset_hdmi,
1717 .owner = THIS_MODULE,
1720 static int __init patch_hdmi_init(void)
1722 return snd_hda_add_codec_preset(&intel_list);
1725 static void __exit patch_hdmi_exit(void)
1727 snd_hda_delete_codec_preset(&intel_list);
1730 module_init(patch_hdmi_init)
1731 module_exit(patch_hdmi_exit)