3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6 * Copyright (c) 2006 ATI Technologies Inc.
7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
11 * Wu Fengguang <wfg@linux.intel.com>
14 * Wu Fengguang <wfg@linux.intel.com>
16 * This program is free software; you can redistribute it and/or modify it
17 * under the terms of the GNU General Public License as published by the Free
18 * Software Foundation; either version 2 of the License, or (at your option)
21 * This program is distributed in the hope that it will be useful, but
22 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
23 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software Foundation,
28 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
31 #include <linux/init.h>
32 #include <linux/delay.h>
33 #include <linux/slab.h>
34 #include <linux/module.h>
35 #include <sound/core.h>
36 #include <sound/jack.h>
37 #include "hda_codec.h"
38 #include "hda_local.h"
41 static bool static_hdmi_pcm;
42 module_param(static_hdmi_pcm, bool, 0644);
43 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
46 * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
47 * could support N independent pipes, each of them can be connected to one or
48 * more ports (DVI, HDMI or DisplayPort).
50 * The HDA correspondence of pipes/ports are converter/pin nodes.
52 #define MAX_HDMI_CVTS 8
53 #define MAX_HDMI_PINS 8
55 struct hdmi_spec_per_cvt {
58 unsigned int channels_min;
59 unsigned int channels_max;
65 struct hdmi_spec_per_pin {
68 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
70 struct hda_codec *codec;
71 struct hdmi_eld sink_eld;
72 struct delayed_work work;
78 struct hdmi_spec_per_cvt cvts[MAX_HDMI_CVTS];
81 struct hdmi_spec_per_pin pins[MAX_HDMI_PINS];
82 struct hda_pcm pcm_rec[MAX_HDMI_PINS];
85 * Non-generic ATI/NVIDIA specific
87 struct hda_multi_out multiout;
88 const struct hda_pcm_stream *pcm_playback;
92 struct hdmi_audio_infoframe {
99 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
103 u8 LFEPBL01_LSV36_DM_INH7;
106 struct dp_audio_infoframe {
109 u8 ver; /* 0x11 << 2 */
111 u8 CC02_CT47; /* match with HDMI infoframe from this on */
115 u8 LFEPBL01_LSV36_DM_INH7;
118 union audio_infoframe {
119 struct hdmi_audio_infoframe hdmi;
120 struct dp_audio_infoframe dp;
125 * CEA speaker placement:
128 * FLW FL FLC FC FRC FR FRW
135 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
136 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
138 enum cea_speaker_placement {
139 FL = (1 << 0), /* Front Left */
140 FC = (1 << 1), /* Front Center */
141 FR = (1 << 2), /* Front Right */
142 FLC = (1 << 3), /* Front Left Center */
143 FRC = (1 << 4), /* Front Right Center */
144 RL = (1 << 5), /* Rear Left */
145 RC = (1 << 6), /* Rear Center */
146 RR = (1 << 7), /* Rear Right */
147 RLC = (1 << 8), /* Rear Left Center */
148 RRC = (1 << 9), /* Rear Right Center */
149 LFE = (1 << 10), /* Low Frequency Effect */
150 FLW = (1 << 11), /* Front Left Wide */
151 FRW = (1 << 12), /* Front Right Wide */
152 FLH = (1 << 13), /* Front Left High */
153 FCH = (1 << 14), /* Front Center High */
154 FRH = (1 << 15), /* Front Right High */
155 TC = (1 << 16), /* Top Center */
159 * ELD SA bits in the CEA Speaker Allocation data block
161 static int eld_speaker_allocation_bits[] = {
169 /* the following are not defined in ELD yet */
176 struct cea_channel_speaker_allocation {
180 /* derived values, just for convenience */
188 * surround40 surround41 surround50 surround51 surround71
189 * ch0 front left = = = =
190 * ch1 front right = = = =
191 * ch2 rear left = = = =
192 * ch3 rear right = = = =
193 * ch4 LFE center center center
198 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
200 static int hdmi_channel_mapping[0x32][8] = {
202 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
204 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
206 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
208 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
210 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
212 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
214 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
216 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
218 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
222 * This is an ordered list!
224 * The preceding ones have better chances to be selected by
225 * hdmi_channel_allocation().
227 static struct cea_channel_speaker_allocation channel_allocations[] = {
228 /* channel: 7 6 5 4 3 2 1 0 */
229 { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
231 { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
233 { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
235 { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
237 { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
239 { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
241 { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
243 { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
245 { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
247 { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
248 { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
249 { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
250 { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
251 { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
252 { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
253 { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
254 { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
255 { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
256 { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
257 { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
258 { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
259 { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
260 { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
261 { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
262 { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
263 { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
264 { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
265 { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
266 { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
267 { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
268 { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
269 { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
270 { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
271 { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
272 { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
273 { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
274 { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
275 { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
276 { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
277 { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
278 { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
279 { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
280 { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
281 { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
282 { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
283 { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
284 { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
285 { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
286 { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
287 { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
295 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
299 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
300 if (spec->pins[pin_idx].pin_nid == pin_nid)
303 snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
307 static int hinfo_to_pin_index(struct hdmi_spec *spec,
308 struct hda_pcm_stream *hinfo)
312 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
313 if (&spec->pcm_rec[pin_idx].stream[0] == hinfo)
316 snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
320 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
324 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
325 if (spec->cvts[cvt_idx].cvt_nid == cvt_nid)
328 snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
332 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
333 struct snd_ctl_elem_info *uinfo)
335 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
336 struct hdmi_spec *spec;
340 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
342 pin_idx = kcontrol->private_value;
343 uinfo->count = spec->pins[pin_idx].sink_eld.eld_size;
348 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
349 struct snd_ctl_elem_value *ucontrol)
351 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
352 struct hdmi_spec *spec;
356 pin_idx = kcontrol->private_value;
358 memcpy(ucontrol->value.bytes.data,
359 spec->pins[pin_idx].sink_eld.eld_buffer, ELD_MAX_SIZE);
364 static struct snd_kcontrol_new eld_bytes_ctl = {
365 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
366 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
368 .info = hdmi_eld_ctl_info,
369 .get = hdmi_eld_ctl_get,
372 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
375 struct snd_kcontrol *kctl;
376 struct hdmi_spec *spec = codec->spec;
379 kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
382 kctl->private_value = pin_idx;
383 kctl->id.device = device;
385 err = snd_hda_ctl_add(codec, spec->pins[pin_idx].pin_nid, kctl);
393 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
394 int *packet_index, int *byte_index)
398 val = snd_hda_codec_read(codec, pin_nid, 0,
399 AC_VERB_GET_HDMI_DIP_INDEX, 0);
401 *packet_index = val >> 5;
402 *byte_index = val & 0x1f;
406 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
407 int packet_index, int byte_index)
411 val = (packet_index << 5) | (byte_index & 0x1f);
413 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
416 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
419 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
422 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
425 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
426 snd_hda_codec_write(codec, pin_nid, 0,
427 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
428 /* Disable pin out until stream is active*/
429 snd_hda_codec_write(codec, pin_nid, 0,
430 AC_VERB_SET_PIN_WIDGET_CONTROL, 0);
433 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
435 return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
436 AC_VERB_GET_CVT_CHAN_COUNT, 0);
439 static void hdmi_set_channel_count(struct hda_codec *codec,
440 hda_nid_t cvt_nid, int chs)
442 if (chs != hdmi_get_channel_count(codec, cvt_nid))
443 snd_hda_codec_write(codec, cvt_nid, 0,
444 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
449 * Channel mapping routines
453 * Compute derived values in channel_allocations[].
455 static void init_channel_allocations(void)
458 struct cea_channel_speaker_allocation *p;
460 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
461 p = channel_allocations + i;
464 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
465 if (p->speakers[j]) {
467 p->spk_mask |= p->speakers[j];
473 * The transformation takes two steps:
475 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
476 * spk_mask => (channel_allocations[]) => ai->CA
478 * TODO: it could select the wrong CA from multiple candidates.
480 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
485 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
488 * CA defaults to 0 for basic stereo audio
494 * expand ELD's speaker allocation mask
496 * ELD tells the speaker mask in a compact(paired) form,
497 * expand ELD's notions to match the ones used by Audio InfoFrame.
499 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
500 if (eld->spk_alloc & (1 << i))
501 spk_mask |= eld_speaker_allocation_bits[i];
504 /* search for the first working match in the CA table */
505 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
506 if (channels == channel_allocations[i].channels &&
507 (spk_mask & channel_allocations[i].spk_mask) ==
508 channel_allocations[i].spk_mask) {
509 ca = channel_allocations[i].ca_index;
514 snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
515 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
521 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
524 #ifdef CONFIG_SND_DEBUG_VERBOSE
528 for (i = 0; i < 8; i++) {
529 slot = snd_hda_codec_read(codec, pin_nid, 0,
530 AC_VERB_GET_HDMI_CHAN_SLOT, i);
531 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
532 slot >> 4, slot & 0xf);
538 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
545 if (hdmi_channel_mapping[ca][1] == 0) {
546 for (i = 0; i < channel_allocations[ca].channels; i++)
547 hdmi_channel_mapping[ca][i] = i | (i << 4);
549 hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
552 for (i = 0; i < 8; i++) {
553 err = snd_hda_codec_write(codec, pin_nid, 0,
554 AC_VERB_SET_HDMI_CHAN_SLOT,
555 hdmi_channel_mapping[ca][i]);
557 snd_printdd(KERN_NOTICE
558 "HDMI: channel mapping failed\n");
563 hdmi_debug_channel_mapping(codec, pin_nid);
568 * Audio InfoFrame routines
572 * Enable Audio InfoFrame Transmission
574 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
577 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
578 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
583 * Disable Audio InfoFrame Transmission
585 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
588 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
589 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
593 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
595 #ifdef CONFIG_SND_DEBUG_VERBOSE
599 size = snd_hdmi_get_eld_size(codec, pin_nid);
600 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
602 for (i = 0; i < 8; i++) {
603 size = snd_hda_codec_read(codec, pin_nid, 0,
604 AC_VERB_GET_HDMI_DIP_SIZE, i);
605 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
610 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
616 for (i = 0; i < 8; i++) {
617 size = snd_hda_codec_read(codec, pin_nid, 0,
618 AC_VERB_GET_HDMI_DIP_SIZE, i);
622 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
623 for (j = 1; j < 1000; j++) {
624 hdmi_write_dip_byte(codec, pin_nid, 0x0);
625 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
627 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
629 if (bi == 0) /* byte index wrapped around */
633 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
639 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
641 u8 *bytes = (u8 *)hdmi_ai;
645 hdmi_ai->checksum = 0;
647 for (i = 0; i < sizeof(*hdmi_ai); i++)
650 hdmi_ai->checksum = -sum;
653 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
659 hdmi_debug_dip_size(codec, pin_nid);
660 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
662 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
663 for (i = 0; i < size; i++)
664 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
667 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
673 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
677 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
678 for (i = 0; i < size; i++) {
679 val = snd_hda_codec_read(codec, pin_nid, 0,
680 AC_VERB_GET_HDMI_DIP_DATA, 0);
688 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
689 struct snd_pcm_substream *substream)
691 struct hdmi_spec *spec = codec->spec;
692 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
693 hda_nid_t pin_nid = per_pin->pin_nid;
694 int channels = substream->runtime->channels;
695 struct hdmi_eld *eld;
697 union audio_infoframe ai;
699 eld = &spec->pins[pin_idx].sink_eld;
700 if (!eld->monitor_present)
703 ca = hdmi_channel_allocation(eld, channels);
705 memset(&ai, 0, sizeof(ai));
706 if (eld->conn_type == 0) { /* HDMI */
707 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
709 hdmi_ai->type = 0x84;
712 hdmi_ai->CC02_CT47 = channels - 1;
714 hdmi_checksum_audio_infoframe(hdmi_ai);
715 } else if (eld->conn_type == 1) { /* DisplayPort */
716 struct dp_audio_infoframe *dp_ai = &ai.dp;
720 dp_ai->ver = 0x11 << 2;
721 dp_ai->CC02_CT47 = channels - 1;
724 snd_printd("HDMI: unknown connection type at pin %d\n",
730 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
731 * sizeof(*dp_ai) to avoid partial match/update problems when
732 * the user switches between HDMI/DP monitors.
734 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
736 snd_printdd("hdmi_setup_audio_infoframe: "
737 "pin=%d channels=%d\n",
740 hdmi_setup_channel_mapping(codec, pin_nid, ca);
741 hdmi_stop_infoframe_trans(codec, pin_nid);
742 hdmi_fill_audio_infoframe(codec, pin_nid,
743 ai.bytes, sizeof(ai));
744 hdmi_start_infoframe_trans(codec, pin_nid);
753 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
755 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
757 struct hdmi_spec *spec = codec->spec;
758 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
760 int pd = !!(res & AC_UNSOL_RES_PD);
761 int eldv = !!(res & AC_UNSOL_RES_ELDV);
763 struct hda_jack_tbl *jack;
765 jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
769 jack->jack_dirty = 1;
772 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
773 codec->addr, pin_nid, pd, eldv);
775 pin_idx = pin_nid_to_pin_index(spec, pin_nid);
779 hdmi_present_sense(&spec->pins[pin_idx], 1);
780 snd_hda_jack_report_sync(codec);
783 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
785 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
786 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
787 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
788 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
791 "HDMI CP event: CODEC=%d PIN=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
806 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
808 struct hdmi_spec *spec = codec->spec;
809 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
810 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
812 if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
813 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
818 hdmi_intrinsic_event(codec, res);
820 hdmi_non_intrinsic_event(codec, res);
827 /* HBR should be Non-PCM, 8 channels */
828 #define is_hbr_format(format) \
829 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
831 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
832 hda_nid_t pin_nid, u32 stream_tag, int format)
837 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
838 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
839 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
841 new_pinctl = pinctl & ~AC_PINCTL_EPT;
842 if (is_hbr_format(format))
843 new_pinctl |= AC_PINCTL_EPT_HBR;
845 new_pinctl |= AC_PINCTL_EPT_NATIVE;
847 snd_printdd("hdmi_setup_stream: "
848 "NID=0x%x, %spinctl=0x%x\n",
850 pinctl == new_pinctl ? "" : "new-",
853 if (pinctl != new_pinctl)
854 snd_hda_codec_write(codec, pin_nid, 0,
855 AC_VERB_SET_PIN_WIDGET_CONTROL,
859 if (is_hbr_format(format) && !new_pinctl) {
860 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
864 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
871 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
872 struct hda_codec *codec,
873 struct snd_pcm_substream *substream)
875 struct hdmi_spec *spec = codec->spec;
876 struct snd_pcm_runtime *runtime = substream->runtime;
877 int pin_idx, cvt_idx, mux_idx = 0;
878 struct hdmi_spec_per_pin *per_pin;
879 struct hdmi_eld *eld;
880 struct hdmi_spec_per_cvt *per_cvt = NULL;
884 pin_idx = hinfo_to_pin_index(spec, hinfo);
885 if (snd_BUG_ON(pin_idx < 0))
887 per_pin = &spec->pins[pin_idx];
888 eld = &per_pin->sink_eld;
890 /* Dynamically assign converter to stream */
891 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
892 per_cvt = &spec->cvts[cvt_idx];
894 /* Must not already be assigned */
895 if (per_cvt->assigned)
897 /* Must be in pin's mux's list of converters */
898 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
899 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
901 /* Not in mux list */
902 if (mux_idx == per_pin->num_mux_nids)
906 /* No free converters */
907 if (cvt_idx == spec->num_cvts)
910 /* Claim converter */
911 per_cvt->assigned = 1;
912 hinfo->nid = per_cvt->cvt_nid;
914 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
915 AC_VERB_SET_CONNECT_SEL,
917 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
918 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
919 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
920 AC_VERB_SET_PIN_WIDGET_CONTROL,
922 snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
924 /* Initially set the converter's capabilities */
925 hinfo->channels_min = per_cvt->channels_min;
926 hinfo->channels_max = per_cvt->channels_max;
927 hinfo->rates = per_cvt->rates;
928 hinfo->formats = per_cvt->formats;
929 hinfo->maxbps = per_cvt->maxbps;
931 /* Restrict capabilities by ELD if this isn't disabled */
932 if (!static_hdmi_pcm && eld->eld_valid) {
933 snd_hdmi_eld_update_pcm_info(eld, hinfo);
934 if (hinfo->channels_min > hinfo->channels_max ||
935 !hinfo->rates || !hinfo->formats)
939 /* Store the updated parameters */
940 runtime->hw.channels_min = hinfo->channels_min;
941 runtime->hw.channels_max = hinfo->channels_max;
942 runtime->hw.formats = hinfo->formats;
943 runtime->hw.rates = hinfo->rates;
945 snd_pcm_hw_constraint_step(substream->runtime, 0,
946 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
951 * HDA/HDMI auto parsing
953 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
955 struct hdmi_spec *spec = codec->spec;
956 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
957 hda_nid_t pin_nid = per_pin->pin_nid;
959 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
960 snd_printk(KERN_WARNING
961 "HDMI: pin %d wcaps %#x "
962 "does not support connection list\n",
963 pin_nid, get_wcaps(codec, pin_nid));
967 per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
969 HDA_MAX_CONNECTIONS);
974 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
976 struct hda_codec *codec = per_pin->codec;
977 struct hdmi_eld *eld = &per_pin->sink_eld;
978 hda_nid_t pin_nid = per_pin->pin_nid;
980 * Always execute a GetPinSense verb here, even when called from
981 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
982 * response's PD bit is not the real PD value, but indicates that
983 * the real PD value changed. An older version of the HD-audio
984 * specification worked this way. Hence, we just ignore the data in
985 * the unsolicited response to avoid custom WARs.
987 int present = snd_hda_pin_sense(codec, pin_nid);
988 bool eld_valid = false;
990 memset(eld, 0, offsetof(struct hdmi_eld, eld_buffer));
992 eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
993 if (eld->monitor_present)
994 eld_valid = !!(present & AC_PINSENSE_ELDV);
997 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
998 codec->addr, pin_nid, eld->monitor_present, eld_valid);
1001 if (!snd_hdmi_get_eld(eld, codec, pin_nid))
1002 snd_hdmi_show_eld(eld);
1004 queue_delayed_work(codec->bus->workq,
1006 msecs_to_jiffies(300));
1011 static void hdmi_repoll_eld(struct work_struct *work)
1013 struct hdmi_spec_per_pin *per_pin =
1014 container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1016 if (per_pin->repoll_count++ > 6)
1017 per_pin->repoll_count = 0;
1019 hdmi_present_sense(per_pin, per_pin->repoll_count);
1022 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1024 struct hdmi_spec *spec = codec->spec;
1025 unsigned int caps, config;
1027 struct hdmi_spec_per_pin *per_pin;
1030 caps = snd_hda_param_read(codec, pin_nid, AC_PAR_PIN_CAP);
1031 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1034 config = snd_hda_codec_read(codec, pin_nid, 0,
1035 AC_VERB_GET_CONFIG_DEFAULT, 0);
1036 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1039 if (snd_BUG_ON(spec->num_pins >= MAX_HDMI_PINS))
1042 pin_idx = spec->num_pins;
1043 per_pin = &spec->pins[pin_idx];
1045 per_pin->pin_nid = pin_nid;
1047 err = hdmi_read_pin_conn(codec, pin_idx);
1056 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1058 struct hdmi_spec *spec = codec->spec;
1060 struct hdmi_spec_per_cvt *per_cvt;
1064 if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS))
1067 chans = get_wcaps(codec, cvt_nid);
1068 chans = get_wcaps_channels(chans);
1070 cvt_idx = spec->num_cvts;
1071 per_cvt = &spec->cvts[cvt_idx];
1073 per_cvt->cvt_nid = cvt_nid;
1074 per_cvt->channels_min = 2;
1076 per_cvt->channels_max = chans;
1078 err = snd_hda_query_supported_pcm(codec, cvt_nid,
1090 static int hdmi_parse_codec(struct hda_codec *codec)
1095 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1096 if (!nid || nodes < 0) {
1097 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1101 for (i = 0; i < nodes; i++, nid++) {
1105 caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP);
1106 type = get_wcaps_type(caps);
1108 if (!(caps & AC_WCAP_DIGITAL))
1112 case AC_WID_AUD_OUT:
1113 hdmi_add_cvt(codec, nid);
1116 hdmi_add_pin(codec, nid);
1122 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1123 * can be lost and presence sense verb will become inaccurate if the
1124 * HDA link is powered off at hot plug or hw initialization time.
1126 #ifdef CONFIG_SND_HDA_POWER_SAVE
1127 if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1129 codec->bus->power_keep_link_on = 1;
1137 static char *get_hdmi_pcm_name(int idx)
1139 static char names[MAX_HDMI_PINS][8];
1140 sprintf(&names[idx][0], "HDMI %d", idx);
1141 return &names[idx][0];
1148 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1149 struct hda_codec *codec,
1150 unsigned int stream_tag,
1151 unsigned int format,
1152 struct snd_pcm_substream *substream)
1154 hda_nid_t cvt_nid = hinfo->nid;
1155 struct hdmi_spec *spec = codec->spec;
1156 int pin_idx = hinfo_to_pin_index(spec, hinfo);
1157 hda_nid_t pin_nid = spec->pins[pin_idx].pin_nid;
1159 hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
1161 hdmi_setup_audio_infoframe(codec, pin_idx, substream);
1163 return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1166 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1167 struct hda_codec *codec,
1168 struct snd_pcm_substream *substream)
1170 struct hdmi_spec *spec = codec->spec;
1171 int cvt_idx, pin_idx;
1172 struct hdmi_spec_per_cvt *per_cvt;
1173 struct hdmi_spec_per_pin *per_pin;
1176 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1179 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1180 if (snd_BUG_ON(cvt_idx < 0))
1182 per_cvt = &spec->cvts[cvt_idx];
1184 snd_BUG_ON(!per_cvt->assigned);
1185 per_cvt->assigned = 0;
1188 pin_idx = hinfo_to_pin_index(spec, hinfo);
1189 if (snd_BUG_ON(pin_idx < 0))
1191 per_pin = &spec->pins[pin_idx];
1193 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1194 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1195 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1196 AC_VERB_SET_PIN_WIDGET_CONTROL,
1198 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1204 static const struct hda_pcm_ops generic_ops = {
1205 .open = hdmi_pcm_open,
1206 .prepare = generic_hdmi_playback_pcm_prepare,
1207 .cleanup = generic_hdmi_playback_pcm_cleanup,
1210 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1212 struct hdmi_spec *spec = codec->spec;
1215 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1216 struct hda_pcm *info;
1217 struct hda_pcm_stream *pstr;
1219 info = &spec->pcm_rec[pin_idx];
1220 info->name = get_hdmi_pcm_name(pin_idx);
1221 info->pcm_type = HDA_PCM_TYPE_HDMI;
1223 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1224 pstr->substreams = 1;
1225 pstr->ops = generic_ops;
1226 /* other pstr fields are set in open */
1229 codec->num_pcms = spec->num_pins;
1230 codec->pcm_info = spec->pcm_rec;
1235 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1237 char hdmi_str[32] = "HDMI/DP";
1238 struct hdmi_spec *spec = codec->spec;
1239 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1240 int pcmdev = spec->pcm_rec[pin_idx].device;
1243 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
1245 hdmi_present_sense(per_pin, 0);
1246 return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
1249 static int generic_hdmi_build_controls(struct hda_codec *codec)
1251 struct hdmi_spec *spec = codec->spec;
1255 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1256 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1258 err = generic_hdmi_build_jack(codec, pin_idx);
1262 err = snd_hda_create_spdif_out_ctls(codec,
1264 per_pin->mux_nids[0]);
1267 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1269 /* add control for ELD Bytes */
1270 err = hdmi_create_eld_ctl(codec,
1272 spec->pcm_rec[pin_idx].device);
1277 hdmi_present_sense(per_pin, false);
1283 static int generic_hdmi_init(struct hda_codec *codec)
1285 struct hdmi_spec *spec = codec->spec;
1288 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1289 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1290 hda_nid_t pin_nid = per_pin->pin_nid;
1291 struct hdmi_eld *eld = &per_pin->sink_eld;
1293 hdmi_init_pin(codec, pin_nid);
1294 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
1296 per_pin->codec = codec;
1297 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
1298 snd_hda_eld_proc_new(codec, eld, pin_idx);
1300 snd_hda_jack_report_sync(codec);
1304 static void generic_hdmi_free(struct hda_codec *codec)
1306 struct hdmi_spec *spec = codec->spec;
1309 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1310 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1311 struct hdmi_eld *eld = &per_pin->sink_eld;
1313 cancel_delayed_work(&per_pin->work);
1314 snd_hda_eld_proc_free(codec, eld);
1317 flush_workqueue(codec->bus->workq);
1321 static const struct hda_codec_ops generic_hdmi_patch_ops = {
1322 .init = generic_hdmi_init,
1323 .free = generic_hdmi_free,
1324 .build_pcms = generic_hdmi_build_pcms,
1325 .build_controls = generic_hdmi_build_controls,
1326 .unsol_event = hdmi_unsol_event,
1329 static int patch_generic_hdmi(struct hda_codec *codec)
1331 struct hdmi_spec *spec;
1333 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1338 if (hdmi_parse_codec(codec) < 0) {
1343 codec->patch_ops = generic_hdmi_patch_ops;
1345 init_channel_allocations();
1351 * Shared non-generic implementations
1354 static int simple_playback_build_pcms(struct hda_codec *codec)
1356 struct hdmi_spec *spec = codec->spec;
1357 struct hda_pcm *info = spec->pcm_rec;
1360 codec->num_pcms = spec->num_cvts;
1361 codec->pcm_info = info;
1363 for (i = 0; i < codec->num_pcms; i++, info++) {
1365 struct hda_pcm_stream *pstr;
1367 chans = get_wcaps(codec, spec->cvts[i].cvt_nid);
1368 chans = get_wcaps_channels(chans);
1370 info->name = get_hdmi_pcm_name(i);
1371 info->pcm_type = HDA_PCM_TYPE_HDMI;
1372 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1373 snd_BUG_ON(!spec->pcm_playback);
1374 *pstr = *spec->pcm_playback;
1375 pstr->nid = spec->cvts[i].cvt_nid;
1376 if (pstr->channels_max <= 2 && chans && chans <= 16)
1377 pstr->channels_max = chans;
1383 static int simple_playback_build_controls(struct hda_codec *codec)
1385 struct hdmi_spec *spec = codec->spec;
1389 for (i = 0; i < codec->num_pcms; i++) {
1390 err = snd_hda_create_spdif_out_ctls(codec,
1391 spec->cvts[i].cvt_nid,
1392 spec->cvts[i].cvt_nid);
1400 static void simple_playback_free(struct hda_codec *codec)
1402 struct hdmi_spec *spec = codec->spec;
1408 * Nvidia specific implementations
1411 #define Nv_VERB_SET_Channel_Allocation 0xF79
1412 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
1413 #define Nv_VERB_SET_Audio_Protection_On 0xF98
1414 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
1416 #define nvhdmi_master_con_nid_7x 0x04
1417 #define nvhdmi_master_pin_nid_7x 0x05
1419 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
1420 /*front, rear, clfe, rear_surr */
1424 static const struct hda_verb nvhdmi_basic_init_7x[] = {
1425 /* set audio protect on */
1426 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1427 /* enable digital output on pin widget */
1428 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1429 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1430 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1431 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1432 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1436 #ifdef LIMITED_RATE_FMT_SUPPORT
1437 /* support only the safe format and rate */
1438 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
1439 #define SUPPORTED_MAXBPS 16
1440 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
1442 /* support all rates and formats */
1443 #define SUPPORTED_RATES \
1444 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1445 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
1446 SNDRV_PCM_RATE_192000)
1447 #define SUPPORTED_MAXBPS 24
1448 #define SUPPORTED_FORMATS \
1449 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
1452 static int nvhdmi_7x_init(struct hda_codec *codec)
1454 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x);
1458 static unsigned int channels_2_6_8[] = {
1462 static unsigned int channels_2_8[] = {
1466 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
1467 .count = ARRAY_SIZE(channels_2_6_8),
1468 .list = channels_2_6_8,
1472 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
1473 .count = ARRAY_SIZE(channels_2_8),
1474 .list = channels_2_8,
1478 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
1479 struct hda_codec *codec,
1480 struct snd_pcm_substream *substream)
1482 struct hdmi_spec *spec = codec->spec;
1483 struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
1485 switch (codec->preset->id) {
1490 hw_constraints_channels = &hw_constraints_2_8_channels;
1493 hw_constraints_channels = &hw_constraints_2_6_8_channels;
1499 if (hw_constraints_channels != NULL) {
1500 snd_pcm_hw_constraint_list(substream->runtime, 0,
1501 SNDRV_PCM_HW_PARAM_CHANNELS,
1502 hw_constraints_channels);
1504 snd_pcm_hw_constraint_step(substream->runtime, 0,
1505 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1508 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1511 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
1512 struct hda_codec *codec,
1513 struct snd_pcm_substream *substream)
1515 struct hdmi_spec *spec = codec->spec;
1516 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1519 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1520 struct hda_codec *codec,
1521 unsigned int stream_tag,
1522 unsigned int format,
1523 struct snd_pcm_substream *substream)
1525 struct hdmi_spec *spec = codec->spec;
1526 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1527 stream_tag, format, substream);
1530 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
1533 unsigned int chanmask;
1534 int chan = channels ? (channels - 1) : 1;
1553 /* Set the audio infoframe channel allocation and checksum fields. The
1554 * channel count is computed implicitly by the hardware. */
1555 snd_hda_codec_write(codec, 0x1, 0,
1556 Nv_VERB_SET_Channel_Allocation, chanmask);
1558 snd_hda_codec_write(codec, 0x1, 0,
1559 Nv_VERB_SET_Info_Frame_Checksum,
1560 (0x71 - chan - chanmask));
1563 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
1564 struct hda_codec *codec,
1565 struct snd_pcm_substream *substream)
1567 struct hdmi_spec *spec = codec->spec;
1570 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
1571 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
1572 for (i = 0; i < 4; i++) {
1573 /* set the stream id */
1574 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1575 AC_VERB_SET_CHANNEL_STREAMID, 0);
1576 /* set the stream format */
1577 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1578 AC_VERB_SET_STREAM_FORMAT, 0);
1581 /* The audio hardware sends a channel count of 0x7 (8ch) when all the
1582 * streams are disabled. */
1583 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1585 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1588 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
1589 struct hda_codec *codec,
1590 unsigned int stream_tag,
1591 unsigned int format,
1592 struct snd_pcm_substream *substream)
1595 unsigned int dataDCC2, channel_id;
1597 struct hdmi_spec *spec = codec->spec;
1598 struct hda_spdif_out *spdif =
1599 snd_hda_spdif_out_of_nid(codec, spec->cvts[0].cvt_nid);
1601 mutex_lock(&codec->spdif_mutex);
1603 chs = substream->runtime->channels;
1607 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
1608 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
1609 snd_hda_codec_write(codec,
1610 nvhdmi_master_con_nid_7x,
1612 AC_VERB_SET_DIGI_CONVERT_1,
1613 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
1615 /* set the stream id */
1616 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1617 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
1619 /* set the stream format */
1620 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1621 AC_VERB_SET_STREAM_FORMAT, format);
1623 /* turn on again (if needed) */
1624 /* enable and set the channel status audio/data flag */
1625 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
1626 snd_hda_codec_write(codec,
1627 nvhdmi_master_con_nid_7x,
1629 AC_VERB_SET_DIGI_CONVERT_1,
1630 spdif->ctls & 0xff);
1631 snd_hda_codec_write(codec,
1632 nvhdmi_master_con_nid_7x,
1634 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1637 for (i = 0; i < 4; i++) {
1643 /* turn off SPDIF once;
1644 *otherwise the IEC958 bits won't be updated
1646 if (codec->spdif_status_reset &&
1647 (spdif->ctls & AC_DIG1_ENABLE))
1648 snd_hda_codec_write(codec,
1649 nvhdmi_con_nids_7x[i],
1651 AC_VERB_SET_DIGI_CONVERT_1,
1652 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
1653 /* set the stream id */
1654 snd_hda_codec_write(codec,
1655 nvhdmi_con_nids_7x[i],
1657 AC_VERB_SET_CHANNEL_STREAMID,
1658 (stream_tag << 4) | channel_id);
1659 /* set the stream format */
1660 snd_hda_codec_write(codec,
1661 nvhdmi_con_nids_7x[i],
1663 AC_VERB_SET_STREAM_FORMAT,
1665 /* turn on again (if needed) */
1666 /* enable and set the channel status audio/data flag */
1667 if (codec->spdif_status_reset &&
1668 (spdif->ctls & AC_DIG1_ENABLE)) {
1669 snd_hda_codec_write(codec,
1670 nvhdmi_con_nids_7x[i],
1672 AC_VERB_SET_DIGI_CONVERT_1,
1673 spdif->ctls & 0xff);
1674 snd_hda_codec_write(codec,
1675 nvhdmi_con_nids_7x[i],
1677 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1681 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
1683 mutex_unlock(&codec->spdif_mutex);
1687 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
1691 .nid = nvhdmi_master_con_nid_7x,
1692 .rates = SUPPORTED_RATES,
1693 .maxbps = SUPPORTED_MAXBPS,
1694 .formats = SUPPORTED_FORMATS,
1696 .open = simple_playback_pcm_open,
1697 .close = nvhdmi_8ch_7x_pcm_close,
1698 .prepare = nvhdmi_8ch_7x_pcm_prepare
1702 static const struct hda_pcm_stream nvhdmi_pcm_playback_2ch = {
1706 .nid = nvhdmi_master_con_nid_7x,
1707 .rates = SUPPORTED_RATES,
1708 .maxbps = SUPPORTED_MAXBPS,
1709 .formats = SUPPORTED_FORMATS,
1711 .open = simple_playback_pcm_open,
1712 .close = simple_playback_pcm_close,
1713 .prepare = simple_playback_pcm_prepare
1717 static const struct hda_codec_ops nvhdmi_patch_ops_8ch_7x = {
1718 .build_controls = simple_playback_build_controls,
1719 .build_pcms = simple_playback_build_pcms,
1720 .init = nvhdmi_7x_init,
1721 .free = simple_playback_free,
1724 static const struct hda_codec_ops nvhdmi_patch_ops_2ch = {
1725 .build_controls = simple_playback_build_controls,
1726 .build_pcms = simple_playback_build_pcms,
1727 .init = nvhdmi_7x_init,
1728 .free = simple_playback_free,
1731 static int patch_nvhdmi_2ch(struct hda_codec *codec)
1733 struct hdmi_spec *spec;
1735 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1741 spec->multiout.num_dacs = 0; /* no analog */
1742 spec->multiout.max_channels = 2;
1743 spec->multiout.dig_out_nid = nvhdmi_master_con_nid_7x;
1745 spec->cvts[0].cvt_nid = nvhdmi_master_con_nid_7x;
1746 spec->pcm_playback = &nvhdmi_pcm_playback_2ch;
1748 codec->patch_ops = nvhdmi_patch_ops_2ch;
1753 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
1755 struct hdmi_spec *spec;
1756 int err = patch_nvhdmi_2ch(codec);
1761 spec->multiout.max_channels = 8;
1762 spec->pcm_playback = &nvhdmi_pcm_playback_8ch_7x;
1763 codec->patch_ops = nvhdmi_patch_ops_8ch_7x;
1765 /* Initialize the audio infoframe channel mask and checksum to something
1767 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1773 * ATI-specific implementations
1775 * FIXME: we may omit the whole this and use the generic code once after
1776 * it's confirmed to work.
1779 #define ATIHDMI_CVT_NID 0x02 /* audio converter */
1780 #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
1782 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1783 struct hda_codec *codec,
1784 unsigned int stream_tag,
1785 unsigned int format,
1786 struct snd_pcm_substream *substream)
1788 struct hdmi_spec *spec = codec->spec;
1789 int chans = substream->runtime->channels;
1792 err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
1796 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
1797 AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
1799 for (i = 0; i < chans; i++) {
1800 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
1801 AC_VERB_SET_HDMI_CHAN_SLOT,
1807 static const struct hda_pcm_stream atihdmi_pcm_digital_playback = {
1811 .nid = ATIHDMI_CVT_NID,
1813 .open = simple_playback_pcm_open,
1814 .close = simple_playback_pcm_close,
1815 .prepare = atihdmi_playback_pcm_prepare
1819 static const struct hda_verb atihdmi_basic_init[] = {
1820 /* enable digital output on pin widget */
1821 { 0x03, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },
1825 static int atihdmi_init(struct hda_codec *codec)
1827 struct hdmi_spec *spec = codec->spec;
1829 snd_hda_sequence_write(codec, atihdmi_basic_init);
1830 /* SI codec requires to unmute the pin */
1831 if (get_wcaps(codec, spec->pins[0].pin_nid) & AC_WCAP_OUT_AMP)
1832 snd_hda_codec_write(codec, spec->pins[0].pin_nid, 0,
1833 AC_VERB_SET_AMP_GAIN_MUTE,
1838 static const struct hda_codec_ops atihdmi_patch_ops = {
1839 .build_controls = simple_playback_build_controls,
1840 .build_pcms = simple_playback_build_pcms,
1841 .init = atihdmi_init,
1842 .free = simple_playback_free,
1846 static int patch_atihdmi(struct hda_codec *codec)
1848 struct hdmi_spec *spec;
1850 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1856 spec->multiout.num_dacs = 0; /* no analog */
1857 spec->multiout.max_channels = 2;
1858 spec->multiout.dig_out_nid = ATIHDMI_CVT_NID;
1860 spec->cvts[0].cvt_nid = ATIHDMI_CVT_NID;
1861 spec->pins[0].pin_nid = ATIHDMI_PIN_NID;
1862 spec->pcm_playback = &atihdmi_pcm_digital_playback;
1864 codec->patch_ops = atihdmi_patch_ops;
1873 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
1874 { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
1875 { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
1876 { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
1877 { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
1878 { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
1879 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
1880 { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
1881 { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
1882 { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
1883 { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
1884 { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
1885 { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
1886 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
1887 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
1888 { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
1889 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
1890 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
1891 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
1892 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
1893 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
1894 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
1895 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
1896 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
1897 /* 17 is known to be absent */
1898 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
1899 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
1900 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
1901 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
1902 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
1903 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
1904 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
1905 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
1906 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
1907 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
1908 { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
1909 { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
1910 { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
1911 { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
1912 { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
1913 { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
1914 { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
1915 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
1916 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
1917 { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
1921 MODULE_ALIAS("snd-hda-codec-id:1002793c");
1922 MODULE_ALIAS("snd-hda-codec-id:10027919");
1923 MODULE_ALIAS("snd-hda-codec-id:1002791a");
1924 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
1925 MODULE_ALIAS("snd-hda-codec-id:10951390");
1926 MODULE_ALIAS("snd-hda-codec-id:10951392");
1927 MODULE_ALIAS("snd-hda-codec-id:10de0002");
1928 MODULE_ALIAS("snd-hda-codec-id:10de0003");
1929 MODULE_ALIAS("snd-hda-codec-id:10de0005");
1930 MODULE_ALIAS("snd-hda-codec-id:10de0006");
1931 MODULE_ALIAS("snd-hda-codec-id:10de0007");
1932 MODULE_ALIAS("snd-hda-codec-id:10de000a");
1933 MODULE_ALIAS("snd-hda-codec-id:10de000b");
1934 MODULE_ALIAS("snd-hda-codec-id:10de000c");
1935 MODULE_ALIAS("snd-hda-codec-id:10de000d");
1936 MODULE_ALIAS("snd-hda-codec-id:10de0010");
1937 MODULE_ALIAS("snd-hda-codec-id:10de0011");
1938 MODULE_ALIAS("snd-hda-codec-id:10de0012");
1939 MODULE_ALIAS("snd-hda-codec-id:10de0013");
1940 MODULE_ALIAS("snd-hda-codec-id:10de0014");
1941 MODULE_ALIAS("snd-hda-codec-id:10de0015");
1942 MODULE_ALIAS("snd-hda-codec-id:10de0016");
1943 MODULE_ALIAS("snd-hda-codec-id:10de0018");
1944 MODULE_ALIAS("snd-hda-codec-id:10de0019");
1945 MODULE_ALIAS("snd-hda-codec-id:10de001a");
1946 MODULE_ALIAS("snd-hda-codec-id:10de001b");
1947 MODULE_ALIAS("snd-hda-codec-id:10de001c");
1948 MODULE_ALIAS("snd-hda-codec-id:10de0040");
1949 MODULE_ALIAS("snd-hda-codec-id:10de0041");
1950 MODULE_ALIAS("snd-hda-codec-id:10de0042");
1951 MODULE_ALIAS("snd-hda-codec-id:10de0043");
1952 MODULE_ALIAS("snd-hda-codec-id:10de0044");
1953 MODULE_ALIAS("snd-hda-codec-id:10de0067");
1954 MODULE_ALIAS("snd-hda-codec-id:10de8001");
1955 MODULE_ALIAS("snd-hda-codec-id:17e80047");
1956 MODULE_ALIAS("snd-hda-codec-id:80860054");
1957 MODULE_ALIAS("snd-hda-codec-id:80862801");
1958 MODULE_ALIAS("snd-hda-codec-id:80862802");
1959 MODULE_ALIAS("snd-hda-codec-id:80862803");
1960 MODULE_ALIAS("snd-hda-codec-id:80862804");
1961 MODULE_ALIAS("snd-hda-codec-id:80862805");
1962 MODULE_ALIAS("snd-hda-codec-id:80862806");
1963 MODULE_ALIAS("snd-hda-codec-id:808629fb");
1965 MODULE_LICENSE("GPL");
1966 MODULE_DESCRIPTION("HDMI HD-audio codec");
1967 MODULE_ALIAS("snd-hda-codec-intelhdmi");
1968 MODULE_ALIAS("snd-hda-codec-nvhdmi");
1969 MODULE_ALIAS("snd-hda-codec-atihdmi");
1971 static struct hda_codec_preset_list intel_list = {
1972 .preset = snd_hda_preset_hdmi,
1973 .owner = THIS_MODULE,
1976 static int __init patch_hdmi_init(void)
1978 return snd_hda_add_codec_preset(&intel_list);
1981 static void __exit patch_hdmi_exit(void)
1983 snd_hda_delete_codec_preset(&intel_list);
1986 module_init(patch_hdmi_init)
1987 module_exit(patch_hdmi_exit)