sound/pci/hda/patch_hdmi.c

   1 /*
   2  *
   3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   4  *
   5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   6  *  Copyright (c) 2006 ATI Technologies Inc.
   7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
   9  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  10  *
  11  *  Authors:
  12  *                      Wu Fengguang <wfg@linux.intel.com>
  13  *
  14  *  Maintained by:
  15  *                      Wu Fengguang <wfg@linux.intel.com>
  16  *
  17  *  This program is free software; you can redistribute it and/or modify it
  18  *  under the terms of the GNU General Public License as published by the Free
  19  *  Software Foundation; either version 2 of the License, or (at your option)
  20  *  any later version.
  21  *
  22  *  This program is distributed in the hope that it will be useful, but
  23  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  24  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  25  *  for more details.
  26  *
  27  *  You should have received a copy of the GNU General Public License
  28  *  along with this program; if not, write to the Free Software Foundation,
  29  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  30  */
  31
  32 #include <linux/init.h>
  33 #include <linux/delay.h>
  34 #include <linux/slab.h>
  35 #include <linux/module.h>
  36 #include <sound/core.h>
  37 #include <sound/jack.h>
  38 #include <sound/asoundef.h>
  39 #include <sound/tlv.h>
  40 #include <sound/hdaudio.h>
  41 #include <sound/hda_i915.h>
  42 #include <sound/hda_chmap.h>
  43 #include "hda_codec.h"
  44 #include "hda_local.h"
  45 #include "hda_jack.h"
  46
  47 static bool static_hdmi_pcm;
  48 module_param(static_hdmi_pcm, bool, 0644);
  49 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  50
  51 #define is_haswell(codec)  ((codec)->core.vendor_id == 0x80862807)
  52 #define is_broadwell(codec)    ((codec)->core.vendor_id == 0x80862808)
  53 #define is_skylake(codec) ((codec)->core.vendor_id == 0x80862809)
  54 #define is_broxton(codec) ((codec)->core.vendor_id == 0x8086280a)
  55 #define is_kabylake(codec) ((codec)->core.vendor_id == 0x8086280b)
  56 #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec) \
  57                                 || is_skylake(codec) || is_broxton(codec) \
  58                                 || is_kabylake(codec))
  59
  60 #define is_valleyview(codec) ((codec)->core.vendor_id == 0x80862882)
  61 #define is_cherryview(codec) ((codec)->core.vendor_id == 0x80862883)
  62 #define is_valleyview_plus(codec) (is_valleyview(codec) || is_cherryview(codec))
  63
  64 struct hdmi_spec_per_cvt {
  65         hda_nid_t cvt_nid;
  66         int assigned;
  67         unsigned int channels_min;
  68         unsigned int channels_max;
  69         u32 rates;
  70         u64 formats;
  71         unsigned int maxbps;
  72 };
  73
  74 /* max. connections to a widget */
  75 #define HDA_MAX_CONNECTIONS     32
  76
  77 struct hdmi_spec_per_pin {
  78         hda_nid_t pin_nid;
  79         int dev_id;
  80         /* pin idx, different device entries on the same pin use the same idx */
  81         int pin_nid_idx;
  82         int num_mux_nids;
  83         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  84         int mux_idx;
  85         hda_nid_t cvt_nid;
  86
  87         struct hda_codec *codec;
  88         struct hdmi_eld sink_eld;
  89         struct mutex lock;
  90         struct delayed_work work;
  91         struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
  92         int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
  93         int repoll_count;
  94         bool setup; /* the stream has been set up by prepare callback */
  95         int channels; /* current number of channels */
  96         bool non_pcm;
  97         bool chmap_set;         /* channel-map override by ALSA API? */
  98         unsigned char chmap[8]; /* ALSA API channel-map */
  99 #ifdef CONFIG_SND_PROC_FS
 100         struct snd_info_entry *proc_entry;
 101 #endif
 102 };
 103
 104 /* operations used by generic code that can be overridden by patches */
 105 struct hdmi_ops {
 106         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
 107                            unsigned char *buf, int *eld_size);
 108
 109         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
 110                                     int ca, int active_channels, int conn_type);
 111
 112         /* enable/disable HBR (HD passthrough) */
 113         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
 114
 115         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
 116                             hda_nid_t pin_nid, u32 stream_tag, int format);
 117
 118         void (*pin_cvt_fixup)(struct hda_codec *codec,
 119                               struct hdmi_spec_per_pin *per_pin,
 120                               hda_nid_t cvt_nid);
 121 };
 122
 123 struct hdmi_pcm {
 124         struct hda_pcm *pcm;
 125         struct snd_jack *jack;
 126         struct snd_kcontrol *eld_ctl;
 127 };
 128
 129 struct hdmi_spec {
 130         int num_cvts;
 131         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 132         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 133
 134         /*
 135          * num_pins is the number of virtual pins
 136          * for example, there are 3 pins, and each pin
 137          * has 4 device entries, then the num_pins is 12
 138          */
 139         int num_pins;
 140         /*
 141          * num_nids is the number of real pins
 142          * In the above example, num_nids is 3
 143          */
 144         int num_nids;
 145         /*
 146          * dev_num is the number of device entries
 147          * on each pin.
 148          * In the above example, dev_num is 4
 149          */
 150         int dev_num;
 151         struct snd_array pins; /* struct hdmi_spec_per_pin */
 152         struct hdmi_pcm pcm_rec[16];
 153         struct mutex pcm_lock;
 154         /* pcm_bitmap means which pcms have been assigned to pins*/
 155         unsigned long pcm_bitmap;
 156         int pcm_used;   /* counter of pcm_rec[] */
 157         /* bitmap shows whether the pcm is opened in user space
 158          * bit 0 means the first playback PCM (PCM3);
 159          * bit 1 means the second playback PCM, and so on.
 160          */
 161         unsigned long pcm_in_use;
 162
 163         struct hdmi_eld temp_eld;
 164         struct hdmi_ops ops;
 165
 166         bool dyn_pin_out;
 167         bool dyn_pcm_assign;
 168         /*
 169          * Non-generic VIA/NVIDIA specific
 170          */
 171         struct hda_multi_out multiout;
 172         struct hda_pcm_stream pcm_playback;
 173
 174         /* i915/powerwell (Haswell+/Valleyview+) specific */
 175         bool use_acomp_notifier; /* use i915 eld_notify callback for hotplug */
 176         struct i915_audio_component_audio_ops i915_audio_ops;
 177
 178         struct hdac_chmap chmap;
 179         hda_nid_t vendor_nid;
 180 };
 181
 182 #ifdef CONFIG_SND_HDA_I915
 183 static inline bool codec_has_acomp(struct hda_codec *codec)
 184 {
 185         struct hdmi_spec *spec = codec->spec;
 186         return spec->use_acomp_notifier;
 187 }
 188 #else
 189 #define codec_has_acomp(codec)  false
 190 #endif
 191
 192 struct hdmi_audio_infoframe {
 193         u8 type; /* 0x84 */
 194         u8 ver;  /* 0x01 */
 195         u8 len;  /* 0x0a */
 196
 197         u8 checksum;
 198
 199         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 200         u8 SS01_SF24;
 201         u8 CXT04;
 202         u8 CA;
 203         u8 LFEPBL01_LSV36_DM_INH7;
 204 };
 205
 206 struct dp_audio_infoframe {
 207         u8 type; /* 0x84 */
 208         u8 len;  /* 0x1b */
 209         u8 ver;  /* 0x11 << 2 */
 210
 211         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 212         u8 SS01_SF24;
 213         u8 CXT04;
 214         u8 CA;
 215         u8 LFEPBL01_LSV36_DM_INH7;
 216 };
 217
 218 union audio_infoframe {
 219         struct hdmi_audio_infoframe hdmi;
 220         struct dp_audio_infoframe dp;
 221         u8 bytes[0];
 222 };
 223
 224 /*
 225  * HDMI routines
 226  */
 227
 228 #define get_pin(spec, idx) \
 229         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 230 #define get_cvt(spec, idx) \
 231         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 232 /* obtain hdmi_pcm object assigned to idx */
 233 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
 234 /* obtain hda_pcm object assigned to idx */
 235 #define get_pcm_rec(spec, idx)  (get_hdmi_pcm(spec, idx)->pcm)
 236
 237 static int pin_id_to_pin_index(struct hda_codec *codec,
 238                                hda_nid_t pin_nid, int dev_id)
 239 {
 240         struct hdmi_spec *spec = codec->spec;
 241         int pin_idx;
 242         struct hdmi_spec_per_pin *per_pin;
 243
 244         /*
 245          * (dev_id == -1) means it is NON-MST pin
 246          * return the first virtual pin on this port
 247          */
 248         if (dev_id == -1)
 249                 dev_id = 0;
 250
 251         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 252                 per_pin = get_pin(spec, pin_idx);
 253                 if ((per_pin->pin_nid == pin_nid) &&
 254                         (per_pin->dev_id == dev_id))
 255                         return pin_idx;
 256         }
 257
 258         codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
 259         return -EINVAL;
 260 }
 261
 262 static int hinfo_to_pcm_index(struct hda_codec *codec,
 263                         struct hda_pcm_stream *hinfo)
 264 {
 265         struct hdmi_spec *spec = codec->spec;
 266         int pcm_idx;
 267
 268         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
 269                 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
 270                         return pcm_idx;
 271
 272         codec_warn(codec, "HDMI: hinfo %p not registered\n", hinfo);
 273         return -EINVAL;
 274 }
 275
 276 static int hinfo_to_pin_index(struct hda_codec *codec,
 277                               struct hda_pcm_stream *hinfo)
 278 {
 279         struct hdmi_spec *spec = codec->spec;
 280         struct hdmi_spec_per_pin *per_pin;
 281         int pin_idx;
 282
 283         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 284                 per_pin = get_pin(spec, pin_idx);
 285                 if (per_pin->pcm &&
 286                         per_pin->pcm->pcm->stream == hinfo)
 287                         return pin_idx;
 288         }
 289
 290         codec_dbg(codec, "HDMI: hinfo %p not registered\n", hinfo);
 291         return -EINVAL;
 292 }
 293
 294 static struct hdmi_spec_per_pin *pcm_idx_to_pin(struct hdmi_spec *spec,
 295                                                 int pcm_idx)
 296 {
 297         int i;
 298         struct hdmi_spec_per_pin *per_pin;
 299
 300         for (i = 0; i < spec->num_pins; i++) {
 301                 per_pin = get_pin(spec, i);
 302                 if (per_pin->pcm_idx == pcm_idx)
 303                         return per_pin;
 304         }
 305         return NULL;
 306 }
 307
 308 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
 309 {
 310         struct hdmi_spec *spec = codec->spec;
 311         int cvt_idx;
 312
 313         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 314                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 315                         return cvt_idx;
 316
 317         codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
 318         return -EINVAL;
 319 }
 320
 321 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 322                         struct snd_ctl_elem_info *uinfo)
 323 {
 324         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 325         struct hdmi_spec *spec = codec->spec;
 326         struct hdmi_spec_per_pin *per_pin;
 327         struct hdmi_eld *eld;
 328         int pcm_idx;
 329
 330         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 331
 332         pcm_idx = kcontrol->private_value;
 333         mutex_lock(&spec->pcm_lock);
 334         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 335         if (!per_pin) {
 336                 /* no pin is bound to the pcm */
 337                 uinfo->count = 0;
 338                 mutex_unlock(&spec->pcm_lock);
 339                 return 0;
 340         }
 341         eld = &per_pin->sink_eld;
 342         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 343         mutex_unlock(&spec->pcm_lock);
 344
 345         return 0;
 346 }
 347
 348 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 349                         struct snd_ctl_elem_value *ucontrol)
 350 {
 351         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 352         struct hdmi_spec *spec = codec->spec;
 353         struct hdmi_spec_per_pin *per_pin;
 354         struct hdmi_eld *eld;
 355         int pcm_idx;
 356
 357         pcm_idx = kcontrol->private_value;
 358         mutex_lock(&spec->pcm_lock);
 359         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 360         if (!per_pin) {
 361                 /* no pin is bound to the pcm */
 362                 memset(ucontrol->value.bytes.data, 0,
 363                        ARRAY_SIZE(ucontrol->value.bytes.data));
 364                 mutex_unlock(&spec->pcm_lock);
 365                 return 0;
 366         }
 367         eld = &per_pin->sink_eld;
 368
 369         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) ||
 370             eld->eld_size > ELD_MAX_SIZE) {
 371                 mutex_unlock(&spec->pcm_lock);
 372                 snd_BUG();
 373                 return -EINVAL;
 374         }
 375
 376         memset(ucontrol->value.bytes.data, 0,
 377                ARRAY_SIZE(ucontrol->value.bytes.data));
 378         if (eld->eld_valid)
 379                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 380                        eld->eld_size);
 381         mutex_unlock(&spec->pcm_lock);
 382
 383         return 0;
 384 }
 385
 386 static const struct snd_kcontrol_new eld_bytes_ctl = {
 387         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 388         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 389         .name = "ELD",
 390         .info = hdmi_eld_ctl_info,
 391         .get = hdmi_eld_ctl_get,
 392 };
 393
 394 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pcm_idx,
 395                         int device)
 396 {
 397         struct snd_kcontrol *kctl;
 398         struct hdmi_spec *spec = codec->spec;
 399         int err;
 400
 401         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 402         if (!kctl)
 403                 return -ENOMEM;
 404         kctl->private_value = pcm_idx;
 405         kctl->id.device = device;
 406
 407         /* no pin nid is associated with the kctl now
 408          * tbd: associate pin nid to eld ctl later
 409          */
 410         err = snd_hda_ctl_add(codec, 0, kctl);
 411         if (err < 0)
 412                 return err;
 413
 414         get_hdmi_pcm(spec, pcm_idx)->eld_ctl = kctl;
 415         return 0;
 416 }
 417
 418 #ifdef BE_PARANOID
 419 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 420                                 int *packet_index, int *byte_index)
 421 {
 422         int val;
 423
 424         val = snd_hda_codec_read(codec, pin_nid, 0,
 425                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 426
 427         *packet_index = val >> 5;
 428         *byte_index = val & 0x1f;
 429 }
 430 #endif
 431
 432 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 433                                 int packet_index, int byte_index)
 434 {
 435         int val;
 436
 437         val = (packet_index << 5) | (byte_index & 0x1f);
 438
 439         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 440 }
 441
 442 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 443                                 unsigned char val)
 444 {
 445         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 446 }
 447
 448 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 449 {
 450         struct hdmi_spec *spec = codec->spec;
 451         int pin_out;
 452
 453         /* Unmute */
 454         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 455                 snd_hda_codec_write(codec, pin_nid, 0,
 456                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 457
 458         if (spec->dyn_pin_out)
 459                 /* Disable pin out until stream is active */
 460                 pin_out = 0;
 461         else
 462                 /* Enable pin out: some machines with GM965 gets broken output
 463                  * when the pin is disabled or changed while using with HDMI
 464                  */
 465                 pin_out = PIN_OUT;
 466
 467         snd_hda_codec_write(codec, pin_nid, 0,
 468                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 469 }
 470
 471 /*
 472  * ELD proc files
 473  */
 474
 475 #ifdef CONFIG_SND_PROC_FS
 476 static void print_eld_info(struct snd_info_entry *entry,
 477                            struct snd_info_buffer *buffer)
 478 {
 479         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 480
 481         mutex_lock(&per_pin->lock);
 482         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 483         mutex_unlock(&per_pin->lock);
 484 }
 485
 486 static void write_eld_info(struct snd_info_entry *entry,
 487                            struct snd_info_buffer *buffer)
 488 {
 489         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 490
 491         mutex_lock(&per_pin->lock);
 492         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 493         mutex_unlock(&per_pin->lock);
 494 }
 495
 496 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 497 {
 498         char name[32];
 499         struct hda_codec *codec = per_pin->codec;
 500         struct snd_info_entry *entry;
 501         int err;
 502
 503         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 504         err = snd_card_proc_new(codec->card, name, &entry);
 505         if (err < 0)
 506                 return err;
 507
 508         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 509         entry->c.text.write = write_eld_info;
 510         entry->mode |= S_IWUSR;
 511         per_pin->proc_entry = entry;
 512
 513         return 0;
 514 }
 515
 516 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 517 {
 518         if (!per_pin->codec->bus->shutdown) {
 519                 snd_info_free_entry(per_pin->proc_entry);
 520                 per_pin->proc_entry = NULL;
 521         }
 522 }
 523 #else
 524 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 525                                int index)
 526 {
 527         return 0;
 528 }
 529 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 530 {
 531 }
 532 #endif
 533
 534 /*
 535  * Audio InfoFrame routines
 536  */
 537
 538 /*
 539  * Enable Audio InfoFrame Transmission
 540  */
 541 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 542                                        hda_nid_t pin_nid)
 543 {
 544         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 545         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 546                                                 AC_DIPXMIT_BEST);
 547 }
 548
 549 /*
 550  * Disable Audio InfoFrame Transmission
 551  */
 552 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 553                                       hda_nid_t pin_nid)
 554 {
 555         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 556         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 557                                                 AC_DIPXMIT_DISABLE);
 558 }
 559
 560 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 561 {
 562 #ifdef CONFIG_SND_DEBUG_VERBOSE
 563         int i;
 564         int size;
 565
 566         size = snd_hdmi_get_eld_size(codec, pin_nid);
 567         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
 568
 569         for (i = 0; i < 8; i++) {
 570                 size = snd_hda_codec_read(codec, pin_nid, 0,
 571                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 572                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 573         }
 574 #endif
 575 }
 576
 577 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 578 {
 579 #ifdef BE_PARANOID
 580         int i, j;
 581         int size;
 582         int pi, bi;
 583         for (i = 0; i < 8; i++) {
 584                 size = snd_hda_codec_read(codec, pin_nid, 0,
 585                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 586                 if (size == 0)
 587                         continue;
 588
 589                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 590                 for (j = 1; j < 1000; j++) {
 591                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 592                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 593                         if (pi != i)
 594                                 codec_dbg(codec, "dip index %d: %d != %d\n",
 595                                                 bi, pi, i);
 596                         if (bi == 0) /* byte index wrapped around */
 597                                 break;
 598                 }
 599                 codec_dbg(codec,
 600                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
 601                         i, size, j);
 602         }
 603 #endif
 604 }
 605
 606 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
 607 {
 608         u8 *bytes = (u8 *)hdmi_ai;
 609         u8 sum = 0;
 610         int i;
 611
 612         hdmi_ai->checksum = 0;
 613
 614         for (i = 0; i < sizeof(*hdmi_ai); i++)
 615                 sum += bytes[i];
 616
 617         hdmi_ai->checksum = -sum;
 618 }
 619
 620 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
 621                                       hda_nid_t pin_nid,
 622                                       u8 *dip, int size)
 623 {
 624         int i;
 625
 626         hdmi_debug_dip_size(codec, pin_nid);
 627         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
 628
 629         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 630         for (i = 0; i < size; i++)
 631                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
 632 }
 633
 634 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
 635                                     u8 *dip, int size)
 636 {
 637         u8 val;
 638         int i;
 639
 640         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
 641                                                             != AC_DIPXMIT_BEST)
 642                 return false;
 643
 644         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 645         for (i = 0; i < size; i++) {
 646                 val = snd_hda_codec_read(codec, pin_nid, 0,
 647                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
 648                 if (val != dip[i])
 649                         return false;
 650         }
 651
 652         return true;
 653 }
 654
 655 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
 656                                      hda_nid_t pin_nid,
 657                                      int ca, int active_channels,
 658                                      int conn_type)
 659 {
 660         union audio_infoframe ai;
 661
 662         memset(&ai, 0, sizeof(ai));
 663         if (conn_type == 0) { /* HDMI */
 664                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
 665
 666                 hdmi_ai->type           = 0x84;
 667                 hdmi_ai->ver            = 0x01;
 668                 hdmi_ai->len            = 0x0a;
 669                 hdmi_ai->CC02_CT47      = active_channels - 1;
 670                 hdmi_ai->CA             = ca;
 671                 hdmi_checksum_audio_infoframe(hdmi_ai);
 672         } else if (conn_type == 1) { /* DisplayPort */
 673                 struct dp_audio_infoframe *dp_ai = &ai.dp;
 674
 675                 dp_ai->type             = 0x84;
 676                 dp_ai->len              = 0x1b;
 677                 dp_ai->ver              = 0x11 << 2;
 678                 dp_ai->CC02_CT47        = active_channels - 1;
 679                 dp_ai->CA               = ca;
 680         } else {
 681                 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
 682                             pin_nid);
 683                 return;
 684         }
 685
 686         /*
 687          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
 688          * sizeof(*dp_ai) to avoid partial match/update problems when
 689          * the user switches between HDMI/DP monitors.
 690          */
 691         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
 692                                         sizeof(ai))) {
 693                 codec_dbg(codec,
 694                           "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
 695                             pin_nid,
 696                             active_channels, ca);
 697                 hdmi_stop_infoframe_trans(codec, pin_nid);
 698                 hdmi_fill_audio_infoframe(codec, pin_nid,
 699                                             ai.bytes, sizeof(ai));
 700                 hdmi_start_infoframe_trans(codec, pin_nid);
 701         }
 702 }
 703
 704 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
 705                                        struct hdmi_spec_per_pin *per_pin,
 706                                        bool non_pcm)
 707 {
 708         struct hdmi_spec *spec = codec->spec;
 709         struct hdac_chmap *chmap = &spec->chmap;
 710         hda_nid_t pin_nid = per_pin->pin_nid;
 711         int channels = per_pin->channels;
 712         int active_channels;
 713         struct hdmi_eld *eld;
 714         int ca;
 715
 716         if (!channels)
 717                 return;
 718
 719         /* some HW (e.g. HSW+) needs reprogramming the amp at each time */
 720         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 721                 snd_hda_codec_write(codec, pin_nid, 0,
 722                                             AC_VERB_SET_AMP_GAIN_MUTE,
 723                                             AMP_OUT_UNMUTE);
 724
 725         eld = &per_pin->sink_eld;
 726
 727         ca = snd_hdac_channel_allocation(&codec->core,
 728                         eld->info.spk_alloc, channels,
 729                         per_pin->chmap_set, non_pcm, per_pin->chmap);
 730
 731         active_channels = snd_hdac_get_active_channels(ca);
 732
 733         chmap->ops.set_channel_count(&codec->core, per_pin->cvt_nid,
 734                                                 active_channels);
 735
 736         /*
 737          * always configure channel mapping, it may have been changed by the
 738          * user in the meantime
 739          */
 740         snd_hdac_setup_channel_mapping(&spec->chmap,
 741                                 pin_nid, non_pcm, ca, channels,
 742                                 per_pin->chmap, per_pin->chmap_set);
 743
 744         spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
 745                                       eld->info.conn_type);
 746
 747         per_pin->non_pcm = non_pcm;
 748 }
 749
 750 /*
 751  * Unsolicited events
 752  */
 753
 754 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
 755
 756 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid,
 757                                       int dev_id)
 758 {
 759         struct hdmi_spec *spec = codec->spec;
 760         int pin_idx = pin_id_to_pin_index(codec, nid, dev_id);
 761
 762         if (pin_idx < 0)
 763                 return;
 764         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
 765                 snd_hda_jack_report_sync(codec);
 766 }
 767
 768 static void jack_callback(struct hda_codec *codec,
 769                           struct hda_jack_callback *jack)
 770 {
 771         /* hda_jack don't support DP MST */
 772         check_presence_and_report(codec, jack->nid, 0);
 773 }
 774
 775 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
 776 {
 777         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 778         struct hda_jack_tbl *jack;
 779         int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
 780
 781         /*
 782          * assume DP MST uses dyn_pcm_assign and acomp and
 783          * never comes here
 784          * if DP MST supports unsol event, below code need
 785          * consider dev_entry
 786          */
 787         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
 788         if (!jack)
 789                 return;
 790         jack->jack_dirty = 1;
 791
 792         codec_dbg(codec,
 793                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
 794                 codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
 795                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
 796
 797         /* hda_jack don't support DP MST */
 798         check_presence_and_report(codec, jack->nid, 0);
 799 }
 800
 801 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
 802 {
 803         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 804         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 805         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
 806         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
 807
 808         codec_info(codec,
 809                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
 810                 codec->addr,
 811                 tag,
 812                 subtag,
 813                 cp_state,
 814                 cp_ready);
 815
 816         /* TODO */
 817         if (cp_state)
 818                 ;
 819         if (cp_ready)
 820                 ;
 821 }
 822
 823
 824 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
 825 {
 826         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 827         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 828
 829         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
 830                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
 831                 return;
 832         }
 833
 834         if (subtag == 0)
 835                 hdmi_intrinsic_event(codec, res);
 836         else
 837                 hdmi_non_intrinsic_event(codec, res);
 838 }
 839
 840 static void haswell_verify_D0(struct hda_codec *codec,
 841                 hda_nid_t cvt_nid, hda_nid_t nid)
 842 {
 843         int pwr;
 844
 845         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
 846          * thus pins could only choose converter 0 for use. Make sure the
 847          * converters are in correct power state */
 848         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
 849                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
 850
 851         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
 852                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
 853                                     AC_PWRST_D0);
 854                 msleep(40);
 855                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
 856                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
 857                 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
 858         }
 859 }
 860
 861 /*
 862  * Callbacks
 863  */
 864
 865 /* HBR should be Non-PCM, 8 channels */
 866 #define is_hbr_format(format) \
 867         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
 868
 869 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
 870                               bool hbr)
 871 {
 872         int pinctl, new_pinctl;
 873
 874         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
 875                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
 876                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
 877
 878                 if (pinctl < 0)
 879                         return hbr ? -EINVAL : 0;
 880
 881                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
 882                 if (hbr)
 883                         new_pinctl |= AC_PINCTL_EPT_HBR;
 884                 else
 885                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
 886
 887                 codec_dbg(codec,
 888                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
 889                             pin_nid,
 890                             pinctl == new_pinctl ? "" : "new-",
 891                             new_pinctl);
 892
 893                 if (pinctl != new_pinctl)
 894                         snd_hda_codec_write(codec, pin_nid, 0,
 895                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
 896                                             new_pinctl);
 897         } else if (hbr)
 898                 return -EINVAL;
 899
 900         return 0;
 901 }
 902
 903 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
 904                               hda_nid_t pin_nid, u32 stream_tag, int format)
 905 {
 906         struct hdmi_spec *spec = codec->spec;
 907         int err;
 908
 909         err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
 910
 911         if (err) {
 912                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
 913                 return err;
 914         }
 915
 916         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
 917         return 0;
 918 }
 919
 920 /* Try to find an available converter
 921  * If pin_idx is less then zero, just try to find an available converter.
 922  * Otherwise, try to find an available converter and get the cvt mux index
 923  * of the pin.
 924  */
 925 static int hdmi_choose_cvt(struct hda_codec *codec,
 926                            int pin_idx, int *cvt_id)
 927 {
 928         struct hdmi_spec *spec = codec->spec;
 929         struct hdmi_spec_per_pin *per_pin;
 930         struct hdmi_spec_per_cvt *per_cvt = NULL;
 931         int cvt_idx, mux_idx = 0;
 932
 933         /* pin_idx < 0 means no pin will be bound to the converter */
 934         if (pin_idx < 0)
 935                 per_pin = NULL;
 936         else
 937                 per_pin = get_pin(spec, pin_idx);
 938
 939         /* Dynamically assign converter to stream */
 940         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
 941                 per_cvt = get_cvt(spec, cvt_idx);
 942
 943                 /* Must not already be assigned */
 944                 if (per_cvt->assigned)
 945                         continue;
 946                 if (per_pin == NULL)
 947                         break;
 948                 /* Must be in pin's mux's list of converters */
 949                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
 950                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
 951                                 break;
 952                 /* Not in mux list */
 953                 if (mux_idx == per_pin->num_mux_nids)
 954                         continue;
 955                 break;
 956         }
 957
 958         /* No free converters */
 959         if (cvt_idx == spec->num_cvts)
 960                 return -EBUSY;
 961
 962         if (per_pin != NULL)
 963                 per_pin->mux_idx = mux_idx;
 964
 965         if (cvt_id)
 966                 *cvt_id = cvt_idx;
 967
 968         return 0;
 969 }
 970
 971 /* Assure the pin select the right convetor */
 972 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
 973                         struct hdmi_spec_per_pin *per_pin)
 974 {
 975         hda_nid_t pin_nid = per_pin->pin_nid;
 976         int mux_idx, curr;
 977
 978         mux_idx = per_pin->mux_idx;
 979         curr = snd_hda_codec_read(codec, pin_nid, 0,
 980                                           AC_VERB_GET_CONNECT_SEL, 0);
 981         if (curr != mux_idx)
 982                 snd_hda_codec_write_cache(codec, pin_nid, 0,
 983                                             AC_VERB_SET_CONNECT_SEL,
 984                                             mux_idx);
 985 }
 986
 987 /* get the mux index for the converter of the pins
 988  * converter's mux index is the same for all pins on Intel platform
 989  */
 990 static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
 991                         hda_nid_t cvt_nid)
 992 {
 993         int i;
 994
 995         for (i = 0; i < spec->num_cvts; i++)
 996                 if (spec->cvt_nids[i] == cvt_nid)
 997                         return i;
 998         return -EINVAL;
 999 }
1000
1001 /* Intel HDMI workaround to fix audio routing issue:
1002  * For some Intel display codecs, pins share the same connection list.
1003  * So a conveter can be selected by multiple pins and playback on any of these
1004  * pins will generate sound on the external display, because audio flows from
1005  * the same converter to the display pipeline. Also muting one pin may make
1006  * other pins have no sound output.
1007  * So this function assures that an assigned converter for a pin is not selected
1008  * by any other pins.
1009  */
1010 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1011                                          hda_nid_t pin_nid,
1012                                          int dev_id, int mux_idx)
1013 {
1014         struct hdmi_spec *spec = codec->spec;
1015         hda_nid_t nid;
1016         int cvt_idx, curr;
1017         struct hdmi_spec_per_cvt *per_cvt;
1018         struct hdmi_spec_per_pin *per_pin;
1019         int pin_idx;
1020
1021         /* configure the pins connections */
1022         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1023                 int dev_id_saved;
1024                 int dev_num;
1025
1026                 per_pin = get_pin(spec, pin_idx);
1027                 /*
1028                  * pin not connected to monitor
1029                  * no need to operate on it
1030                  */
1031                 if (!per_pin->pcm)
1032                         continue;
1033
1034                 if ((per_pin->pin_nid == pin_nid) &&
1035                         (per_pin->dev_id == dev_id))
1036                         continue;
1037
1038                 /*
1039                  * if per_pin->dev_id >= dev_num,
1040                  * snd_hda_get_dev_select() will fail,
1041                  * and the following operation is unpredictable.
1042                  * So skip this situation.
1043                  */
1044                 dev_num = snd_hda_get_num_devices(codec, per_pin->pin_nid) + 1;
1045                 if (per_pin->dev_id >= dev_num)
1046                         continue;
1047
1048                 nid = per_pin->pin_nid;
1049
1050                 /*
1051                  * Calling this function should not impact
1052                  * on the device entry selection
1053                  * So let's save the dev id for each pin,
1054                  * and restore it when return
1055                  */
1056                 dev_id_saved = snd_hda_get_dev_select(codec, nid);
1057                 snd_hda_set_dev_select(codec, nid, per_pin->dev_id);
1058                 curr = snd_hda_codec_read(codec, nid, 0,
1059                                           AC_VERB_GET_CONNECT_SEL, 0);
1060                 if (curr != mux_idx) {
1061                         snd_hda_set_dev_select(codec, nid, dev_id_saved);
1062                         continue;
1063                 }
1064
1065
1066                 /* choose an unassigned converter. The conveters in the
1067                  * connection list are in the same order as in the codec.
1068                  */
1069                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1070                         per_cvt = get_cvt(spec, cvt_idx);
1071                         if (!per_cvt->assigned) {
1072                                 codec_dbg(codec,
1073                                           "choose cvt %d for pin nid %d\n",
1074                                         cvt_idx, nid);
1075                                 snd_hda_codec_write_cache(codec, nid, 0,
1076                                             AC_VERB_SET_CONNECT_SEL,
1077                                             cvt_idx);
1078                                 break;
1079                         }
1080                 }
1081                 snd_hda_set_dev_select(codec, nid, dev_id_saved);
1082         }
1083 }
1084
1085 /* A wrapper of intel_not_share_asigned_cvt() */
1086 static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1087                         hda_nid_t pin_nid, int dev_id, hda_nid_t cvt_nid)
1088 {
1089         int mux_idx;
1090         struct hdmi_spec *spec = codec->spec;
1091
1092         /* On Intel platform, the mapping of converter nid to
1093          * mux index of the pins are always the same.
1094          * The pin nid may be 0, this means all pins will not
1095          * share the converter.
1096          */
1097         mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1098         if (mux_idx >= 0)
1099                 intel_not_share_assigned_cvt(codec, pin_nid, dev_id, mux_idx);
1100 }
1101
1102 /* skeleton caller of pin_cvt_fixup ops */
1103 static void pin_cvt_fixup(struct hda_codec *codec,
1104                           struct hdmi_spec_per_pin *per_pin,
1105                           hda_nid_t cvt_nid)
1106 {
1107         struct hdmi_spec *spec = codec->spec;
1108
1109         if (spec->ops.pin_cvt_fixup)
1110                 spec->ops.pin_cvt_fixup(codec, per_pin, cvt_nid);
1111 }
1112
1113 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1114  * in dyn_pcm_assign mode.
1115  */
1116 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1117                          struct hda_codec *codec,
1118                          struct snd_pcm_substream *substream)
1119 {
1120         struct hdmi_spec *spec = codec->spec;
1121         struct snd_pcm_runtime *runtime = substream->runtime;
1122         int cvt_idx, pcm_idx;
1123         struct hdmi_spec_per_cvt *per_cvt = NULL;
1124         int err;
1125
1126         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1127         if (pcm_idx < 0)
1128                 return -EINVAL;
1129
1130         err = hdmi_choose_cvt(codec, -1, &cvt_idx);
1131         if (err)
1132                 return err;
1133
1134         per_cvt = get_cvt(spec, cvt_idx);
1135         per_cvt->assigned = 1;
1136         hinfo->nid = per_cvt->cvt_nid;
1137
1138         pin_cvt_fixup(codec, NULL, per_cvt->cvt_nid);
1139
1140         set_bit(pcm_idx, &spec->pcm_in_use);
1141         /* todo: setup spdif ctls assign */
1142
1143         /* Initially set the converter's capabilities */
1144         hinfo->channels_min = per_cvt->channels_min;
1145         hinfo->channels_max = per_cvt->channels_max;
1146         hinfo->rates = per_cvt->rates;
1147         hinfo->formats = per_cvt->formats;
1148         hinfo->maxbps = per_cvt->maxbps;
1149
1150         /* Store the updated parameters */
1151         runtime->hw.channels_min = hinfo->channels_min;
1152         runtime->hw.channels_max = hinfo->channels_max;
1153         runtime->hw.formats = hinfo->formats;
1154         runtime->hw.rates = hinfo->rates;
1155
1156         snd_pcm_hw_constraint_step(substream->runtime, 0,
1157                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1158         return 0;
1159 }
1160
1161 /*
1162  * HDA PCM callbacks
1163  */
1164 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1165                          struct hda_codec *codec,
1166                          struct snd_pcm_substream *substream)
1167 {
1168         struct hdmi_spec *spec = codec->spec;
1169         struct snd_pcm_runtime *runtime = substream->runtime;
1170         int pin_idx, cvt_idx, pcm_idx;
1171         struct hdmi_spec_per_pin *per_pin;
1172         struct hdmi_eld *eld;
1173         struct hdmi_spec_per_cvt *per_cvt = NULL;
1174         int err;
1175
1176         /* Validate hinfo */
1177         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1178         if (pcm_idx < 0)
1179                 return -EINVAL;
1180
1181         mutex_lock(&spec->pcm_lock);
1182         pin_idx = hinfo_to_pin_index(codec, hinfo);
1183         if (!spec->dyn_pcm_assign) {
1184                 if (snd_BUG_ON(pin_idx < 0)) {
1185                         mutex_unlock(&spec->pcm_lock);
1186                         return -EINVAL;
1187                 }
1188         } else {
1189                 /* no pin is assigned to the PCM
1190                  * PA need pcm open successfully when probe
1191                  */
1192                 if (pin_idx < 0) {
1193                         err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1194                         mutex_unlock(&spec->pcm_lock);
1195                         return err;
1196                 }
1197         }
1198
1199         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx);
1200         if (err < 0) {
1201                 mutex_unlock(&spec->pcm_lock);
1202                 return err;
1203         }
1204
1205         per_cvt = get_cvt(spec, cvt_idx);
1206         /* Claim converter */
1207         per_cvt->assigned = 1;
1208
1209         set_bit(pcm_idx, &spec->pcm_in_use);
1210         per_pin = get_pin(spec, pin_idx);
1211         per_pin->cvt_nid = per_cvt->cvt_nid;
1212         hinfo->nid = per_cvt->cvt_nid;
1213
1214         snd_hda_set_dev_select(codec, per_pin->pin_nid, per_pin->dev_id);
1215         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1216                             AC_VERB_SET_CONNECT_SEL,
1217                             per_pin->mux_idx);
1218
1219         /* configure unused pins to choose other converters */
1220         pin_cvt_fixup(codec, per_pin, 0);
1221
1222         snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
1223
1224         /* Initially set the converter's capabilities */
1225         hinfo->channels_min = per_cvt->channels_min;
1226         hinfo->channels_max = per_cvt->channels_max;
1227         hinfo->rates = per_cvt->rates;
1228         hinfo->formats = per_cvt->formats;
1229         hinfo->maxbps = per_cvt->maxbps;
1230
1231         eld = &per_pin->sink_eld;
1232         /* Restrict capabilities by ELD if this isn't disabled */
1233         if (!static_hdmi_pcm && eld->eld_valid) {
1234                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1235                 if (hinfo->channels_min > hinfo->channels_max ||
1236                     !hinfo->rates || !hinfo->formats) {
1237                         per_cvt->assigned = 0;
1238                         hinfo->nid = 0;
1239                         snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1240                         mutex_unlock(&spec->pcm_lock);
1241                         return -ENODEV;
1242                 }
1243         }
1244
1245         mutex_unlock(&spec->pcm_lock);
1246         /* Store the updated parameters */
1247         runtime->hw.channels_min = hinfo->channels_min;
1248         runtime->hw.channels_max = hinfo->channels_max;
1249         runtime->hw.formats = hinfo->formats;
1250         runtime->hw.rates = hinfo->rates;
1251
1252         snd_pcm_hw_constraint_step(substream->runtime, 0,
1253                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1254         return 0;
1255 }
1256
1257 /*
1258  * HDA/HDMI auto parsing
1259  */
1260 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1261 {
1262         struct hdmi_spec *spec = codec->spec;
1263         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1264         hda_nid_t pin_nid = per_pin->pin_nid;
1265
1266         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1267                 codec_warn(codec,
1268                            "HDMI: pin %d wcaps %#x does not support connection list\n",
1269                            pin_nid, get_wcaps(codec, pin_nid));
1270                 return -EINVAL;
1271         }
1272
1273         /* all the device entries on the same pin have the same conn list */
1274         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1275                                                         per_pin->mux_nids,
1276                                                         HDA_MAX_CONNECTIONS);
1277
1278         return 0;
1279 }
1280
1281 static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1282                                 struct hdmi_spec_per_pin *per_pin)
1283 {
1284         int i;
1285
1286         /* try the prefer PCM */
1287         if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1288                 return per_pin->pin_nid_idx;
1289
1290         /* have a second try; check the "reserved area" over num_pins */
1291         for (i = spec->num_nids; i < spec->pcm_used; i++) {
1292                 if (!test_bit(i, &spec->pcm_bitmap))
1293                         return i;
1294         }
1295
1296         /* the last try; check the empty slots in pins */
1297         for (i = 0; i < spec->num_nids; i++) {
1298                 if (!test_bit(i, &spec->pcm_bitmap))
1299                         return i;
1300         }
1301         return -EBUSY;
1302 }
1303
1304 static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1305                                 struct hdmi_spec_per_pin *per_pin)
1306 {
1307         int idx;
1308
1309         /* pcm already be attached to the pin */
1310         if (per_pin->pcm)
1311                 return;
1312         idx = hdmi_find_pcm_slot(spec, per_pin);
1313         if (idx == -EBUSY)
1314                 return;
1315         per_pin->pcm_idx = idx;
1316         per_pin->pcm = get_hdmi_pcm(spec, idx);
1317         set_bit(idx, &spec->pcm_bitmap);
1318 }
1319
1320 static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1321                                 struct hdmi_spec_per_pin *per_pin)
1322 {
1323         int idx;
1324
1325         /* pcm already be detached from the pin */
1326         if (!per_pin->pcm)
1327                 return;
1328         idx = per_pin->pcm_idx;
1329         per_pin->pcm_idx = -1;
1330         per_pin->pcm = NULL;
1331         if (idx >= 0 && idx < spec->pcm_used)
1332                 clear_bit(idx, &spec->pcm_bitmap);
1333 }
1334
1335 static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1336                 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1337 {
1338         int mux_idx;
1339
1340         for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1341                 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1342                         break;
1343         return mux_idx;
1344 }
1345
1346 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1347
1348 static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1349                            struct hdmi_spec_per_pin *per_pin)
1350 {
1351         struct hda_codec *codec = per_pin->codec;
1352         struct hda_pcm *pcm;
1353         struct hda_pcm_stream *hinfo;
1354         struct snd_pcm_substream *substream;
1355         int mux_idx;
1356         bool non_pcm;
1357
1358         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1359                 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
1360         else
1361                 return;
1362         if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1363                 return;
1364
1365         /* hdmi audio only uses playback and one substream */
1366         hinfo = pcm->stream;
1367         substream = pcm->pcm->streams[0].substream;
1368
1369         per_pin->cvt_nid = hinfo->nid;
1370
1371         mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1372         if (mux_idx < per_pin->num_mux_nids) {
1373                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
1374                                    per_pin->dev_id);
1375                 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1376                                 AC_VERB_SET_CONNECT_SEL,
1377                                 mux_idx);
1378         }
1379         snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1380
1381         non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1382         if (substream->runtime)
1383                 per_pin->channels = substream->runtime->channels;
1384         per_pin->setup = true;
1385         per_pin->mux_idx = mux_idx;
1386
1387         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1388 }
1389
1390 static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1391                            struct hdmi_spec_per_pin *per_pin)
1392 {
1393         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1394                 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1395
1396         per_pin->chmap_set = false;
1397         memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1398
1399         per_pin->setup = false;
1400         per_pin->channels = 0;
1401 }
1402
1403 /* update per_pin ELD from the given new ELD;
1404  * setup info frame and notification accordingly
1405  */
1406 static void update_eld(struct hda_codec *codec,
1407                        struct hdmi_spec_per_pin *per_pin,
1408                        struct hdmi_eld *eld)
1409 {
1410         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1411         struct hdmi_spec *spec = codec->spec;
1412         bool old_eld_valid = pin_eld->eld_valid;
1413         bool eld_changed;
1414         int pcm_idx = -1;
1415
1416         /* for monitor disconnection, save pcm_idx firstly */
1417         pcm_idx = per_pin->pcm_idx;
1418         if (spec->dyn_pcm_assign) {
1419                 if (eld->eld_valid) {
1420                         hdmi_attach_hda_pcm(spec, per_pin);
1421                         hdmi_pcm_setup_pin(spec, per_pin);
1422                 } else {
1423                         hdmi_pcm_reset_pin(spec, per_pin);
1424                         hdmi_detach_hda_pcm(spec, per_pin);
1425                 }
1426         }
1427         /* if pcm_idx == -1, it means this is in monitor connection event
1428          * we can get the correct pcm_idx now.
1429          */
1430         if (pcm_idx == -1)
1431                 pcm_idx = per_pin->pcm_idx;
1432
1433         if (eld->eld_valid)
1434                 snd_hdmi_show_eld(codec, &eld->info);
1435
1436         eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1437         if (eld->eld_valid && pin_eld->eld_valid)
1438                 if (pin_eld->eld_size != eld->eld_size ||
1439                     memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1440                            eld->eld_size) != 0)
1441                         eld_changed = true;
1442
1443         pin_eld->monitor_present = eld->monitor_present;
1444         pin_eld->eld_valid = eld->eld_valid;
1445         pin_eld->eld_size = eld->eld_size;
1446         if (eld->eld_valid)
1447                 memcpy(pin_eld->eld_buffer, eld->eld_buffer, eld->eld_size);
1448         pin_eld->info = eld->info;
1449
1450         /*
1451          * Re-setup pin and infoframe. This is needed e.g. when
1452          * - sink is first plugged-in
1453          * - transcoder can change during stream playback on Haswell
1454          *   and this can make HW reset converter selection on a pin.
1455          */
1456         if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1457                 pin_cvt_fixup(codec, per_pin, 0);
1458                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1459         }
1460
1461         if (eld_changed && pcm_idx >= 0)
1462                 snd_ctl_notify(codec->card,
1463                                SNDRV_CTL_EVENT_MASK_VALUE |
1464                                SNDRV_CTL_EVENT_MASK_INFO,
1465                                &get_hdmi_pcm(spec, pcm_idx)->eld_ctl->id);
1466 }
1467
1468 /* update ELD and jack state via HD-audio verbs */
1469 static bool hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1470                                          int repoll)
1471 {
1472         struct hda_jack_tbl *jack;
1473         struct hda_codec *codec = per_pin->codec;
1474         struct hdmi_spec *spec = codec->spec;
1475         struct hdmi_eld *eld = &spec->temp_eld;
1476         hda_nid_t pin_nid = per_pin->pin_nid;
1477         /*
1478          * Always execute a GetPinSense verb here, even when called from
1479          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1480          * response's PD bit is not the real PD value, but indicates that
1481          * the real PD value changed. An older version of the HD-audio
1482          * specification worked this way. Hence, we just ignore the data in
1483          * the unsolicited response to avoid custom WARs.
1484          */
1485         int present;
1486         bool ret;
1487         bool do_repoll = false;
1488
1489         present = snd_hda_pin_sense(codec, pin_nid);
1490
1491         mutex_lock(&per_pin->lock);
1492         eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1493         if (eld->monitor_present)
1494                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1495         else
1496                 eld->eld_valid = false;
1497
1498         codec_dbg(codec,
1499                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1500                 codec->addr, pin_nid, eld->monitor_present, eld->eld_valid);
1501
1502         if (eld->eld_valid) {
1503                 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1504                                                      &eld->eld_size) < 0)
1505                         eld->eld_valid = false;
1506                 else {
1507                         if (snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1508                                                     eld->eld_size) < 0)
1509                                 eld->eld_valid = false;
1510                 }
1511                 if (!eld->eld_valid && repoll)
1512                         do_repoll = true;
1513         }
1514
1515         if (do_repoll)
1516                 schedule_delayed_work(&per_pin->work, msecs_to_jiffies(300));
1517         else
1518                 update_eld(codec, per_pin, eld);
1519
1520         ret = !repoll || !eld->monitor_present || eld->eld_valid;
1521
1522         jack = snd_hda_jack_tbl_get(codec, pin_nid);
1523         if (jack)
1524                 jack->block_report = !ret;
1525
1526         mutex_unlock(&per_pin->lock);
1527         return ret;
1528 }
1529
1530 static struct snd_jack *pin_idx_to_jack(struct hda_codec *codec,
1531                                  struct hdmi_spec_per_pin *per_pin)
1532 {
1533         struct hdmi_spec *spec = codec->spec;
1534         struct snd_jack *jack = NULL;
1535         struct hda_jack_tbl *jack_tbl;
1536
1537         /* if !dyn_pcm_assign, get jack from hda_jack_tbl
1538          * in !dyn_pcm_assign case, spec->pcm_rec[].jack is not
1539          * NULL even after snd_hda_jack_tbl_clear() is called to
1540          * free snd_jack. This may cause access invalid memory
1541          * when calling snd_jack_report
1542          */
1543         if (per_pin->pcm_idx >= 0 && spec->dyn_pcm_assign)
1544                 jack = spec->pcm_rec[per_pin->pcm_idx].jack;
1545         else if (!spec->dyn_pcm_assign) {
1546                 /*
1547                  * jack tbl doesn't support DP MST
1548                  * DP MST will use dyn_pcm_assign,
1549                  * so DP MST will never come here
1550                  */
1551                 jack_tbl = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
1552                 if (jack_tbl)
1553                         jack = jack_tbl->jack;
1554         }
1555         return jack;
1556 }
1557
1558 /* update ELD and jack state via audio component */
1559 static void sync_eld_via_acomp(struct hda_codec *codec,
1560                                struct hdmi_spec_per_pin *per_pin)
1561 {
1562         struct hdmi_spec *spec = codec->spec;
1563         struct hdmi_eld *eld = &spec->temp_eld;
1564         struct snd_jack *jack = NULL;
1565         int size;
1566
1567         mutex_lock(&per_pin->lock);
1568         eld->monitor_present = false;
1569         size = snd_hdac_acomp_get_eld(&codec->core, per_pin->pin_nid,
1570                                       per_pin->dev_id, &eld->monitor_present,
1571                                       eld->eld_buffer, ELD_MAX_SIZE);
1572         if (size > 0) {
1573                 size = min(size, ELD_MAX_SIZE);
1574                 if (snd_hdmi_parse_eld(codec, &eld->info,
1575                                        eld->eld_buffer, size) < 0)
1576                         size = -EINVAL;
1577         }
1578
1579         if (size > 0) {
1580                 eld->eld_valid = true;
1581                 eld->eld_size = size;
1582         } else {
1583                 eld->eld_valid = false;
1584                 eld->eld_size = 0;
1585         }
1586
1587         /* pcm_idx >=0 before update_eld() means it is in monitor
1588          * disconnected event. Jack must be fetched before update_eld()
1589          */
1590         jack = pin_idx_to_jack(codec, per_pin);
1591         update_eld(codec, per_pin, eld);
1592         if (jack == NULL)
1593                 jack = pin_idx_to_jack(codec, per_pin);
1594         if (jack == NULL)
1595                 goto unlock;
1596         snd_jack_report(jack,
1597                         eld->monitor_present ? SND_JACK_AVOUT : 0);
1598  unlock:
1599         mutex_unlock(&per_pin->lock);
1600 }
1601
1602 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1603 {
1604         struct hda_codec *codec = per_pin->codec;
1605         struct hdmi_spec *spec = codec->spec;
1606         int ret;
1607
1608         /* no temporary power up/down needed for component notifier */
1609         if (!codec_has_acomp(codec))
1610                 snd_hda_power_up_pm(codec);
1611
1612         mutex_lock(&spec->pcm_lock);
1613         if (codec_has_acomp(codec)) {
1614                 sync_eld_via_acomp(codec, per_pin);
1615                 ret = false; /* don't call snd_hda_jack_report_sync() */
1616         } else {
1617                 ret = hdmi_present_sense_via_verbs(per_pin, repoll);
1618         }
1619         mutex_unlock(&spec->pcm_lock);
1620
1621         if (!codec_has_acomp(codec))
1622                 snd_hda_power_down_pm(codec);
1623
1624         return ret;
1625 }
1626
1627 static void hdmi_repoll_eld(struct work_struct *work)
1628 {
1629         struct hdmi_spec_per_pin *per_pin =
1630         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1631
1632         if (per_pin->repoll_count++ > 6)
1633                 per_pin->repoll_count = 0;
1634
1635         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1636                 snd_hda_jack_report_sync(per_pin->codec);
1637 }
1638
1639 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1640                                              hda_nid_t nid);
1641
1642 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1643 {
1644         struct hdmi_spec *spec = codec->spec;
1645         unsigned int caps, config;
1646         int pin_idx;
1647         struct hdmi_spec_per_pin *per_pin;
1648         int err;
1649         int dev_num, i;
1650
1651         caps = snd_hda_query_pin_caps(codec, pin_nid);
1652         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1653                 return 0;
1654
1655         /*
1656          * For DP MST audio, Configuration Default is the same for
1657          * all device entries on the same pin
1658          */
1659         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1660         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1661                 return 0;
1662
1663         /*
1664          * To simplify the implementation, malloc all
1665          * the virtual pins in the initialization statically
1666          */
1667         if (is_haswell_plus(codec)) {
1668                 /*
1669                  * On Intel platforms, device entries number is
1670                  * changed dynamically. If there is a DP MST
1671                  * hub connected, the device entries number is 3.
1672                  * Otherwise, it is 1.
1673                  * Here we manually set dev_num to 3, so that
1674                  * we can initialize all the device entries when
1675                  * bootup statically.
1676                  */
1677                 dev_num = 3;
1678                 spec->dev_num = 3;
1679         } else if (spec->dyn_pcm_assign && codec->dp_mst) {
1680                 dev_num = snd_hda_get_num_devices(codec, pin_nid) + 1;
1681                 /*
1682                  * spec->dev_num is the maxinum number of device entries
1683                  * among all the pins
1684                  */
1685                 spec->dev_num = (spec->dev_num > dev_num) ?
1686                         spec->dev_num : dev_num;
1687         } else {
1688                 /*
1689                  * If the platform doesn't support DP MST,
1690                  * manually set dev_num to 1. This means
1691                  * the pin has only one device entry.
1692                  */
1693                 dev_num = 1;
1694                 spec->dev_num = 1;
1695         }
1696
1697         for (i = 0; i < dev_num; i++) {
1698                 pin_idx = spec->num_pins;
1699                 per_pin = snd_array_new(&spec->pins);
1700
1701                 if (!per_pin)
1702                         return -ENOMEM;
1703
1704                 if (spec->dyn_pcm_assign) {
1705                         per_pin->pcm = NULL;
1706                         per_pin->pcm_idx = -1;
1707                 } else {
1708                         per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
1709                         per_pin->pcm_idx = pin_idx;
1710                 }
1711                 per_pin->pin_nid = pin_nid;
1712                 per_pin->pin_nid_idx = spec->num_nids;
1713                 per_pin->dev_id = i;
1714                 per_pin->non_pcm = false;
1715                 snd_hda_set_dev_select(codec, pin_nid, i);
1716                 if (is_haswell_plus(codec))
1717                         intel_haswell_fixup_connect_list(codec, pin_nid);
1718                 err = hdmi_read_pin_conn(codec, pin_idx);
1719                 if (err < 0)
1720                         return err;
1721                 spec->num_pins++;
1722         }
1723         spec->num_nids++;
1724
1725         return 0;
1726 }
1727
1728 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1729 {
1730         struct hdmi_spec *spec = codec->spec;
1731         struct hdmi_spec_per_cvt *per_cvt;
1732         unsigned int chans;
1733         int err;
1734
1735         chans = get_wcaps(codec, cvt_nid);
1736         chans = get_wcaps_channels(chans);
1737
1738         per_cvt = snd_array_new(&spec->cvts);
1739         if (!per_cvt)
1740                 return -ENOMEM;
1741
1742         per_cvt->cvt_nid = cvt_nid;
1743         per_cvt->channels_min = 2;
1744         if (chans <= 16) {
1745                 per_cvt->channels_max = chans;
1746                 if (chans > spec->chmap.channels_max)
1747                         spec->chmap.channels_max = chans;
1748         }
1749
1750         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1751                                           &per_cvt->rates,
1752                                           &per_cvt->formats,
1753                                           &per_cvt->maxbps);
1754         if (err < 0)
1755                 return err;
1756
1757         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1758                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1759         spec->num_cvts++;
1760
1761         return 0;
1762 }
1763
1764 static int hdmi_parse_codec(struct hda_codec *codec)
1765 {
1766         hda_nid_t nid;
1767         int i, nodes;
1768
1769         nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &nid);
1770         if (!nid || nodes < 0) {
1771                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1772                 return -EINVAL;
1773         }
1774
1775         for (i = 0; i < nodes; i++, nid++) {
1776                 unsigned int caps;
1777                 unsigned int type;
1778
1779                 caps = get_wcaps(codec, nid);
1780                 type = get_wcaps_type(caps);
1781
1782                 if (!(caps & AC_WCAP_DIGITAL))
1783                         continue;
1784
1785                 switch (type) {
1786                 case AC_WID_AUD_OUT:
1787                         hdmi_add_cvt(codec, nid);
1788                         break;
1789                 case AC_WID_PIN:
1790                         hdmi_add_pin(codec, nid);
1791                         break;
1792                 }
1793         }
1794
1795         return 0;
1796 }
1797
1798 /*
1799  */
1800 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1801 {
1802         struct hda_spdif_out *spdif;
1803         bool non_pcm;
1804
1805         mutex_lock(&codec->spdif_mutex);
1806         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1807         /* Add sanity check to pass klockwork check.
1808          * This should never happen.
1809          */
1810         if (WARN_ON(spdif == NULL))
1811                 return true;
1812         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1813         mutex_unlock(&codec->spdif_mutex);
1814         return non_pcm;
1815 }
1816
1817 /*
1818  * HDMI callbacks
1819  */
1820
1821 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1822                                            struct hda_codec *codec,
1823                                            unsigned int stream_tag,
1824                                            unsigned int format,
1825                                            struct snd_pcm_substream *substream)
1826 {
1827         hda_nid_t cvt_nid = hinfo->nid;
1828         struct hdmi_spec *spec = codec->spec;
1829         int pin_idx;
1830         struct hdmi_spec_per_pin *per_pin;
1831         hda_nid_t pin_nid;
1832         struct snd_pcm_runtime *runtime = substream->runtime;
1833         bool non_pcm;
1834         int pinctl;
1835         int err;
1836
1837         mutex_lock(&spec->pcm_lock);
1838         pin_idx = hinfo_to_pin_index(codec, hinfo);
1839         if (spec->dyn_pcm_assign && pin_idx < 0) {
1840                 /* when dyn_pcm_assign and pcm is not bound to a pin
1841                  * skip pin setup and return 0 to make audio playback
1842                  * be ongoing
1843                  */
1844                 pin_cvt_fixup(codec, NULL, cvt_nid);
1845                 snd_hda_codec_setup_stream(codec, cvt_nid,
1846                                         stream_tag, 0, format);
1847                 mutex_unlock(&spec->pcm_lock);
1848                 return 0;
1849         }
1850
1851         if (snd_BUG_ON(pin_idx < 0)) {
1852                 mutex_unlock(&spec->pcm_lock);
1853                 return -EINVAL;
1854         }
1855         per_pin = get_pin(spec, pin_idx);
1856         pin_nid = per_pin->pin_nid;
1857
1858         /* Verify pin:cvt selections to avoid silent audio after S3.
1859          * After S3, the audio driver restores pin:cvt selections
1860          * but this can happen before gfx is ready and such selection
1861          * is overlooked by HW. Thus multiple pins can share a same
1862          * default convertor and mute control will affect each other,
1863          * which can cause a resumed audio playback become silent
1864          * after S3.
1865          */
1866         pin_cvt_fixup(codec, per_pin, 0);
1867
1868         /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
1869         /* Todo: add DP1.2 MST audio support later */
1870         if (codec_has_acomp(codec))
1871                 snd_hdac_sync_audio_rate(&codec->core, pin_nid, per_pin->dev_id,
1872                                          runtime->rate);
1873
1874         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1875         mutex_lock(&per_pin->lock);
1876         per_pin->channels = substream->runtime->channels;
1877         per_pin->setup = true;
1878
1879         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1880         mutex_unlock(&per_pin->lock);
1881         if (spec->dyn_pin_out) {
1882                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1883                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1884                 snd_hda_codec_write(codec, pin_nid, 0,
1885                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
1886                                     pinctl | PIN_OUT);
1887         }
1888
1889         /* snd_hda_set_dev_select() has been called before */
1890         err = spec->ops.setup_stream(codec, cvt_nid, pin_nid,
1891                                  stream_tag, format);
1892         mutex_unlock(&spec->pcm_lock);
1893         return err;
1894 }
1895
1896 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1897                                              struct hda_codec *codec,
1898                                              struct snd_pcm_substream *substream)
1899 {
1900         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1901         return 0;
1902 }
1903
1904 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1905                           struct hda_codec *codec,
1906                           struct snd_pcm_substream *substream)
1907 {
1908         struct hdmi_spec *spec = codec->spec;
1909         int cvt_idx, pin_idx, pcm_idx;
1910         struct hdmi_spec_per_cvt *per_cvt;
1911         struct hdmi_spec_per_pin *per_pin;
1912         int pinctl;
1913
1914         if (hinfo->nid) {
1915                 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1916                 if (snd_BUG_ON(pcm_idx < 0))
1917                         return -EINVAL;
1918                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
1919                 if (snd_BUG_ON(cvt_idx < 0))
1920                         return -EINVAL;
1921                 per_cvt = get_cvt(spec, cvt_idx);
1922
1923                 snd_BUG_ON(!per_cvt->assigned);
1924                 per_cvt->assigned = 0;
1925                 hinfo->nid = 0;
1926
1927                 mutex_lock(&spec->pcm_lock);
1928                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1929                 clear_bit(pcm_idx, &spec->pcm_in_use);
1930                 pin_idx = hinfo_to_pin_index(codec, hinfo);
1931                 if (spec->dyn_pcm_assign && pin_idx < 0) {
1932                         mutex_unlock(&spec->pcm_lock);
1933                         return 0;
1934                 }
1935
1936                 if (snd_BUG_ON(pin_idx < 0)) {
1937                         mutex_unlock(&spec->pcm_lock);
1938                         return -EINVAL;
1939                 }
1940                 per_pin = get_pin(spec, pin_idx);
1941
1942                 if (spec->dyn_pin_out) {
1943                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1944                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1945                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1946                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1947                                             pinctl & ~PIN_OUT);
1948                 }
1949
1950                 mutex_lock(&per_pin->lock);
1951                 per_pin->chmap_set = false;
1952                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1953
1954                 per_pin->setup = false;
1955                 per_pin->channels = 0;
1956                 mutex_unlock(&per_pin->lock);
1957                 mutex_unlock(&spec->pcm_lock);
1958         }
1959
1960         return 0;
1961 }
1962
1963 static const struct hda_pcm_ops generic_ops = {
1964         .open = hdmi_pcm_open,
1965         .close = hdmi_pcm_close,
1966         .prepare = generic_hdmi_playback_pcm_prepare,
1967         .cleanup = generic_hdmi_playback_pcm_cleanup,
1968 };
1969
1970 static int hdmi_get_spk_alloc(struct hdac_device *hdac, int pcm_idx)
1971 {
1972         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
1973         struct hdmi_spec *spec = codec->spec;
1974         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
1975
1976         if (!per_pin)
1977                 return 0;
1978
1979         return per_pin->sink_eld.info.spk_alloc;
1980 }
1981
1982 static void hdmi_get_chmap(struct hdac_device *hdac, int pcm_idx,
1983                                         unsigned char *chmap)
1984 {
1985         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
1986         struct hdmi_spec *spec = codec->spec;
1987         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
1988
1989         /* chmap is already set to 0 in caller */
1990         if (!per_pin)
1991                 return;
1992
1993         memcpy(chmap, per_pin->chmap, ARRAY_SIZE(per_pin->chmap));
1994 }
1995
1996 static void hdmi_set_chmap(struct hdac_device *hdac, int pcm_idx,
1997                                 unsigned char *chmap, int prepared)
1998 {
1999         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2000         struct hdmi_spec *spec = codec->spec;
2001         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2002
2003         if (!per_pin)
2004                 return;
2005         mutex_lock(&per_pin->lock);
2006         per_pin->chmap_set = true;
2007         memcpy(per_pin->chmap, chmap, ARRAY_SIZE(per_pin->chmap));
2008         if (prepared)
2009                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2010         mutex_unlock(&per_pin->lock);
2011 }
2012
2013 static bool is_hdmi_pcm_attached(struct hdac_device *hdac, int pcm_idx)
2014 {
2015         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2016         struct hdmi_spec *spec = codec->spec;
2017         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2018
2019         return per_pin ? true:false;
2020 }
2021
2022 static int generic_hdmi_build_pcms(struct hda_codec *codec)
2023 {
2024         struct hdmi_spec *spec = codec->spec;
2025         int idx;
2026
2027         /*
2028          * for non-mst mode, pcm number is the same as before
2029          * for DP MST mode, pcm number is (nid number + dev_num - 1)
2030          *  dev_num is the device entry number in a pin
2031          *
2032          */
2033         for (idx = 0; idx < spec->num_nids + spec->dev_num - 1; idx++) {
2034                 struct hda_pcm *info;
2035                 struct hda_pcm_stream *pstr;
2036
2037                 info = snd_hda_codec_pcm_new(codec, "HDMI %d", idx);
2038                 if (!info)
2039                         return -ENOMEM;
2040
2041                 spec->pcm_rec[idx].pcm = info;
2042                 spec->pcm_used++;
2043                 info->pcm_type = HDA_PCM_TYPE_HDMI;
2044                 info->own_chmap = true;
2045
2046                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2047                 pstr->substreams = 1;
2048                 pstr->ops = generic_ops;
2049                 /* pcm number is less than 16 */
2050                 if (spec->pcm_used >= 16)
2051                         break;
2052                 /* other pstr fields are set in open */
2053         }
2054
2055         return 0;
2056 }
2057
2058 static void free_hdmi_jack_priv(struct snd_jack *jack)
2059 {
2060         struct hdmi_pcm *pcm = jack->private_data;
2061
2062         pcm->jack = NULL;
2063 }
2064
2065 static int add_hdmi_jack_kctl(struct hda_codec *codec,
2066                                struct hdmi_spec *spec,
2067                                int pcm_idx,
2068                                const char *name)
2069 {
2070         struct snd_jack *jack;
2071         int err;
2072
2073         err = snd_jack_new(codec->card, name, SND_JACK_AVOUT, &jack,
2074                            true, false);
2075         if (err < 0)
2076                 return err;
2077
2078         spec->pcm_rec[pcm_idx].jack = jack;
2079         jack->private_data = &spec->pcm_rec[pcm_idx];
2080         jack->private_free = free_hdmi_jack_priv;
2081         return 0;
2082 }
2083
2084 static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx)
2085 {
2086         char hdmi_str[32] = "HDMI/DP";
2087         struct hdmi_spec *spec = codec->spec;
2088         struct hdmi_spec_per_pin *per_pin;
2089         struct hda_jack_tbl *jack;
2090         int pcmdev = get_pcm_rec(spec, pcm_idx)->device;
2091         bool phantom_jack;
2092         int ret;
2093
2094         if (pcmdev > 0)
2095                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2096
2097         if (spec->dyn_pcm_assign)
2098                 return add_hdmi_jack_kctl(codec, spec, pcm_idx, hdmi_str);
2099
2100         /* for !dyn_pcm_assign, we still use hda_jack for compatibility */
2101         /* if !dyn_pcm_assign, it must be non-MST mode.
2102          * This means pcms and pins are statically mapped.
2103          * And pcm_idx is pin_idx.
2104          */
2105         per_pin = get_pin(spec, pcm_idx);
2106         phantom_jack = !is_jack_detectable(codec, per_pin->pin_nid);
2107         if (phantom_jack)
2108                 strncat(hdmi_str, " Phantom",
2109                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2110         ret = snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str,
2111                                     phantom_jack);
2112         if (ret < 0)
2113                 return ret;
2114         jack = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
2115         if (jack == NULL)
2116                 return 0;
2117         /* assign jack->jack to pcm_rec[].jack to
2118          * align with dyn_pcm_assign mode
2119          */
2120         spec->pcm_rec[pcm_idx].jack = jack->jack;
2121         return 0;
2122 }
2123
2124 static int generic_hdmi_build_controls(struct hda_codec *codec)
2125 {
2126         struct hdmi_spec *spec = codec->spec;
2127         int err;
2128         int pin_idx, pcm_idx;
2129
2130
2131         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2132                 err = generic_hdmi_build_jack(codec, pcm_idx);
2133                 if (err < 0)
2134                         return err;
2135
2136                 /* create the spdif for each pcm
2137                  * pin will be bound when monitor is connected
2138                  */
2139                 if (spec->dyn_pcm_assign)
2140                         err = snd_hda_create_dig_out_ctls(codec,
2141                                           0, spec->cvt_nids[0],
2142                                           HDA_PCM_TYPE_HDMI);
2143                 else {
2144                         struct hdmi_spec_per_pin *per_pin =
2145                                 get_pin(spec, pcm_idx);
2146                         err = snd_hda_create_dig_out_ctls(codec,
2147                                                   per_pin->pin_nid,
2148                                                   per_pin->mux_nids[0],
2149                                                   HDA_PCM_TYPE_HDMI);
2150                 }
2151                 if (err < 0)
2152                         return err;
2153                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2154
2155                 /* add control for ELD Bytes */
2156                 err = hdmi_create_eld_ctl(codec, pcm_idx,
2157                                         get_pcm_rec(spec, pcm_idx)->device);
2158                 if (err < 0)
2159                         return err;
2160         }
2161
2162         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2163                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2164
2165                 hdmi_present_sense(per_pin, 0);
2166         }
2167
2168         /* add channel maps */
2169         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2170                 struct hda_pcm *pcm;
2171
2172                 pcm = get_pcm_rec(spec, pcm_idx);
2173                 if (!pcm || !pcm->pcm)
2174                         break;
2175                 err = snd_hdac_add_chmap_ctls(pcm->pcm, pcm_idx, &spec->chmap);
2176                 if (err < 0)
2177                         return err;
2178         }
2179
2180         return 0;
2181 }
2182
2183 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2184 {
2185         struct hdmi_spec *spec = codec->spec;
2186         int pin_idx;
2187
2188         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2189                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2190
2191                 per_pin->codec = codec;
2192                 mutex_init(&per_pin->lock);
2193                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2194                 eld_proc_new(per_pin, pin_idx);
2195         }
2196         return 0;
2197 }
2198
2199 static int generic_hdmi_init(struct hda_codec *codec)
2200 {
2201         struct hdmi_spec *spec = codec->spec;
2202         int pin_idx;
2203
2204         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2205                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2206                 hda_nid_t pin_nid = per_pin->pin_nid;
2207                 int dev_id = per_pin->dev_id;
2208
2209                 snd_hda_set_dev_select(codec, pin_nid, dev_id);
2210                 hdmi_init_pin(codec, pin_nid);
2211                 if (!codec_has_acomp(codec))
2212                         snd_hda_jack_detect_enable_callback(codec, pin_nid,
2213                                 codec->jackpoll_interval > 0 ?
2214                                 jack_callback : NULL);
2215         }
2216         return 0;
2217 }
2218
2219 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2220 {
2221         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2222         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2223 }
2224
2225 static void hdmi_array_free(struct hdmi_spec *spec)
2226 {
2227         snd_array_free(&spec->pins);
2228         snd_array_free(&spec->cvts);
2229 }
2230
2231 static void generic_spec_free(struct hda_codec *codec)
2232 {
2233         struct hdmi_spec *spec = codec->spec;
2234
2235         if (spec) {
2236                 hdmi_array_free(spec);
2237                 kfree(spec);
2238                 codec->spec = NULL;
2239         }
2240         codec->dp_mst = false;
2241 }
2242
2243 static void generic_hdmi_free(struct hda_codec *codec)
2244 {
2245         struct hdmi_spec *spec = codec->spec;
2246         int pin_idx, pcm_idx;
2247
2248         if (codec_has_acomp(codec))
2249                 snd_hdac_i915_register_notifier(NULL);
2250
2251         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2252                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2253                 cancel_delayed_work_sync(&per_pin->work);
2254                 eld_proc_free(per_pin);
2255         }
2256
2257         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2258                 if (spec->pcm_rec[pcm_idx].jack == NULL)
2259                         continue;
2260                 if (spec->dyn_pcm_assign)
2261                         snd_device_free(codec->card,
2262                                         spec->pcm_rec[pcm_idx].jack);
2263                 else
2264                         spec->pcm_rec[pcm_idx].jack = NULL;
2265         }
2266
2267         generic_spec_free(codec);
2268 }
2269
2270 #ifdef CONFIG_PM
2271 static int generic_hdmi_resume(struct hda_codec *codec)
2272 {
2273         struct hdmi_spec *spec = codec->spec;
2274         int pin_idx;
2275
2276         codec->patch_ops.init(codec);
2277         regcache_sync(codec->core.regmap);
2278
2279         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2280                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2281                 hdmi_present_sense(per_pin, 1);
2282         }
2283         return 0;
2284 }
2285 #endif
2286
2287 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2288         .init                   = generic_hdmi_init,
2289         .free                   = generic_hdmi_free,
2290         .build_pcms             = generic_hdmi_build_pcms,
2291         .build_controls         = generic_hdmi_build_controls,
2292         .unsol_event            = hdmi_unsol_event,
2293 #ifdef CONFIG_PM
2294         .resume                 = generic_hdmi_resume,
2295 #endif
2296 };
2297
2298 static const struct hdmi_ops generic_standard_hdmi_ops = {
2299         .pin_get_eld                            = snd_hdmi_get_eld,
2300         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2301         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2302         .setup_stream                           = hdmi_setup_stream,
2303 };
2304
2305 /* allocate codec->spec and assign/initialize generic parser ops */
2306 static int alloc_generic_hdmi(struct hda_codec *codec)
2307 {
2308         struct hdmi_spec *spec;
2309
2310         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2311         if (!spec)
2312                 return -ENOMEM;
2313
2314         spec->ops = generic_standard_hdmi_ops;
2315         spec->dev_num = 1;      /* initialize to 1 */
2316         mutex_init(&spec->pcm_lock);
2317         snd_hdac_register_chmap_ops(&codec->core, &spec->chmap);
2318
2319         spec->chmap.ops.get_chmap = hdmi_get_chmap;
2320         spec->chmap.ops.set_chmap = hdmi_set_chmap;
2321         spec->chmap.ops.is_pcm_attached = is_hdmi_pcm_attached;
2322         spec->chmap.ops.get_spk_alloc = hdmi_get_spk_alloc,
2323
2324         codec->spec = spec;
2325         hdmi_array_init(spec, 4);
2326
2327         codec->patch_ops = generic_hdmi_patch_ops;
2328
2329         return 0;
2330 }
2331
2332 /* generic HDMI parser */
2333 static int patch_generic_hdmi(struct hda_codec *codec)
2334 {
2335         int err;
2336
2337         err = alloc_generic_hdmi(codec);
2338         if (err < 0)
2339                 return err;
2340
2341         err = hdmi_parse_codec(codec);
2342         if (err < 0) {
2343                 generic_spec_free(codec);
2344                 return err;
2345         }
2346
2347         generic_hdmi_init_per_pins(codec);
2348         return 0;
2349 }
2350
2351 /*
2352  * Intel codec parsers and helpers
2353  */
2354
2355 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2356                                              hda_nid_t nid)
2357 {
2358         struct hdmi_spec *spec = codec->spec;
2359         hda_nid_t conns[4];
2360         int nconns;
2361
2362         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2363         if (nconns == spec->num_cvts &&
2364             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2365                 return;
2366
2367         /* override pins connection list */
2368         codec_dbg(codec, "hdmi: haswell: override pin connection 0x%x\n", nid);
2369         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2370 }
2371
2372 #define INTEL_VENDOR_NID 0x08
2373 #define INTEL_GLK_VENDOR_NID 0x0B
2374 #define INTEL_GET_VENDOR_VERB 0xf81
2375 #define INTEL_SET_VENDOR_VERB 0x781
2376 #define INTEL_EN_DP12                   0x02 /* enable DP 1.2 features */
2377 #define INTEL_EN_ALL_PIN_CVTS   0x01 /* enable 2nd & 3rd pins and convertors */
2378
2379 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2380                                           bool update_tree)
2381 {
2382         unsigned int vendor_param;
2383         struct hdmi_spec *spec = codec->spec;
2384
2385         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2386                                 INTEL_GET_VENDOR_VERB, 0);
2387         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2388                 return;
2389
2390         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2391         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2392                                 INTEL_SET_VENDOR_VERB, vendor_param);
2393         if (vendor_param == -1)
2394                 return;
2395
2396         if (update_tree)
2397                 snd_hda_codec_update_widgets(codec);
2398 }
2399
2400 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2401 {
2402         unsigned int vendor_param;
2403         struct hdmi_spec *spec = codec->spec;
2404
2405         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2406                                 INTEL_GET_VENDOR_VERB, 0);
2407         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2408                 return;
2409
2410         /* enable DP1.2 mode */
2411         vendor_param |= INTEL_EN_DP12;
2412         snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2413         snd_hda_codec_write_cache(codec, spec->vendor_nid, 0,
2414                                 INTEL_SET_VENDOR_VERB, vendor_param);
2415 }
2416
2417 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2418  * Otherwise you may get severe h/w communication errors.
2419  */
2420 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2421                                 unsigned int power_state)
2422 {
2423         if (power_state == AC_PWRST_D0) {
2424                 intel_haswell_enable_all_pins(codec, false);
2425                 intel_haswell_fixup_enable_dp12(codec);
2426         }
2427
2428         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2429         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2430 }
2431
2432 static void intel_pin_eld_notify(void *audio_ptr, int port, int pipe)
2433 {
2434         struct hda_codec *codec = audio_ptr;
2435         int pin_nid;
2436         int dev_id = pipe;
2437
2438         /* we assume only from port-B to port-D */
2439         if (port < 1 || port > 3)
2440                 return;
2441
2442         switch (codec->core.vendor_id) {
2443         case 0x80860054: /* ILK */
2444         case 0x80862804: /* ILK */
2445         case 0x80862882: /* VLV */
2446                 pin_nid = port + 0x03;
2447                 break;
2448         default:
2449                 pin_nid = port + 0x04;
2450                 break;
2451         }
2452
2453         /* skip notification during system suspend (but not in runtime PM);
2454          * the state will be updated at resume
2455          */
2456         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2457                 return;
2458         /* ditto during suspend/resume process itself */
2459         if (atomic_read(&(codec)->core.in_pm))
2460                 return;
2461
2462         snd_hdac_i915_set_bclk(&codec->bus->core);
2463         check_presence_and_report(codec, pin_nid, dev_id);
2464 }
2465
2466 /* register i915 component pin_eld_notify callback */
2467 static void register_i915_notifier(struct hda_codec *codec)
2468 {
2469         struct hdmi_spec *spec = codec->spec;
2470
2471         spec->use_acomp_notifier = true;
2472         spec->i915_audio_ops.audio_ptr = codec;
2473         /* intel_audio_codec_enable() or intel_audio_codec_disable()
2474          * will call pin_eld_notify with using audio_ptr pointer
2475          * We need make sure audio_ptr is really setup
2476          */
2477         wmb();
2478         spec->i915_audio_ops.pin_eld_notify = intel_pin_eld_notify;
2479         snd_hdac_i915_register_notifier(&spec->i915_audio_ops);
2480 }
2481
2482 /* setup_stream ops override for HSW+ */
2483 static int i915_hsw_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
2484                                  hda_nid_t pin_nid, u32 stream_tag, int format)
2485 {
2486         haswell_verify_D0(codec, cvt_nid, pin_nid);
2487         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
2488 }
2489
2490 /* pin_cvt_fixup ops override for HSW+ and VLV+ */
2491 static void i915_pin_cvt_fixup(struct hda_codec *codec,
2492                                struct hdmi_spec_per_pin *per_pin,
2493                                hda_nid_t cvt_nid)
2494 {
2495         if (per_pin) {
2496                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2497                                per_pin->dev_id);
2498                 intel_verify_pin_cvt_connect(codec, per_pin);
2499                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
2500                                      per_pin->dev_id, per_pin->mux_idx);
2501         } else {
2502                 intel_not_share_assigned_cvt_nid(codec, 0, 0, cvt_nid);
2503         }
2504 }
2505
2506 /* precondition and allocation for Intel codecs */
2507 static int alloc_intel_hdmi(struct hda_codec *codec)
2508 {
2509         /* requires i915 binding */
2510         if (!codec->bus->core.audio_component) {
2511                 codec_info(codec, "No i915 binding for Intel HDMI/DP codec\n");
2512                 return -ENODEV;
2513         }
2514
2515         return alloc_generic_hdmi(codec);
2516 }
2517
2518 /* parse and post-process for Intel codecs */
2519 static int parse_intel_hdmi(struct hda_codec *codec)
2520 {
2521         int err;
2522
2523         err = hdmi_parse_codec(codec);
2524         if (err < 0) {
2525                 generic_spec_free(codec);
2526                 return err;
2527         }
2528
2529         generic_hdmi_init_per_pins(codec);
2530         register_i915_notifier(codec);
2531         return 0;
2532 }
2533
2534 /* Intel Haswell and onwards; audio component with eld notifier */
2535 static int intel_hsw_common_init(struct hda_codec *codec, hda_nid_t vendor_nid)
2536 {
2537         struct hdmi_spec *spec;
2538         int err;
2539
2540         err = alloc_intel_hdmi(codec);
2541         if (err < 0)
2542                 return err;
2543         spec = codec->spec;
2544         codec->dp_mst = true;
2545         spec->dyn_pcm_assign = true;
2546         spec->vendor_nid = vendor_nid;
2547
2548         intel_haswell_enable_all_pins(codec, true);
2549         intel_haswell_fixup_enable_dp12(codec);
2550
2551         /* For Haswell/Broadwell, the controller is also in the power well and
2552          * can cover the codec power request, and so need not set this flag.
2553          */
2554         if (!is_haswell(codec) && !is_broadwell(codec))
2555                 codec->core.link_power_control = 1;
2556
2557         codec->patch_ops.set_power_state = haswell_set_power_state;
2558         codec->depop_delay = 0;
2559         codec->auto_runtime_pm = 1;
2560
2561         spec->ops.setup_stream = i915_hsw_setup_stream;
2562         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2563
2564         return parse_intel_hdmi(codec);
2565 }
2566
2567 static int patch_i915_hsw_hdmi(struct hda_codec *codec)
2568 {
2569         return intel_hsw_common_init(codec, INTEL_VENDOR_NID);
2570 }
2571
2572 static int patch_i915_glk_hdmi(struct hda_codec *codec)
2573 {
2574         return intel_hsw_common_init(codec, INTEL_GLK_VENDOR_NID);
2575 }
2576
2577 /* Intel Baytrail and Braswell; with eld notifier */
2578 static int patch_i915_byt_hdmi(struct hda_codec *codec)
2579 {
2580         struct hdmi_spec *spec;
2581         int err;
2582
2583         err = alloc_intel_hdmi(codec);
2584         if (err < 0)
2585                 return err;
2586         spec = codec->spec;
2587
2588         /* For Valleyview/Cherryview, only the display codec is in the display
2589          * power well and can use link_power ops to request/release the power.
2590          */
2591         codec->core.link_power_control = 1;
2592
2593         codec->depop_delay = 0;
2594         codec->auto_runtime_pm = 1;
2595
2596         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2597
2598         return parse_intel_hdmi(codec);
2599 }
2600
2601 /* Intel IronLake, SandyBridge and IvyBridge; with eld notifier */
2602 static int patch_i915_cpt_hdmi(struct hda_codec *codec)
2603 {
2604         int err;
2605
2606         err = alloc_intel_hdmi(codec);
2607         if (err < 0)
2608                 return err;
2609         return parse_intel_hdmi(codec);
2610 }
2611
2612 /*
2613  * Shared non-generic implementations
2614  */
2615
2616 static int simple_playback_build_pcms(struct hda_codec *codec)
2617 {
2618         struct hdmi_spec *spec = codec->spec;
2619         struct hda_pcm *info;
2620         unsigned int chans;
2621         struct hda_pcm_stream *pstr;
2622         struct hdmi_spec_per_cvt *per_cvt;
2623
2624         per_cvt = get_cvt(spec, 0);
2625         chans = get_wcaps(codec, per_cvt->cvt_nid);
2626         chans = get_wcaps_channels(chans);
2627
2628         info = snd_hda_codec_pcm_new(codec, "HDMI 0");
2629         if (!info)
2630                 return -ENOMEM;
2631         spec->pcm_rec[0].pcm = info;
2632         info->pcm_type = HDA_PCM_TYPE_HDMI;
2633         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2634         *pstr = spec->pcm_playback;
2635         pstr->nid = per_cvt->cvt_nid;
2636         if (pstr->channels_max <= 2 && chans && chans <= 16)
2637                 pstr->channels_max = chans;
2638
2639         return 0;
2640 }
2641
2642 /* unsolicited event for jack sensing */
2643 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2644                                     unsigned int res)
2645 {
2646         snd_hda_jack_set_dirty_all(codec);
2647         snd_hda_jack_report_sync(codec);
2648 }
2649
2650 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2651  * as long as spec->pins[] is set correctly
2652  */
2653 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2654
2655 static int simple_playback_build_controls(struct hda_codec *codec)
2656 {
2657         struct hdmi_spec *spec = codec->spec;
2658         struct hdmi_spec_per_cvt *per_cvt;
2659         int err;
2660
2661         per_cvt = get_cvt(spec, 0);
2662         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2663                                           per_cvt->cvt_nid,
2664                                           HDA_PCM_TYPE_HDMI);
2665         if (err < 0)
2666                 return err;
2667         return simple_hdmi_build_jack(codec, 0);
2668 }
2669
2670 static int simple_playback_init(struct hda_codec *codec)
2671 {
2672         struct hdmi_spec *spec = codec->spec;
2673         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2674         hda_nid_t pin = per_pin->pin_nid;
2675
2676         snd_hda_codec_write(codec, pin, 0,
2677                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2678         /* some codecs require to unmute the pin */
2679         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2680                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2681                                     AMP_OUT_UNMUTE);
2682         snd_hda_jack_detect_enable(codec, pin);
2683         return 0;
2684 }
2685
2686 static void simple_playback_free(struct hda_codec *codec)
2687 {
2688         struct hdmi_spec *spec = codec->spec;
2689
2690         hdmi_array_free(spec);
2691         kfree(spec);
2692 }
2693
2694 /*
2695  * Nvidia specific implementations
2696  */
2697
2698 #define Nv_VERB_SET_Channel_Allocation          0xF79
2699 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
2700 #define Nv_VERB_SET_Audio_Protection_On         0xF98
2701 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
2702
2703 #define nvhdmi_master_con_nid_7x        0x04
2704 #define nvhdmi_master_pin_nid_7x        0x05
2705
2706 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2707         /*front, rear, clfe, rear_surr */
2708         0x6, 0x8, 0xa, 0xc,
2709 };
2710
2711 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2712         /* set audio protect on */
2713         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2714         /* enable digital output on pin widget */
2715         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2716         {} /* terminator */
2717 };
2718
2719 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2720         /* set audio protect on */
2721         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2722         /* enable digital output on pin widget */
2723         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2724         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2725         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2726         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2727         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2728         {} /* terminator */
2729 };
2730
2731 #ifdef LIMITED_RATE_FMT_SUPPORT
2732 /* support only the safe format and rate */
2733 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
2734 #define SUPPORTED_MAXBPS        16
2735 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
2736 #else
2737 /* support all rates and formats */
2738 #define SUPPORTED_RATES \
2739         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2740         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2741          SNDRV_PCM_RATE_192000)
2742 #define SUPPORTED_MAXBPS        24
2743 #define SUPPORTED_FORMATS \
2744         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2745 #endif
2746
2747 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2748 {
2749         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2750         return 0;
2751 }
2752
2753 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2754 {
2755         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2756         return 0;
2757 }
2758
2759 static const unsigned int channels_2_6_8[] = {
2760         2, 6, 8
2761 };
2762
2763 static const unsigned int channels_2_8[] = {
2764         2, 8
2765 };
2766
2767 static const struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2768         .count = ARRAY_SIZE(channels_2_6_8),
2769         .list = channels_2_6_8,
2770         .mask = 0,
2771 };
2772
2773 static const struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2774         .count = ARRAY_SIZE(channels_2_8),
2775         .list = channels_2_8,
2776         .mask = 0,
2777 };
2778
2779 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2780                                     struct hda_codec *codec,
2781                                     struct snd_pcm_substream *substream)
2782 {
2783         struct hdmi_spec *spec = codec->spec;
2784         const struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2785
2786         switch (codec->preset->vendor_id) {
2787         case 0x10de0002:
2788         case 0x10de0003:
2789         case 0x10de0005:
2790         case 0x10de0006:
2791                 hw_constraints_channels = &hw_constraints_2_8_channels;
2792                 break;
2793         case 0x10de0007:
2794                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2795                 break;
2796         default:
2797                 break;
2798         }
2799
2800         if (hw_constraints_channels != NULL) {
2801                 snd_pcm_hw_constraint_list(substream->runtime, 0,
2802                                 SNDRV_PCM_HW_PARAM_CHANNELS,
2803                                 hw_constraints_channels);
2804         } else {
2805                 snd_pcm_hw_constraint_step(substream->runtime, 0,
2806                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2807         }
2808
2809         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2810 }
2811
2812 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2813                                      struct hda_codec *codec,
2814                                      struct snd_pcm_substream *substream)
2815 {
2816         struct hdmi_spec *spec = codec->spec;
2817         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2818 }
2819
2820 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2821                                        struct hda_codec *codec,
2822                                        unsigned int stream_tag,
2823                                        unsigned int format,
2824                                        struct snd_pcm_substream *substream)
2825 {
2826         struct hdmi_spec *spec = codec->spec;
2827         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2828                                              stream_tag, format, substream);
2829 }
2830
2831 static const struct hda_pcm_stream simple_pcm_playback = {
2832         .substreams = 1,
2833         .channels_min = 2,
2834         .channels_max = 2,
2835         .ops = {
2836                 .open = simple_playback_pcm_open,
2837                 .close = simple_playback_pcm_close,
2838                 .prepare = simple_playback_pcm_prepare
2839         },
2840 };
2841
2842 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2843         .build_controls = simple_playback_build_controls,
2844         .build_pcms = simple_playback_build_pcms,
2845         .init = simple_playback_init,
2846         .free = simple_playback_free,
2847         .unsol_event = simple_hdmi_unsol_event,
2848 };
2849
2850 static int patch_simple_hdmi(struct hda_codec *codec,
2851                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
2852 {
2853         struct hdmi_spec *spec;
2854         struct hdmi_spec_per_cvt *per_cvt;
2855         struct hdmi_spec_per_pin *per_pin;
2856
2857         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2858         if (!spec)
2859                 return -ENOMEM;
2860
2861         codec->spec = spec;
2862         hdmi_array_init(spec, 1);
2863
2864         spec->multiout.num_dacs = 0;  /* no analog */
2865         spec->multiout.max_channels = 2;
2866         spec->multiout.dig_out_nid = cvt_nid;
2867         spec->num_cvts = 1;
2868         spec->num_pins = 1;
2869         per_pin = snd_array_new(&spec->pins);
2870         per_cvt = snd_array_new(&spec->cvts);
2871         if (!per_pin || !per_cvt) {
2872                 simple_playback_free(codec);
2873                 return -ENOMEM;
2874         }
2875         per_cvt->cvt_nid = cvt_nid;
2876         per_pin->pin_nid = pin_nid;
2877         spec->pcm_playback = simple_pcm_playback;
2878
2879         codec->patch_ops = simple_hdmi_patch_ops;
2880
2881         return 0;
2882 }
2883
2884 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2885                                                     int channels)
2886 {
2887         unsigned int chanmask;
2888         int chan = channels ? (channels - 1) : 1;
2889
2890         switch (channels) {
2891         default:
2892         case 0:
2893         case 2:
2894                 chanmask = 0x00;
2895                 break;
2896         case 4:
2897                 chanmask = 0x08;
2898                 break;
2899         case 6:
2900                 chanmask = 0x0b;
2901                 break;
2902         case 8:
2903                 chanmask = 0x13;
2904                 break;
2905         }
2906
2907         /* Set the audio infoframe channel allocation and checksum fields.  The
2908          * channel count is computed implicitly by the hardware. */
2909         snd_hda_codec_write(codec, 0x1, 0,
2910                         Nv_VERB_SET_Channel_Allocation, chanmask);
2911
2912         snd_hda_codec_write(codec, 0x1, 0,
2913                         Nv_VERB_SET_Info_Frame_Checksum,
2914                         (0x71 - chan - chanmask));
2915 }
2916
2917 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2918                                    struct hda_codec *codec,
2919                                    struct snd_pcm_substream *substream)
2920 {
2921         struct hdmi_spec *spec = codec->spec;
2922         int i;
2923
2924         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2925                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2926         for (i = 0; i < 4; i++) {
2927                 /* set the stream id */
2928                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2929                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
2930                 /* set the stream format */
2931                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2932                                 AC_VERB_SET_STREAM_FORMAT, 0);
2933         }
2934
2935         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2936          * streams are disabled. */
2937         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2938
2939         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2940 }
2941
2942 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2943                                      struct hda_codec *codec,
2944                                      unsigned int stream_tag,
2945                                      unsigned int format,
2946                                      struct snd_pcm_substream *substream)
2947 {
2948         int chs;
2949         unsigned int dataDCC2, channel_id;
2950         int i;
2951         struct hdmi_spec *spec = codec->spec;
2952         struct hda_spdif_out *spdif;
2953         struct hdmi_spec_per_cvt *per_cvt;
2954
2955         mutex_lock(&codec->spdif_mutex);
2956         per_cvt = get_cvt(spec, 0);
2957         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2958
2959         chs = substream->runtime->channels;
2960
2961         dataDCC2 = 0x2;
2962
2963         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2964         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2965                 snd_hda_codec_write(codec,
2966                                 nvhdmi_master_con_nid_7x,
2967                                 0,
2968                                 AC_VERB_SET_DIGI_CONVERT_1,
2969                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2970
2971         /* set the stream id */
2972         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2973                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2974
2975         /* set the stream format */
2976         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2977                         AC_VERB_SET_STREAM_FORMAT, format);
2978
2979         /* turn on again (if needed) */
2980         /* enable and set the channel status audio/data flag */
2981         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2982                 snd_hda_codec_write(codec,
2983                                 nvhdmi_master_con_nid_7x,
2984                                 0,
2985                                 AC_VERB_SET_DIGI_CONVERT_1,
2986                                 spdif->ctls & 0xff);
2987                 snd_hda_codec_write(codec,
2988                                 nvhdmi_master_con_nid_7x,
2989                                 0,
2990                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2991         }
2992
2993         for (i = 0; i < 4; i++) {
2994                 if (chs == 2)
2995                         channel_id = 0;
2996                 else
2997                         channel_id = i * 2;
2998
2999                 /* turn off SPDIF once;
3000                  *otherwise the IEC958 bits won't be updated
3001                  */
3002                 if (codec->spdif_status_reset &&
3003                 (spdif->ctls & AC_DIG1_ENABLE))
3004                         snd_hda_codec_write(codec,
3005                                 nvhdmi_con_nids_7x[i],
3006                                 0,
3007                                 AC_VERB_SET_DIGI_CONVERT_1,
3008                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3009                 /* set the stream id */
3010                 snd_hda_codec_write(codec,
3011                                 nvhdmi_con_nids_7x[i],
3012                                 0,
3013                                 AC_VERB_SET_CHANNEL_STREAMID,
3014                                 (stream_tag << 4) | channel_id);
3015                 /* set the stream format */
3016                 snd_hda_codec_write(codec,
3017                                 nvhdmi_con_nids_7x[i],
3018                                 0,
3019                                 AC_VERB_SET_STREAM_FORMAT,
3020                                 format);
3021                 /* turn on again (if needed) */
3022                 /* enable and set the channel status audio/data flag */
3023                 if (codec->spdif_status_reset &&
3024                 (spdif->ctls & AC_DIG1_ENABLE)) {
3025                         snd_hda_codec_write(codec,
3026                                         nvhdmi_con_nids_7x[i],
3027                                         0,
3028                                         AC_VERB_SET_DIGI_CONVERT_1,
3029                                         spdif->ctls & 0xff);
3030                         snd_hda_codec_write(codec,
3031                                         nvhdmi_con_nids_7x[i],
3032                                         0,
3033                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3034                 }
3035         }
3036
3037         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
3038
3039         mutex_unlock(&codec->spdif_mutex);
3040         return 0;
3041 }
3042
3043 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
3044         .substreams = 1,
3045         .channels_min = 2,
3046         .channels_max = 8,
3047         .nid = nvhdmi_master_con_nid_7x,
3048         .rates = SUPPORTED_RATES,
3049         .maxbps = SUPPORTED_MAXBPS,
3050         .formats = SUPPORTED_FORMATS,
3051         .ops = {
3052                 .open = simple_playback_pcm_open,
3053                 .close = nvhdmi_8ch_7x_pcm_close,
3054                 .prepare = nvhdmi_8ch_7x_pcm_prepare
3055         },
3056 };
3057
3058 static int patch_nvhdmi_2ch(struct hda_codec *codec)
3059 {
3060         struct hdmi_spec *spec;
3061         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
3062                                     nvhdmi_master_pin_nid_7x);
3063         if (err < 0)
3064                 return err;
3065
3066         codec->patch_ops.init = nvhdmi_7x_init_2ch;
3067         /* override the PCM rates, etc, as the codec doesn't give full list */
3068         spec = codec->spec;
3069         spec->pcm_playback.rates = SUPPORTED_RATES;
3070         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
3071         spec->pcm_playback.formats = SUPPORTED_FORMATS;
3072         return 0;
3073 }
3074
3075 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
3076 {
3077         struct hdmi_spec *spec = codec->spec;
3078         int err = simple_playback_build_pcms(codec);
3079         if (!err) {
3080                 struct hda_pcm *info = get_pcm_rec(spec, 0);
3081                 info->own_chmap = true;
3082         }
3083         return err;
3084 }
3085
3086 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
3087 {
3088         struct hdmi_spec *spec = codec->spec;
3089         struct hda_pcm *info;
3090         struct snd_pcm_chmap *chmap;
3091         int err;
3092
3093         err = simple_playback_build_controls(codec);
3094         if (err < 0)
3095                 return err;
3096
3097         /* add channel maps */
3098         info = get_pcm_rec(spec, 0);
3099         err = snd_pcm_add_chmap_ctls(info->pcm,
3100                                      SNDRV_PCM_STREAM_PLAYBACK,
3101                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
3102         if (err < 0)
3103                 return err;
3104         switch (codec->preset->vendor_id) {
3105         case 0x10de0002:
3106         case 0x10de0003:
3107         case 0x10de0005:
3108         case 0x10de0006:
3109                 chmap->channel_mask = (1U << 2) | (1U << 8);
3110                 break;
3111         case 0x10de0007:
3112                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
3113         }
3114         return 0;
3115 }
3116
3117 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
3118 {
3119         struct hdmi_spec *spec;
3120         int err = patch_nvhdmi_2ch(codec);
3121         if (err < 0)
3122                 return err;
3123         spec = codec->spec;
3124         spec->multiout.max_channels = 8;
3125         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
3126         codec->patch_ops.init = nvhdmi_7x_init_8ch;
3127         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
3128         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
3129
3130         /* Initialize the audio infoframe channel mask and checksum to something
3131          * valid */
3132         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3133
3134         return 0;
3135 }
3136
3137 /*
3138  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3139  * - 0x10de0015
3140  * - 0x10de0040
3141  */
3142 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap *chmap,
3143                 struct hdac_cea_channel_speaker_allocation *cap, int channels)
3144 {
3145         if (cap->ca_index == 0x00 && channels == 2)
3146                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
3147
3148         /* If the speaker allocation matches the channel count, it is OK. */
3149         if (cap->channels != channels)
3150                 return -1;
3151
3152         /* all channels are remappable freely */
3153         return SNDRV_CTL_TLVT_CHMAP_VAR;
3154 }
3155
3156 static int nvhdmi_chmap_validate(struct hdac_chmap *chmap,
3157                 int ca, int chs, unsigned char *map)
3158 {
3159         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
3160                 return -EINVAL;
3161
3162         return 0;
3163 }
3164
3165 static int patch_nvhdmi(struct hda_codec *codec)
3166 {
3167         struct hdmi_spec *spec;
3168         int err;
3169
3170         err = patch_generic_hdmi(codec);
3171         if (err)
3172                 return err;
3173
3174         spec = codec->spec;
3175         spec->dyn_pin_out = true;
3176
3177         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3178                 nvhdmi_chmap_cea_alloc_validate_get_type;
3179         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3180
3181         return 0;
3182 }
3183
3184 /*
3185  * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3186  * accessed using vendor-defined verbs. These registers can be used for
3187  * interoperability between the HDA and HDMI drivers.
3188  */
3189
3190 /* Audio Function Group node */
3191 #define NVIDIA_AFG_NID 0x01
3192
3193 /*
3194  * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3195  * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3196  * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3197  * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3198  * additional bit (at position 30) to signal the validity of the format.
3199  *
3200  * | 31      | 30    | 29  16 | 15   0 |
3201  * +---------+-------+--------+--------+
3202  * | TRIGGER | VALID | UNUSED | FORMAT |
3203  * +-----------------------------------|
3204  *
3205  * Note that for the trigger bit to take effect it needs to change value
3206  * (i.e. it needs to be toggled).
3207  */
3208 #define NVIDIA_GET_SCRATCH0             0xfa6
3209 #define NVIDIA_SET_SCRATCH0_BYTE0       0xfa7
3210 #define NVIDIA_SET_SCRATCH0_BYTE1       0xfa8
3211 #define NVIDIA_SET_SCRATCH0_BYTE2       0xfa9
3212 #define NVIDIA_SET_SCRATCH0_BYTE3       0xfaa
3213 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3214 #define NVIDIA_SCRATCH_VALID   (1 << 6)
3215
3216 #define NVIDIA_GET_SCRATCH1             0xfab
3217 #define NVIDIA_SET_SCRATCH1_BYTE0       0xfac
3218 #define NVIDIA_SET_SCRATCH1_BYTE1       0xfad
3219 #define NVIDIA_SET_SCRATCH1_BYTE2       0xfae
3220 #define NVIDIA_SET_SCRATCH1_BYTE3       0xfaf
3221
3222 /*
3223  * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3224  * the format is invalidated so that the HDMI codec can be disabled.
3225  */
3226 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
3227 {
3228         unsigned int value;
3229
3230         /* bits [31:30] contain the trigger and valid bits */
3231         value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
3232                                    NVIDIA_GET_SCRATCH0, 0);
3233         value = (value >> 24) & 0xff;
3234
3235         /* bits [15:0] are used to store the HDA format */
3236         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3237                             NVIDIA_SET_SCRATCH0_BYTE0,
3238                             (format >> 0) & 0xff);
3239         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3240                             NVIDIA_SET_SCRATCH0_BYTE1,
3241                             (format >> 8) & 0xff);
3242
3243         /* bits [16:24] are unused */
3244         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3245                             NVIDIA_SET_SCRATCH0_BYTE2, 0);
3246
3247         /*
3248          * Bit 30 signals that the data is valid and hence that HDMI audio can
3249          * be enabled.
3250          */
3251         if (format == 0)
3252                 value &= ~NVIDIA_SCRATCH_VALID;
3253         else
3254                 value |= NVIDIA_SCRATCH_VALID;
3255
3256         /*
3257          * Whenever the trigger bit is toggled, an interrupt is raised in the
3258          * HDMI codec. The HDMI driver will use that as trigger to update its
3259          * configuration.
3260          */
3261         value ^= NVIDIA_SCRATCH_TRIGGER;
3262
3263         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3264                             NVIDIA_SET_SCRATCH0_BYTE3, value);
3265 }
3266
3267 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
3268                                   struct hda_codec *codec,
3269                                   unsigned int stream_tag,
3270                                   unsigned int format,
3271                                   struct snd_pcm_substream *substream)
3272 {
3273         int err;
3274
3275         err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
3276                                                 format, substream);
3277         if (err < 0)
3278                 return err;
3279
3280         /* notify the HDMI codec of the format change */
3281         tegra_hdmi_set_format(codec, format);
3282
3283         return 0;
3284 }
3285
3286 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3287                                   struct hda_codec *codec,
3288                                   struct snd_pcm_substream *substream)
3289 {
3290         /* invalidate the format in the HDMI codec */
3291         tegra_hdmi_set_format(codec, 0);
3292
3293         return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3294 }
3295
3296 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3297 {
3298         struct hdmi_spec *spec = codec->spec;
3299         unsigned int i;
3300
3301         for (i = 0; i < spec->num_pins; i++) {
3302                 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3303
3304                 if (pcm->pcm_type == type)
3305                         return pcm;
3306         }
3307
3308         return NULL;
3309 }
3310
3311 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3312 {
3313         struct hda_pcm_stream *stream;
3314         struct hda_pcm *pcm;
3315         int err;
3316
3317         err = generic_hdmi_build_pcms(codec);
3318         if (err < 0)
3319                 return err;
3320
3321         pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3322         if (!pcm)
3323                 return -ENODEV;
3324
3325         /*
3326          * Override ->prepare() and ->cleanup() operations to notify the HDMI
3327          * codec about format changes.
3328          */
3329         stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3330         stream->ops.prepare = tegra_hdmi_pcm_prepare;
3331         stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3332
3333         return 0;
3334 }
3335
3336 static int patch_tegra_hdmi(struct hda_codec *codec)
3337 {
3338         int err;
3339
3340         err = patch_generic_hdmi(codec);
3341         if (err)
3342                 return err;
3343
3344         codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3345
3346         return 0;
3347 }
3348
3349 /*
3350  * ATI/AMD-specific implementations
3351  */
3352
3353 #define is_amdhdmi_rev3_or_later(codec) \
3354         ((codec)->core.vendor_id == 0x1002aa01 && \
3355          ((codec)->core.revision_id & 0xff00) >= 0x0300)
3356 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3357
3358 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3359 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3360 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
3361 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
3362 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
3363 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
3364 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
3365 #define ATI_VERB_SET_HBR_CONTROL        0x77c
3366 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
3367 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
3368 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
3369 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
3370 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
3371 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3372 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
3373 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
3374 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
3375 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
3376 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
3377 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
3378 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
3379 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
3380 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
3381 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
3382 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
3383
3384 /* AMD specific HDA cvt verbs */
3385 #define ATI_VERB_SET_RAMP_RATE          0x770
3386 #define ATI_VERB_GET_RAMP_RATE          0xf70
3387
3388 #define ATI_OUT_ENABLE 0x1
3389
3390 #define ATI_MULTICHANNEL_MODE_PAIRED    0
3391 #define ATI_MULTICHANNEL_MODE_SINGLE    1
3392
3393 #define ATI_HBR_CAPABLE 0x01
3394 #define ATI_HBR_ENABLE 0x10
3395
3396 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3397                            unsigned char *buf, int *eld_size)
3398 {
3399         /* call hda_eld.c ATI/AMD-specific function */
3400         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3401                                     is_amdhdmi_rev3_or_later(codec));
3402 }
3403
3404 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
3405                                         int active_channels, int conn_type)
3406 {
3407         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3408 }
3409
3410 static int atihdmi_paired_swap_fc_lfe(int pos)
3411 {
3412         /*
3413          * ATI/AMD have automatic FC/LFE swap built-in
3414          * when in pairwise mapping mode.
3415          */
3416
3417         switch (pos) {
3418                 /* see channel_allocations[].speakers[] */
3419                 case 2: return 3;
3420                 case 3: return 2;
3421                 default: break;
3422         }
3423
3424         return pos;
3425 }
3426
3427 static int atihdmi_paired_chmap_validate(struct hdac_chmap *chmap,
3428                         int ca, int chs, unsigned char *map)
3429 {
3430         struct hdac_cea_channel_speaker_allocation *cap;
3431         int i, j;
3432
3433         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3434
3435         cap = snd_hdac_get_ch_alloc_from_ca(ca);
3436         for (i = 0; i < chs; ++i) {
3437                 int mask = snd_hdac_chmap_to_spk_mask(map[i]);
3438                 bool ok = false;
3439                 bool companion_ok = false;
3440
3441                 if (!mask)
3442                         continue;
3443
3444                 for (j = 0 + i % 2; j < 8; j += 2) {
3445                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3446                         if (cap->speakers[chan_idx] == mask) {
3447                                 /* channel is in a supported position */
3448                                 ok = true;
3449
3450                                 if (i % 2 == 0 && i + 1 < chs) {
3451                                         /* even channel, check the odd companion */
3452                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3453                                         int comp_mask_req = snd_hdac_chmap_to_spk_mask(map[i+1]);
3454                                         int comp_mask_act = cap->speakers[comp_chan_idx];
3455
3456                                         if (comp_mask_req == comp_mask_act)
3457                                                 companion_ok = true;
3458                                         else
3459                                                 return -EINVAL;
3460                                 }
3461                                 break;
3462                         }
3463                 }
3464
3465                 if (!ok)
3466                         return -EINVAL;
3467
3468                 if (companion_ok)
3469                         i++; /* companion channel already checked */
3470         }
3471
3472         return 0;
3473 }
3474
3475 static int atihdmi_pin_set_slot_channel(struct hdac_device *hdac,
3476                 hda_nid_t pin_nid, int hdmi_slot, int stream_channel)
3477 {
3478         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3479         int verb;
3480         int ati_channel_setup = 0;
3481
3482         if (hdmi_slot > 7)
3483                 return -EINVAL;
3484
3485         if (!has_amd_full_remap_support(codec)) {
3486                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3487
3488                 /* In case this is an odd slot but without stream channel, do not
3489                  * disable the slot since the corresponding even slot could have a
3490                  * channel. In case neither have a channel, the slot pair will be
3491                  * disabled when this function is called for the even slot. */
3492                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3493                         return 0;
3494
3495                 hdmi_slot -= hdmi_slot % 2;
3496
3497                 if (stream_channel != 0xf)
3498                         stream_channel -= stream_channel % 2;
3499         }
3500
3501         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3502
3503         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3504
3505         if (stream_channel != 0xf)
3506                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3507
3508         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3509 }
3510
3511 static int atihdmi_pin_get_slot_channel(struct hdac_device *hdac,
3512                                 hda_nid_t pin_nid, int asp_slot)
3513 {
3514         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3515         bool was_odd = false;
3516         int ati_asp_slot = asp_slot;
3517         int verb;
3518         int ati_channel_setup;
3519
3520         if (asp_slot > 7)
3521                 return -EINVAL;
3522
3523         if (!has_amd_full_remap_support(codec)) {
3524                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3525                 if (ati_asp_slot % 2 != 0) {
3526                         ati_asp_slot -= 1;
3527                         was_odd = true;
3528                 }
3529         }
3530
3531         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3532
3533         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3534
3535         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3536                 return 0xf;
3537
3538         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3539 }
3540
3541 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(
3542                 struct hdac_chmap *chmap,
3543                 struct hdac_cea_channel_speaker_allocation *cap,
3544                 int channels)
3545 {
3546         int c;
3547
3548         /*
3549          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3550          * we need to take that into account (a single channel may take 2
3551          * channel slots if we need to carry a silent channel next to it).
3552          * On Rev3+ AMD codecs this function is not used.
3553          */
3554         int chanpairs = 0;
3555
3556         /* We only produce even-numbered channel count TLVs */
3557         if ((channels % 2) != 0)
3558                 return -1;
3559
3560         for (c = 0; c < 7; c += 2) {
3561                 if (cap->speakers[c] || cap->speakers[c+1])
3562                         chanpairs++;
3563         }
3564
3565         if (chanpairs * 2 != channels)
3566                 return -1;
3567
3568         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3569 }
3570
3571 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct hdac_chmap *hchmap,
3572                 struct hdac_cea_channel_speaker_allocation *cap,
3573                 unsigned int *chmap, int channels)
3574 {
3575         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3576         int count = 0;
3577         int c;
3578
3579         for (c = 7; c >= 0; c--) {
3580                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3581                 int spk = cap->speakers[chan];
3582                 if (!spk) {
3583                         /* add N/A channel if the companion channel is occupied */
3584                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3585                                 chmap[count++] = SNDRV_CHMAP_NA;
3586
3587                         continue;
3588                 }
3589
3590                 chmap[count++] = snd_hdac_spk_to_chmap(spk);
3591         }
3592
3593         WARN_ON(count != channels);
3594 }
3595
3596 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3597                                  bool hbr)
3598 {
3599         int hbr_ctl, hbr_ctl_new;
3600
3601         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3602         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3603                 if (hbr)
3604                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3605                 else
3606                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3607
3608                 codec_dbg(codec,
3609                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3610                                 pin_nid,
3611                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
3612                                 hbr_ctl_new);
3613
3614                 if (hbr_ctl != hbr_ctl_new)
3615                         snd_hda_codec_write(codec, pin_nid, 0,
3616                                                 ATI_VERB_SET_HBR_CONTROL,
3617                                                 hbr_ctl_new);
3618
3619         } else if (hbr)
3620                 return -EINVAL;
3621
3622         return 0;
3623 }
3624
3625 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3626                                 hda_nid_t pin_nid, u32 stream_tag, int format)
3627 {
3628
3629         if (is_amdhdmi_rev3_or_later(codec)) {
3630                 int ramp_rate = 180; /* default as per AMD spec */
3631                 /* disable ramp-up/down for non-pcm as per AMD spec */
3632                 if (format & AC_FMT_TYPE_NON_PCM)
3633                         ramp_rate = 0;
3634
3635                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3636         }
3637
3638         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3639 }
3640
3641
3642 static int atihdmi_init(struct hda_codec *codec)
3643 {
3644         struct hdmi_spec *spec = codec->spec;
3645         int pin_idx, err;
3646
3647         err = generic_hdmi_init(codec);
3648
3649         if (err)
3650                 return err;
3651
3652         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3653                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3654
3655                 /* make sure downmix information in infoframe is zero */
3656                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3657
3658                 /* enable channel-wise remap mode if supported */
3659                 if (has_amd_full_remap_support(codec))
3660                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3661                                             ATI_VERB_SET_MULTICHANNEL_MODE,
3662                                             ATI_MULTICHANNEL_MODE_SINGLE);
3663         }
3664
3665         return 0;
3666 }
3667
3668 static int patch_atihdmi(struct hda_codec *codec)
3669 {
3670         struct hdmi_spec *spec;
3671         struct hdmi_spec_per_cvt *per_cvt;
3672         int err, cvt_idx;
3673
3674         err = patch_generic_hdmi(codec);
3675
3676         if (err)
3677                 return err;
3678
3679         codec->patch_ops.init = atihdmi_init;
3680
3681         spec = codec->spec;
3682
3683         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
3684         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
3685         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
3686         spec->ops.setup_stream = atihdmi_setup_stream;
3687
3688         spec->chmap.ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
3689         spec->chmap.ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
3690
3691         if (!has_amd_full_remap_support(codec)) {
3692                 /* override to ATI/AMD-specific versions with pairwise mapping */
3693                 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3694                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
3695                 spec->chmap.ops.cea_alloc_to_tlv_chmap =
3696                                 atihdmi_paired_cea_alloc_to_tlv_chmap;
3697                 spec->chmap.ops.chmap_validate = atihdmi_paired_chmap_validate;
3698         }
3699
3700         /* ATI/AMD converters do not advertise all of their capabilities */
3701         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
3702                 per_cvt = get_cvt(spec, cvt_idx);
3703                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
3704                 per_cvt->rates |= SUPPORTED_RATES;
3705                 per_cvt->formats |= SUPPORTED_FORMATS;
3706                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
3707         }
3708
3709         spec->chmap.channels_max = max(spec->chmap.channels_max, 8u);
3710
3711         return 0;
3712 }
3713
3714 /* VIA HDMI Implementation */
3715 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
3716 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
3717
3718 static int patch_via_hdmi(struct hda_codec *codec)
3719 {
3720         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
3721 }
3722
3723 /*
3724  * patch entries
3725  */
3726 static const struct hda_device_id snd_hda_id_hdmi[] = {
3727 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI",       patch_atihdmi),
3728 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI",       patch_atihdmi),
3729 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI",   patch_atihdmi),
3730 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI",        patch_atihdmi),
3731 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI",     patch_generic_hdmi),
3732 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI",     patch_generic_hdmi),
3733 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI",    patch_generic_hdmi),
3734 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3735 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3736 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3737 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3738 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI",    patch_nvhdmi_8ch_7x),
3739 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP",   patch_nvhdmi),
3740 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP",   patch_nvhdmi),
3741 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI",       patch_nvhdmi),
3742 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP",   patch_nvhdmi),
3743 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP",   patch_nvhdmi),
3744 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP",   patch_nvhdmi),
3745 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP",   patch_nvhdmi),
3746 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP",   patch_nvhdmi),
3747 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP",   patch_nvhdmi),
3748 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP",   patch_nvhdmi),
3749 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP",   patch_nvhdmi),
3750 /* 17 is known to be absent */
3751 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP",   patch_nvhdmi),
3752 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP",   patch_nvhdmi),
3753 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP",   patch_nvhdmi),
3754 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP",   patch_nvhdmi),
3755 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP",   patch_nvhdmi),
3756 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI",     patch_tegra_hdmi),
3757 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI",    patch_tegra_hdmi),
3758 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI",    patch_tegra_hdmi),
3759 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
3760 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP",   patch_nvhdmi),
3761 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP",   patch_nvhdmi),
3762 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP",   patch_nvhdmi),
3763 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP",   patch_nvhdmi),
3764 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP",   patch_nvhdmi),
3765 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP",   patch_nvhdmi),
3766 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP",   patch_nvhdmi),
3767 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI",       patch_nvhdmi_2ch),
3768 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP",   patch_nvhdmi),
3769 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP",   patch_nvhdmi),
3770 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP",   patch_nvhdmi),
3771 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP",   patch_nvhdmi),
3772 HDA_CODEC_ENTRY(0x10de0080, "GPU 80 HDMI/DP",   patch_nvhdmi),
3773 HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP",   patch_nvhdmi),
3774 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP",   patch_nvhdmi),
3775 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI",       patch_nvhdmi_2ch),
3776 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP",    patch_via_hdmi),
3777 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP",    patch_via_hdmi),
3778 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP",     patch_generic_hdmi),
3779 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP",     patch_generic_hdmi),
3780 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
3781 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI",    patch_generic_hdmi),
3782 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI",     patch_generic_hdmi),
3783 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI",   patch_generic_hdmi),
3784 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
3785 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_i915_cpt_hdmi),
3786 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_i915_cpt_hdmi),
3787 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI",     patch_i915_hsw_hdmi),
3788 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI",   patch_i915_hsw_hdmi),
3789 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI",     patch_i915_hsw_hdmi),
3790 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI",     patch_i915_hsw_hdmi),
3791 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI",    patch_i915_hsw_hdmi),
3792 HDA_CODEC_ENTRY(0x8086280d, "Geminilake HDMI",  patch_i915_glk_hdmi),
3793 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI",  patch_generic_hdmi),
3794 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi),
3795 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI",    patch_i915_byt_hdmi),
3796 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI",   patch_generic_hdmi),
3797 /* special ID for generic HDMI */
3798 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
3799 {} /* terminator */
3800 };
3801 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
3802
3803 MODULE_LICENSE("GPL");
3804 MODULE_DESCRIPTION("HDMI HD-audio codec");
3805 MODULE_ALIAS("snd-hda-codec-intelhdmi");
3806 MODULE_ALIAS("snd-hda-codec-nvhdmi");
3807 MODULE_ALIAS("snd-hda-codec-atihdmi");
3808
3809 static struct hda_codec_driver hdmi_driver = {
3810         .id = snd_hda_id_hdmi,
3811 };
3812
3813 module_hda_codec_driver(hdmi_driver);