3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6 * Copyright (c) 2006 ATI Technologies Inc.
7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
11 * Wu Fengguang <wfg@linux.intel.com>
14 * Wu Fengguang <wfg@linux.intel.com>
16 * This program is free software; you can redistribute it and/or modify it
17 * under the terms of the GNU General Public License as published by the Free
18 * Software Foundation; either version 2 of the License, or (at your option)
21 * This program is distributed in the hope that it will be useful, but
22 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
23 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software Foundation,
28 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
31 #include <linux/init.h>
32 #include <linux/delay.h>
33 #include <linux/slab.h>
34 #include <linux/module.h>
35 #include <sound/core.h>
36 #include <sound/jack.h>
37 #include <sound/asoundef.h>
38 #include <sound/tlv.h>
39 #include "hda_codec.h"
40 #include "hda_local.h"
43 static bool static_hdmi_pcm;
44 module_param(static_hdmi_pcm, bool, 0644);
45 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
47 #define is_haswell(codec) ((codec)->vendor_id == 0x80862807)
49 struct hdmi_spec_per_cvt {
52 unsigned int channels_min;
53 unsigned int channels_max;
59 /* max. connections to a widget */
60 #define HDA_MAX_CONNECTIONS 32
62 struct hdmi_spec_per_pin {
65 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
67 struct hda_codec *codec;
68 struct hdmi_eld sink_eld;
69 struct delayed_work work;
70 struct snd_kcontrol *eld_ctl;
72 bool setup; /* the stream has been set up by prepare callback */
73 int channels; /* current number of channels */
75 bool chmap_set; /* channel-map override by ALSA API? */
76 unsigned char chmap[8]; /* ALSA API channel-map */
77 char pcm_name[8]; /* filled in build_pcm callbacks */
82 struct snd_array cvts; /* struct hdmi_spec_per_cvt */
83 hda_nid_t cvt_nids[4]; /* only for haswell fix */
86 struct snd_array pins; /* struct hdmi_spec_per_pin */
87 struct snd_array pcm_rec; /* struct hda_pcm */
88 unsigned int channels_max; /* max over all cvts */
90 struct hdmi_eld temp_eld;
92 * Non-generic ATI/NVIDIA specific
94 struct hda_multi_out multiout;
95 struct hda_pcm_stream pcm_playback;
99 struct hdmi_audio_infoframe {
106 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
110 u8 LFEPBL01_LSV36_DM_INH7;
113 struct dp_audio_infoframe {
116 u8 ver; /* 0x11 << 2 */
118 u8 CC02_CT47; /* match with HDMI infoframe from this on */
122 u8 LFEPBL01_LSV36_DM_INH7;
125 union audio_infoframe {
126 struct hdmi_audio_infoframe hdmi;
127 struct dp_audio_infoframe dp;
132 * CEA speaker placement:
135 * FLW FL FLC FC FRC FR FRW
142 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
143 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
145 enum cea_speaker_placement {
146 FL = (1 << 0), /* Front Left */
147 FC = (1 << 1), /* Front Center */
148 FR = (1 << 2), /* Front Right */
149 FLC = (1 << 3), /* Front Left Center */
150 FRC = (1 << 4), /* Front Right Center */
151 RL = (1 << 5), /* Rear Left */
152 RC = (1 << 6), /* Rear Center */
153 RR = (1 << 7), /* Rear Right */
154 RLC = (1 << 8), /* Rear Left Center */
155 RRC = (1 << 9), /* Rear Right Center */
156 LFE = (1 << 10), /* Low Frequency Effect */
157 FLW = (1 << 11), /* Front Left Wide */
158 FRW = (1 << 12), /* Front Right Wide */
159 FLH = (1 << 13), /* Front Left High */
160 FCH = (1 << 14), /* Front Center High */
161 FRH = (1 << 15), /* Front Right High */
162 TC = (1 << 16), /* Top Center */
166 * ELD SA bits in the CEA Speaker Allocation data block
168 static int eld_speaker_allocation_bits[] = {
176 /* the following are not defined in ELD yet */
183 struct cea_channel_speaker_allocation {
187 /* derived values, just for convenience */
195 * surround40 surround41 surround50 surround51 surround71
196 * ch0 front left = = = =
197 * ch1 front right = = = =
198 * ch2 rear left = = = =
199 * ch3 rear right = = = =
200 * ch4 LFE center center center
205 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
207 static int hdmi_channel_mapping[0x32][8] = {
209 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
211 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
213 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
215 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
217 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
219 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
221 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
223 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
225 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
229 * This is an ordered list!
231 * The preceding ones have better chances to be selected by
232 * hdmi_channel_allocation().
234 static struct cea_channel_speaker_allocation channel_allocations[] = {
235 /* channel: 7 6 5 4 3 2 1 0 */
236 { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
238 { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
240 { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
242 { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
244 { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
246 { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
248 { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
250 { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
252 { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
254 { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
255 { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
256 { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
257 { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
258 { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
259 { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
260 { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
261 { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
262 { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
263 { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
264 { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
265 { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
266 { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
267 { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
268 { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
269 { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
270 { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
271 { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
272 { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
273 { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
274 { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
275 { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
276 { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
277 { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
278 { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
279 { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
280 { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
281 { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
282 { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
283 { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
284 { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
285 { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
286 { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
287 { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
288 { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
289 { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
290 { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
291 { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
292 { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
293 { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
294 { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
302 #define get_pin(spec, idx) \
303 ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
304 #define get_cvt(spec, idx) \
305 ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
306 #define get_pcm_rec(spec, idx) \
307 ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
309 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
313 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
314 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
317 snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
321 static int hinfo_to_pin_index(struct hdmi_spec *spec,
322 struct hda_pcm_stream *hinfo)
326 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
327 if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
330 snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
334 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
338 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
339 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
342 snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
346 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
347 struct snd_ctl_elem_info *uinfo)
349 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
350 struct hdmi_spec *spec = codec->spec;
351 struct hdmi_eld *eld;
354 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
356 pin_idx = kcontrol->private_value;
357 eld = &get_pin(spec, pin_idx)->sink_eld;
359 mutex_lock(&eld->lock);
360 uinfo->count = eld->eld_valid ? eld->eld_size : 0;
361 mutex_unlock(&eld->lock);
366 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
367 struct snd_ctl_elem_value *ucontrol)
369 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
370 struct hdmi_spec *spec = codec->spec;
371 struct hdmi_eld *eld;
374 pin_idx = kcontrol->private_value;
375 eld = &get_pin(spec, pin_idx)->sink_eld;
377 mutex_lock(&eld->lock);
378 if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
379 mutex_unlock(&eld->lock);
384 memset(ucontrol->value.bytes.data, 0,
385 ARRAY_SIZE(ucontrol->value.bytes.data));
387 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
389 mutex_unlock(&eld->lock);
394 static struct snd_kcontrol_new eld_bytes_ctl = {
395 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
396 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
398 .info = hdmi_eld_ctl_info,
399 .get = hdmi_eld_ctl_get,
402 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
405 struct snd_kcontrol *kctl;
406 struct hdmi_spec *spec = codec->spec;
409 kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
412 kctl->private_value = pin_idx;
413 kctl->id.device = device;
415 err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
419 get_pin(spec, pin_idx)->eld_ctl = kctl;
424 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
425 int *packet_index, int *byte_index)
429 val = snd_hda_codec_read(codec, pin_nid, 0,
430 AC_VERB_GET_HDMI_DIP_INDEX, 0);
432 *packet_index = val >> 5;
433 *byte_index = val & 0x1f;
437 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
438 int packet_index, int byte_index)
442 val = (packet_index << 5) | (byte_index & 0x1f);
444 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
447 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
450 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
453 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
456 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
457 snd_hda_codec_write(codec, pin_nid, 0,
458 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
459 /* Enable pin out: some machines with GM965 gets broken output when
460 * the pin is disabled or changed while using with HDMI
462 snd_hda_codec_write(codec, pin_nid, 0,
463 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
466 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
468 return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
469 AC_VERB_GET_CVT_CHAN_COUNT, 0);
472 static void hdmi_set_channel_count(struct hda_codec *codec,
473 hda_nid_t cvt_nid, int chs)
475 if (chs != hdmi_get_channel_count(codec, cvt_nid))
476 snd_hda_codec_write(codec, cvt_nid, 0,
477 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
482 * Channel mapping routines
486 * Compute derived values in channel_allocations[].
488 static void init_channel_allocations(void)
491 struct cea_channel_speaker_allocation *p;
493 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
494 p = channel_allocations + i;
497 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
498 if (p->speakers[j]) {
500 p->spk_mask |= p->speakers[j];
505 static int get_channel_allocation_order(int ca)
509 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
510 if (channel_allocations[i].ca_index == ca)
517 * The transformation takes two steps:
519 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
520 * spk_mask => (channel_allocations[]) => ai->CA
522 * TODO: it could select the wrong CA from multiple candidates.
524 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
529 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
532 * CA defaults to 0 for basic stereo audio
538 * expand ELD's speaker allocation mask
540 * ELD tells the speaker mask in a compact(paired) form,
541 * expand ELD's notions to match the ones used by Audio InfoFrame.
543 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
544 if (eld->info.spk_alloc & (1 << i))
545 spk_mask |= eld_speaker_allocation_bits[i];
548 /* search for the first working match in the CA table */
549 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
550 if (channels == channel_allocations[i].channels &&
551 (spk_mask & channel_allocations[i].spk_mask) ==
552 channel_allocations[i].spk_mask) {
553 ca = channel_allocations[i].ca_index;
559 /* if there was no match, select the regular ALSA channel
560 * allocation with the matching number of channels */
561 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
562 if (channels == channel_allocations[i].channels) {
563 ca = channel_allocations[i].ca_index;
569 snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
570 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
576 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
579 #ifdef CONFIG_SND_DEBUG_VERBOSE
583 for (i = 0; i < 8; i++) {
584 slot = snd_hda_codec_read(codec, pin_nid, 0,
585 AC_VERB_GET_HDMI_CHAN_SLOT, i);
586 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
587 slot >> 4, slot & 0xf);
593 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
598 struct cea_channel_speaker_allocation *ch_alloc;
602 int non_pcm_mapping[8];
604 order = get_channel_allocation_order(ca);
605 ch_alloc = &channel_allocations[order];
607 if (hdmi_channel_mapping[ca][1] == 0) {
609 /* fill actual channel mappings in ALSA channel (i) order */
610 for (i = 0; i < ch_alloc->channels; i++) {
611 while (!ch_alloc->speakers[7 - hdmi_slot] && !WARN_ON(hdmi_slot >= 8))
612 hdmi_slot++; /* skip zero slots */
614 hdmi_channel_mapping[ca][i] = (i << 4) | hdmi_slot++;
616 /* fill the rest of the slots with ALSA channel 0xf */
617 for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++)
618 if (!ch_alloc->speakers[7 - hdmi_slot])
619 hdmi_channel_mapping[ca][i++] = (0xf << 4) | hdmi_slot;
623 for (i = 0; i < ch_alloc->channels; i++)
624 non_pcm_mapping[i] = i | (i << 4);
626 non_pcm_mapping[i] = 0xf | (i << 4);
629 for (i = 0; i < 8; i++) {
630 err = snd_hda_codec_write(codec, pin_nid, 0,
631 AC_VERB_SET_HDMI_CHAN_SLOT,
632 non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
634 snd_printdd(KERN_NOTICE
635 "HDMI: channel mapping failed\n");
640 hdmi_debug_channel_mapping(codec, pin_nid);
643 struct channel_map_table {
644 unsigned char map; /* ALSA API channel map position */
645 unsigned char cea_slot; /* CEA slot value */
646 int spk_mask; /* speaker position bit mask */
649 static struct channel_map_table map_tables[] = {
650 { SNDRV_CHMAP_FL, 0x00, FL },
651 { SNDRV_CHMAP_FR, 0x01, FR },
652 { SNDRV_CHMAP_RL, 0x04, RL },
653 { SNDRV_CHMAP_RR, 0x05, RR },
654 { SNDRV_CHMAP_LFE, 0x02, LFE },
655 { SNDRV_CHMAP_FC, 0x03, FC },
656 { SNDRV_CHMAP_RLC, 0x06, RLC },
657 { SNDRV_CHMAP_RRC, 0x07, RRC },
661 /* from ALSA API channel position to speaker bit mask */
662 static int to_spk_mask(unsigned char c)
664 struct channel_map_table *t = map_tables;
665 for (; t->map; t++) {
672 /* from ALSA API channel position to CEA slot */
673 static int to_cea_slot(unsigned char c)
675 struct channel_map_table *t = map_tables;
676 for (; t->map; t++) {
683 /* from CEA slot to ALSA API channel position */
684 static int from_cea_slot(unsigned char c)
686 struct channel_map_table *t = map_tables;
687 for (; t->map; t++) {
688 if (t->cea_slot == c)
694 /* from speaker bit mask to ALSA API channel position */
695 static int spk_to_chmap(int spk)
697 struct channel_map_table *t = map_tables;
698 for (; t->map; t++) {
699 if (t->spk_mask == spk)
705 /* get the CA index corresponding to the given ALSA API channel map */
706 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
708 int i, spks = 0, spk_mask = 0;
710 for (i = 0; i < chs; i++) {
711 int mask = to_spk_mask(map[i]);
718 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
719 if ((chs == channel_allocations[i].channels ||
720 spks == channel_allocations[i].channels) &&
721 (spk_mask & channel_allocations[i].spk_mask) ==
722 channel_allocations[i].spk_mask)
723 return channel_allocations[i].ca_index;
728 /* set up the channel slots for the given ALSA API channel map */
729 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
731 int chs, unsigned char *map)
734 for (i = 0; i < 8; i++) {
737 val = to_cea_slot(map[i]);
741 err = snd_hda_codec_write(codec, pin_nid, 0,
742 AC_VERB_SET_HDMI_CHAN_SLOT, val);
749 /* store ALSA API channel map from the current default map */
750 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
753 int ordered_ca = get_channel_allocation_order(ca);
754 for (i = 0; i < 8; i++) {
755 if (i < channel_allocations[ordered_ca].channels)
756 map[i] = from_cea_slot(hdmi_channel_mapping[ca][i] & 0x0f);
762 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
763 hda_nid_t pin_nid, bool non_pcm, int ca,
764 int channels, unsigned char *map,
767 if (!non_pcm && chmap_set) {
768 hdmi_manual_setup_channel_mapping(codec, pin_nid,
771 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
772 hdmi_setup_fake_chmap(map, ca);
777 * Audio InfoFrame routines
781 * Enable Audio InfoFrame Transmission
783 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
786 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
787 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
792 * Disable Audio InfoFrame Transmission
794 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
797 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
798 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
802 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
804 #ifdef CONFIG_SND_DEBUG_VERBOSE
808 size = snd_hdmi_get_eld_size(codec, pin_nid);
809 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
811 for (i = 0; i < 8; i++) {
812 size = snd_hda_codec_read(codec, pin_nid, 0,
813 AC_VERB_GET_HDMI_DIP_SIZE, i);
814 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
819 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
825 for (i = 0; i < 8; i++) {
826 size = snd_hda_codec_read(codec, pin_nid, 0,
827 AC_VERB_GET_HDMI_DIP_SIZE, i);
831 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
832 for (j = 1; j < 1000; j++) {
833 hdmi_write_dip_byte(codec, pin_nid, 0x0);
834 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
836 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
838 if (bi == 0) /* byte index wrapped around */
842 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
848 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
850 u8 *bytes = (u8 *)hdmi_ai;
854 hdmi_ai->checksum = 0;
856 for (i = 0; i < sizeof(*hdmi_ai); i++)
859 hdmi_ai->checksum = -sum;
862 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
868 hdmi_debug_dip_size(codec, pin_nid);
869 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
871 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
872 for (i = 0; i < size; i++)
873 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
876 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
882 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
886 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
887 for (i = 0; i < size; i++) {
888 val = snd_hda_codec_read(codec, pin_nid, 0,
889 AC_VERB_GET_HDMI_DIP_DATA, 0);
897 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
898 struct hdmi_spec_per_pin *per_pin,
901 hda_nid_t pin_nid = per_pin->pin_nid;
902 int channels = per_pin->channels;
903 struct hdmi_eld *eld;
905 union audio_infoframe ai;
910 if (is_haswell(codec))
911 snd_hda_codec_write(codec, pin_nid, 0,
912 AC_VERB_SET_AMP_GAIN_MUTE,
915 eld = &per_pin->sink_eld;
916 if (!eld->monitor_present)
919 if (!non_pcm && per_pin->chmap_set)
920 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
922 ca = hdmi_channel_allocation(eld, channels);
926 memset(&ai, 0, sizeof(ai));
927 if (eld->info.conn_type == 0) { /* HDMI */
928 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
930 hdmi_ai->type = 0x84;
933 hdmi_ai->CC02_CT47 = channels - 1;
935 hdmi_checksum_audio_infoframe(hdmi_ai);
936 } else if (eld->info.conn_type == 1) { /* DisplayPort */
937 struct dp_audio_infoframe *dp_ai = &ai.dp;
941 dp_ai->ver = 0x11 << 2;
942 dp_ai->CC02_CT47 = channels - 1;
945 snd_printd("HDMI: unknown connection type at pin %d\n",
951 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
952 * sizeof(*dp_ai) to avoid partial match/update problems when
953 * the user switches between HDMI/DP monitors.
955 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
957 snd_printdd("hdmi_setup_audio_infoframe: "
958 "pin=%d channels=%d\n",
961 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
962 channels, per_pin->chmap,
964 hdmi_stop_infoframe_trans(codec, pin_nid);
965 hdmi_fill_audio_infoframe(codec, pin_nid,
966 ai.bytes, sizeof(ai));
967 hdmi_start_infoframe_trans(codec, pin_nid);
969 /* For non-pcm audio switch, setup new channel mapping
971 if (per_pin->non_pcm != non_pcm)
972 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
973 channels, per_pin->chmap,
977 per_pin->non_pcm = non_pcm;
985 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
987 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
989 struct hdmi_spec *spec = codec->spec;
990 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
993 struct hda_jack_tbl *jack;
994 int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
996 jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
1000 jack->jack_dirty = 1;
1002 _snd_printd(SND_PR_VERBOSE,
1003 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
1004 codec->addr, pin_nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
1005 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
1007 pin_idx = pin_nid_to_pin_index(spec, pin_nid);
1011 hdmi_present_sense(get_pin(spec, pin_idx), 1);
1012 snd_hda_jack_report_sync(codec);
1015 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
1017 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1018 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1019 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
1020 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
1023 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1038 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1040 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1041 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1043 if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1044 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
1049 hdmi_intrinsic_event(codec, res);
1051 hdmi_non_intrinsic_event(codec, res);
1054 static void haswell_verify_D0(struct hda_codec *codec,
1055 hda_nid_t cvt_nid, hda_nid_t nid)
1059 /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1060 * thus pins could only choose converter 0 for use. Make sure the
1061 * converters are in correct power state */
1062 if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
1063 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1065 if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
1066 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1069 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1070 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1071 snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1079 /* HBR should be Non-PCM, 8 channels */
1080 #define is_hbr_format(format) \
1081 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1083 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1084 hda_nid_t pin_nid, u32 stream_tag, int format)
1089 if (is_haswell(codec))
1090 haswell_verify_D0(codec, cvt_nid, pin_nid);
1092 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1093 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1094 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1096 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1097 if (is_hbr_format(format))
1098 new_pinctl |= AC_PINCTL_EPT_HBR;
1100 new_pinctl |= AC_PINCTL_EPT_NATIVE;
1102 snd_printdd("hdmi_setup_stream: "
1103 "NID=0x%x, %spinctl=0x%x\n",
1105 pinctl == new_pinctl ? "" : "new-",
1108 if (pinctl != new_pinctl)
1109 snd_hda_codec_write(codec, pin_nid, 0,
1110 AC_VERB_SET_PIN_WIDGET_CONTROL,
1114 if (is_hbr_format(format) && !new_pinctl) {
1115 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
1119 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1123 static int hdmi_choose_cvt(struct hda_codec *codec,
1124 int pin_idx, int *cvt_id, int *mux_id)
1126 struct hdmi_spec *spec = codec->spec;
1127 struct hdmi_spec_per_pin *per_pin;
1128 struct hdmi_spec_per_cvt *per_cvt = NULL;
1129 int cvt_idx, mux_idx = 0;
1131 per_pin = get_pin(spec, pin_idx);
1133 /* Dynamically assign converter to stream */
1134 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1135 per_cvt = get_cvt(spec, cvt_idx);
1137 /* Must not already be assigned */
1138 if (per_cvt->assigned)
1140 /* Must be in pin's mux's list of converters */
1141 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1142 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1144 /* Not in mux list */
1145 if (mux_idx == per_pin->num_mux_nids)
1150 /* No free converters */
1151 if (cvt_idx == spec->num_cvts)
1162 static void haswell_config_cvts(struct hda_codec *codec,
1163 hda_nid_t pin_nid, int mux_idx)
1165 struct hdmi_spec *spec = codec->spec;
1166 hda_nid_t nid, end_nid;
1168 struct hdmi_spec_per_cvt *per_cvt;
1170 /* configure all pins, including "no physical connection" ones */
1171 end_nid = codec->start_nid + codec->num_nodes;
1172 for (nid = codec->start_nid; nid < end_nid; nid++) {
1173 unsigned int wid_caps = get_wcaps(codec, nid);
1174 unsigned int wid_type = get_wcaps_type(wid_caps);
1176 if (wid_type != AC_WID_PIN)
1182 curr = snd_hda_codec_read(codec, nid, 0,
1183 AC_VERB_GET_CONNECT_SEL, 0);
1184 if (curr != mux_idx)
1187 /* choose an unassigned converter. The conveters in the
1188 * connection list are in the same order as in the codec.
1190 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1191 per_cvt = get_cvt(spec, cvt_idx);
1192 if (!per_cvt->assigned) {
1193 snd_printdd("choose cvt %d for pin nid %d\n",
1195 snd_hda_codec_write_cache(codec, nid, 0,
1196 AC_VERB_SET_CONNECT_SEL,
1207 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1208 struct hda_codec *codec,
1209 struct snd_pcm_substream *substream)
1211 struct hdmi_spec *spec = codec->spec;
1212 struct snd_pcm_runtime *runtime = substream->runtime;
1213 int pin_idx, cvt_idx, mux_idx = 0;
1214 struct hdmi_spec_per_pin *per_pin;
1215 struct hdmi_eld *eld;
1216 struct hdmi_spec_per_cvt *per_cvt = NULL;
1219 /* Validate hinfo */
1220 pin_idx = hinfo_to_pin_index(spec, hinfo);
1221 if (snd_BUG_ON(pin_idx < 0))
1223 per_pin = get_pin(spec, pin_idx);
1224 eld = &per_pin->sink_eld;
1226 err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1230 per_cvt = get_cvt(spec, cvt_idx);
1231 /* Claim converter */
1232 per_cvt->assigned = 1;
1233 hinfo->nid = per_cvt->cvt_nid;
1235 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1236 AC_VERB_SET_CONNECT_SEL,
1239 /* configure unused pins to choose other converters */
1240 if (is_haswell(codec))
1241 haswell_config_cvts(codec, per_pin->pin_nid, mux_idx);
1243 snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1245 /* Initially set the converter's capabilities */
1246 hinfo->channels_min = per_cvt->channels_min;
1247 hinfo->channels_max = per_cvt->channels_max;
1248 hinfo->rates = per_cvt->rates;
1249 hinfo->formats = per_cvt->formats;
1250 hinfo->maxbps = per_cvt->maxbps;
1252 /* Restrict capabilities by ELD if this isn't disabled */
1253 if (!static_hdmi_pcm && eld->eld_valid) {
1254 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1255 if (hinfo->channels_min > hinfo->channels_max ||
1256 !hinfo->rates || !hinfo->formats) {
1257 per_cvt->assigned = 0;
1259 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1264 /* Store the updated parameters */
1265 runtime->hw.channels_min = hinfo->channels_min;
1266 runtime->hw.channels_max = hinfo->channels_max;
1267 runtime->hw.formats = hinfo->formats;
1268 runtime->hw.rates = hinfo->rates;
1270 snd_pcm_hw_constraint_step(substream->runtime, 0,
1271 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1276 * HDA/HDMI auto parsing
1278 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1280 struct hdmi_spec *spec = codec->spec;
1281 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1282 hda_nid_t pin_nid = per_pin->pin_nid;
1284 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1285 snd_printk(KERN_WARNING
1286 "HDMI: pin %d wcaps %#x "
1287 "does not support connection list\n",
1288 pin_nid, get_wcaps(codec, pin_nid));
1292 per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1294 HDA_MAX_CONNECTIONS);
1299 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1301 struct hda_codec *codec = per_pin->codec;
1302 struct hdmi_spec *spec = codec->spec;
1303 struct hdmi_eld *eld = &spec->temp_eld;
1304 struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1305 hda_nid_t pin_nid = per_pin->pin_nid;
1307 * Always execute a GetPinSense verb here, even when called from
1308 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1309 * response's PD bit is not the real PD value, but indicates that
1310 * the real PD value changed. An older version of the HD-audio
1311 * specification worked this way. Hence, we just ignore the data in
1312 * the unsolicited response to avoid custom WARs.
1314 int present = snd_hda_pin_sense(codec, pin_nid);
1315 bool update_eld = false;
1316 bool eld_changed = false;
1318 pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1319 if (pin_eld->monitor_present)
1320 eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
1322 eld->eld_valid = false;
1324 _snd_printd(SND_PR_VERBOSE,
1325 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1326 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1328 if (eld->eld_valid) {
1329 if (snd_hdmi_get_eld(codec, pin_nid, eld->eld_buffer,
1330 &eld->eld_size) < 0)
1331 eld->eld_valid = false;
1333 memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
1334 if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
1336 eld->eld_valid = false;
1339 if (eld->eld_valid) {
1340 snd_hdmi_show_eld(&eld->info);
1344 queue_delayed_work(codec->bus->workq,
1346 msecs_to_jiffies(300));
1351 mutex_lock(&pin_eld->lock);
1352 if (pin_eld->eld_valid && !eld->eld_valid) {
1357 bool old_eld_valid = pin_eld->eld_valid;
1358 pin_eld->eld_valid = eld->eld_valid;
1359 eld_changed = pin_eld->eld_size != eld->eld_size ||
1360 memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1361 eld->eld_size) != 0;
1363 memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1365 pin_eld->eld_size = eld->eld_size;
1366 pin_eld->info = eld->info;
1368 /* Haswell-specific workaround: re-setup when the transcoder is
1369 * changed during the stream playback
1371 if (is_haswell(codec) &&
1372 eld->eld_valid && !old_eld_valid && per_pin->setup)
1373 hdmi_setup_audio_infoframe(codec, per_pin,
1376 mutex_unlock(&pin_eld->lock);
1379 snd_ctl_notify(codec->bus->card,
1380 SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
1381 &per_pin->eld_ctl->id);
1384 static void hdmi_repoll_eld(struct work_struct *work)
1386 struct hdmi_spec_per_pin *per_pin =
1387 container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1389 if (per_pin->repoll_count++ > 6)
1390 per_pin->repoll_count = 0;
1392 hdmi_present_sense(per_pin, per_pin->repoll_count);
1395 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1398 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1400 struct hdmi_spec *spec = codec->spec;
1401 unsigned int caps, config;
1403 struct hdmi_spec_per_pin *per_pin;
1406 caps = snd_hda_query_pin_caps(codec, pin_nid);
1407 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1410 config = snd_hda_codec_get_pincfg(codec, pin_nid);
1411 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1414 if (is_haswell(codec))
1415 intel_haswell_fixup_connect_list(codec, pin_nid);
1417 pin_idx = spec->num_pins;
1418 per_pin = snd_array_new(&spec->pins);
1422 per_pin->pin_nid = pin_nid;
1423 per_pin->non_pcm = false;
1425 err = hdmi_read_pin_conn(codec, pin_idx);
1434 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1436 struct hdmi_spec *spec = codec->spec;
1437 struct hdmi_spec_per_cvt *per_cvt;
1441 chans = get_wcaps(codec, cvt_nid);
1442 chans = get_wcaps_channels(chans);
1444 per_cvt = snd_array_new(&spec->cvts);
1448 per_cvt->cvt_nid = cvt_nid;
1449 per_cvt->channels_min = 2;
1451 per_cvt->channels_max = chans;
1452 if (chans > spec->channels_max)
1453 spec->channels_max = chans;
1456 err = snd_hda_query_supported_pcm(codec, cvt_nid,
1463 if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1464 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1470 static int hdmi_parse_codec(struct hda_codec *codec)
1475 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1476 if (!nid || nodes < 0) {
1477 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1481 for (i = 0; i < nodes; i++, nid++) {
1485 caps = get_wcaps(codec, nid);
1486 type = get_wcaps_type(caps);
1488 if (!(caps & AC_WCAP_DIGITAL))
1492 case AC_WID_AUD_OUT:
1493 hdmi_add_cvt(codec, nid);
1496 hdmi_add_pin(codec, nid);
1502 /* We're seeing some problems with unsolicited hot plug events on
1503 * PantherPoint after S3, if this is not enabled */
1504 if (codec->vendor_id == 0x80862806)
1505 codec->bus->power_keep_link_on = 1;
1507 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1508 * can be lost and presence sense verb will become inaccurate if the
1509 * HDA link is powered off at hot plug or hw initialization time.
1511 else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1513 codec->bus->power_keep_link_on = 1;
1521 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1523 struct hda_spdif_out *spdif;
1526 mutex_lock(&codec->spdif_mutex);
1527 spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1528 non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1529 mutex_unlock(&codec->spdif_mutex);
1538 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1539 struct hda_codec *codec,
1540 unsigned int stream_tag,
1541 unsigned int format,
1542 struct snd_pcm_substream *substream)
1544 hda_nid_t cvt_nid = hinfo->nid;
1545 struct hdmi_spec *spec = codec->spec;
1546 int pin_idx = hinfo_to_pin_index(spec, hinfo);
1547 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1548 hda_nid_t pin_nid = per_pin->pin_nid;
1551 non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1552 per_pin->channels = substream->runtime->channels;
1553 per_pin->setup = true;
1555 hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
1557 hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1559 return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1562 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1563 struct hda_codec *codec,
1564 struct snd_pcm_substream *substream)
1566 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1570 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1571 struct hda_codec *codec,
1572 struct snd_pcm_substream *substream)
1574 struct hdmi_spec *spec = codec->spec;
1575 int cvt_idx, pin_idx;
1576 struct hdmi_spec_per_cvt *per_cvt;
1577 struct hdmi_spec_per_pin *per_pin;
1580 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1581 if (snd_BUG_ON(cvt_idx < 0))
1583 per_cvt = get_cvt(spec, cvt_idx);
1585 snd_BUG_ON(!per_cvt->assigned);
1586 per_cvt->assigned = 0;
1589 pin_idx = hinfo_to_pin_index(spec, hinfo);
1590 if (snd_BUG_ON(pin_idx < 0))
1592 per_pin = get_pin(spec, pin_idx);
1594 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1595 per_pin->chmap_set = false;
1596 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1598 per_pin->setup = false;
1599 per_pin->channels = 0;
1605 static const struct hda_pcm_ops generic_ops = {
1606 .open = hdmi_pcm_open,
1607 .close = hdmi_pcm_close,
1608 .prepare = generic_hdmi_playback_pcm_prepare,
1609 .cleanup = generic_hdmi_playback_pcm_cleanup,
1613 * ALSA API channel-map control callbacks
1615 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1616 struct snd_ctl_elem_info *uinfo)
1618 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1619 struct hda_codec *codec = info->private_data;
1620 struct hdmi_spec *spec = codec->spec;
1621 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1622 uinfo->count = spec->channels_max;
1623 uinfo->value.integer.min = 0;
1624 uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1628 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
1629 unsigned int size, unsigned int __user *tlv)
1631 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1632 struct hda_codec *codec = info->private_data;
1633 struct hdmi_spec *spec = codec->spec;
1634 const unsigned int valid_mask =
1635 FL | FR | RL | RR | LFE | FC | RLC | RRC;
1636 unsigned int __user *dst;
1641 if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
1645 for (chs = 2; chs <= spec->channels_max; chs++) {
1647 struct cea_channel_speaker_allocation *cap;
1648 cap = channel_allocations;
1649 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
1650 int chs_bytes = chs * 4;
1651 if (cap->channels != chs)
1653 if (cap->spk_mask & ~valid_mask)
1657 if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) ||
1658 put_user(chs_bytes, dst + 1))
1663 if (size < chs_bytes)
1667 for (c = 7; c >= 0; c--) {
1668 int spk = cap->speakers[c];
1671 if (put_user(spk_to_chmap(spk), dst))
1677 if (put_user(count, tlv + 1))
1682 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
1683 struct snd_ctl_elem_value *ucontrol)
1685 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1686 struct hda_codec *codec = info->private_data;
1687 struct hdmi_spec *spec = codec->spec;
1688 int pin_idx = kcontrol->private_value;
1689 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1692 for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
1693 ucontrol->value.integer.value[i] = per_pin->chmap[i];
1697 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
1698 struct snd_ctl_elem_value *ucontrol)
1700 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1701 struct hda_codec *codec = info->private_data;
1702 struct hdmi_spec *spec = codec->spec;
1703 int pin_idx = kcontrol->private_value;
1704 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1705 unsigned int ctl_idx;
1706 struct snd_pcm_substream *substream;
1707 unsigned char chmap[8];
1708 int i, ca, prepared = 0;
1710 ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1711 substream = snd_pcm_chmap_substream(info, ctl_idx);
1712 if (!substream || !substream->runtime)
1713 return 0; /* just for avoiding error from alsactl restore */
1714 switch (substream->runtime->status->state) {
1715 case SNDRV_PCM_STATE_OPEN:
1716 case SNDRV_PCM_STATE_SETUP:
1718 case SNDRV_PCM_STATE_PREPARED:
1724 memset(chmap, 0, sizeof(chmap));
1725 for (i = 0; i < ARRAY_SIZE(chmap); i++)
1726 chmap[i] = ucontrol->value.integer.value[i];
1727 if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
1729 ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
1732 per_pin->chmap_set = true;
1733 memcpy(per_pin->chmap, chmap, sizeof(chmap));
1735 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1740 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1742 struct hdmi_spec *spec = codec->spec;
1745 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1746 struct hda_pcm *info;
1747 struct hda_pcm_stream *pstr;
1748 struct hdmi_spec_per_pin *per_pin;
1750 per_pin = get_pin(spec, pin_idx);
1751 sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
1752 info = snd_array_new(&spec->pcm_rec);
1755 info->name = per_pin->pcm_name;
1756 info->pcm_type = HDA_PCM_TYPE_HDMI;
1757 info->own_chmap = true;
1759 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1760 pstr->substreams = 1;
1761 pstr->ops = generic_ops;
1762 /* other pstr fields are set in open */
1765 codec->num_pcms = spec->num_pins;
1766 codec->pcm_info = spec->pcm_rec.list;
1771 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1773 char hdmi_str[32] = "HDMI/DP";
1774 struct hdmi_spec *spec = codec->spec;
1775 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1776 int pcmdev = get_pcm_rec(spec, pin_idx)->device;
1779 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
1780 if (!is_jack_detectable(codec, per_pin->pin_nid))
1781 strncat(hdmi_str, " Phantom",
1782 sizeof(hdmi_str) - strlen(hdmi_str) - 1);
1784 return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
1787 static int generic_hdmi_build_controls(struct hda_codec *codec)
1789 struct hdmi_spec *spec = codec->spec;
1793 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1794 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1796 err = generic_hdmi_build_jack(codec, pin_idx);
1800 err = snd_hda_create_dig_out_ctls(codec,
1802 per_pin->mux_nids[0],
1806 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1808 /* add control for ELD Bytes */
1809 err = hdmi_create_eld_ctl(codec, pin_idx,
1810 get_pcm_rec(spec, pin_idx)->device);
1815 hdmi_present_sense(per_pin, 0);
1818 /* add channel maps */
1819 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1820 struct snd_pcm_chmap *chmap;
1821 struct snd_kcontrol *kctl;
1824 if (!codec->pcm_info[pin_idx].pcm)
1826 err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
1827 SNDRV_PCM_STREAM_PLAYBACK,
1828 NULL, 0, pin_idx, &chmap);
1831 /* override handlers */
1832 chmap->private_data = codec;
1834 for (i = 0; i < kctl->count; i++)
1835 kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
1836 kctl->info = hdmi_chmap_ctl_info;
1837 kctl->get = hdmi_chmap_ctl_get;
1838 kctl->put = hdmi_chmap_ctl_put;
1839 kctl->tlv.c = hdmi_chmap_ctl_tlv;
1845 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
1847 struct hdmi_spec *spec = codec->spec;
1850 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1851 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1852 struct hdmi_eld *eld = &per_pin->sink_eld;
1854 per_pin->codec = codec;
1855 mutex_init(&eld->lock);
1856 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
1857 snd_hda_eld_proc_new(codec, eld, pin_idx);
1862 static int generic_hdmi_init(struct hda_codec *codec)
1864 struct hdmi_spec *spec = codec->spec;
1867 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1868 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1869 hda_nid_t pin_nid = per_pin->pin_nid;
1871 hdmi_init_pin(codec, pin_nid);
1872 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
1877 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
1879 snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
1880 snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
1881 snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
1884 static void hdmi_array_free(struct hdmi_spec *spec)
1886 snd_array_free(&spec->pins);
1887 snd_array_free(&spec->cvts);
1888 snd_array_free(&spec->pcm_rec);
1891 static void generic_hdmi_free(struct hda_codec *codec)
1893 struct hdmi_spec *spec = codec->spec;
1896 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1897 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1898 struct hdmi_eld *eld = &per_pin->sink_eld;
1900 cancel_delayed_work(&per_pin->work);
1901 snd_hda_eld_proc_free(codec, eld);
1904 flush_workqueue(codec->bus->workq);
1905 hdmi_array_free(spec);
1910 static int generic_hdmi_resume(struct hda_codec *codec)
1912 struct hdmi_spec *spec = codec->spec;
1915 generic_hdmi_init(codec);
1916 snd_hda_codec_resume_amp(codec);
1917 snd_hda_codec_resume_cache(codec);
1919 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1920 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1921 hdmi_present_sense(per_pin, 1);
1927 static const struct hda_codec_ops generic_hdmi_patch_ops = {
1928 .init = generic_hdmi_init,
1929 .free = generic_hdmi_free,
1930 .build_pcms = generic_hdmi_build_pcms,
1931 .build_controls = generic_hdmi_build_controls,
1932 .unsol_event = hdmi_unsol_event,
1934 .resume = generic_hdmi_resume,
1939 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1942 struct hdmi_spec *spec = codec->spec;
1946 nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
1947 if (nconns == spec->num_cvts &&
1948 !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
1951 /* override pins connection list */
1952 snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
1953 snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
1956 #define INTEL_VENDOR_NID 0x08
1957 #define INTEL_GET_VENDOR_VERB 0xf81
1958 #define INTEL_SET_VENDOR_VERB 0x781
1959 #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
1960 #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
1962 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
1965 unsigned int vendor_param;
1967 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1968 INTEL_GET_VENDOR_VERB, 0);
1969 if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
1972 vendor_param |= INTEL_EN_ALL_PIN_CVTS;
1973 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1974 INTEL_SET_VENDOR_VERB, vendor_param);
1975 if (vendor_param == -1)
1979 snd_hda_codec_update_widgets(codec);
1982 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
1984 unsigned int vendor_param;
1986 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1987 INTEL_GET_VENDOR_VERB, 0);
1988 if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
1991 /* enable DP1.2 mode */
1992 vendor_param |= INTEL_EN_DP12;
1993 snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
1994 INTEL_SET_VENDOR_VERB, vendor_param);
1997 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
1998 * Otherwise you may get severe h/w communication errors.
2000 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2001 unsigned int power_state)
2003 if (power_state == AC_PWRST_D0) {
2004 intel_haswell_enable_all_pins(codec, false);
2005 intel_haswell_fixup_enable_dp12(codec);
2008 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2009 snd_hda_codec_set_power_to_all(codec, fg, power_state);
2012 static int patch_generic_hdmi(struct hda_codec *codec)
2014 struct hdmi_spec *spec;
2016 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2021 hdmi_array_init(spec, 4);
2023 if (is_haswell(codec)) {
2024 intel_haswell_enable_all_pins(codec, true);
2025 intel_haswell_fixup_enable_dp12(codec);
2028 if (hdmi_parse_codec(codec) < 0) {
2033 codec->patch_ops = generic_hdmi_patch_ops;
2034 if (is_haswell(codec)) {
2035 codec->patch_ops.set_power_state = haswell_set_power_state;
2036 codec->dp_mst = true;
2039 generic_hdmi_init_per_pins(codec);
2041 init_channel_allocations();
2047 * Shared non-generic implementations
2050 static int simple_playback_build_pcms(struct hda_codec *codec)
2052 struct hdmi_spec *spec = codec->spec;
2053 struct hda_pcm *info;
2055 struct hda_pcm_stream *pstr;
2056 struct hdmi_spec_per_cvt *per_cvt;
2058 per_cvt = get_cvt(spec, 0);
2059 chans = get_wcaps(codec, per_cvt->cvt_nid);
2060 chans = get_wcaps_channels(chans);
2062 info = snd_array_new(&spec->pcm_rec);
2065 info->name = get_pin(spec, 0)->pcm_name;
2066 sprintf(info->name, "HDMI 0");
2067 info->pcm_type = HDA_PCM_TYPE_HDMI;
2068 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2069 *pstr = spec->pcm_playback;
2070 pstr->nid = per_cvt->cvt_nid;
2071 if (pstr->channels_max <= 2 && chans && chans <= 16)
2072 pstr->channels_max = chans;
2074 codec->num_pcms = 1;
2075 codec->pcm_info = info;
2080 /* unsolicited event for jack sensing */
2081 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2084 snd_hda_jack_set_dirty_all(codec);
2085 snd_hda_jack_report_sync(codec);
2088 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2089 * as long as spec->pins[] is set correctly
2091 #define simple_hdmi_build_jack generic_hdmi_build_jack
2093 static int simple_playback_build_controls(struct hda_codec *codec)
2095 struct hdmi_spec *spec = codec->spec;
2096 struct hdmi_spec_per_cvt *per_cvt;
2099 per_cvt = get_cvt(spec, 0);
2100 err = snd_hda_create_spdif_out_ctls(codec, per_cvt->cvt_nid,
2104 return simple_hdmi_build_jack(codec, 0);
2107 static int simple_playback_init(struct hda_codec *codec)
2109 struct hdmi_spec *spec = codec->spec;
2110 struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2111 hda_nid_t pin = per_pin->pin_nid;
2113 snd_hda_codec_write(codec, pin, 0,
2114 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2115 /* some codecs require to unmute the pin */
2116 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2117 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2119 snd_hda_jack_detect_enable(codec, pin, pin);
2123 static void simple_playback_free(struct hda_codec *codec)
2125 struct hdmi_spec *spec = codec->spec;
2127 hdmi_array_free(spec);
2132 * Nvidia specific implementations
2135 #define Nv_VERB_SET_Channel_Allocation 0xF79
2136 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
2137 #define Nv_VERB_SET_Audio_Protection_On 0xF98
2138 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
2140 #define nvhdmi_master_con_nid_7x 0x04
2141 #define nvhdmi_master_pin_nid_7x 0x05
2143 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2144 /*front, rear, clfe, rear_surr */
2148 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2149 /* set audio protect on */
2150 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2151 /* enable digital output on pin widget */
2152 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2156 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2157 /* set audio protect on */
2158 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2159 /* enable digital output on pin widget */
2160 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2161 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2162 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2163 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2164 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2168 #ifdef LIMITED_RATE_FMT_SUPPORT
2169 /* support only the safe format and rate */
2170 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
2171 #define SUPPORTED_MAXBPS 16
2172 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
2174 /* support all rates and formats */
2175 #define SUPPORTED_RATES \
2176 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2177 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2178 SNDRV_PCM_RATE_192000)
2179 #define SUPPORTED_MAXBPS 24
2180 #define SUPPORTED_FORMATS \
2181 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2184 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2186 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2190 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2192 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2196 static unsigned int channels_2_6_8[] = {
2200 static unsigned int channels_2_8[] = {
2204 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2205 .count = ARRAY_SIZE(channels_2_6_8),
2206 .list = channels_2_6_8,
2210 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2211 .count = ARRAY_SIZE(channels_2_8),
2212 .list = channels_2_8,
2216 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2217 struct hda_codec *codec,
2218 struct snd_pcm_substream *substream)
2220 struct hdmi_spec *spec = codec->spec;
2221 struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2223 switch (codec->preset->id) {
2228 hw_constraints_channels = &hw_constraints_2_8_channels;
2231 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2237 if (hw_constraints_channels != NULL) {
2238 snd_pcm_hw_constraint_list(substream->runtime, 0,
2239 SNDRV_PCM_HW_PARAM_CHANNELS,
2240 hw_constraints_channels);
2242 snd_pcm_hw_constraint_step(substream->runtime, 0,
2243 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2246 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2249 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2250 struct hda_codec *codec,
2251 struct snd_pcm_substream *substream)
2253 struct hdmi_spec *spec = codec->spec;
2254 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2257 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2258 struct hda_codec *codec,
2259 unsigned int stream_tag,
2260 unsigned int format,
2261 struct snd_pcm_substream *substream)
2263 struct hdmi_spec *spec = codec->spec;
2264 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2265 stream_tag, format, substream);
2268 static const struct hda_pcm_stream simple_pcm_playback = {
2273 .open = simple_playback_pcm_open,
2274 .close = simple_playback_pcm_close,
2275 .prepare = simple_playback_pcm_prepare
2279 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2280 .build_controls = simple_playback_build_controls,
2281 .build_pcms = simple_playback_build_pcms,
2282 .init = simple_playback_init,
2283 .free = simple_playback_free,
2284 .unsol_event = simple_hdmi_unsol_event,
2287 static int patch_simple_hdmi(struct hda_codec *codec,
2288 hda_nid_t cvt_nid, hda_nid_t pin_nid)
2290 struct hdmi_spec *spec;
2291 struct hdmi_spec_per_cvt *per_cvt;
2292 struct hdmi_spec_per_pin *per_pin;
2294 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2299 hdmi_array_init(spec, 1);
2301 spec->multiout.num_dacs = 0; /* no analog */
2302 spec->multiout.max_channels = 2;
2303 spec->multiout.dig_out_nid = cvt_nid;
2306 per_pin = snd_array_new(&spec->pins);
2307 per_cvt = snd_array_new(&spec->cvts);
2308 if (!per_pin || !per_cvt) {
2309 simple_playback_free(codec);
2312 per_cvt->cvt_nid = cvt_nid;
2313 per_pin->pin_nid = pin_nid;
2314 spec->pcm_playback = simple_pcm_playback;
2316 codec->patch_ops = simple_hdmi_patch_ops;
2321 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2324 unsigned int chanmask;
2325 int chan = channels ? (channels - 1) : 1;
2344 /* Set the audio infoframe channel allocation and checksum fields. The
2345 * channel count is computed implicitly by the hardware. */
2346 snd_hda_codec_write(codec, 0x1, 0,
2347 Nv_VERB_SET_Channel_Allocation, chanmask);
2349 snd_hda_codec_write(codec, 0x1, 0,
2350 Nv_VERB_SET_Info_Frame_Checksum,
2351 (0x71 - chan - chanmask));
2354 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2355 struct hda_codec *codec,
2356 struct snd_pcm_substream *substream)
2358 struct hdmi_spec *spec = codec->spec;
2361 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2362 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2363 for (i = 0; i < 4; i++) {
2364 /* set the stream id */
2365 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2366 AC_VERB_SET_CHANNEL_STREAMID, 0);
2367 /* set the stream format */
2368 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2369 AC_VERB_SET_STREAM_FORMAT, 0);
2372 /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2373 * streams are disabled. */
2374 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2376 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2379 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2380 struct hda_codec *codec,
2381 unsigned int stream_tag,
2382 unsigned int format,
2383 struct snd_pcm_substream *substream)
2386 unsigned int dataDCC2, channel_id;
2388 struct hdmi_spec *spec = codec->spec;
2389 struct hda_spdif_out *spdif;
2390 struct hdmi_spec_per_cvt *per_cvt;
2392 mutex_lock(&codec->spdif_mutex);
2393 per_cvt = get_cvt(spec, 0);
2394 spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2396 chs = substream->runtime->channels;
2400 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2401 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2402 snd_hda_codec_write(codec,
2403 nvhdmi_master_con_nid_7x,
2405 AC_VERB_SET_DIGI_CONVERT_1,
2406 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2408 /* set the stream id */
2409 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2410 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2412 /* set the stream format */
2413 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2414 AC_VERB_SET_STREAM_FORMAT, format);
2416 /* turn on again (if needed) */
2417 /* enable and set the channel status audio/data flag */
2418 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2419 snd_hda_codec_write(codec,
2420 nvhdmi_master_con_nid_7x,
2422 AC_VERB_SET_DIGI_CONVERT_1,
2423 spdif->ctls & 0xff);
2424 snd_hda_codec_write(codec,
2425 nvhdmi_master_con_nid_7x,
2427 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2430 for (i = 0; i < 4; i++) {
2436 /* turn off SPDIF once;
2437 *otherwise the IEC958 bits won't be updated
2439 if (codec->spdif_status_reset &&
2440 (spdif->ctls & AC_DIG1_ENABLE))
2441 snd_hda_codec_write(codec,
2442 nvhdmi_con_nids_7x[i],
2444 AC_VERB_SET_DIGI_CONVERT_1,
2445 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2446 /* set the stream id */
2447 snd_hda_codec_write(codec,
2448 nvhdmi_con_nids_7x[i],
2450 AC_VERB_SET_CHANNEL_STREAMID,
2451 (stream_tag << 4) | channel_id);
2452 /* set the stream format */
2453 snd_hda_codec_write(codec,
2454 nvhdmi_con_nids_7x[i],
2456 AC_VERB_SET_STREAM_FORMAT,
2458 /* turn on again (if needed) */
2459 /* enable and set the channel status audio/data flag */
2460 if (codec->spdif_status_reset &&
2461 (spdif->ctls & AC_DIG1_ENABLE)) {
2462 snd_hda_codec_write(codec,
2463 nvhdmi_con_nids_7x[i],
2465 AC_VERB_SET_DIGI_CONVERT_1,
2466 spdif->ctls & 0xff);
2467 snd_hda_codec_write(codec,
2468 nvhdmi_con_nids_7x[i],
2470 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2474 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2476 mutex_unlock(&codec->spdif_mutex);
2480 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2484 .nid = nvhdmi_master_con_nid_7x,
2485 .rates = SUPPORTED_RATES,
2486 .maxbps = SUPPORTED_MAXBPS,
2487 .formats = SUPPORTED_FORMATS,
2489 .open = simple_playback_pcm_open,
2490 .close = nvhdmi_8ch_7x_pcm_close,
2491 .prepare = nvhdmi_8ch_7x_pcm_prepare
2495 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2497 struct hdmi_spec *spec;
2498 int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2499 nvhdmi_master_pin_nid_7x);
2503 codec->patch_ops.init = nvhdmi_7x_init_2ch;
2504 /* override the PCM rates, etc, as the codec doesn't give full list */
2506 spec->pcm_playback.rates = SUPPORTED_RATES;
2507 spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2508 spec->pcm_playback.formats = SUPPORTED_FORMATS;
2512 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2514 struct hdmi_spec *spec = codec->spec;
2515 int err = simple_playback_build_pcms(codec);
2517 struct hda_pcm *info = get_pcm_rec(spec, 0);
2518 info->own_chmap = true;
2523 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2525 struct hdmi_spec *spec = codec->spec;
2526 struct hda_pcm *info;
2527 struct snd_pcm_chmap *chmap;
2530 err = simple_playback_build_controls(codec);
2534 /* add channel maps */
2535 info = get_pcm_rec(spec, 0);
2536 err = snd_pcm_add_chmap_ctls(info->pcm,
2537 SNDRV_PCM_STREAM_PLAYBACK,
2538 snd_pcm_alt_chmaps, 8, 0, &chmap);
2541 switch (codec->preset->id) {
2546 chmap->channel_mask = (1U << 2) | (1U << 8);
2549 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2554 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2556 struct hdmi_spec *spec;
2557 int err = patch_nvhdmi_2ch(codec);
2561 spec->multiout.max_channels = 8;
2562 spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2563 codec->patch_ops.init = nvhdmi_7x_init_8ch;
2564 codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2565 codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2567 /* Initialize the audio infoframe channel mask and checksum to something
2569 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2575 * ATI-specific implementations
2577 * FIXME: we may omit the whole this and use the generic code once after
2578 * it's confirmed to work.
2581 #define ATIHDMI_CVT_NID 0x02 /* audio converter */
2582 #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
2584 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2585 struct hda_codec *codec,
2586 unsigned int stream_tag,
2587 unsigned int format,
2588 struct snd_pcm_substream *substream)
2590 struct hdmi_spec *spec = codec->spec;
2591 struct hdmi_spec_per_cvt *per_cvt = get_cvt(spec, 0);
2592 int chans = substream->runtime->channels;
2595 err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
2599 snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
2600 AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
2602 for (i = 0; i < chans; i++) {
2603 snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
2604 AC_VERB_SET_HDMI_CHAN_SLOT,
2610 static int patch_atihdmi(struct hda_codec *codec)
2612 struct hdmi_spec *spec;
2613 int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
2617 spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
2621 /* VIA HDMI Implementation */
2622 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
2623 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
2625 static int patch_via_hdmi(struct hda_codec *codec)
2627 return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
2633 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
2634 { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
2635 { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
2636 { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
2637 { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
2638 { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
2639 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
2640 { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
2641 { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2642 { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2643 { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2644 { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2645 { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
2646 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
2647 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
2648 { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
2649 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
2650 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
2651 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
2652 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
2653 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
2654 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
2655 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
2656 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
2657 /* 17 is known to be absent */
2658 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
2659 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
2660 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
2661 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
2662 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
2663 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
2664 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
2665 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
2666 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
2667 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
2668 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi },
2669 { .id = 0x10de0060, .name = "GPU 60 HDMI/DP", .patch = patch_generic_hdmi },
2670 { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
2671 { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
2672 { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
2673 { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
2674 { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
2675 { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
2676 { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
2677 { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
2678 { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
2679 { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
2680 { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
2681 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
2682 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
2683 { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi },
2684 { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi },
2685 { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
2689 MODULE_ALIAS("snd-hda-codec-id:1002793c");
2690 MODULE_ALIAS("snd-hda-codec-id:10027919");
2691 MODULE_ALIAS("snd-hda-codec-id:1002791a");
2692 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
2693 MODULE_ALIAS("snd-hda-codec-id:10951390");
2694 MODULE_ALIAS("snd-hda-codec-id:10951392");
2695 MODULE_ALIAS("snd-hda-codec-id:10de0002");
2696 MODULE_ALIAS("snd-hda-codec-id:10de0003");
2697 MODULE_ALIAS("snd-hda-codec-id:10de0005");
2698 MODULE_ALIAS("snd-hda-codec-id:10de0006");
2699 MODULE_ALIAS("snd-hda-codec-id:10de0007");
2700 MODULE_ALIAS("snd-hda-codec-id:10de000a");
2701 MODULE_ALIAS("snd-hda-codec-id:10de000b");
2702 MODULE_ALIAS("snd-hda-codec-id:10de000c");
2703 MODULE_ALIAS("snd-hda-codec-id:10de000d");
2704 MODULE_ALIAS("snd-hda-codec-id:10de0010");
2705 MODULE_ALIAS("snd-hda-codec-id:10de0011");
2706 MODULE_ALIAS("snd-hda-codec-id:10de0012");
2707 MODULE_ALIAS("snd-hda-codec-id:10de0013");
2708 MODULE_ALIAS("snd-hda-codec-id:10de0014");
2709 MODULE_ALIAS("snd-hda-codec-id:10de0015");
2710 MODULE_ALIAS("snd-hda-codec-id:10de0016");
2711 MODULE_ALIAS("snd-hda-codec-id:10de0018");
2712 MODULE_ALIAS("snd-hda-codec-id:10de0019");
2713 MODULE_ALIAS("snd-hda-codec-id:10de001a");
2714 MODULE_ALIAS("snd-hda-codec-id:10de001b");
2715 MODULE_ALIAS("snd-hda-codec-id:10de001c");
2716 MODULE_ALIAS("snd-hda-codec-id:10de0040");
2717 MODULE_ALIAS("snd-hda-codec-id:10de0041");
2718 MODULE_ALIAS("snd-hda-codec-id:10de0042");
2719 MODULE_ALIAS("snd-hda-codec-id:10de0043");
2720 MODULE_ALIAS("snd-hda-codec-id:10de0044");
2721 MODULE_ALIAS("snd-hda-codec-id:10de0051");
2722 MODULE_ALIAS("snd-hda-codec-id:10de0060");
2723 MODULE_ALIAS("snd-hda-codec-id:10de0067");
2724 MODULE_ALIAS("snd-hda-codec-id:10de8001");
2725 MODULE_ALIAS("snd-hda-codec-id:11069f80");
2726 MODULE_ALIAS("snd-hda-codec-id:11069f81");
2727 MODULE_ALIAS("snd-hda-codec-id:11069f84");
2728 MODULE_ALIAS("snd-hda-codec-id:11069f85");
2729 MODULE_ALIAS("snd-hda-codec-id:17e80047");
2730 MODULE_ALIAS("snd-hda-codec-id:80860054");
2731 MODULE_ALIAS("snd-hda-codec-id:80862801");
2732 MODULE_ALIAS("snd-hda-codec-id:80862802");
2733 MODULE_ALIAS("snd-hda-codec-id:80862803");
2734 MODULE_ALIAS("snd-hda-codec-id:80862804");
2735 MODULE_ALIAS("snd-hda-codec-id:80862805");
2736 MODULE_ALIAS("snd-hda-codec-id:80862806");
2737 MODULE_ALIAS("snd-hda-codec-id:80862807");
2738 MODULE_ALIAS("snd-hda-codec-id:80862880");
2739 MODULE_ALIAS("snd-hda-codec-id:808629fb");
2741 MODULE_LICENSE("GPL");
2742 MODULE_DESCRIPTION("HDMI HD-audio codec");
2743 MODULE_ALIAS("snd-hda-codec-intelhdmi");
2744 MODULE_ALIAS("snd-hda-codec-nvhdmi");
2745 MODULE_ALIAS("snd-hda-codec-atihdmi");
2747 static struct hda_codec_preset_list intel_list = {
2748 .preset = snd_hda_preset_hdmi,
2749 .owner = THIS_MODULE,
2752 static int __init patch_hdmi_init(void)
2754 return snd_hda_add_codec_preset(&intel_list);
2757 static void __exit patch_hdmi_exit(void)
2759 snd_hda_delete_codec_preset(&intel_list);
2762 module_init(patch_hdmi_init)
2763 module_exit(patch_hdmi_exit)