sound/pci/hda/patch_hdmi.c

   1 /*
   2  *
   3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   4  *
   5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   6  *  Copyright (c) 2006 ATI Technologies Inc.
   7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
   9  *
  10  *  Authors:
  11  *                      Wu Fengguang <wfg@linux.intel.com>
  12  *
  13  *  Maintained by:
  14  *                      Wu Fengguang <wfg@linux.intel.com>
  15  *
  16  *  This program is free software; you can redistribute it and/or modify it
  17  *  under the terms of the GNU General Public License as published by the Free
  18  *  Software Foundation; either version 2 of the License, or (at your option)
  19  *  any later version.
  20  *
  21  *  This program is distributed in the hope that it will be useful, but
  22  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  23  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  24  *  for more details.
  25  *
  26  *  You should have received a copy of the GNU General Public License
  27  *  along with this program; if not, write to the Free Software Foundation,
  28  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  29  */
  30
  31 #include <linux/init.h>
  32 #include <linux/delay.h>
  33 #include <linux/slab.h>
  34 #include <linux/moduleparam.h>
  35 #include <sound/core.h>
  36 #include <sound/jack.h>
  37 #include "hda_codec.h"
  38 #include "hda_local.h"
  39
  40 static bool static_hdmi_pcm;
  41 module_param(static_hdmi_pcm, bool, 0644);
  42 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  43
  44 /*
  45  * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
  46  * could support two independent pipes, each of them can be connected to one or
  47  * more ports (DVI, HDMI or DisplayPort).
  48  *
  49  * The HDA correspondence of pipes/ports are converter/pin nodes.
  50  */
  51 #define MAX_HDMI_CVTS   4
  52 #define MAX_HDMI_PINS   4
  53
  54 struct hdmi_spec {
  55         int num_cvts;
  56         int num_pins;
  57         hda_nid_t cvt[MAX_HDMI_CVTS+1];  /* audio sources */
  58         hda_nid_t pin[MAX_HDMI_PINS+1];  /* audio sinks */
  59
  60         /*
  61          * source connection for each pin
  62          */
  63         hda_nid_t pin_cvt[MAX_HDMI_PINS+1];
  64
  65         /*
  66          * HDMI sink attached to each pin
  67          */
  68         struct hdmi_eld sink_eld[MAX_HDMI_PINS];
  69
  70         /*
  71          * export one pcm per pipe
  72          */
  73         struct hda_pcm  pcm_rec[MAX_HDMI_CVTS];
  74         struct hda_pcm_stream codec_pcm_pars[MAX_HDMI_CVTS];
  75
  76         /*
  77          * ati/nvhdmi specific
  78          */
  79         struct hda_multi_out multiout;
  80         const struct hda_pcm_stream *pcm_playback;
  81 };
  82
  83
  84 struct hdmi_audio_infoframe {
  85         u8 type; /* 0x84 */
  86         u8 ver;  /* 0x01 */
  87         u8 len;  /* 0x0a */
  88
  89         u8 checksum;
  90
  91         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
  92         u8 SS01_SF24;
  93         u8 CXT04;
  94         u8 CA;
  95         u8 LFEPBL01_LSV36_DM_INH7;
  96 };
  97
  98 struct dp_audio_infoframe {
  99         u8 type; /* 0x84 */
 100         u8 len;  /* 0x1b */
 101         u8 ver;  /* 0x11 << 2 */
 102
 103         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 104         u8 SS01_SF24;
 105         u8 CXT04;
 106         u8 CA;
 107         u8 LFEPBL01_LSV36_DM_INH7;
 108 };
 109
 110 union audio_infoframe {
 111         struct hdmi_audio_infoframe hdmi;
 112         struct dp_audio_infoframe dp;
 113         u8 bytes[0];
 114 };
 115
 116 /*
 117  * CEA speaker placement:
 118  *
 119  *        FLH       FCH        FRH
 120  *  FLW    FL  FLC   FC   FRC   FR   FRW
 121  *
 122  *                                  LFE
 123  *                     TC
 124  *
 125  *          RL  RLC   RC   RRC   RR
 126  *
 127  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
 128  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
 129  */
 130 enum cea_speaker_placement {
 131         FL  = (1 <<  0),        /* Front Left           */
 132         FC  = (1 <<  1),        /* Front Center         */
 133         FR  = (1 <<  2),        /* Front Right          */
 134         FLC = (1 <<  3),        /* Front Left Center    */
 135         FRC = (1 <<  4),        /* Front Right Center   */
 136         RL  = (1 <<  5),        /* Rear Left            */
 137         RC  = (1 <<  6),        /* Rear Center          */
 138         RR  = (1 <<  7),        /* Rear Right           */
 139         RLC = (1 <<  8),        /* Rear Left Center     */
 140         RRC = (1 <<  9),        /* Rear Right Center    */
 141         LFE = (1 << 10),        /* Low Frequency Effect */
 142         FLW = (1 << 11),        /* Front Left Wide      */
 143         FRW = (1 << 12),        /* Front Right Wide     */
 144         FLH = (1 << 13),        /* Front Left High      */
 145         FCH = (1 << 14),        /* Front Center High    */
 146         FRH = (1 << 15),        /* Front Right High     */
 147         TC  = (1 << 16),        /* Top Center           */
 148 };
 149
 150 /*
 151  * ELD SA bits in the CEA Speaker Allocation data block
 152  */
 153 static int eld_speaker_allocation_bits[] = {
 154         [0] = FL | FR,
 155         [1] = LFE,
 156         [2] = FC,
 157         [3] = RL | RR,
 158         [4] = RC,
 159         [5] = FLC | FRC,
 160         [6] = RLC | RRC,
 161         /* the following are not defined in ELD yet */
 162         [7] = FLW | FRW,
 163         [8] = FLH | FRH,
 164         [9] = TC,
 165         [10] = FCH,
 166 };
 167
 168 struct cea_channel_speaker_allocation {
 169         int ca_index;
 170         int speakers[8];
 171
 172         /* derived values, just for convenience */
 173         int channels;
 174         int spk_mask;
 175 };
 176
 177 /*
 178  * ALSA sequence is:
 179  *
 180  *       surround40   surround41   surround50   surround51   surround71
 181  * ch0   front left   =            =            =            =
 182  * ch1   front right  =            =            =            =
 183  * ch2   rear left    =            =            =            =
 184  * ch3   rear right   =            =            =            =
 185  * ch4                LFE          center       center       center
 186  * ch5                                          LFE          LFE
 187  * ch6                                                       side left
 188  * ch7                                                       side right
 189  *
 190  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
 191  */
 192 static int hdmi_channel_mapping[0x32][8] = {
 193         /* stereo */
 194         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 195         /* 2.1 */
 196         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 197         /* Dolby Surround */
 198         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
 199         /* surround40 */
 200         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
 201         /* 4ch */
 202         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
 203         /* surround41 */
 204         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
 205         /* surround50 */
 206         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
 207         /* surround51 */
 208         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
 209         /* 7.1 */
 210         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
 211 };
 212
 213 /*
 214  * This is an ordered list!
 215  *
 216  * The preceding ones have better chances to be selected by
 217  * hdmi_channel_allocation().
 218  */
 219 static struct cea_channel_speaker_allocation channel_allocations[] = {
 220 /*                        channel:   7     6    5    4    3     2    1    0  */
 221 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
 222                                  /* 2.1 */
 223 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
 224                                  /* Dolby Surround */
 225 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
 226                                  /* surround40 */
 227 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
 228                                  /* surround41 */
 229 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
 230                                  /* surround50 */
 231 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 232                                  /* surround51 */
 233 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 234                                  /* 6.1 */
 235 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 236                                  /* surround71 */
 237 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 238
 239 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
 240 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
 241 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
 242 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
 243 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
 244 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
 245 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
 246 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 247 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
 248 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 249 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
 250 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
 251 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
 252 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
 253 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
 254 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
 255 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
 256 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
 257 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
 258 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
 259 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 260 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
 261 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 262 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 263 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 264 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 265 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 266 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
 267 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
 268 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
 269 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
 270 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 271 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 272 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 273 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 274 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 275 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 276 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
 277 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 278 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
 279 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
 280 };
 281
 282
 283 /*
 284  * HDMI routines
 285  */
 286
 287 static int hda_node_index(hda_nid_t *nids, hda_nid_t nid)
 288 {
 289         int i;
 290
 291         for (i = 0; nids[i]; i++)
 292                 if (nids[i] == nid)
 293                         return i;
 294
 295         snd_printk(KERN_WARNING "HDMI: nid %d not registered\n", nid);
 296         return -EINVAL;
 297 }
 298
 299 #ifdef BE_PARANOID
 300 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 301                                 int *packet_index, int *byte_index)
 302 {
 303         int val;
 304
 305         val = snd_hda_codec_read(codec, pin_nid, 0,
 306                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 307
 308         *packet_index = val >> 5;
 309         *byte_index = val & 0x1f;
 310 }
 311 #endif
 312
 313 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 314                                 int packet_index, int byte_index)
 315 {
 316         int val;
 317
 318         val = (packet_index << 5) | (byte_index & 0x1f);
 319
 320         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 321 }
 322
 323 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 324                                 unsigned char val)
 325 {
 326         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 327 }
 328
 329 static void hdmi_enable_output(struct hda_codec *codec, hda_nid_t pin_nid)
 330 {
 331         /* Unmute */
 332         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 333                 snd_hda_codec_write(codec, pin_nid, 0,
 334                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 335         /* Enable pin out */
 336         snd_hda_codec_write(codec, pin_nid, 0,
 337                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
 338 }
 339
 340 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t nid)
 341 {
 342         return 1 + snd_hda_codec_read(codec, nid, 0,
 343                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
 344 }
 345
 346 static void hdmi_set_channel_count(struct hda_codec *codec,
 347                                    hda_nid_t nid, int chs)
 348 {
 349         if (chs != hdmi_get_channel_count(codec, nid))
 350                 snd_hda_codec_write(codec, nid, 0,
 351                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
 352 }
 353
 354
 355 /*
 356  * Channel mapping routines
 357  */
 358
 359 /*
 360  * Compute derived values in channel_allocations[].
 361  */
 362 static void init_channel_allocations(void)
 363 {
 364         int i, j;
 365         struct cea_channel_speaker_allocation *p;
 366
 367         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 368                 p = channel_allocations + i;
 369                 p->channels = 0;
 370                 p->spk_mask = 0;
 371                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
 372                         if (p->speakers[j]) {
 373                                 p->channels++;
 374                                 p->spk_mask |= p->speakers[j];
 375                         }
 376         }
 377 }
 378
 379 /*
 380  * The transformation takes two steps:
 381  *
 382  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
 383  *            spk_mask => (channel_allocations[])         => ai->CA
 384  *
 385  * TODO: it could select the wrong CA from multiple candidates.
 386 */
 387 static int hdmi_channel_allocation(struct hda_codec *codec, hda_nid_t nid,
 388                                    int channels)
 389 {
 390         struct hdmi_spec *spec = codec->spec;
 391         struct hdmi_eld *eld;
 392         int i;
 393         int ca = 0;
 394         int spk_mask = 0;
 395         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
 396
 397         /*
 398          * CA defaults to 0 for basic stereo audio
 399          */
 400         if (channels <= 2)
 401                 return 0;
 402
 403         i = hda_node_index(spec->pin_cvt, nid);
 404         if (i < 0)
 405                 return 0;
 406         eld = &spec->sink_eld[i];
 407
 408         /*
 409          * HDMI sink's ELD info cannot always be retrieved for now, e.g.
 410          * in console or for audio devices. Assume the highest speakers
 411          * configuration, to _not_ prohibit multi-channel audio playback.
 412          */
 413         if (!eld->spk_alloc)
 414                 eld->spk_alloc = 0xffff;
 415
 416         /*
 417          * expand ELD's speaker allocation mask
 418          *
 419          * ELD tells the speaker mask in a compact(paired) form,
 420          * expand ELD's notions to match the ones used by Audio InfoFrame.
 421          */
 422         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
 423                 if (eld->spk_alloc & (1 << i))
 424                         spk_mask |= eld_speaker_allocation_bits[i];
 425         }
 426
 427         /* search for the first working match in the CA table */
 428         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 429                 if (channels == channel_allocations[i].channels &&
 430                     (spk_mask & channel_allocations[i].spk_mask) ==
 431                                 channel_allocations[i].spk_mask) {
 432                         ca = channel_allocations[i].ca_index;
 433                         break;
 434                 }
 435         }
 436
 437         snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
 438         snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
 439                     ca, channels, buf);
 440
 441         return ca;
 442 }
 443
 444 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
 445                                        hda_nid_t pin_nid)
 446 {
 447 #ifdef CONFIG_SND_DEBUG_VERBOSE
 448         int i;
 449         int slot;
 450
 451         for (i = 0; i < 8; i++) {
 452                 slot = snd_hda_codec_read(codec, pin_nid, 0,
 453                                                 AC_VERB_GET_HDMI_CHAN_SLOT, i);
 454                 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
 455                                                 slot >> 4, slot & 0xf);
 456         }
 457 #endif
 458 }
 459
 460
 461 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
 462                                        hda_nid_t pin_nid,
 463                                        int ca)
 464 {
 465         int i;
 466         int err;
 467
 468         if (hdmi_channel_mapping[ca][1] == 0) {
 469                 for (i = 0; i < channel_allocations[ca].channels; i++)
 470                         hdmi_channel_mapping[ca][i] = i | (i << 4);
 471                 for (; i < 8; i++)
 472                         hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
 473         }
 474
 475         for (i = 0; i < 8; i++) {
 476                 err = snd_hda_codec_write(codec, pin_nid, 0,
 477                                           AC_VERB_SET_HDMI_CHAN_SLOT,
 478                                           hdmi_channel_mapping[ca][i]);
 479                 if (err) {
 480                         snd_printdd(KERN_NOTICE
 481                                     "HDMI: channel mapping failed\n");
 482                         break;
 483                 }
 484         }
 485
 486         hdmi_debug_channel_mapping(codec, pin_nid);
 487 }
 488
 489
 490 /*
 491  * Audio InfoFrame routines
 492  */
 493
 494 /*
 495  * Enable Audio InfoFrame Transmission
 496  */
 497 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 498                                        hda_nid_t pin_nid)
 499 {
 500         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 501         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 502                                                 AC_DIPXMIT_BEST);
 503 }
 504
 505 /*
 506  * Disable Audio InfoFrame Transmission
 507  */
 508 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 509                                       hda_nid_t pin_nid)
 510 {
 511         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 512         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 513                                                 AC_DIPXMIT_DISABLE);
 514 }
 515
 516 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 517 {
 518 #ifdef CONFIG_SND_DEBUG_VERBOSE
 519         int i;
 520         int size;
 521
 522         size = snd_hdmi_get_eld_size(codec, pin_nid);
 523         printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
 524
 525         for (i = 0; i < 8; i++) {
 526                 size = snd_hda_codec_read(codec, pin_nid, 0,
 527                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 528                 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 529         }
 530 #endif
 531 }
 532
 533 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 534 {
 535 #ifdef BE_PARANOID
 536         int i, j;
 537         int size;
 538         int pi, bi;
 539         for (i = 0; i < 8; i++) {
 540                 size = snd_hda_codec_read(codec, pin_nid, 0,
 541                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 542                 if (size == 0)
 543                         continue;
 544
 545                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 546                 for (j = 1; j < 1000; j++) {
 547                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 548                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 549                         if (pi != i)
 550                                 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
 551                                                 bi, pi, i);
 552                         if (bi == 0) /* byte index wrapped around */
 553                                 break;
 554                 }
 555                 snd_printd(KERN_INFO
 556                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
 557                         i, size, j);
 558         }
 559 #endif
 560 }
 561
 562 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
 563 {
 564         u8 *bytes = (u8 *)hdmi_ai;
 565         u8 sum = 0;
 566         int i;
 567
 568         hdmi_ai->checksum = 0;
 569
 570         for (i = 0; i < sizeof(*hdmi_ai); i++)
 571                 sum += bytes[i];
 572
 573         hdmi_ai->checksum = -sum;
 574 }
 575
 576 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
 577                                       hda_nid_t pin_nid,
 578                                       u8 *dip, int size)
 579 {
 580         int i;
 581
 582         hdmi_debug_dip_size(codec, pin_nid);
 583         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
 584
 585         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 586         for (i = 0; i < size; i++)
 587                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
 588 }
 589
 590 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
 591                                     u8 *dip, int size)
 592 {
 593         u8 val;
 594         int i;
 595
 596         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
 597                                                             != AC_DIPXMIT_BEST)
 598                 return false;
 599
 600         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 601         for (i = 0; i < size; i++) {
 602                 val = snd_hda_codec_read(codec, pin_nid, 0,
 603                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
 604                 if (val != dip[i])
 605                         return false;
 606         }
 607
 608         return true;
 609 }
 610
 611 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, hda_nid_t nid,
 612                                         struct snd_pcm_substream *substream)
 613 {
 614         struct hdmi_spec *spec = codec->spec;
 615         hda_nid_t pin_nid;
 616         int channels = substream->runtime->channels;
 617         int ca;
 618         int i;
 619         union audio_infoframe ai;
 620
 621         ca = hdmi_channel_allocation(codec, nid, channels);
 622
 623         for (i = 0; i < spec->num_pins; i++) {
 624                 if (spec->pin_cvt[i] != nid)
 625                         continue;
 626                 if (!spec->sink_eld[i].monitor_present)
 627                         continue;
 628
 629                 pin_nid = spec->pin[i];
 630
 631                 memset(&ai, 0, sizeof(ai));
 632                 if (spec->sink_eld[i].conn_type == 0) { /* HDMI */
 633                         struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
 634
 635                         hdmi_ai->type           = 0x84;
 636                         hdmi_ai->ver            = 0x01;
 637                         hdmi_ai->len            = 0x0a;
 638                         hdmi_ai->CC02_CT47      = channels - 1;
 639                         hdmi_ai->CA             = ca;
 640                         hdmi_checksum_audio_infoframe(hdmi_ai);
 641                 } else if (spec->sink_eld[i].conn_type == 1) { /* DisplayPort */
 642                         struct dp_audio_infoframe *dp_ai = &ai.dp;
 643
 644                         dp_ai->type             = 0x84;
 645                         dp_ai->len              = 0x1b;
 646                         dp_ai->ver              = 0x11 << 2;
 647                         dp_ai->CC02_CT47        = channels - 1;
 648                         dp_ai->CA               = ca;
 649                 } else {
 650                         snd_printd("HDMI: unknown connection type at pin %d\n",
 651                                    pin_nid);
 652                         continue;
 653                 }
 654
 655                 /*
 656                  * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
 657                  * sizeof(*dp_ai) to avoid partial match/update problems when
 658                  * the user switches between HDMI/DP monitors.
 659                  */
 660                 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
 661                                              sizeof(ai))) {
 662                         snd_printdd("hdmi_setup_audio_infoframe: "
 663                                     "cvt=%d pin=%d channels=%d\n",
 664                                     nid, pin_nid,
 665                                     channels);
 666                         hdmi_setup_channel_mapping(codec, pin_nid, ca);
 667                         hdmi_stop_infoframe_trans(codec, pin_nid);
 668                         hdmi_fill_audio_infoframe(codec, pin_nid,
 669                                                   ai.bytes, sizeof(ai));
 670                         hdmi_start_infoframe_trans(codec, pin_nid);
 671                 }
 672         }
 673 }
 674
 675
 676 /*
 677  * Unsolicited events
 678  */
 679
 680 static void hdmi_present_sense(struct hda_codec *codec, hda_nid_t pin_nid,
 681                                struct hdmi_eld *eld);
 682
 683 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
 684 {
 685         struct hdmi_spec *spec = codec->spec;
 686         int pin_nid = res >> AC_UNSOL_RES_TAG_SHIFT;
 687         int pd = !!(res & AC_UNSOL_RES_PD);
 688         int eldv = !!(res & AC_UNSOL_RES_ELDV);
 689         int index;
 690
 691         printk(KERN_INFO
 692                 "HDMI hot plug event: Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
 693                 pin_nid, pd, eldv);
 694
 695         index = hda_node_index(spec->pin, pin_nid);
 696         if (index < 0)
 697                 return;
 698
 699         hdmi_present_sense(codec, pin_nid, &spec->sink_eld[index]);
 700 }
 701
 702 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
 703 {
 704         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 705         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 706         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
 707         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
 708
 709         printk(KERN_INFO
 710                 "HDMI CP event: PIN=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
 711                 tag,
 712                 subtag,
 713                 cp_state,
 714                 cp_ready);
 715
 716         /* TODO */
 717         if (cp_state)
 718                 ;
 719         if (cp_ready)
 720                 ;
 721 }
 722
 723
 724 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
 725 {
 726         struct hdmi_spec *spec = codec->spec;
 727         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 728         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 729
 730         if (hda_node_index(spec->pin, tag) < 0) {
 731                 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
 732                 return;
 733         }
 734
 735         if (subtag == 0)
 736                 hdmi_intrinsic_event(codec, res);
 737         else
 738                 hdmi_non_intrinsic_event(codec, res);
 739 }
 740
 741 /*
 742  * Callbacks
 743  */
 744
 745 /* HBR should be Non-PCM, 8 channels */
 746 #define is_hbr_format(format) \
 747         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
 748
 749 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t nid,
 750                               u32 stream_tag, int format)
 751 {
 752         struct hdmi_spec *spec = codec->spec;
 753         int pinctl;
 754         int new_pinctl = 0;
 755         int i;
 756
 757         for (i = 0; i < spec->num_pins; i++) {
 758                 if (spec->pin_cvt[i] != nid)
 759                         continue;
 760                 if (!(snd_hda_query_pin_caps(codec, spec->pin[i]) & AC_PINCAP_HBR))
 761                         continue;
 762
 763                 pinctl = snd_hda_codec_read(codec, spec->pin[i], 0,
 764                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
 765
 766                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
 767                 if (is_hbr_format(format))
 768                         new_pinctl |= AC_PINCTL_EPT_HBR;
 769                 else
 770                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
 771
 772                 snd_printdd("hdmi_setup_stream: "
 773                             "NID=0x%x, %spinctl=0x%x\n",
 774                             spec->pin[i],
 775                             pinctl == new_pinctl ? "" : "new-",
 776                             new_pinctl);
 777
 778                 if (pinctl != new_pinctl)
 779                         snd_hda_codec_write(codec, spec->pin[i], 0,
 780                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
 781                                             new_pinctl);
 782         }
 783
 784         if (is_hbr_format(format) && !new_pinctl) {
 785                 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
 786                 return -EINVAL;
 787         }
 788
 789         snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
 790         return 0;
 791 }
 792
 793 /*
 794  * HDA PCM callbacks
 795  */
 796 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
 797                          struct hda_codec *codec,
 798                          struct snd_pcm_substream *substream)
 799 {
 800         struct hdmi_spec *spec = codec->spec;
 801         struct hdmi_eld *eld;
 802         struct hda_pcm_stream *codec_pars;
 803         struct snd_pcm_runtime *runtime = substream->runtime;
 804         unsigned int idx;
 805
 806         for (idx = 0; idx < spec->num_cvts; idx++)
 807                 if (hinfo->nid == spec->cvt[idx])
 808                         break;
 809         if (snd_BUG_ON(idx >= spec->num_cvts) ||
 810             snd_BUG_ON(idx >= spec->num_pins))
 811                 return -EINVAL;
 812
 813         /* save the PCM info the codec provides */
 814         codec_pars = &spec->codec_pcm_pars[idx];
 815         if (!codec_pars->rates)
 816                 *codec_pars = *hinfo;
 817
 818         eld = &spec->sink_eld[idx];
 819         if (!static_hdmi_pcm && eld->eld_valid && eld->sad_count > 0) {
 820                 hdmi_eld_update_pcm_info(eld, hinfo, codec_pars);
 821                 if (hinfo->channels_min > hinfo->channels_max ||
 822                     !hinfo->rates || !hinfo->formats)
 823                         return -ENODEV;
 824         } else {
 825                 /* fallback to the codec default */
 826                 hinfo->channels_max = codec_pars->channels_max;
 827                 hinfo->rates = codec_pars->rates;
 828                 hinfo->formats = codec_pars->formats;
 829                 hinfo->maxbps = codec_pars->maxbps;
 830         }
 831         /* store the updated parameters */
 832         runtime->hw.channels_min = hinfo->channels_min;
 833         runtime->hw.channels_max = hinfo->channels_max;
 834         runtime->hw.formats = hinfo->formats;
 835         runtime->hw.rates = hinfo->rates;
 836
 837         snd_pcm_hw_constraint_step(substream->runtime, 0,
 838                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
 839         return 0;
 840 }
 841
 842 /*
 843  * HDA/HDMI auto parsing
 844  */
 845 static int hdmi_read_pin_conn(struct hda_codec *codec, hda_nid_t pin_nid)
 846 {
 847         struct hdmi_spec *spec = codec->spec;
 848         hda_nid_t conn_list[HDA_MAX_CONNECTIONS];
 849         int conn_len, curr;
 850         int index;
 851
 852         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
 853                 snd_printk(KERN_WARNING
 854                            "HDMI: pin %d wcaps %#x "
 855                            "does not support connection list\n",
 856                            pin_nid, get_wcaps(codec, pin_nid));
 857                 return -EINVAL;
 858         }
 859
 860         conn_len = snd_hda_get_connections(codec, pin_nid, conn_list,
 861                                            HDA_MAX_CONNECTIONS);
 862         if (conn_len > 1)
 863                 curr = snd_hda_codec_read(codec, pin_nid, 0,
 864                                           AC_VERB_GET_CONNECT_SEL, 0);
 865         else
 866                 curr = 0;
 867
 868         index = hda_node_index(spec->pin, pin_nid);
 869         if (index < 0)
 870                 return -EINVAL;
 871
 872         spec->pin_cvt[index] = conn_list[curr];
 873
 874         return 0;
 875 }
 876
 877 static void hdmi_present_sense(struct hda_codec *codec, hda_nid_t pin_nid,
 878                                struct hdmi_eld *eld)
 879 {
 880         /*
 881          * Always execute a GetPinSense verb here, even when called from
 882          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
 883          * response's PD bit is not the real PD value, but indicates that
 884          * the real PD value changed. An older version of the HD-audio
 885          * specification worked this way. Hence, we just ignore the data in
 886          * the unsolicited response to avoid custom WARs.
 887          */
 888         int present = snd_hda_pin_sense(codec, pin_nid);
 889
 890         memset(eld, 0, sizeof(*eld));
 891
 892         eld->monitor_present    = !!(present & AC_PINSENSE_PRESENCE);
 893         if (eld->monitor_present)
 894                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
 895         else
 896                 eld->eld_valid  = 0;
 897
 898         printk(KERN_INFO
 899                 "HDMI status: Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
 900                 pin_nid, eld->monitor_present, eld->eld_valid);
 901
 902         if (eld->eld_valid)
 903                 if (!snd_hdmi_get_eld(eld, codec, pin_nid))
 904                         snd_hdmi_show_eld(eld);
 905
 906         snd_hda_input_jack_report(codec, pin_nid);
 907 }
 908
 909 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 910 {
 911         struct hdmi_spec *spec = codec->spec;
 912         int err;
 913
 914         if (spec->num_pins >= MAX_HDMI_PINS) {
 915                 snd_printk(KERN_WARNING
 916                            "HDMI: no space for pin %d\n", pin_nid);
 917                 return -E2BIG;
 918         }
 919
 920         err = snd_hda_input_jack_add(codec, pin_nid,
 921                                      SND_JACK_VIDEOOUT, NULL);
 922         if (err < 0)
 923                 return err;
 924
 925         hdmi_present_sense(codec, pin_nid, &spec->sink_eld[spec->num_pins]);
 926
 927         spec->pin[spec->num_pins] = pin_nid;
 928         spec->num_pins++;
 929
 930         return hdmi_read_pin_conn(codec, pin_nid);
 931 }
 932
 933 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t nid)
 934 {
 935         int i, found_pin = 0;
 936         struct hdmi_spec *spec = codec->spec;
 937
 938         for (i = 0; i < spec->num_pins; i++)
 939                 if (nid == spec->pin_cvt[i]) {
 940                         found_pin = 1;
 941                         break;
 942                 }
 943
 944         if (!found_pin) {
 945                 snd_printdd("HDMI: Skipping node %d (no connection)\n", nid);
 946                 return -EINVAL;
 947         }
 948
 949         if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS))
 950                 return -E2BIG;
 951
 952         spec->cvt[spec->num_cvts] = nid;
 953         spec->num_cvts++;
 954
 955         return 0;
 956 }
 957
 958 static int hdmi_parse_codec(struct hda_codec *codec)
 959 {
 960         hda_nid_t nid;
 961         int i, nodes;
 962         int num_tmp_cvts = 0;
 963         hda_nid_t tmp_cvt[MAX_HDMI_CVTS];
 964
 965         nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
 966         if (!nid || nodes < 0) {
 967                 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
 968                 return -EINVAL;
 969         }
 970
 971         for (i = 0; i < nodes; i++, nid++) {
 972                 unsigned int caps;
 973                 unsigned int type;
 974                 unsigned int config;
 975
 976                 caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP);
 977                 type = get_wcaps_type(caps);
 978
 979                 if (!(caps & AC_WCAP_DIGITAL))
 980                         continue;
 981
 982                 switch (type) {
 983                 case AC_WID_AUD_OUT:
 984                         if (num_tmp_cvts >= MAX_HDMI_CVTS) {
 985                                 snd_printk(KERN_WARNING
 986                                            "HDMI: no space for converter %d\n", nid);
 987                                 continue;
 988                         }
 989                         tmp_cvt[num_tmp_cvts] = nid;
 990                         num_tmp_cvts++;
 991                         break;
 992                 case AC_WID_PIN:
 993                         caps = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
 994                         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
 995                                 continue;
 996
 997                         config = snd_hda_codec_read(codec, nid, 0,
 998                                              AC_VERB_GET_CONFIG_DEFAULT, 0);
 999                         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1000                                 continue;
1001
1002                         hdmi_add_pin(codec, nid);
1003                         break;
1004                 }
1005         }
1006
1007         for (i = 0; i < num_tmp_cvts; i++)
1008                 hdmi_add_cvt(codec, tmp_cvt[i]);
1009
1010         /*
1011          * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1012          * can be lost and presence sense verb will become inaccurate if the
1013          * HDA link is powered off at hot plug or hw initialization time.
1014          */
1015 #ifdef CONFIG_SND_HDA_POWER_SAVE
1016         if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1017               AC_PWRST_EPSS))
1018                 codec->bus->power_keep_link_on = 1;
1019 #endif
1020
1021         return 0;
1022 }
1023
1024 /*
1025  */
1026 static char *generic_hdmi_pcm_names[MAX_HDMI_CVTS] = {
1027         "HDMI 0",
1028         "HDMI 1",
1029         "HDMI 2",
1030         "HDMI 3",
1031 };
1032
1033 /*
1034  * HDMI callbacks
1035  */
1036
1037 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1038                                            struct hda_codec *codec,
1039                                            unsigned int stream_tag,
1040                                            unsigned int format,
1041                                            struct snd_pcm_substream *substream)
1042 {
1043         hdmi_set_channel_count(codec, hinfo->nid,
1044                                substream->runtime->channels);
1045
1046         hdmi_setup_audio_infoframe(codec, hinfo->nid, substream);
1047
1048         return hdmi_setup_stream(codec, hinfo->nid, stream_tag, format);
1049 }
1050
1051 static const struct hda_pcm_stream generic_hdmi_pcm_playback = {
1052         .substreams = 1,
1053         .channels_min = 2,
1054         .ops = {
1055                 .open = hdmi_pcm_open,
1056                 .prepare = generic_hdmi_playback_pcm_prepare,
1057         },
1058 };
1059
1060 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1061 {
1062         struct hdmi_spec *spec = codec->spec;
1063         struct hda_pcm *info = spec->pcm_rec;
1064         int i;
1065
1066         codec->num_pcms = spec->num_cvts;
1067         codec->pcm_info = info;
1068
1069         for (i = 0; i < codec->num_pcms; i++, info++) {
1070                 unsigned int chans;
1071                 struct hda_pcm_stream *pstr;
1072
1073                 chans = get_wcaps(codec, spec->cvt[i]);
1074                 chans = get_wcaps_channels(chans);
1075
1076                 info->name = generic_hdmi_pcm_names[i];
1077                 info->pcm_type = HDA_PCM_TYPE_HDMI;
1078                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1079                 if (spec->pcm_playback)
1080                         *pstr = *spec->pcm_playback;
1081                 else
1082                         *pstr = generic_hdmi_pcm_playback;
1083                 pstr->nid = spec->cvt[i];
1084                 if (pstr->channels_max <= 2 && chans && chans <= 16)
1085                         pstr->channels_max = chans;
1086         }
1087
1088         return 0;
1089 }
1090
1091 static int generic_hdmi_build_controls(struct hda_codec *codec)
1092 {
1093         struct hdmi_spec *spec = codec->spec;
1094         int err;
1095         int i;
1096
1097         for (i = 0; i < codec->num_pcms; i++) {
1098                 err = snd_hda_create_spdif_out_ctls(codec, spec->cvt[i]);
1099                 if (err < 0)
1100                         return err;
1101         }
1102
1103         return 0;
1104 }
1105
1106 static int generic_hdmi_init(struct hda_codec *codec)
1107 {
1108         struct hdmi_spec *spec = codec->spec;
1109         int i;
1110
1111         for (i = 0; spec->pin[i]; i++) {
1112                 hdmi_enable_output(codec, spec->pin[i]);
1113                 snd_hda_codec_write(codec, spec->pin[i], 0,
1114                                     AC_VERB_SET_UNSOLICITED_ENABLE,
1115                                     AC_USRSP_EN | spec->pin[i]);
1116         }
1117         return 0;
1118 }
1119
1120 static void generic_hdmi_free(struct hda_codec *codec)
1121 {
1122         struct hdmi_spec *spec = codec->spec;
1123         int i;
1124
1125         for (i = 0; i < spec->num_pins; i++)
1126                 snd_hda_eld_proc_free(codec, &spec->sink_eld[i]);
1127         snd_hda_input_jack_free(codec);
1128
1129         kfree(spec);
1130 }
1131
1132 static const struct hda_codec_ops generic_hdmi_patch_ops = {
1133         .init                   = generic_hdmi_init,
1134         .free                   = generic_hdmi_free,
1135         .build_pcms             = generic_hdmi_build_pcms,
1136         .build_controls         = generic_hdmi_build_controls,
1137         .unsol_event            = hdmi_unsol_event,
1138 };
1139
1140 static int patch_generic_hdmi(struct hda_codec *codec)
1141 {
1142         struct hdmi_spec *spec;
1143         int i;
1144
1145         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1146         if (spec == NULL)
1147                 return -ENOMEM;
1148
1149         codec->spec = spec;
1150         if (hdmi_parse_codec(codec) < 0) {
1151                 codec->spec = NULL;
1152                 kfree(spec);
1153                 return -EINVAL;
1154         }
1155         codec->patch_ops = generic_hdmi_patch_ops;
1156
1157         for (i = 0; i < spec->num_pins; i++)
1158                 snd_hda_eld_proc_new(codec, &spec->sink_eld[i], i);
1159
1160         init_channel_allocations();
1161
1162         return 0;
1163 }
1164
1165 /*
1166  * Nvidia specific implementations
1167  */
1168
1169 #define Nv_VERB_SET_Channel_Allocation          0xF79
1170 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
1171 #define Nv_VERB_SET_Audio_Protection_On         0xF98
1172 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
1173
1174 #define nvhdmi_master_con_nid_7x        0x04
1175 #define nvhdmi_master_pin_nid_7x        0x05
1176
1177 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
1178         /*front, rear, clfe, rear_surr */
1179         0x6, 0x8, 0xa, 0xc,
1180 };
1181
1182 static const struct hda_verb nvhdmi_basic_init_7x[] = {
1183         /* set audio protect on */
1184         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1185         /* enable digital output on pin widget */
1186         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1187         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1188         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1189         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1190         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1191         {} /* terminator */
1192 };
1193
1194 #ifdef LIMITED_RATE_FMT_SUPPORT
1195 /* support only the safe format and rate */
1196 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
1197 #define SUPPORTED_MAXBPS        16
1198 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
1199 #else
1200 /* support all rates and formats */
1201 #define SUPPORTED_RATES \
1202         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1203         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
1204          SNDRV_PCM_RATE_192000)
1205 #define SUPPORTED_MAXBPS        24
1206 #define SUPPORTED_FORMATS \
1207         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
1208 #endif
1209
1210 static int nvhdmi_7x_init(struct hda_codec *codec)
1211 {
1212         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x);
1213         return 0;
1214 }
1215
1216 static unsigned int channels_2_6_8[] = {
1217         2, 6, 8
1218 };
1219
1220 static unsigned int channels_2_8[] = {
1221         2, 8
1222 };
1223
1224 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
1225         .count = ARRAY_SIZE(channels_2_6_8),
1226         .list = channels_2_6_8,
1227         .mask = 0,
1228 };
1229
1230 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
1231         .count = ARRAY_SIZE(channels_2_8),
1232         .list = channels_2_8,
1233         .mask = 0,
1234 };
1235
1236 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
1237                                     struct hda_codec *codec,
1238                                     struct snd_pcm_substream *substream)
1239 {
1240         struct hdmi_spec *spec = codec->spec;
1241         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
1242
1243         switch (codec->preset->id) {
1244         case 0x10de0002:
1245         case 0x10de0003:
1246         case 0x10de0005:
1247         case 0x10de0006:
1248                 hw_constraints_channels = &hw_constraints_2_8_channels;
1249                 break;
1250         case 0x10de0007:
1251                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
1252                 break;
1253         default:
1254                 break;
1255         }
1256
1257         if (hw_constraints_channels != NULL) {
1258                 snd_pcm_hw_constraint_list(substream->runtime, 0,
1259                                 SNDRV_PCM_HW_PARAM_CHANNELS,
1260                                 hw_constraints_channels);
1261         } else {
1262                 snd_pcm_hw_constraint_step(substream->runtime, 0,
1263                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1264         }
1265
1266         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1267 }
1268
1269 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
1270                                      struct hda_codec *codec,
1271                                      struct snd_pcm_substream *substream)
1272 {
1273         struct hdmi_spec *spec = codec->spec;
1274         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1275 }
1276
1277 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1278                                        struct hda_codec *codec,
1279                                        unsigned int stream_tag,
1280                                        unsigned int format,
1281                                        struct snd_pcm_substream *substream)
1282 {
1283         struct hdmi_spec *spec = codec->spec;
1284         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1285                                              stream_tag, format, substream);
1286 }
1287
1288 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
1289                                                     int channels)
1290 {
1291         unsigned int chanmask;
1292         int chan = channels ? (channels - 1) : 1;
1293
1294         switch (channels) {
1295         default:
1296         case 0:
1297         case 2:
1298                 chanmask = 0x00;
1299                 break;
1300         case 4:
1301                 chanmask = 0x08;
1302                 break;
1303         case 6:
1304                 chanmask = 0x0b;
1305                 break;
1306         case 8:
1307                 chanmask = 0x13;
1308                 break;
1309         }
1310
1311         /* Set the audio infoframe channel allocation and checksum fields.  The
1312          * channel count is computed implicitly by the hardware. */
1313         snd_hda_codec_write(codec, 0x1, 0,
1314                         Nv_VERB_SET_Channel_Allocation, chanmask);
1315
1316         snd_hda_codec_write(codec, 0x1, 0,
1317                         Nv_VERB_SET_Info_Frame_Checksum,
1318                         (0x71 - chan - chanmask));
1319 }
1320
1321 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
1322                                    struct hda_codec *codec,
1323                                    struct snd_pcm_substream *substream)
1324 {
1325         struct hdmi_spec *spec = codec->spec;
1326         int i;
1327
1328         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
1329                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
1330         for (i = 0; i < 4; i++) {
1331                 /* set the stream id */
1332                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1333                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
1334                 /* set the stream format */
1335                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1336                                 AC_VERB_SET_STREAM_FORMAT, 0);
1337         }
1338
1339         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
1340          * streams are disabled. */
1341         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1342
1343         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1344 }
1345
1346 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
1347                                      struct hda_codec *codec,
1348                                      unsigned int stream_tag,
1349                                      unsigned int format,
1350                                      struct snd_pcm_substream *substream)
1351 {
1352         int chs;
1353         unsigned int dataDCC1, dataDCC2, channel_id;
1354         int i;
1355
1356         mutex_lock(&codec->spdif_mutex);
1357
1358         chs = substream->runtime->channels;
1359
1360         dataDCC1 = AC_DIG1_ENABLE | AC_DIG1_COPYRIGHT;
1361         dataDCC2 = 0x2;
1362
1363         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
1364         if (codec->spdif_status_reset && (codec->spdif_ctls & AC_DIG1_ENABLE))
1365                 snd_hda_codec_write(codec,
1366                                 nvhdmi_master_con_nid_7x,
1367                                 0,
1368                                 AC_VERB_SET_DIGI_CONVERT_1,
1369                                 codec->spdif_ctls & ~AC_DIG1_ENABLE & 0xff);
1370
1371         /* set the stream id */
1372         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1373                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
1374
1375         /* set the stream format */
1376         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1377                         AC_VERB_SET_STREAM_FORMAT, format);
1378
1379         /* turn on again (if needed) */
1380         /* enable and set the channel status audio/data flag */
1381         if (codec->spdif_status_reset && (codec->spdif_ctls & AC_DIG1_ENABLE)) {
1382                 snd_hda_codec_write(codec,
1383                                 nvhdmi_master_con_nid_7x,
1384                                 0,
1385                                 AC_VERB_SET_DIGI_CONVERT_1,
1386                                 codec->spdif_ctls & 0xff);
1387                 snd_hda_codec_write(codec,
1388                                 nvhdmi_master_con_nid_7x,
1389                                 0,
1390                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1391         }
1392
1393         for (i = 0; i < 4; i++) {
1394                 if (chs == 2)
1395                         channel_id = 0;
1396                 else
1397                         channel_id = i * 2;
1398
1399                 /* turn off SPDIF once;
1400                  *otherwise the IEC958 bits won't be updated
1401                  */
1402                 if (codec->spdif_status_reset &&
1403                 (codec->spdif_ctls & AC_DIG1_ENABLE))
1404                         snd_hda_codec_write(codec,
1405                                 nvhdmi_con_nids_7x[i],
1406                                 0,
1407                                 AC_VERB_SET_DIGI_CONVERT_1,
1408                                 codec->spdif_ctls & ~AC_DIG1_ENABLE & 0xff);
1409                 /* set the stream id */
1410                 snd_hda_codec_write(codec,
1411                                 nvhdmi_con_nids_7x[i],
1412                                 0,
1413                                 AC_VERB_SET_CHANNEL_STREAMID,
1414                                 (stream_tag << 4) | channel_id);
1415                 /* set the stream format */
1416                 snd_hda_codec_write(codec,
1417                                 nvhdmi_con_nids_7x[i],
1418                                 0,
1419                                 AC_VERB_SET_STREAM_FORMAT,
1420                                 format);
1421                 /* turn on again (if needed) */
1422                 /* enable and set the channel status audio/data flag */
1423                 if (codec->spdif_status_reset &&
1424                 (codec->spdif_ctls & AC_DIG1_ENABLE)) {
1425                         snd_hda_codec_write(codec,
1426                                         nvhdmi_con_nids_7x[i],
1427                                         0,
1428                                         AC_VERB_SET_DIGI_CONVERT_1,
1429                                         codec->spdif_ctls & 0xff);
1430                         snd_hda_codec_write(codec,
1431                                         nvhdmi_con_nids_7x[i],
1432                                         0,
1433                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1434                 }
1435         }
1436
1437         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
1438
1439         mutex_unlock(&codec->spdif_mutex);
1440         return 0;
1441 }
1442
1443 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
1444         .substreams = 1,
1445         .channels_min = 2,
1446         .channels_max = 8,
1447         .nid = nvhdmi_master_con_nid_7x,
1448         .rates = SUPPORTED_RATES,
1449         .maxbps = SUPPORTED_MAXBPS,
1450         .formats = SUPPORTED_FORMATS,
1451         .ops = {
1452                 .open = simple_playback_pcm_open,
1453                 .close = nvhdmi_8ch_7x_pcm_close,
1454                 .prepare = nvhdmi_8ch_7x_pcm_prepare
1455         },
1456 };
1457
1458 static const struct hda_pcm_stream nvhdmi_pcm_playback_2ch = {
1459         .substreams = 1,
1460         .channels_min = 2,
1461         .channels_max = 2,
1462         .nid = nvhdmi_master_con_nid_7x,
1463         .rates = SUPPORTED_RATES,
1464         .maxbps = SUPPORTED_MAXBPS,
1465         .formats = SUPPORTED_FORMATS,
1466         .ops = {
1467                 .open = simple_playback_pcm_open,
1468                 .close = simple_playback_pcm_close,
1469                 .prepare = simple_playback_pcm_prepare
1470         },
1471 };
1472
1473 static const struct hda_codec_ops nvhdmi_patch_ops_8ch_7x = {
1474         .build_controls = generic_hdmi_build_controls,
1475         .build_pcms = generic_hdmi_build_pcms,
1476         .init = nvhdmi_7x_init,
1477         .free = generic_hdmi_free,
1478 };
1479
1480 static const struct hda_codec_ops nvhdmi_patch_ops_2ch = {
1481         .build_controls = generic_hdmi_build_controls,
1482         .build_pcms = generic_hdmi_build_pcms,
1483         .init = nvhdmi_7x_init,
1484         .free = generic_hdmi_free,
1485 };
1486
1487 static int patch_nvhdmi_2ch(struct hda_codec *codec)
1488 {
1489         struct hdmi_spec *spec;
1490
1491         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1492         if (spec == NULL)
1493                 return -ENOMEM;
1494
1495         codec->spec = spec;
1496
1497         spec->multiout.num_dacs = 0;  /* no analog */
1498         spec->multiout.max_channels = 2;
1499         spec->multiout.dig_out_nid = nvhdmi_master_con_nid_7x;
1500         spec->num_cvts = 1;
1501         spec->cvt[0] = nvhdmi_master_con_nid_7x;
1502         spec->pcm_playback = &nvhdmi_pcm_playback_2ch;
1503
1504         codec->patch_ops = nvhdmi_patch_ops_2ch;
1505
1506         return 0;
1507 }
1508
1509 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
1510 {
1511         struct hdmi_spec *spec;
1512         int err = patch_nvhdmi_2ch(codec);
1513
1514         if (err < 0)
1515                 return err;
1516         spec = codec->spec;
1517         spec->multiout.max_channels = 8;
1518         spec->pcm_playback = &nvhdmi_pcm_playback_8ch_7x;
1519         codec->patch_ops = nvhdmi_patch_ops_8ch_7x;
1520
1521         /* Initialize the audio infoframe channel mask and checksum to something
1522          * valid */
1523         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1524
1525         return 0;
1526 }
1527
1528 /*
1529  * ATI-specific implementations
1530  *
1531  * FIXME: we may omit the whole this and use the generic code once after
1532  * it's confirmed to work.
1533  */
1534
1535 #define ATIHDMI_CVT_NID         0x02    /* audio converter */
1536 #define ATIHDMI_PIN_NID         0x03    /* HDMI output pin */
1537
1538 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1539                                         struct hda_codec *codec,
1540                                         unsigned int stream_tag,
1541                                         unsigned int format,
1542                                         struct snd_pcm_substream *substream)
1543 {
1544         struct hdmi_spec *spec = codec->spec;
1545         int chans = substream->runtime->channels;
1546         int i, err;
1547
1548         err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
1549                                           substream);
1550         if (err < 0)
1551                 return err;
1552         snd_hda_codec_write(codec, spec->cvt[0], 0, AC_VERB_SET_CVT_CHAN_COUNT,
1553                             chans - 1);
1554         /* FIXME: XXX */
1555         for (i = 0; i < chans; i++) {
1556                 snd_hda_codec_write(codec, spec->cvt[0], 0,
1557                                     AC_VERB_SET_HDMI_CHAN_SLOT,
1558                                     (i << 4) | i);
1559         }
1560         return 0;
1561 }
1562
1563 static const struct hda_pcm_stream atihdmi_pcm_digital_playback = {
1564         .substreams = 1,
1565         .channels_min = 2,
1566         .channels_max = 2,
1567         .nid = ATIHDMI_CVT_NID,
1568         .ops = {
1569                 .open = simple_playback_pcm_open,
1570                 .close = simple_playback_pcm_close,
1571                 .prepare = atihdmi_playback_pcm_prepare
1572         },
1573 };
1574
1575 static const struct hda_verb atihdmi_basic_init[] = {
1576         /* enable digital output on pin widget */
1577         { 0x03, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },
1578         {} /* terminator */
1579 };
1580
1581 static int atihdmi_init(struct hda_codec *codec)
1582 {
1583         struct hdmi_spec *spec = codec->spec;
1584
1585         snd_hda_sequence_write(codec, atihdmi_basic_init);
1586         /* SI codec requires to unmute the pin */
1587         if (get_wcaps(codec, spec->pin[0]) & AC_WCAP_OUT_AMP)
1588                 snd_hda_codec_write(codec, spec->pin[0], 0,
1589                                     AC_VERB_SET_AMP_GAIN_MUTE,
1590                                     AMP_OUT_UNMUTE);
1591         return 0;
1592 }
1593
1594 static const struct hda_codec_ops atihdmi_patch_ops = {
1595         .build_controls = generic_hdmi_build_controls,
1596         .build_pcms = generic_hdmi_build_pcms,
1597         .init = atihdmi_init,
1598         .free = generic_hdmi_free,
1599 };
1600
1601
1602 static int patch_atihdmi(struct hda_codec *codec)
1603 {
1604         struct hdmi_spec *spec;
1605
1606         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1607         if (spec == NULL)
1608                 return -ENOMEM;
1609
1610         codec->spec = spec;
1611
1612         spec->multiout.num_dacs = 0;      /* no analog */
1613         spec->multiout.max_channels = 2;
1614         spec->multiout.dig_out_nid = ATIHDMI_CVT_NID;
1615         spec->num_cvts = 1;
1616         spec->cvt[0] = ATIHDMI_CVT_NID;
1617         spec->pin[0] = ATIHDMI_PIN_NID;
1618         spec->pcm_playback = &atihdmi_pcm_digital_playback;
1619
1620         codec->patch_ops = atihdmi_patch_ops;
1621
1622         return 0;
1623 }
1624
1625
1626 /*
1627  * patch entries
1628  */
1629 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
1630 { .id = 0x1002793c, .name = "RS600 HDMI",       .patch = patch_atihdmi },
1631 { .id = 0x10027919, .name = "RS600 HDMI",       .patch = patch_atihdmi },
1632 { .id = 0x1002791a, .name = "RS690/780 HDMI",   .patch = patch_atihdmi },
1633 { .id = 0x1002aa01, .name = "R6xx HDMI",        .patch = patch_generic_hdmi },
1634 { .id = 0x10951390, .name = "SiI1390 HDMI",     .patch = patch_generic_hdmi },
1635 { .id = 0x10951392, .name = "SiI1392 HDMI",     .patch = patch_generic_hdmi },
1636 { .id = 0x17e80047, .name = "Chrontel HDMI",    .patch = patch_generic_hdmi },
1637 { .id = 0x10de0002, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1638 { .id = 0x10de0003, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1639 { .id = 0x10de0005, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1640 { .id = 0x10de0006, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1641 { .id = 0x10de0007, .name = "MCP79/7A HDMI",    .patch = patch_nvhdmi_8ch_7x },
1642 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP",   .patch = patch_generic_hdmi },
1643 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP",   .patch = patch_generic_hdmi },
1644 { .id = 0x10de000c, .name = "MCP89 HDMI",       .patch = patch_generic_hdmi },
1645 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP",   .patch = patch_generic_hdmi },
1646 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP",   .patch = patch_generic_hdmi },
1647 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP",   .patch = patch_generic_hdmi },
1648 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP",   .patch = patch_generic_hdmi },
1649 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP",   .patch = patch_generic_hdmi },
1650 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP",   .patch = patch_generic_hdmi },
1651 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP",   .patch = patch_generic_hdmi },
1652 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP",   .patch = patch_generic_hdmi },
1653 /* 17 is known to be absent */
1654 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP",   .patch = patch_generic_hdmi },
1655 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP",   .patch = patch_generic_hdmi },
1656 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP",   .patch = patch_generic_hdmi },
1657 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP",   .patch = patch_generic_hdmi },
1658 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP",   .patch = patch_generic_hdmi },
1659 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP",   .patch = patch_generic_hdmi },
1660 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP",   .patch = patch_generic_hdmi },
1661 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP",   .patch = patch_generic_hdmi },
1662 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP",   .patch = patch_generic_hdmi },
1663 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP",   .patch = patch_generic_hdmi },
1664 { .id = 0x10de0067, .name = "MCP67 HDMI",       .patch = patch_nvhdmi_2ch },
1665 { .id = 0x10de8001, .name = "MCP73 HDMI",       .patch = patch_nvhdmi_2ch },
1666 { .id = 0x80860054, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
1667 { .id = 0x80862801, .name = "Bearlake HDMI",    .patch = patch_generic_hdmi },
1668 { .id = 0x80862802, .name = "Cantiga HDMI",     .patch = patch_generic_hdmi },
1669 { .id = 0x80862803, .name = "Eaglelake HDMI",   .patch = patch_generic_hdmi },
1670 { .id = 0x80862804, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
1671 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
1672 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
1673 { .id = 0x808629fb, .name = "Crestline HDMI",   .patch = patch_generic_hdmi },
1674 {} /* terminator */
1675 };
1676
1677 MODULE_ALIAS("snd-hda-codec-id:1002793c");
1678 MODULE_ALIAS("snd-hda-codec-id:10027919");
1679 MODULE_ALIAS("snd-hda-codec-id:1002791a");
1680 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
1681 MODULE_ALIAS("snd-hda-codec-id:10951390");
1682 MODULE_ALIAS("snd-hda-codec-id:10951392");
1683 MODULE_ALIAS("snd-hda-codec-id:10de0002");
1684 MODULE_ALIAS("snd-hda-codec-id:10de0003");
1685 MODULE_ALIAS("snd-hda-codec-id:10de0005");
1686 MODULE_ALIAS("snd-hda-codec-id:10de0006");
1687 MODULE_ALIAS("snd-hda-codec-id:10de0007");
1688 MODULE_ALIAS("snd-hda-codec-id:10de000a");
1689 MODULE_ALIAS("snd-hda-codec-id:10de000b");
1690 MODULE_ALIAS("snd-hda-codec-id:10de000c");
1691 MODULE_ALIAS("snd-hda-codec-id:10de000d");
1692 MODULE_ALIAS("snd-hda-codec-id:10de0010");
1693 MODULE_ALIAS("snd-hda-codec-id:10de0011");
1694 MODULE_ALIAS("snd-hda-codec-id:10de0012");
1695 MODULE_ALIAS("snd-hda-codec-id:10de0013");
1696 MODULE_ALIAS("snd-hda-codec-id:10de0014");
1697 MODULE_ALIAS("snd-hda-codec-id:10de0015");
1698 MODULE_ALIAS("snd-hda-codec-id:10de0016");
1699 MODULE_ALIAS("snd-hda-codec-id:10de0018");
1700 MODULE_ALIAS("snd-hda-codec-id:10de0019");
1701 MODULE_ALIAS("snd-hda-codec-id:10de001a");
1702 MODULE_ALIAS("snd-hda-codec-id:10de001b");
1703 MODULE_ALIAS("snd-hda-codec-id:10de001c");
1704 MODULE_ALIAS("snd-hda-codec-id:10de0040");
1705 MODULE_ALIAS("snd-hda-codec-id:10de0041");
1706 MODULE_ALIAS("snd-hda-codec-id:10de0042");
1707 MODULE_ALIAS("snd-hda-codec-id:10de0043");
1708 MODULE_ALIAS("snd-hda-codec-id:10de0044");
1709 MODULE_ALIAS("snd-hda-codec-id:10de0067");
1710 MODULE_ALIAS("snd-hda-codec-id:10de8001");
1711 MODULE_ALIAS("snd-hda-codec-id:17e80047");
1712 MODULE_ALIAS("snd-hda-codec-id:80860054");
1713 MODULE_ALIAS("snd-hda-codec-id:80862801");
1714 MODULE_ALIAS("snd-hda-codec-id:80862802");
1715 MODULE_ALIAS("snd-hda-codec-id:80862803");
1716 MODULE_ALIAS("snd-hda-codec-id:80862804");
1717 MODULE_ALIAS("snd-hda-codec-id:80862805");
1718 MODULE_ALIAS("snd-hda-codec-id:80862806");
1719 MODULE_ALIAS("snd-hda-codec-id:808629fb");
1720
1721 MODULE_LICENSE("GPL");
1722 MODULE_DESCRIPTION("HDMI HD-audio codec");
1723 MODULE_ALIAS("snd-hda-codec-intelhdmi");
1724 MODULE_ALIAS("snd-hda-codec-nvhdmi");
1725 MODULE_ALIAS("snd-hda-codec-atihdmi");
1726
1727 static struct hda_codec_preset_list intel_list = {
1728         .preset = snd_hda_preset_hdmi,
1729         .owner = THIS_MODULE,
1730 };
1731
1732 static int __init patch_hdmi_init(void)
1733 {
1734         return snd_hda_add_codec_preset(&intel_list);
1735 }
1736
1737 static void __exit patch_hdmi_exit(void)
1738 {
1739         snd_hda_delete_codec_preset(&intel_list);
1740 }
1741
1742 module_init(patch_hdmi_init)
1743 module_exit(patch_hdmi_exit)