3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6 * Copyright (c) 2006 ATI Technologies Inc.
7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
9 * Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
12 * Wu Fengguang <wfg@linux.intel.com>
15 * Wu Fengguang <wfg@linux.intel.com>
17 * This program is free software; you can redistribute it and/or modify it
18 * under the terms of the GNU General Public License as published by the Free
19 * Software Foundation; either version 2 of the License, or (at your option)
22 * This program is distributed in the hope that it will be useful, but
23 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
24 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software Foundation,
29 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
32 #include <linux/init.h>
33 #include <linux/delay.h>
34 #include <linux/slab.h>
35 #include <linux/module.h>
36 #include <sound/core.h>
37 #include <sound/jack.h>
38 #include <sound/asoundef.h>
39 #include <sound/tlv.h>
40 #include <sound/hdaudio.h>
41 #include <sound/hda_i915.h>
42 #include <sound/hda_chmap.h>
43 #include "hda_codec.h"
44 #include "hda_local.h"
47 static bool static_hdmi_pcm;
48 module_param(static_hdmi_pcm, bool, 0644);
49 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
51 #define is_haswell(codec) ((codec)->core.vendor_id == 0x80862807)
52 #define is_broadwell(codec) ((codec)->core.vendor_id == 0x80862808)
53 #define is_skylake(codec) ((codec)->core.vendor_id == 0x80862809)
54 #define is_broxton(codec) ((codec)->core.vendor_id == 0x8086280a)
55 #define is_kabylake(codec) ((codec)->core.vendor_id == 0x8086280b)
56 #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec) \
57 || is_skylake(codec) || is_broxton(codec) \
58 || is_kabylake(codec))
60 #define is_valleyview(codec) ((codec)->core.vendor_id == 0x80862882)
61 #define is_cherryview(codec) ((codec)->core.vendor_id == 0x80862883)
62 #define is_valleyview_plus(codec) (is_valleyview(codec) || is_cherryview(codec))
64 struct hdmi_spec_per_cvt {
67 unsigned int channels_min;
68 unsigned int channels_max;
74 /* max. connections to a widget */
75 #define HDA_MAX_CONNECTIONS 32
77 struct hdmi_spec_per_pin {
79 /* pin idx, different device entries on the same pin use the same idx */
82 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
86 struct hda_codec *codec;
87 struct hdmi_eld sink_eld;
89 struct delayed_work work;
90 struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
91 int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
93 bool setup; /* the stream has been set up by prepare callback */
94 int channels; /* current number of channels */
96 bool chmap_set; /* channel-map override by ALSA API? */
97 unsigned char chmap[8]; /* ALSA API channel-map */
98 #ifdef CONFIG_SND_PROC_FS
99 struct snd_info_entry *proc_entry;
103 /* operations used by generic code that can be overridden by patches */
105 int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
106 unsigned char *buf, int *eld_size);
108 void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
109 int ca, int active_channels, int conn_type);
111 /* enable/disable HBR (HD passthrough) */
112 int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
114 int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
115 hda_nid_t pin_nid, u32 stream_tag, int format);
117 void (*pin_cvt_fixup)(struct hda_codec *codec,
118 struct hdmi_spec_per_pin *per_pin,
124 struct snd_jack *jack;
125 struct snd_kcontrol *eld_ctl;
130 struct snd_array cvts; /* struct hdmi_spec_per_cvt */
131 hda_nid_t cvt_nids[4]; /* only for haswell fix */
134 struct snd_array pins; /* struct hdmi_spec_per_pin */
135 struct hdmi_pcm pcm_rec[16];
136 struct mutex pcm_lock;
137 /* pcm_bitmap means which pcms have been assigned to pins*/
138 unsigned long pcm_bitmap;
139 int pcm_used; /* counter of pcm_rec[] */
140 /* bitmap shows whether the pcm is opened in user space
141 * bit 0 means the first playback PCM (PCM3);
142 * bit 1 means the second playback PCM, and so on.
144 unsigned long pcm_in_use;
146 struct hdmi_eld temp_eld;
152 * Non-generic VIA/NVIDIA specific
154 struct hda_multi_out multiout;
155 struct hda_pcm_stream pcm_playback;
157 /* i915/powerwell (Haswell+/Valleyview+) specific */
158 bool use_acomp_notifier; /* use i915 eld_notify callback for hotplug */
159 struct i915_audio_component_audio_ops i915_audio_ops;
160 bool i915_bound; /* was i915 bound in this driver? */
162 struct hdac_chmap chmap;
165 #ifdef CONFIG_SND_HDA_I915
166 static inline bool codec_has_acomp(struct hda_codec *codec)
168 struct hdmi_spec *spec = codec->spec;
169 return spec->use_acomp_notifier;
172 #define codec_has_acomp(codec) false
175 struct hdmi_audio_infoframe {
182 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
186 u8 LFEPBL01_LSV36_DM_INH7;
189 struct dp_audio_infoframe {
192 u8 ver; /* 0x11 << 2 */
194 u8 CC02_CT47; /* match with HDMI infoframe from this on */
198 u8 LFEPBL01_LSV36_DM_INH7;
201 union audio_infoframe {
202 struct hdmi_audio_infoframe hdmi;
203 struct dp_audio_infoframe dp;
211 #define get_pin(spec, idx) \
212 ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
213 #define get_cvt(spec, idx) \
214 ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
215 /* obtain hdmi_pcm object assigned to idx */
216 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
217 /* obtain hda_pcm object assigned to idx */
218 #define get_pcm_rec(spec, idx) (get_hdmi_pcm(spec, idx)->pcm)
220 static int pin_nid_to_pin_index(struct hda_codec *codec, hda_nid_t pin_nid)
222 struct hdmi_spec *spec = codec->spec;
225 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
226 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
229 codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
233 static int hinfo_to_pcm_index(struct hda_codec *codec,
234 struct hda_pcm_stream *hinfo)
236 struct hdmi_spec *spec = codec->spec;
239 for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
240 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
243 codec_warn(codec, "HDMI: hinfo %p not registered\n", hinfo);
247 static int hinfo_to_pin_index(struct hda_codec *codec,
248 struct hda_pcm_stream *hinfo)
250 struct hdmi_spec *spec = codec->spec;
251 struct hdmi_spec_per_pin *per_pin;
254 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
255 per_pin = get_pin(spec, pin_idx);
257 per_pin->pcm->pcm->stream == hinfo)
261 codec_dbg(codec, "HDMI: hinfo %p not registered\n", hinfo);
265 static struct hdmi_spec_per_pin *pcm_idx_to_pin(struct hdmi_spec *spec,
269 struct hdmi_spec_per_pin *per_pin;
271 for (i = 0; i < spec->num_pins; i++) {
272 per_pin = get_pin(spec, i);
273 if (per_pin->pcm_idx == pcm_idx)
279 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
281 struct hdmi_spec *spec = codec->spec;
284 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
285 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
288 codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
292 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
293 struct snd_ctl_elem_info *uinfo)
295 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
296 struct hdmi_spec *spec = codec->spec;
297 struct hdmi_spec_per_pin *per_pin;
298 struct hdmi_eld *eld;
301 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
303 pcm_idx = kcontrol->private_value;
304 mutex_lock(&spec->pcm_lock);
305 per_pin = pcm_idx_to_pin(spec, pcm_idx);
307 /* no pin is bound to the pcm */
309 mutex_unlock(&spec->pcm_lock);
312 eld = &per_pin->sink_eld;
313 uinfo->count = eld->eld_valid ? eld->eld_size : 0;
314 mutex_unlock(&spec->pcm_lock);
319 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
320 struct snd_ctl_elem_value *ucontrol)
322 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
323 struct hdmi_spec *spec = codec->spec;
324 struct hdmi_spec_per_pin *per_pin;
325 struct hdmi_eld *eld;
328 pcm_idx = kcontrol->private_value;
329 mutex_lock(&spec->pcm_lock);
330 per_pin = pcm_idx_to_pin(spec, pcm_idx);
332 /* no pin is bound to the pcm */
333 memset(ucontrol->value.bytes.data, 0,
334 ARRAY_SIZE(ucontrol->value.bytes.data));
335 mutex_unlock(&spec->pcm_lock);
338 eld = &per_pin->sink_eld;
340 if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) ||
341 eld->eld_size > ELD_MAX_SIZE) {
342 mutex_unlock(&spec->pcm_lock);
347 memset(ucontrol->value.bytes.data, 0,
348 ARRAY_SIZE(ucontrol->value.bytes.data));
350 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
352 mutex_unlock(&spec->pcm_lock);
357 static struct snd_kcontrol_new eld_bytes_ctl = {
358 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
359 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
361 .info = hdmi_eld_ctl_info,
362 .get = hdmi_eld_ctl_get,
365 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pcm_idx,
368 struct snd_kcontrol *kctl;
369 struct hdmi_spec *spec = codec->spec;
372 kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
375 kctl->private_value = pcm_idx;
376 kctl->id.device = device;
378 /* no pin nid is associated with the kctl now
379 * tbd: associate pin nid to eld ctl later
381 err = snd_hda_ctl_add(codec, 0, kctl);
385 get_hdmi_pcm(spec, pcm_idx)->eld_ctl = kctl;
390 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
391 int *packet_index, int *byte_index)
395 val = snd_hda_codec_read(codec, pin_nid, 0,
396 AC_VERB_GET_HDMI_DIP_INDEX, 0);
398 *packet_index = val >> 5;
399 *byte_index = val & 0x1f;
403 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
404 int packet_index, int byte_index)
408 val = (packet_index << 5) | (byte_index & 0x1f);
410 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
413 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
416 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
419 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
421 struct hdmi_spec *spec = codec->spec;
425 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
426 snd_hda_codec_write(codec, pin_nid, 0,
427 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
429 if (spec->dyn_pin_out)
430 /* Disable pin out until stream is active */
433 /* Enable pin out: some machines with GM965 gets broken output
434 * when the pin is disabled or changed while using with HDMI
438 snd_hda_codec_write(codec, pin_nid, 0,
439 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
446 #ifdef CONFIG_SND_PROC_FS
447 static void print_eld_info(struct snd_info_entry *entry,
448 struct snd_info_buffer *buffer)
450 struct hdmi_spec_per_pin *per_pin = entry->private_data;
452 mutex_lock(&per_pin->lock);
453 snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
454 mutex_unlock(&per_pin->lock);
457 static void write_eld_info(struct snd_info_entry *entry,
458 struct snd_info_buffer *buffer)
460 struct hdmi_spec_per_pin *per_pin = entry->private_data;
462 mutex_lock(&per_pin->lock);
463 snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
464 mutex_unlock(&per_pin->lock);
467 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
470 struct hda_codec *codec = per_pin->codec;
471 struct snd_info_entry *entry;
474 snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
475 err = snd_card_proc_new(codec->card, name, &entry);
479 snd_info_set_text_ops(entry, per_pin, print_eld_info);
480 entry->c.text.write = write_eld_info;
481 entry->mode |= S_IWUSR;
482 per_pin->proc_entry = entry;
487 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
489 if (!per_pin->codec->bus->shutdown) {
490 snd_info_free_entry(per_pin->proc_entry);
491 per_pin->proc_entry = NULL;
495 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
500 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
506 * Audio InfoFrame routines
510 * Enable Audio InfoFrame Transmission
512 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
515 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
516 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
521 * Disable Audio InfoFrame Transmission
523 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
526 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
527 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
531 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
533 #ifdef CONFIG_SND_DEBUG_VERBOSE
537 size = snd_hdmi_get_eld_size(codec, pin_nid);
538 codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
540 for (i = 0; i < 8; i++) {
541 size = snd_hda_codec_read(codec, pin_nid, 0,
542 AC_VERB_GET_HDMI_DIP_SIZE, i);
543 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
548 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
554 for (i = 0; i < 8; i++) {
555 size = snd_hda_codec_read(codec, pin_nid, 0,
556 AC_VERB_GET_HDMI_DIP_SIZE, i);
560 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
561 for (j = 1; j < 1000; j++) {
562 hdmi_write_dip_byte(codec, pin_nid, 0x0);
563 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
565 codec_dbg(codec, "dip index %d: %d != %d\n",
567 if (bi == 0) /* byte index wrapped around */
571 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
577 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
579 u8 *bytes = (u8 *)hdmi_ai;
583 hdmi_ai->checksum = 0;
585 for (i = 0; i < sizeof(*hdmi_ai); i++)
588 hdmi_ai->checksum = -sum;
591 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
597 hdmi_debug_dip_size(codec, pin_nid);
598 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
600 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
601 for (i = 0; i < size; i++)
602 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
605 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
611 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
615 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
616 for (i = 0; i < size; i++) {
617 val = snd_hda_codec_read(codec, pin_nid, 0,
618 AC_VERB_GET_HDMI_DIP_DATA, 0);
626 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
628 int ca, int active_channels,
631 union audio_infoframe ai;
633 memset(&ai, 0, sizeof(ai));
634 if (conn_type == 0) { /* HDMI */
635 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
637 hdmi_ai->type = 0x84;
640 hdmi_ai->CC02_CT47 = active_channels - 1;
642 hdmi_checksum_audio_infoframe(hdmi_ai);
643 } else if (conn_type == 1) { /* DisplayPort */
644 struct dp_audio_infoframe *dp_ai = &ai.dp;
648 dp_ai->ver = 0x11 << 2;
649 dp_ai->CC02_CT47 = active_channels - 1;
652 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
658 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
659 * sizeof(*dp_ai) to avoid partial match/update problems when
660 * the user switches between HDMI/DP monitors.
662 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
665 "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
667 active_channels, ca);
668 hdmi_stop_infoframe_trans(codec, pin_nid);
669 hdmi_fill_audio_infoframe(codec, pin_nid,
670 ai.bytes, sizeof(ai));
671 hdmi_start_infoframe_trans(codec, pin_nid);
675 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
676 struct hdmi_spec_per_pin *per_pin,
679 struct hdmi_spec *spec = codec->spec;
680 struct hdac_chmap *chmap = &spec->chmap;
681 hda_nid_t pin_nid = per_pin->pin_nid;
682 int channels = per_pin->channels;
684 struct hdmi_eld *eld;
690 /* some HW (e.g. HSW+) needs reprogramming the amp at each time */
691 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
692 snd_hda_codec_write(codec, pin_nid, 0,
693 AC_VERB_SET_AMP_GAIN_MUTE,
696 eld = &per_pin->sink_eld;
698 ca = snd_hdac_channel_allocation(&codec->core,
699 eld->info.spk_alloc, channels,
700 per_pin->chmap_set, non_pcm, per_pin->chmap);
702 active_channels = snd_hdac_get_active_channels(ca);
704 chmap->ops.set_channel_count(&codec->core, per_pin->cvt_nid,
708 * always configure channel mapping, it may have been changed by the
709 * user in the meantime
711 snd_hdac_setup_channel_mapping(&spec->chmap,
712 pin_nid, non_pcm, ca, channels,
713 per_pin->chmap, per_pin->chmap_set);
715 spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
716 eld->info.conn_type);
718 per_pin->non_pcm = non_pcm;
725 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
727 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid)
729 struct hdmi_spec *spec = codec->spec;
730 int pin_idx = pin_nid_to_pin_index(codec, nid);
734 if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
735 snd_hda_jack_report_sync(codec);
738 static void jack_callback(struct hda_codec *codec,
739 struct hda_jack_callback *jack)
741 check_presence_and_report(codec, jack->nid);
744 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
746 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
747 struct hda_jack_tbl *jack;
748 int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
750 jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
753 jack->jack_dirty = 1;
756 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
757 codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
758 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
760 check_presence_and_report(codec, jack->nid);
763 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
765 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
766 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
767 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
768 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
771 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
786 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
788 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
789 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
791 if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
792 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
797 hdmi_intrinsic_event(codec, res);
799 hdmi_non_intrinsic_event(codec, res);
802 static void haswell_verify_D0(struct hda_codec *codec,
803 hda_nid_t cvt_nid, hda_nid_t nid)
807 /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
808 * thus pins could only choose converter 0 for use. Make sure the
809 * converters are in correct power state */
810 if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
811 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
813 if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
814 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
817 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
818 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
819 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
827 /* HBR should be Non-PCM, 8 channels */
828 #define is_hbr_format(format) \
829 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
831 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
834 int pinctl, new_pinctl;
836 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
837 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
838 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
841 return hbr ? -EINVAL : 0;
843 new_pinctl = pinctl & ~AC_PINCTL_EPT;
845 new_pinctl |= AC_PINCTL_EPT_HBR;
847 new_pinctl |= AC_PINCTL_EPT_NATIVE;
850 "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
852 pinctl == new_pinctl ? "" : "new-",
855 if (pinctl != new_pinctl)
856 snd_hda_codec_write(codec, pin_nid, 0,
857 AC_VERB_SET_PIN_WIDGET_CONTROL,
865 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
866 hda_nid_t pin_nid, u32 stream_tag, int format)
868 struct hdmi_spec *spec = codec->spec;
871 err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
874 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
878 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
882 /* Try to find an available converter
883 * If pin_idx is less then zero, just try to find an available converter.
884 * Otherwise, try to find an available converter and get the cvt mux index
887 static int hdmi_choose_cvt(struct hda_codec *codec,
888 int pin_idx, int *cvt_id)
890 struct hdmi_spec *spec = codec->spec;
891 struct hdmi_spec_per_pin *per_pin;
892 struct hdmi_spec_per_cvt *per_cvt = NULL;
893 int cvt_idx, mux_idx = 0;
895 /* pin_idx < 0 means no pin will be bound to the converter */
899 per_pin = get_pin(spec, pin_idx);
901 /* Dynamically assign converter to stream */
902 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
903 per_cvt = get_cvt(spec, cvt_idx);
905 /* Must not already be assigned */
906 if (per_cvt->assigned)
910 /* Must be in pin's mux's list of converters */
911 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
912 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
914 /* Not in mux list */
915 if (mux_idx == per_pin->num_mux_nids)
920 /* No free converters */
921 if (cvt_idx == spec->num_cvts)
925 per_pin->mux_idx = mux_idx;
933 /* Assure the pin select the right convetor */
934 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
935 struct hdmi_spec_per_pin *per_pin)
937 hda_nid_t pin_nid = per_pin->pin_nid;
940 mux_idx = per_pin->mux_idx;
941 curr = snd_hda_codec_read(codec, pin_nid, 0,
942 AC_VERB_GET_CONNECT_SEL, 0);
944 snd_hda_codec_write_cache(codec, pin_nid, 0,
945 AC_VERB_SET_CONNECT_SEL,
949 /* get the mux index for the converter of the pins
950 * converter's mux index is the same for all pins on Intel platform
952 static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
957 for (i = 0; i < spec->num_cvts; i++)
958 if (spec->cvt_nids[i] == cvt_nid)
963 /* Intel HDMI workaround to fix audio routing issue:
964 * For some Intel display codecs, pins share the same connection list.
965 * So a conveter can be selected by multiple pins and playback on any of these
966 * pins will generate sound on the external display, because audio flows from
967 * the same converter to the display pipeline. Also muting one pin may make
968 * other pins have no sound output.
969 * So this function assures that an assigned converter for a pin is not selected
972 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
973 hda_nid_t pin_nid, int mux_idx)
975 struct hdmi_spec *spec = codec->spec;
978 struct hdmi_spec_per_cvt *per_cvt;
980 /* configure all pins, including "no physical connection" ones */
981 for_each_hda_codec_node(nid, codec) {
982 unsigned int wid_caps = get_wcaps(codec, nid);
983 unsigned int wid_type = get_wcaps_type(wid_caps);
985 if (wid_type != AC_WID_PIN)
991 curr = snd_hda_codec_read(codec, nid, 0,
992 AC_VERB_GET_CONNECT_SEL, 0);
996 /* choose an unassigned converter. The conveters in the
997 * connection list are in the same order as in the codec.
999 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1000 per_cvt = get_cvt(spec, cvt_idx);
1001 if (!per_cvt->assigned) {
1003 "choose cvt %d for pin nid %d\n",
1005 snd_hda_codec_write_cache(codec, nid, 0,
1006 AC_VERB_SET_CONNECT_SEL,
1014 /* A wrapper of intel_not_share_asigned_cvt() */
1015 static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1016 hda_nid_t pin_nid, hda_nid_t cvt_nid)
1019 struct hdmi_spec *spec = codec->spec;
1021 /* On Intel platform, the mapping of converter nid to
1022 * mux index of the pins are always the same.
1023 * The pin nid may be 0, this means all pins will not
1024 * share the converter.
1026 mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1028 intel_not_share_assigned_cvt(codec, pin_nid, mux_idx);
1031 /* skeleton caller of pin_cvt_fixup ops */
1032 static void pin_cvt_fixup(struct hda_codec *codec,
1033 struct hdmi_spec_per_pin *per_pin,
1036 struct hdmi_spec *spec = codec->spec;
1038 if (spec->ops.pin_cvt_fixup)
1039 spec->ops.pin_cvt_fixup(codec, per_pin, cvt_nid);
1042 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1043 * in dyn_pcm_assign mode.
1045 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1046 struct hda_codec *codec,
1047 struct snd_pcm_substream *substream)
1049 struct hdmi_spec *spec = codec->spec;
1050 struct snd_pcm_runtime *runtime = substream->runtime;
1051 int cvt_idx, pcm_idx;
1052 struct hdmi_spec_per_cvt *per_cvt = NULL;
1055 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1059 err = hdmi_choose_cvt(codec, -1, &cvt_idx);
1063 per_cvt = get_cvt(spec, cvt_idx);
1064 per_cvt->assigned = 1;
1065 hinfo->nid = per_cvt->cvt_nid;
1067 pin_cvt_fixup(codec, NULL, per_cvt->cvt_nid);
1069 set_bit(pcm_idx, &spec->pcm_in_use);
1070 /* todo: setup spdif ctls assign */
1072 /* Initially set the converter's capabilities */
1073 hinfo->channels_min = per_cvt->channels_min;
1074 hinfo->channels_max = per_cvt->channels_max;
1075 hinfo->rates = per_cvt->rates;
1076 hinfo->formats = per_cvt->formats;
1077 hinfo->maxbps = per_cvt->maxbps;
1079 /* Store the updated parameters */
1080 runtime->hw.channels_min = hinfo->channels_min;
1081 runtime->hw.channels_max = hinfo->channels_max;
1082 runtime->hw.formats = hinfo->formats;
1083 runtime->hw.rates = hinfo->rates;
1085 snd_pcm_hw_constraint_step(substream->runtime, 0,
1086 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1093 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1094 struct hda_codec *codec,
1095 struct snd_pcm_substream *substream)
1097 struct hdmi_spec *spec = codec->spec;
1098 struct snd_pcm_runtime *runtime = substream->runtime;
1099 int pin_idx, cvt_idx, pcm_idx;
1100 struct hdmi_spec_per_pin *per_pin;
1101 struct hdmi_eld *eld;
1102 struct hdmi_spec_per_cvt *per_cvt = NULL;
1105 /* Validate hinfo */
1106 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1110 mutex_lock(&spec->pcm_lock);
1111 pin_idx = hinfo_to_pin_index(codec, hinfo);
1112 if (!spec->dyn_pcm_assign) {
1113 if (snd_BUG_ON(pin_idx < 0)) {
1114 mutex_unlock(&spec->pcm_lock);
1118 /* no pin is assigned to the PCM
1119 * PA need pcm open successfully when probe
1122 err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1123 mutex_unlock(&spec->pcm_lock);
1128 err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx);
1130 mutex_unlock(&spec->pcm_lock);
1134 per_cvt = get_cvt(spec, cvt_idx);
1135 /* Claim converter */
1136 per_cvt->assigned = 1;
1138 set_bit(pcm_idx, &spec->pcm_in_use);
1139 per_pin = get_pin(spec, pin_idx);
1140 per_pin->cvt_nid = per_cvt->cvt_nid;
1141 hinfo->nid = per_cvt->cvt_nid;
1143 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1144 AC_VERB_SET_CONNECT_SEL,
1147 /* configure unused pins to choose other converters */
1148 pin_cvt_fixup(codec, per_pin, 0);
1150 snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
1152 /* Initially set the converter's capabilities */
1153 hinfo->channels_min = per_cvt->channels_min;
1154 hinfo->channels_max = per_cvt->channels_max;
1155 hinfo->rates = per_cvt->rates;
1156 hinfo->formats = per_cvt->formats;
1157 hinfo->maxbps = per_cvt->maxbps;
1159 eld = &per_pin->sink_eld;
1160 /* Restrict capabilities by ELD if this isn't disabled */
1161 if (!static_hdmi_pcm && eld->eld_valid) {
1162 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1163 if (hinfo->channels_min > hinfo->channels_max ||
1164 !hinfo->rates || !hinfo->formats) {
1165 per_cvt->assigned = 0;
1167 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1168 mutex_unlock(&spec->pcm_lock);
1173 mutex_unlock(&spec->pcm_lock);
1174 /* Store the updated parameters */
1175 runtime->hw.channels_min = hinfo->channels_min;
1176 runtime->hw.channels_max = hinfo->channels_max;
1177 runtime->hw.formats = hinfo->formats;
1178 runtime->hw.rates = hinfo->rates;
1180 snd_pcm_hw_constraint_step(substream->runtime, 0,
1181 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1186 * HDA/HDMI auto parsing
1188 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1190 struct hdmi_spec *spec = codec->spec;
1191 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1192 hda_nid_t pin_nid = per_pin->pin_nid;
1194 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1196 "HDMI: pin %d wcaps %#x does not support connection list\n",
1197 pin_nid, get_wcaps(codec, pin_nid));
1201 per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1203 HDA_MAX_CONNECTIONS);
1208 static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1209 struct hdmi_spec_per_pin *per_pin)
1213 /* try the prefer PCM */
1214 if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1215 return per_pin->pin_nid_idx;
1217 /* have a second try; check the "reserved area" over num_pins */
1218 for (i = spec->num_pins; i < spec->pcm_used; i++) {
1219 if (!test_bit(i, &spec->pcm_bitmap))
1223 /* the last try; check the empty slots in pins */
1224 for (i = 0; i < spec->num_pins; i++) {
1225 if (!test_bit(i, &spec->pcm_bitmap))
1231 static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1232 struct hdmi_spec_per_pin *per_pin)
1236 /* pcm already be attached to the pin */
1239 idx = hdmi_find_pcm_slot(spec, per_pin);
1242 per_pin->pcm_idx = idx;
1243 per_pin->pcm = get_hdmi_pcm(spec, idx);
1244 set_bit(idx, &spec->pcm_bitmap);
1247 static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1248 struct hdmi_spec_per_pin *per_pin)
1252 /* pcm already be detached from the pin */
1255 idx = per_pin->pcm_idx;
1256 per_pin->pcm_idx = -1;
1257 per_pin->pcm = NULL;
1258 if (idx >= 0 && idx < spec->pcm_used)
1259 clear_bit(idx, &spec->pcm_bitmap);
1262 static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1263 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1267 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1268 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1273 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1275 static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1276 struct hdmi_spec_per_pin *per_pin)
1278 struct hda_codec *codec = per_pin->codec;
1279 struct hda_pcm *pcm;
1280 struct hda_pcm_stream *hinfo;
1281 struct snd_pcm_substream *substream;
1285 if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1286 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
1289 if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1292 /* hdmi audio only uses playback and one substream */
1293 hinfo = pcm->stream;
1294 substream = pcm->pcm->streams[0].substream;
1296 per_pin->cvt_nid = hinfo->nid;
1298 mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1299 if (mux_idx < per_pin->num_mux_nids)
1300 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1301 AC_VERB_SET_CONNECT_SEL,
1303 snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1305 non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1306 if (substream->runtime)
1307 per_pin->channels = substream->runtime->channels;
1308 per_pin->setup = true;
1309 per_pin->mux_idx = mux_idx;
1311 hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1314 static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1315 struct hdmi_spec_per_pin *per_pin)
1317 if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1318 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1320 per_pin->chmap_set = false;
1321 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1323 per_pin->setup = false;
1324 per_pin->channels = 0;
1327 /* update per_pin ELD from the given new ELD;
1328 * setup info frame and notification accordingly
1330 static void update_eld(struct hda_codec *codec,
1331 struct hdmi_spec_per_pin *per_pin,
1332 struct hdmi_eld *eld)
1334 struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1335 struct hdmi_spec *spec = codec->spec;
1336 bool old_eld_valid = pin_eld->eld_valid;
1340 /* for monitor disconnection, save pcm_idx firstly */
1341 pcm_idx = per_pin->pcm_idx;
1342 if (spec->dyn_pcm_assign) {
1343 if (eld->eld_valid) {
1344 hdmi_attach_hda_pcm(spec, per_pin);
1345 hdmi_pcm_setup_pin(spec, per_pin);
1347 hdmi_pcm_reset_pin(spec, per_pin);
1348 hdmi_detach_hda_pcm(spec, per_pin);
1351 /* if pcm_idx == -1, it means this is in monitor connection event
1352 * we can get the correct pcm_idx now.
1355 pcm_idx = per_pin->pcm_idx;
1358 snd_hdmi_show_eld(codec, &eld->info);
1360 eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1361 if (eld->eld_valid && pin_eld->eld_valid)
1362 if (pin_eld->eld_size != eld->eld_size ||
1363 memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1364 eld->eld_size) != 0)
1367 pin_eld->monitor_present = eld->monitor_present;
1368 pin_eld->eld_valid = eld->eld_valid;
1369 pin_eld->eld_size = eld->eld_size;
1371 memcpy(pin_eld->eld_buffer, eld->eld_buffer, eld->eld_size);
1372 pin_eld->info = eld->info;
1375 * Re-setup pin and infoframe. This is needed e.g. when
1376 * - sink is first plugged-in
1377 * - transcoder can change during stream playback on Haswell
1378 * and this can make HW reset converter selection on a pin.
1380 if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1381 pin_cvt_fixup(codec, per_pin, 0);
1382 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1385 if (eld_changed && pcm_idx >= 0)
1386 snd_ctl_notify(codec->card,
1387 SNDRV_CTL_EVENT_MASK_VALUE |
1388 SNDRV_CTL_EVENT_MASK_INFO,
1389 &get_hdmi_pcm(spec, pcm_idx)->eld_ctl->id);
1392 /* update ELD and jack state via HD-audio verbs */
1393 static bool hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1396 struct hda_jack_tbl *jack;
1397 struct hda_codec *codec = per_pin->codec;
1398 struct hdmi_spec *spec = codec->spec;
1399 struct hdmi_eld *eld = &spec->temp_eld;
1400 hda_nid_t pin_nid = per_pin->pin_nid;
1402 * Always execute a GetPinSense verb here, even when called from
1403 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1404 * response's PD bit is not the real PD value, but indicates that
1405 * the real PD value changed. An older version of the HD-audio
1406 * specification worked this way. Hence, we just ignore the data in
1407 * the unsolicited response to avoid custom WARs.
1411 bool do_repoll = false;
1413 present = snd_hda_pin_sense(codec, pin_nid);
1415 mutex_lock(&per_pin->lock);
1416 eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1417 if (eld->monitor_present)
1418 eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
1420 eld->eld_valid = false;
1423 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1424 codec->addr, pin_nid, eld->monitor_present, eld->eld_valid);
1426 if (eld->eld_valid) {
1427 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1428 &eld->eld_size) < 0)
1429 eld->eld_valid = false;
1431 if (snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1433 eld->eld_valid = false;
1435 if (!eld->eld_valid && repoll)
1440 schedule_delayed_work(&per_pin->work, msecs_to_jiffies(300));
1442 update_eld(codec, per_pin, eld);
1444 ret = !repoll || !eld->monitor_present || eld->eld_valid;
1446 jack = snd_hda_jack_tbl_get(codec, pin_nid);
1448 jack->block_report = !ret;
1450 mutex_unlock(&per_pin->lock);
1454 static struct snd_jack *pin_idx_to_jack(struct hda_codec *codec,
1455 struct hdmi_spec_per_pin *per_pin)
1457 struct hdmi_spec *spec = codec->spec;
1458 struct snd_jack *jack = NULL;
1459 struct hda_jack_tbl *jack_tbl;
1461 /* if !dyn_pcm_assign, get jack from hda_jack_tbl
1462 * in !dyn_pcm_assign case, spec->pcm_rec[].jack is not
1463 * NULL even after snd_hda_jack_tbl_clear() is called to
1464 * free snd_jack. This may cause access invalid memory
1465 * when calling snd_jack_report
1467 if (per_pin->pcm_idx >= 0 && spec->dyn_pcm_assign)
1468 jack = spec->pcm_rec[per_pin->pcm_idx].jack;
1469 else if (!spec->dyn_pcm_assign) {
1470 jack_tbl = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
1472 jack = jack_tbl->jack;
1477 /* update ELD and jack state via audio component */
1478 static void sync_eld_via_acomp(struct hda_codec *codec,
1479 struct hdmi_spec_per_pin *per_pin)
1481 struct hdmi_spec *spec = codec->spec;
1482 struct hdmi_eld *eld = &spec->temp_eld;
1483 struct snd_jack *jack = NULL;
1486 mutex_lock(&per_pin->lock);
1487 eld->monitor_present = false;
1488 size = snd_hdac_acomp_get_eld(&codec->core, per_pin->pin_nid,
1489 &eld->monitor_present, eld->eld_buffer,
1492 size = min(size, ELD_MAX_SIZE);
1493 if (snd_hdmi_parse_eld(codec, &eld->info,
1494 eld->eld_buffer, size) < 0)
1499 eld->eld_valid = true;
1500 eld->eld_size = size;
1502 eld->eld_valid = false;
1506 /* pcm_idx >=0 before update_eld() means it is in monitor
1507 * disconnected event. Jack must be fetched before update_eld()
1509 jack = pin_idx_to_jack(codec, per_pin);
1510 update_eld(codec, per_pin, eld);
1512 jack = pin_idx_to_jack(codec, per_pin);
1515 snd_jack_report(jack,
1516 eld->monitor_present ? SND_JACK_AVOUT : 0);
1518 mutex_unlock(&per_pin->lock);
1521 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1523 struct hda_codec *codec = per_pin->codec;
1524 struct hdmi_spec *spec = codec->spec;
1527 /* no temporary power up/down needed for component notifier */
1528 if (!codec_has_acomp(codec))
1529 snd_hda_power_up_pm(codec);
1531 mutex_lock(&spec->pcm_lock);
1532 if (codec_has_acomp(codec)) {
1533 sync_eld_via_acomp(codec, per_pin);
1534 ret = false; /* don't call snd_hda_jack_report_sync() */
1536 ret = hdmi_present_sense_via_verbs(per_pin, repoll);
1538 mutex_unlock(&spec->pcm_lock);
1540 if (!codec_has_acomp(codec))
1541 snd_hda_power_down_pm(codec);
1546 static void hdmi_repoll_eld(struct work_struct *work)
1548 struct hdmi_spec_per_pin *per_pin =
1549 container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1551 if (per_pin->repoll_count++ > 6)
1552 per_pin->repoll_count = 0;
1554 if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1555 snd_hda_jack_report_sync(per_pin->codec);
1558 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1561 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1563 struct hdmi_spec *spec = codec->spec;
1564 unsigned int caps, config;
1566 struct hdmi_spec_per_pin *per_pin;
1569 caps = snd_hda_query_pin_caps(codec, pin_nid);
1570 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1573 config = snd_hda_codec_get_pincfg(codec, pin_nid);
1574 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1577 if (is_haswell_plus(codec))
1578 intel_haswell_fixup_connect_list(codec, pin_nid);
1580 pin_idx = spec->num_pins;
1581 per_pin = snd_array_new(&spec->pins);
1585 per_pin->pin_nid = pin_nid;
1586 per_pin->non_pcm = false;
1587 if (spec->dyn_pcm_assign)
1588 per_pin->pcm_idx = -1;
1590 per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
1591 per_pin->pcm_idx = pin_idx;
1593 per_pin->pin_nid_idx = pin_idx;
1595 err = hdmi_read_pin_conn(codec, pin_idx);
1604 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1606 struct hdmi_spec *spec = codec->spec;
1607 struct hdmi_spec_per_cvt *per_cvt;
1611 chans = get_wcaps(codec, cvt_nid);
1612 chans = get_wcaps_channels(chans);
1614 per_cvt = snd_array_new(&spec->cvts);
1618 per_cvt->cvt_nid = cvt_nid;
1619 per_cvt->channels_min = 2;
1621 per_cvt->channels_max = chans;
1622 if (chans > spec->chmap.channels_max)
1623 spec->chmap.channels_max = chans;
1626 err = snd_hda_query_supported_pcm(codec, cvt_nid,
1633 if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1634 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1640 static int hdmi_parse_codec(struct hda_codec *codec)
1645 nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &nid);
1646 if (!nid || nodes < 0) {
1647 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1651 for (i = 0; i < nodes; i++, nid++) {
1655 caps = get_wcaps(codec, nid);
1656 type = get_wcaps_type(caps);
1658 if (!(caps & AC_WCAP_DIGITAL))
1662 case AC_WID_AUD_OUT:
1663 hdmi_add_cvt(codec, nid);
1666 hdmi_add_pin(codec, nid);
1676 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1678 struct hda_spdif_out *spdif;
1681 mutex_lock(&codec->spdif_mutex);
1682 spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1683 non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1684 mutex_unlock(&codec->spdif_mutex);
1692 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1693 struct hda_codec *codec,
1694 unsigned int stream_tag,
1695 unsigned int format,
1696 struct snd_pcm_substream *substream)
1698 hda_nid_t cvt_nid = hinfo->nid;
1699 struct hdmi_spec *spec = codec->spec;
1701 struct hdmi_spec_per_pin *per_pin;
1703 struct snd_pcm_runtime *runtime = substream->runtime;
1708 mutex_lock(&spec->pcm_lock);
1709 pin_idx = hinfo_to_pin_index(codec, hinfo);
1710 if (spec->dyn_pcm_assign && pin_idx < 0) {
1711 /* when dyn_pcm_assign and pcm is not bound to a pin
1712 * skip pin setup and return 0 to make audio playback
1715 pin_cvt_fixup(codec, NULL, cvt_nid);
1716 snd_hda_codec_setup_stream(codec, cvt_nid,
1717 stream_tag, 0, format);
1718 mutex_unlock(&spec->pcm_lock);
1722 if (snd_BUG_ON(pin_idx < 0)) {
1723 mutex_unlock(&spec->pcm_lock);
1726 per_pin = get_pin(spec, pin_idx);
1727 pin_nid = per_pin->pin_nid;
1729 /* Verify pin:cvt selections to avoid silent audio after S3.
1730 * After S3, the audio driver restores pin:cvt selections
1731 * but this can happen before gfx is ready and such selection
1732 * is overlooked by HW. Thus multiple pins can share a same
1733 * default convertor and mute control will affect each other,
1734 * which can cause a resumed audio playback become silent
1737 pin_cvt_fixup(codec, per_pin, 0);
1739 /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
1740 /* Todo: add DP1.2 MST audio support later */
1741 if (codec_has_acomp(codec))
1742 snd_hdac_sync_audio_rate(&codec->core, pin_nid, runtime->rate);
1744 non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1745 mutex_lock(&per_pin->lock);
1746 per_pin->channels = substream->runtime->channels;
1747 per_pin->setup = true;
1749 hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1750 mutex_unlock(&per_pin->lock);
1751 if (spec->dyn_pin_out) {
1752 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1753 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1754 snd_hda_codec_write(codec, pin_nid, 0,
1755 AC_VERB_SET_PIN_WIDGET_CONTROL,
1759 err = spec->ops.setup_stream(codec, cvt_nid, pin_nid,
1760 stream_tag, format);
1761 mutex_unlock(&spec->pcm_lock);
1765 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1766 struct hda_codec *codec,
1767 struct snd_pcm_substream *substream)
1769 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1773 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1774 struct hda_codec *codec,
1775 struct snd_pcm_substream *substream)
1777 struct hdmi_spec *spec = codec->spec;
1778 int cvt_idx, pin_idx, pcm_idx;
1779 struct hdmi_spec_per_cvt *per_cvt;
1780 struct hdmi_spec_per_pin *per_pin;
1784 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1785 if (snd_BUG_ON(pcm_idx < 0))
1787 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
1788 if (snd_BUG_ON(cvt_idx < 0))
1790 per_cvt = get_cvt(spec, cvt_idx);
1792 snd_BUG_ON(!per_cvt->assigned);
1793 per_cvt->assigned = 0;
1796 mutex_lock(&spec->pcm_lock);
1797 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1798 clear_bit(pcm_idx, &spec->pcm_in_use);
1799 pin_idx = hinfo_to_pin_index(codec, hinfo);
1800 if (spec->dyn_pcm_assign && pin_idx < 0) {
1801 mutex_unlock(&spec->pcm_lock);
1805 if (snd_BUG_ON(pin_idx < 0)) {
1806 mutex_unlock(&spec->pcm_lock);
1809 per_pin = get_pin(spec, pin_idx);
1811 if (spec->dyn_pin_out) {
1812 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1813 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1814 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1815 AC_VERB_SET_PIN_WIDGET_CONTROL,
1819 mutex_lock(&per_pin->lock);
1820 per_pin->chmap_set = false;
1821 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1823 per_pin->setup = false;
1824 per_pin->channels = 0;
1825 mutex_unlock(&per_pin->lock);
1826 mutex_unlock(&spec->pcm_lock);
1832 static const struct hda_pcm_ops generic_ops = {
1833 .open = hdmi_pcm_open,
1834 .close = hdmi_pcm_close,
1835 .prepare = generic_hdmi_playback_pcm_prepare,
1836 .cleanup = generic_hdmi_playback_pcm_cleanup,
1839 static int hdmi_get_spk_alloc(struct hdac_device *hdac, int pcm_idx)
1841 struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
1842 struct hdmi_spec *spec = codec->spec;
1843 struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
1848 return per_pin->sink_eld.info.spk_alloc;
1851 static void hdmi_get_chmap(struct hdac_device *hdac, int pcm_idx,
1852 unsigned char *chmap)
1854 struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
1855 struct hdmi_spec *spec = codec->spec;
1856 struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
1858 /* chmap is already set to 0 in caller */
1862 memcpy(chmap, per_pin->chmap, ARRAY_SIZE(per_pin->chmap));
1865 static void hdmi_set_chmap(struct hdac_device *hdac, int pcm_idx,
1866 unsigned char *chmap, int prepared)
1868 struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
1869 struct hdmi_spec *spec = codec->spec;
1870 struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
1874 mutex_lock(&per_pin->lock);
1875 per_pin->chmap_set = true;
1876 memcpy(per_pin->chmap, chmap, ARRAY_SIZE(per_pin->chmap));
1878 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1879 mutex_unlock(&per_pin->lock);
1882 static bool is_hdmi_pcm_attached(struct hdac_device *hdac, int pcm_idx)
1884 struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
1885 struct hdmi_spec *spec = codec->spec;
1886 struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
1888 return per_pin ? true:false;
1891 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1893 struct hdmi_spec *spec = codec->spec;
1896 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1897 struct hda_pcm *info;
1898 struct hda_pcm_stream *pstr;
1900 info = snd_hda_codec_pcm_new(codec, "HDMI %d", pin_idx);
1904 spec->pcm_rec[pin_idx].pcm = info;
1906 info->pcm_type = HDA_PCM_TYPE_HDMI;
1907 info->own_chmap = true;
1909 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1910 pstr->substreams = 1;
1911 pstr->ops = generic_ops;
1912 /* other pstr fields are set in open */
1918 static void free_hdmi_jack_priv(struct snd_jack *jack)
1920 struct hdmi_pcm *pcm = jack->private_data;
1925 static int add_hdmi_jack_kctl(struct hda_codec *codec,
1926 struct hdmi_spec *spec,
1930 struct snd_jack *jack;
1933 err = snd_jack_new(codec->card, name, SND_JACK_AVOUT, &jack,
1938 spec->pcm_rec[pcm_idx].jack = jack;
1939 jack->private_data = &spec->pcm_rec[pcm_idx];
1940 jack->private_free = free_hdmi_jack_priv;
1944 static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx)
1946 char hdmi_str[32] = "HDMI/DP";
1947 struct hdmi_spec *spec = codec->spec;
1948 struct hdmi_spec_per_pin *per_pin;
1949 struct hda_jack_tbl *jack;
1950 int pcmdev = get_pcm_rec(spec, pcm_idx)->device;
1955 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
1957 if (spec->dyn_pcm_assign)
1958 return add_hdmi_jack_kctl(codec, spec, pcm_idx, hdmi_str);
1960 /* for !dyn_pcm_assign, we still use hda_jack for compatibility */
1961 /* if !dyn_pcm_assign, it must be non-MST mode.
1962 * This means pcms and pins are statically mapped.
1963 * And pcm_idx is pin_idx.
1965 per_pin = get_pin(spec, pcm_idx);
1966 phantom_jack = !is_jack_detectable(codec, per_pin->pin_nid);
1968 strncat(hdmi_str, " Phantom",
1969 sizeof(hdmi_str) - strlen(hdmi_str) - 1);
1970 ret = snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str,
1974 jack = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
1977 /* assign jack->jack to pcm_rec[].jack to
1978 * align with dyn_pcm_assign mode
1980 spec->pcm_rec[pcm_idx].jack = jack->jack;
1984 static int generic_hdmi_build_controls(struct hda_codec *codec)
1986 struct hdmi_spec *spec = codec->spec;
1988 int pin_idx, pcm_idx;
1991 for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
1992 err = generic_hdmi_build_jack(codec, pcm_idx);
1996 /* create the spdif for each pcm
1997 * pin will be bound when monitor is connected
1999 if (spec->dyn_pcm_assign)
2000 err = snd_hda_create_dig_out_ctls(codec,
2001 0, spec->cvt_nids[0],
2004 struct hdmi_spec_per_pin *per_pin =
2005 get_pin(spec, pcm_idx);
2006 err = snd_hda_create_dig_out_ctls(codec,
2008 per_pin->mux_nids[0],
2013 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2015 /* add control for ELD Bytes */
2016 err = hdmi_create_eld_ctl(codec, pcm_idx,
2017 get_pcm_rec(spec, pcm_idx)->device);
2022 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2023 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2025 hdmi_present_sense(per_pin, 0);
2028 /* add channel maps */
2029 for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2030 struct hda_pcm *pcm;
2032 pcm = get_pcm_rec(spec, pcm_idx);
2033 if (!pcm || !pcm->pcm)
2035 err = snd_hdac_add_chmap_ctls(pcm->pcm, pcm_idx, &spec->chmap);
2043 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2045 struct hdmi_spec *spec = codec->spec;
2048 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2049 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2051 per_pin->codec = codec;
2052 mutex_init(&per_pin->lock);
2053 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2054 eld_proc_new(per_pin, pin_idx);
2059 static int generic_hdmi_init(struct hda_codec *codec)
2061 struct hdmi_spec *spec = codec->spec;
2064 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2065 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2066 hda_nid_t pin_nid = per_pin->pin_nid;
2068 hdmi_init_pin(codec, pin_nid);
2069 if (!codec_has_acomp(codec))
2070 snd_hda_jack_detect_enable_callback(codec, pin_nid,
2071 codec->jackpoll_interval > 0 ?
2072 jack_callback : NULL);
2077 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2079 snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2080 snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2083 static void hdmi_array_free(struct hdmi_spec *spec)
2085 snd_array_free(&spec->pins);
2086 snd_array_free(&spec->cvts);
2089 static void generic_spec_free(struct hda_codec *codec)
2091 struct hdmi_spec *spec = codec->spec;
2094 if (spec->i915_bound)
2095 snd_hdac_i915_exit(&codec->bus->core);
2096 hdmi_array_free(spec);
2100 codec->dp_mst = false;
2103 static void generic_hdmi_free(struct hda_codec *codec)
2105 struct hdmi_spec *spec = codec->spec;
2106 int pin_idx, pcm_idx;
2108 if (codec_has_acomp(codec))
2109 snd_hdac_i915_register_notifier(NULL);
2111 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2112 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2113 cancel_delayed_work_sync(&per_pin->work);
2114 eld_proc_free(per_pin);
2117 for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2118 if (spec->pcm_rec[pcm_idx].jack == NULL)
2120 if (spec->dyn_pcm_assign)
2121 snd_device_free(codec->card,
2122 spec->pcm_rec[pcm_idx].jack);
2124 spec->pcm_rec[pcm_idx].jack = NULL;
2127 generic_spec_free(codec);
2131 static int generic_hdmi_resume(struct hda_codec *codec)
2133 struct hdmi_spec *spec = codec->spec;
2136 codec->patch_ops.init(codec);
2137 regcache_sync(codec->core.regmap);
2139 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2140 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2141 hdmi_present_sense(per_pin, 1);
2147 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2148 .init = generic_hdmi_init,
2149 .free = generic_hdmi_free,
2150 .build_pcms = generic_hdmi_build_pcms,
2151 .build_controls = generic_hdmi_build_controls,
2152 .unsol_event = hdmi_unsol_event,
2154 .resume = generic_hdmi_resume,
2158 static const struct hdmi_ops generic_standard_hdmi_ops = {
2159 .pin_get_eld = snd_hdmi_get_eld,
2160 .pin_setup_infoframe = hdmi_pin_setup_infoframe,
2161 .pin_hbr_setup = hdmi_pin_hbr_setup,
2162 .setup_stream = hdmi_setup_stream,
2165 /* allocate codec->spec and assign/initialize generic parser ops */
2166 static int alloc_generic_hdmi(struct hda_codec *codec)
2168 struct hdmi_spec *spec;
2170 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2174 spec->ops = generic_standard_hdmi_ops;
2175 mutex_init(&spec->pcm_lock);
2176 snd_hdac_register_chmap_ops(&codec->core, &spec->chmap);
2178 spec->chmap.ops.get_chmap = hdmi_get_chmap;
2179 spec->chmap.ops.set_chmap = hdmi_set_chmap;
2180 spec->chmap.ops.is_pcm_attached = is_hdmi_pcm_attached;
2181 spec->chmap.ops.get_spk_alloc = hdmi_get_spk_alloc,
2184 hdmi_array_init(spec, 4);
2186 codec->patch_ops = generic_hdmi_patch_ops;
2191 /* generic HDMI parser */
2192 static int patch_generic_hdmi(struct hda_codec *codec)
2196 err = alloc_generic_hdmi(codec);
2200 err = hdmi_parse_codec(codec);
2202 generic_spec_free(codec);
2206 generic_hdmi_init_per_pins(codec);
2211 * Intel codec parsers and helpers
2214 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2217 struct hdmi_spec *spec = codec->spec;
2221 nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2222 if (nconns == spec->num_cvts &&
2223 !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2226 /* override pins connection list */
2227 codec_dbg(codec, "hdmi: haswell: override pin connection 0x%x\n", nid);
2228 snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2231 #define INTEL_VENDOR_NID 0x08
2232 #define INTEL_GET_VENDOR_VERB 0xf81
2233 #define INTEL_SET_VENDOR_VERB 0x781
2234 #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
2235 #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
2237 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2240 unsigned int vendor_param;
2242 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2243 INTEL_GET_VENDOR_VERB, 0);
2244 if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2247 vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2248 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2249 INTEL_SET_VENDOR_VERB, vendor_param);
2250 if (vendor_param == -1)
2254 snd_hda_codec_update_widgets(codec);
2257 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2259 unsigned int vendor_param;
2261 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2262 INTEL_GET_VENDOR_VERB, 0);
2263 if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2266 /* enable DP1.2 mode */
2267 vendor_param |= INTEL_EN_DP12;
2268 snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2269 snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
2270 INTEL_SET_VENDOR_VERB, vendor_param);
2273 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2274 * Otherwise you may get severe h/w communication errors.
2276 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2277 unsigned int power_state)
2279 if (power_state == AC_PWRST_D0) {
2280 intel_haswell_enable_all_pins(codec, false);
2281 intel_haswell_fixup_enable_dp12(codec);
2284 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2285 snd_hda_codec_set_power_to_all(codec, fg, power_state);
2288 static void intel_pin_eld_notify(void *audio_ptr, int port)
2290 struct hda_codec *codec = audio_ptr;
2293 /* we assume only from port-B to port-D */
2294 if (port < 1 || port > 3)
2297 switch (codec->core.vendor_id) {
2298 case 0x80860054: /* ILK */
2299 case 0x80862804: /* ILK */
2300 case 0x80862882: /* VLV */
2301 pin_nid = port + 0x03;
2304 pin_nid = port + 0x04;
2308 /* skip notification during system suspend (but not in runtime PM);
2309 * the state will be updated at resume
2311 if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2313 /* ditto during suspend/resume process itself */
2314 if (atomic_read(&(codec)->core.in_pm))
2317 snd_hdac_i915_set_bclk(&codec->bus->core);
2318 check_presence_and_report(codec, pin_nid);
2321 /* register i915 component pin_eld_notify callback */
2322 static void register_i915_notifier(struct hda_codec *codec)
2324 struct hdmi_spec *spec = codec->spec;
2326 spec->use_acomp_notifier = true;
2327 spec->i915_audio_ops.audio_ptr = codec;
2328 /* intel_audio_codec_enable() or intel_audio_codec_disable()
2329 * will call pin_eld_notify with using audio_ptr pointer
2330 * We need make sure audio_ptr is really setup
2333 spec->i915_audio_ops.pin_eld_notify = intel_pin_eld_notify;
2334 snd_hdac_i915_register_notifier(&spec->i915_audio_ops);
2337 /* setup_stream ops override for HSW+ */
2338 static int i915_hsw_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
2339 hda_nid_t pin_nid, u32 stream_tag, int format)
2341 haswell_verify_D0(codec, cvt_nid, pin_nid);
2342 return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
2345 /* pin_cvt_fixup ops override for HSW+ and VLV+ */
2346 static void i915_pin_cvt_fixup(struct hda_codec *codec,
2347 struct hdmi_spec_per_pin *per_pin,
2351 intel_verify_pin_cvt_connect(codec, per_pin);
2352 intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
2355 intel_not_share_assigned_cvt_nid(codec, 0, cvt_nid);
2359 /* Intel Haswell and onwards; audio component with eld notifier */
2360 static int patch_i915_hsw_hdmi(struct hda_codec *codec)
2362 struct hdmi_spec *spec;
2365 /* HSW+ requires i915 binding */
2366 if (!codec->bus->core.audio_component) {
2367 codec_info(codec, "No i915 binding for Intel HDMI/DP codec\n");
2371 err = alloc_generic_hdmi(codec);
2376 intel_haswell_enable_all_pins(codec, true);
2377 intel_haswell_fixup_enable_dp12(codec);
2379 /* For Haswell/Broadwell, the controller is also in the power well and
2380 * can cover the codec power request, and so need not set this flag.
2382 if (!is_haswell(codec) && !is_broadwell(codec))
2383 codec->core.link_power_control = 1;
2385 codec->patch_ops.set_power_state = haswell_set_power_state;
2386 codec->dp_mst = true;
2387 codec->depop_delay = 0;
2388 codec->auto_runtime_pm = 1;
2390 spec->ops.setup_stream = i915_hsw_setup_stream;
2391 spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2393 err = hdmi_parse_codec(codec);
2395 generic_spec_free(codec);
2399 generic_hdmi_init_per_pins(codec);
2400 register_i915_notifier(codec);
2404 /* Intel Baytrail and Braswell; with eld notifier */
2405 static int patch_i915_byt_hdmi(struct hda_codec *codec)
2407 struct hdmi_spec *spec;
2410 /* requires i915 binding */
2411 if (!codec->bus->core.audio_component) {
2412 codec_info(codec, "No i915 binding for Intel HDMI/DP codec\n");
2416 err = alloc_generic_hdmi(codec);
2421 /* For Valleyview/Cherryview, only the display codec is in the display
2422 * power well and can use link_power ops to request/release the power.
2424 codec->core.link_power_control = 1;
2426 codec->depop_delay = 0;
2427 codec->auto_runtime_pm = 1;
2429 spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2431 err = hdmi_parse_codec(codec);
2433 generic_spec_free(codec);
2437 generic_hdmi_init_per_pins(codec);
2438 register_i915_notifier(codec);
2442 /* Intel IronLake, SandyBridge and IvyBridge; with eld notifier */
2443 static int patch_i915_cpt_hdmi(struct hda_codec *codec)
2445 struct hdmi_spec *spec;
2448 /* no i915 component should have been bound before this */
2449 if (WARN_ON(codec->bus->core.audio_component))
2452 err = alloc_generic_hdmi(codec);
2457 /* Try to bind with i915 now */
2458 err = snd_hdac_i915_init(&codec->bus->core);
2461 spec->i915_bound = true;
2463 err = hdmi_parse_codec(codec);
2467 generic_hdmi_init_per_pins(codec);
2468 register_i915_notifier(codec);
2472 generic_spec_free(codec);
2477 * Shared non-generic implementations
2480 static int simple_playback_build_pcms(struct hda_codec *codec)
2482 struct hdmi_spec *spec = codec->spec;
2483 struct hda_pcm *info;
2485 struct hda_pcm_stream *pstr;
2486 struct hdmi_spec_per_cvt *per_cvt;
2488 per_cvt = get_cvt(spec, 0);
2489 chans = get_wcaps(codec, per_cvt->cvt_nid);
2490 chans = get_wcaps_channels(chans);
2492 info = snd_hda_codec_pcm_new(codec, "HDMI 0");
2495 spec->pcm_rec[0].pcm = info;
2496 info->pcm_type = HDA_PCM_TYPE_HDMI;
2497 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2498 *pstr = spec->pcm_playback;
2499 pstr->nid = per_cvt->cvt_nid;
2500 if (pstr->channels_max <= 2 && chans && chans <= 16)
2501 pstr->channels_max = chans;
2506 /* unsolicited event for jack sensing */
2507 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2510 snd_hda_jack_set_dirty_all(codec);
2511 snd_hda_jack_report_sync(codec);
2514 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2515 * as long as spec->pins[] is set correctly
2517 #define simple_hdmi_build_jack generic_hdmi_build_jack
2519 static int simple_playback_build_controls(struct hda_codec *codec)
2521 struct hdmi_spec *spec = codec->spec;
2522 struct hdmi_spec_per_cvt *per_cvt;
2525 per_cvt = get_cvt(spec, 0);
2526 err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2531 return simple_hdmi_build_jack(codec, 0);
2534 static int simple_playback_init(struct hda_codec *codec)
2536 struct hdmi_spec *spec = codec->spec;
2537 struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2538 hda_nid_t pin = per_pin->pin_nid;
2540 snd_hda_codec_write(codec, pin, 0,
2541 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2542 /* some codecs require to unmute the pin */
2543 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2544 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2546 snd_hda_jack_detect_enable(codec, pin);
2550 static void simple_playback_free(struct hda_codec *codec)
2552 struct hdmi_spec *spec = codec->spec;
2554 hdmi_array_free(spec);
2559 * Nvidia specific implementations
2562 #define Nv_VERB_SET_Channel_Allocation 0xF79
2563 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
2564 #define Nv_VERB_SET_Audio_Protection_On 0xF98
2565 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
2567 #define nvhdmi_master_con_nid_7x 0x04
2568 #define nvhdmi_master_pin_nid_7x 0x05
2570 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2571 /*front, rear, clfe, rear_surr */
2575 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2576 /* set audio protect on */
2577 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2578 /* enable digital output on pin widget */
2579 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2583 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2584 /* set audio protect on */
2585 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2586 /* enable digital output on pin widget */
2587 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2588 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2589 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2590 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2591 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2595 #ifdef LIMITED_RATE_FMT_SUPPORT
2596 /* support only the safe format and rate */
2597 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
2598 #define SUPPORTED_MAXBPS 16
2599 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
2601 /* support all rates and formats */
2602 #define SUPPORTED_RATES \
2603 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2604 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2605 SNDRV_PCM_RATE_192000)
2606 #define SUPPORTED_MAXBPS 24
2607 #define SUPPORTED_FORMATS \
2608 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2611 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2613 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2617 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2619 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2623 static unsigned int channels_2_6_8[] = {
2627 static unsigned int channels_2_8[] = {
2631 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2632 .count = ARRAY_SIZE(channels_2_6_8),
2633 .list = channels_2_6_8,
2637 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2638 .count = ARRAY_SIZE(channels_2_8),
2639 .list = channels_2_8,
2643 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2644 struct hda_codec *codec,
2645 struct snd_pcm_substream *substream)
2647 struct hdmi_spec *spec = codec->spec;
2648 struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2650 switch (codec->preset->vendor_id) {
2655 hw_constraints_channels = &hw_constraints_2_8_channels;
2658 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2664 if (hw_constraints_channels != NULL) {
2665 snd_pcm_hw_constraint_list(substream->runtime, 0,
2666 SNDRV_PCM_HW_PARAM_CHANNELS,
2667 hw_constraints_channels);
2669 snd_pcm_hw_constraint_step(substream->runtime, 0,
2670 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2673 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2676 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2677 struct hda_codec *codec,
2678 struct snd_pcm_substream *substream)
2680 struct hdmi_spec *spec = codec->spec;
2681 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2684 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2685 struct hda_codec *codec,
2686 unsigned int stream_tag,
2687 unsigned int format,
2688 struct snd_pcm_substream *substream)
2690 struct hdmi_spec *spec = codec->spec;
2691 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2692 stream_tag, format, substream);
2695 static const struct hda_pcm_stream simple_pcm_playback = {
2700 .open = simple_playback_pcm_open,
2701 .close = simple_playback_pcm_close,
2702 .prepare = simple_playback_pcm_prepare
2706 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2707 .build_controls = simple_playback_build_controls,
2708 .build_pcms = simple_playback_build_pcms,
2709 .init = simple_playback_init,
2710 .free = simple_playback_free,
2711 .unsol_event = simple_hdmi_unsol_event,
2714 static int patch_simple_hdmi(struct hda_codec *codec,
2715 hda_nid_t cvt_nid, hda_nid_t pin_nid)
2717 struct hdmi_spec *spec;
2718 struct hdmi_spec_per_cvt *per_cvt;
2719 struct hdmi_spec_per_pin *per_pin;
2721 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2726 hdmi_array_init(spec, 1);
2728 spec->multiout.num_dacs = 0; /* no analog */
2729 spec->multiout.max_channels = 2;
2730 spec->multiout.dig_out_nid = cvt_nid;
2733 per_pin = snd_array_new(&spec->pins);
2734 per_cvt = snd_array_new(&spec->cvts);
2735 if (!per_pin || !per_cvt) {
2736 simple_playback_free(codec);
2739 per_cvt->cvt_nid = cvt_nid;
2740 per_pin->pin_nid = pin_nid;
2741 spec->pcm_playback = simple_pcm_playback;
2743 codec->patch_ops = simple_hdmi_patch_ops;
2748 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2751 unsigned int chanmask;
2752 int chan = channels ? (channels - 1) : 1;
2771 /* Set the audio infoframe channel allocation and checksum fields. The
2772 * channel count is computed implicitly by the hardware. */
2773 snd_hda_codec_write(codec, 0x1, 0,
2774 Nv_VERB_SET_Channel_Allocation, chanmask);
2776 snd_hda_codec_write(codec, 0x1, 0,
2777 Nv_VERB_SET_Info_Frame_Checksum,
2778 (0x71 - chan - chanmask));
2781 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2782 struct hda_codec *codec,
2783 struct snd_pcm_substream *substream)
2785 struct hdmi_spec *spec = codec->spec;
2788 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2789 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2790 for (i = 0; i < 4; i++) {
2791 /* set the stream id */
2792 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2793 AC_VERB_SET_CHANNEL_STREAMID, 0);
2794 /* set the stream format */
2795 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2796 AC_VERB_SET_STREAM_FORMAT, 0);
2799 /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2800 * streams are disabled. */
2801 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2803 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2806 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2807 struct hda_codec *codec,
2808 unsigned int stream_tag,
2809 unsigned int format,
2810 struct snd_pcm_substream *substream)
2813 unsigned int dataDCC2, channel_id;
2815 struct hdmi_spec *spec = codec->spec;
2816 struct hda_spdif_out *spdif;
2817 struct hdmi_spec_per_cvt *per_cvt;
2819 mutex_lock(&codec->spdif_mutex);
2820 per_cvt = get_cvt(spec, 0);
2821 spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2823 chs = substream->runtime->channels;
2827 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2828 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2829 snd_hda_codec_write(codec,
2830 nvhdmi_master_con_nid_7x,
2832 AC_VERB_SET_DIGI_CONVERT_1,
2833 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2835 /* set the stream id */
2836 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2837 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2839 /* set the stream format */
2840 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2841 AC_VERB_SET_STREAM_FORMAT, format);
2843 /* turn on again (if needed) */
2844 /* enable and set the channel status audio/data flag */
2845 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2846 snd_hda_codec_write(codec,
2847 nvhdmi_master_con_nid_7x,
2849 AC_VERB_SET_DIGI_CONVERT_1,
2850 spdif->ctls & 0xff);
2851 snd_hda_codec_write(codec,
2852 nvhdmi_master_con_nid_7x,
2854 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2857 for (i = 0; i < 4; i++) {
2863 /* turn off SPDIF once;
2864 *otherwise the IEC958 bits won't be updated
2866 if (codec->spdif_status_reset &&
2867 (spdif->ctls & AC_DIG1_ENABLE))
2868 snd_hda_codec_write(codec,
2869 nvhdmi_con_nids_7x[i],
2871 AC_VERB_SET_DIGI_CONVERT_1,
2872 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2873 /* set the stream id */
2874 snd_hda_codec_write(codec,
2875 nvhdmi_con_nids_7x[i],
2877 AC_VERB_SET_CHANNEL_STREAMID,
2878 (stream_tag << 4) | channel_id);
2879 /* set the stream format */
2880 snd_hda_codec_write(codec,
2881 nvhdmi_con_nids_7x[i],
2883 AC_VERB_SET_STREAM_FORMAT,
2885 /* turn on again (if needed) */
2886 /* enable and set the channel status audio/data flag */
2887 if (codec->spdif_status_reset &&
2888 (spdif->ctls & AC_DIG1_ENABLE)) {
2889 snd_hda_codec_write(codec,
2890 nvhdmi_con_nids_7x[i],
2892 AC_VERB_SET_DIGI_CONVERT_1,
2893 spdif->ctls & 0xff);
2894 snd_hda_codec_write(codec,
2895 nvhdmi_con_nids_7x[i],
2897 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2901 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2903 mutex_unlock(&codec->spdif_mutex);
2907 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2911 .nid = nvhdmi_master_con_nid_7x,
2912 .rates = SUPPORTED_RATES,
2913 .maxbps = SUPPORTED_MAXBPS,
2914 .formats = SUPPORTED_FORMATS,
2916 .open = simple_playback_pcm_open,
2917 .close = nvhdmi_8ch_7x_pcm_close,
2918 .prepare = nvhdmi_8ch_7x_pcm_prepare
2922 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2924 struct hdmi_spec *spec;
2925 int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2926 nvhdmi_master_pin_nid_7x);
2930 codec->patch_ops.init = nvhdmi_7x_init_2ch;
2931 /* override the PCM rates, etc, as the codec doesn't give full list */
2933 spec->pcm_playback.rates = SUPPORTED_RATES;
2934 spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2935 spec->pcm_playback.formats = SUPPORTED_FORMATS;
2939 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2941 struct hdmi_spec *spec = codec->spec;
2942 int err = simple_playback_build_pcms(codec);
2944 struct hda_pcm *info = get_pcm_rec(spec, 0);
2945 info->own_chmap = true;
2950 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2952 struct hdmi_spec *spec = codec->spec;
2953 struct hda_pcm *info;
2954 struct snd_pcm_chmap *chmap;
2957 err = simple_playback_build_controls(codec);
2961 /* add channel maps */
2962 info = get_pcm_rec(spec, 0);
2963 err = snd_pcm_add_chmap_ctls(info->pcm,
2964 SNDRV_PCM_STREAM_PLAYBACK,
2965 snd_pcm_alt_chmaps, 8, 0, &chmap);
2968 switch (codec->preset->vendor_id) {
2973 chmap->channel_mask = (1U << 2) | (1U << 8);
2976 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2981 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2983 struct hdmi_spec *spec;
2984 int err = patch_nvhdmi_2ch(codec);
2988 spec->multiout.max_channels = 8;
2989 spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2990 codec->patch_ops.init = nvhdmi_7x_init_8ch;
2991 codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2992 codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2994 /* Initialize the audio infoframe channel mask and checksum to something
2996 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3002 * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3006 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap *chmap,
3007 struct hdac_cea_channel_speaker_allocation *cap, int channels)
3009 if (cap->ca_index == 0x00 && channels == 2)
3010 return SNDRV_CTL_TLVT_CHMAP_FIXED;
3012 /* If the speaker allocation matches the channel count, it is OK. */
3013 if (cap->channels != channels)
3016 /* all channels are remappable freely */
3017 return SNDRV_CTL_TLVT_CHMAP_VAR;
3020 static int nvhdmi_chmap_validate(struct hdac_chmap *chmap,
3021 int ca, int chs, unsigned char *map)
3023 if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
3029 static int patch_nvhdmi(struct hda_codec *codec)
3031 struct hdmi_spec *spec;
3034 err = patch_generic_hdmi(codec);
3039 spec->dyn_pin_out = true;
3041 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3042 nvhdmi_chmap_cea_alloc_validate_get_type;
3043 spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3049 * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3050 * accessed using vendor-defined verbs. These registers can be used for
3051 * interoperability between the HDA and HDMI drivers.
3054 /* Audio Function Group node */
3055 #define NVIDIA_AFG_NID 0x01
3058 * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3059 * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3060 * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3061 * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3062 * additional bit (at position 30) to signal the validity of the format.
3064 * | 31 | 30 | 29 16 | 15 0 |
3065 * +---------+-------+--------+--------+
3066 * | TRIGGER | VALID | UNUSED | FORMAT |
3067 * +-----------------------------------|
3069 * Note that for the trigger bit to take effect it needs to change value
3070 * (i.e. it needs to be toggled).
3072 #define NVIDIA_GET_SCRATCH0 0xfa6
3073 #define NVIDIA_SET_SCRATCH0_BYTE0 0xfa7
3074 #define NVIDIA_SET_SCRATCH0_BYTE1 0xfa8
3075 #define NVIDIA_SET_SCRATCH0_BYTE2 0xfa9
3076 #define NVIDIA_SET_SCRATCH0_BYTE3 0xfaa
3077 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3078 #define NVIDIA_SCRATCH_VALID (1 << 6)
3080 #define NVIDIA_GET_SCRATCH1 0xfab
3081 #define NVIDIA_SET_SCRATCH1_BYTE0 0xfac
3082 #define NVIDIA_SET_SCRATCH1_BYTE1 0xfad
3083 #define NVIDIA_SET_SCRATCH1_BYTE2 0xfae
3084 #define NVIDIA_SET_SCRATCH1_BYTE3 0xfaf
3087 * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3088 * the format is invalidated so that the HDMI codec can be disabled.
3090 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
3094 /* bits [31:30] contain the trigger and valid bits */
3095 value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
3096 NVIDIA_GET_SCRATCH0, 0);
3097 value = (value >> 24) & 0xff;
3099 /* bits [15:0] are used to store the HDA format */
3100 snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3101 NVIDIA_SET_SCRATCH0_BYTE0,
3102 (format >> 0) & 0xff);
3103 snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3104 NVIDIA_SET_SCRATCH0_BYTE1,
3105 (format >> 8) & 0xff);
3107 /* bits [16:24] are unused */
3108 snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3109 NVIDIA_SET_SCRATCH0_BYTE2, 0);
3112 * Bit 30 signals that the data is valid and hence that HDMI audio can
3116 value &= ~NVIDIA_SCRATCH_VALID;
3118 value |= NVIDIA_SCRATCH_VALID;
3121 * Whenever the trigger bit is toggled, an interrupt is raised in the
3122 * HDMI codec. The HDMI driver will use that as trigger to update its
3125 value ^= NVIDIA_SCRATCH_TRIGGER;
3127 snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3128 NVIDIA_SET_SCRATCH0_BYTE3, value);
3131 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
3132 struct hda_codec *codec,
3133 unsigned int stream_tag,
3134 unsigned int format,
3135 struct snd_pcm_substream *substream)
3139 err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
3144 /* notify the HDMI codec of the format change */
3145 tegra_hdmi_set_format(codec, format);
3150 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3151 struct hda_codec *codec,
3152 struct snd_pcm_substream *substream)
3154 /* invalidate the format in the HDMI codec */
3155 tegra_hdmi_set_format(codec, 0);
3157 return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3160 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3162 struct hdmi_spec *spec = codec->spec;
3165 for (i = 0; i < spec->num_pins; i++) {
3166 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3168 if (pcm->pcm_type == type)
3175 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3177 struct hda_pcm_stream *stream;
3178 struct hda_pcm *pcm;
3181 err = generic_hdmi_build_pcms(codec);
3185 pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3190 * Override ->prepare() and ->cleanup() operations to notify the HDMI
3191 * codec about format changes.
3193 stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3194 stream->ops.prepare = tegra_hdmi_pcm_prepare;
3195 stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3200 static int patch_tegra_hdmi(struct hda_codec *codec)
3204 err = patch_generic_hdmi(codec);
3208 codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3214 * ATI/AMD-specific implementations
3217 #define is_amdhdmi_rev3_or_later(codec) \
3218 ((codec)->core.vendor_id == 0x1002aa01 && \
3219 ((codec)->core.revision_id & 0xff00) >= 0x0300)
3220 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3222 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3223 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3224 #define ATI_VERB_SET_DOWNMIX_INFO 0x772
3225 #define ATI_VERB_SET_MULTICHANNEL_01 0x777
3226 #define ATI_VERB_SET_MULTICHANNEL_23 0x778
3227 #define ATI_VERB_SET_MULTICHANNEL_45 0x779
3228 #define ATI_VERB_SET_MULTICHANNEL_67 0x77a
3229 #define ATI_VERB_SET_HBR_CONTROL 0x77c
3230 #define ATI_VERB_SET_MULTICHANNEL_1 0x785
3231 #define ATI_VERB_SET_MULTICHANNEL_3 0x786
3232 #define ATI_VERB_SET_MULTICHANNEL_5 0x787
3233 #define ATI_VERB_SET_MULTICHANNEL_7 0x788
3234 #define ATI_VERB_SET_MULTICHANNEL_MODE 0x789
3235 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3236 #define ATI_VERB_GET_DOWNMIX_INFO 0xf72
3237 #define ATI_VERB_GET_MULTICHANNEL_01 0xf77
3238 #define ATI_VERB_GET_MULTICHANNEL_23 0xf78
3239 #define ATI_VERB_GET_MULTICHANNEL_45 0xf79
3240 #define ATI_VERB_GET_MULTICHANNEL_67 0xf7a
3241 #define ATI_VERB_GET_HBR_CONTROL 0xf7c
3242 #define ATI_VERB_GET_MULTICHANNEL_1 0xf85
3243 #define ATI_VERB_GET_MULTICHANNEL_3 0xf86
3244 #define ATI_VERB_GET_MULTICHANNEL_5 0xf87
3245 #define ATI_VERB_GET_MULTICHANNEL_7 0xf88
3246 #define ATI_VERB_GET_MULTICHANNEL_MODE 0xf89
3248 /* AMD specific HDA cvt verbs */
3249 #define ATI_VERB_SET_RAMP_RATE 0x770
3250 #define ATI_VERB_GET_RAMP_RATE 0xf70
3252 #define ATI_OUT_ENABLE 0x1
3254 #define ATI_MULTICHANNEL_MODE_PAIRED 0
3255 #define ATI_MULTICHANNEL_MODE_SINGLE 1
3257 #define ATI_HBR_CAPABLE 0x01
3258 #define ATI_HBR_ENABLE 0x10
3260 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3261 unsigned char *buf, int *eld_size)
3263 /* call hda_eld.c ATI/AMD-specific function */
3264 return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3265 is_amdhdmi_rev3_or_later(codec));
3268 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
3269 int active_channels, int conn_type)
3271 snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3274 static int atihdmi_paired_swap_fc_lfe(int pos)
3277 * ATI/AMD have automatic FC/LFE swap built-in
3278 * when in pairwise mapping mode.
3282 /* see channel_allocations[].speakers[] */
3291 static int atihdmi_paired_chmap_validate(struct hdac_chmap *chmap,
3292 int ca, int chs, unsigned char *map)
3294 struct hdac_cea_channel_speaker_allocation *cap;
3297 /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3299 cap = snd_hdac_get_ch_alloc_from_ca(ca);
3300 for (i = 0; i < chs; ++i) {
3301 int mask = snd_hdac_chmap_to_spk_mask(map[i]);
3303 bool companion_ok = false;
3308 for (j = 0 + i % 2; j < 8; j += 2) {
3309 int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3310 if (cap->speakers[chan_idx] == mask) {
3311 /* channel is in a supported position */
3314 if (i % 2 == 0 && i + 1 < chs) {
3315 /* even channel, check the odd companion */
3316 int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3317 int comp_mask_req = snd_hdac_chmap_to_spk_mask(map[i+1]);
3318 int comp_mask_act = cap->speakers[comp_chan_idx];
3320 if (comp_mask_req == comp_mask_act)
3321 companion_ok = true;
3333 i++; /* companion channel already checked */
3339 static int atihdmi_pin_set_slot_channel(struct hdac_device *hdac,
3340 hda_nid_t pin_nid, int hdmi_slot, int stream_channel)
3342 struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3344 int ati_channel_setup = 0;
3349 if (!has_amd_full_remap_support(codec)) {
3350 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3352 /* In case this is an odd slot but without stream channel, do not
3353 * disable the slot since the corresponding even slot could have a
3354 * channel. In case neither have a channel, the slot pair will be
3355 * disabled when this function is called for the even slot. */
3356 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3359 hdmi_slot -= hdmi_slot % 2;
3361 if (stream_channel != 0xf)
3362 stream_channel -= stream_channel % 2;
3365 verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3367 /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3369 if (stream_channel != 0xf)
3370 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3372 return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3375 static int atihdmi_pin_get_slot_channel(struct hdac_device *hdac,
3376 hda_nid_t pin_nid, int asp_slot)
3378 struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3379 bool was_odd = false;
3380 int ati_asp_slot = asp_slot;
3382 int ati_channel_setup;
3387 if (!has_amd_full_remap_support(codec)) {
3388 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3389 if (ati_asp_slot % 2 != 0) {
3395 verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3397 ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3399 if (!(ati_channel_setup & ATI_OUT_ENABLE))
3402 return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3405 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(
3406 struct hdac_chmap *chmap,
3407 struct hdac_cea_channel_speaker_allocation *cap,
3413 * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3414 * we need to take that into account (a single channel may take 2
3415 * channel slots if we need to carry a silent channel next to it).
3416 * On Rev3+ AMD codecs this function is not used.
3420 /* We only produce even-numbered channel count TLVs */
3421 if ((channels % 2) != 0)
3424 for (c = 0; c < 7; c += 2) {
3425 if (cap->speakers[c] || cap->speakers[c+1])
3429 if (chanpairs * 2 != channels)
3432 return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3435 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct hdac_chmap *hchmap,
3436 struct hdac_cea_channel_speaker_allocation *cap,
3437 unsigned int *chmap, int channels)
3439 /* produce paired maps for pre-rev3 ATI/AMD codecs */
3443 for (c = 7; c >= 0; c--) {
3444 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3445 int spk = cap->speakers[chan];
3447 /* add N/A channel if the companion channel is occupied */
3448 if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3449 chmap[count++] = SNDRV_CHMAP_NA;
3454 chmap[count++] = snd_hdac_spk_to_chmap(spk);
3457 WARN_ON(count != channels);
3460 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3463 int hbr_ctl, hbr_ctl_new;
3465 hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3466 if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3468 hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3470 hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3473 "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3475 hbr_ctl == hbr_ctl_new ? "" : "new-",
3478 if (hbr_ctl != hbr_ctl_new)
3479 snd_hda_codec_write(codec, pin_nid, 0,
3480 ATI_VERB_SET_HBR_CONTROL,
3489 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3490 hda_nid_t pin_nid, u32 stream_tag, int format)
3493 if (is_amdhdmi_rev3_or_later(codec)) {
3494 int ramp_rate = 180; /* default as per AMD spec */
3495 /* disable ramp-up/down for non-pcm as per AMD spec */
3496 if (format & AC_FMT_TYPE_NON_PCM)
3499 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3502 return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3506 static int atihdmi_init(struct hda_codec *codec)
3508 struct hdmi_spec *spec = codec->spec;
3511 err = generic_hdmi_init(codec);
3516 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3517 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3519 /* make sure downmix information in infoframe is zero */
3520 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3522 /* enable channel-wise remap mode if supported */
3523 if (has_amd_full_remap_support(codec))
3524 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3525 ATI_VERB_SET_MULTICHANNEL_MODE,
3526 ATI_MULTICHANNEL_MODE_SINGLE);
3532 static int patch_atihdmi(struct hda_codec *codec)
3534 struct hdmi_spec *spec;
3535 struct hdmi_spec_per_cvt *per_cvt;
3538 err = patch_generic_hdmi(codec);
3543 codec->patch_ops.init = atihdmi_init;
3547 spec->ops.pin_get_eld = atihdmi_pin_get_eld;
3548 spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
3549 spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
3550 spec->ops.setup_stream = atihdmi_setup_stream;
3552 spec->chmap.ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
3553 spec->chmap.ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
3555 if (!has_amd_full_remap_support(codec)) {
3556 /* override to ATI/AMD-specific versions with pairwise mapping */
3557 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3558 atihdmi_paired_chmap_cea_alloc_validate_get_type;
3559 spec->chmap.ops.cea_alloc_to_tlv_chmap =
3560 atihdmi_paired_cea_alloc_to_tlv_chmap;
3561 spec->chmap.ops.chmap_validate = atihdmi_paired_chmap_validate;
3564 /* ATI/AMD converters do not advertise all of their capabilities */
3565 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
3566 per_cvt = get_cvt(spec, cvt_idx);
3567 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
3568 per_cvt->rates |= SUPPORTED_RATES;
3569 per_cvt->formats |= SUPPORTED_FORMATS;
3570 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
3573 spec->chmap.channels_max = max(spec->chmap.channels_max, 8u);
3578 /* VIA HDMI Implementation */
3579 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
3580 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
3582 static int patch_via_hdmi(struct hda_codec *codec)
3584 return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
3590 static const struct hda_device_id snd_hda_id_hdmi[] = {
3591 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI", patch_atihdmi),
3592 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI", patch_atihdmi),
3593 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI", patch_atihdmi),
3594 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI", patch_atihdmi),
3595 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI", patch_generic_hdmi),
3596 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI", patch_generic_hdmi),
3597 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI", patch_generic_hdmi),
3598 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x),
3599 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x),
3600 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x),
3601 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x),
3602 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI", patch_nvhdmi_8ch_7x),
3603 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP", patch_nvhdmi),
3604 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP", patch_nvhdmi),
3605 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI", patch_nvhdmi),
3606 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP", patch_nvhdmi),
3607 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP", patch_nvhdmi),
3608 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP", patch_nvhdmi),
3609 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP", patch_nvhdmi),
3610 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP", patch_nvhdmi),
3611 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP", patch_nvhdmi),
3612 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP", patch_nvhdmi),
3613 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP", patch_nvhdmi),
3614 /* 17 is known to be absent */
3615 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP", patch_nvhdmi),
3616 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP", patch_nvhdmi),
3617 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP", patch_nvhdmi),
3618 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP", patch_nvhdmi),
3619 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP", patch_nvhdmi),
3620 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI", patch_tegra_hdmi),
3621 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI", patch_tegra_hdmi),
3622 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI", patch_tegra_hdmi),
3623 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
3624 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP", patch_nvhdmi),
3625 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP", patch_nvhdmi),
3626 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP", patch_nvhdmi),
3627 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP", patch_nvhdmi),
3628 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP", patch_nvhdmi),
3629 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP", patch_nvhdmi),
3630 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP", patch_nvhdmi),
3631 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI", patch_nvhdmi_2ch),
3632 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP", patch_nvhdmi),
3633 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP", patch_nvhdmi),
3634 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP", patch_nvhdmi),
3635 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP", patch_nvhdmi),
3636 HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP", patch_nvhdmi),
3637 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP", patch_nvhdmi),
3638 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI", patch_nvhdmi_2ch),
3639 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP", patch_via_hdmi),
3640 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP", patch_via_hdmi),
3641 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP", patch_generic_hdmi),
3642 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP", patch_generic_hdmi),
3643 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI", patch_i915_cpt_hdmi),
3644 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI", patch_generic_hdmi),
3645 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI", patch_generic_hdmi),
3646 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI", patch_generic_hdmi),
3647 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI", patch_i915_cpt_hdmi),
3648 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_i915_cpt_hdmi),
3649 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_i915_cpt_hdmi),
3650 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI", patch_i915_hsw_hdmi),
3651 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI", patch_i915_hsw_hdmi),
3652 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI", patch_i915_hsw_hdmi),
3653 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI", patch_i915_hsw_hdmi),
3654 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI", patch_i915_hsw_hdmi),
3655 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI", patch_generic_hdmi),
3656 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi),
3657 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI", patch_i915_byt_hdmi),
3658 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI", patch_generic_hdmi),
3659 /* special ID for generic HDMI */
3660 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
3663 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
3665 MODULE_LICENSE("GPL");
3666 MODULE_DESCRIPTION("HDMI HD-audio codec");
3667 MODULE_ALIAS("snd-hda-codec-intelhdmi");
3668 MODULE_ALIAS("snd-hda-codec-nvhdmi");
3669 MODULE_ALIAS("snd-hda-codec-atihdmi");
3671 static struct hda_codec_driver hdmi_driver = {
3672 .id = snd_hda_id_hdmi,
3675 module_hda_codec_driver(hdmi_driver);