sound/pci/hda/patch_hdmi.c

   1 /*
   2  *
   3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   4  *
   5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   6  *  Copyright (c) 2006 ATI Technologies Inc.
   7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
   9  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  10  *
  11  *  Authors:
  12  *                      Wu Fengguang <wfg@linux.intel.com>
  13  *
  14  *  Maintained by:
  15  *                      Wu Fengguang <wfg@linux.intel.com>
  16  *
  17  *  This program is free software; you can redistribute it and/or modify it
  18  *  under the terms of the GNU General Public License as published by the Free
  19  *  Software Foundation; either version 2 of the License, or (at your option)
  20  *  any later version.
  21  *
  22  *  This program is distributed in the hope that it will be useful, but
  23  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  24  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  25  *  for more details.
  26  *
  27  *  You should have received a copy of the GNU General Public License
  28  *  along with this program; if not, write to the Free Software Foundation,
  29  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  30  */
  31
  32 #include <linux/init.h>
  33 #include <linux/delay.h>
  34 #include <linux/slab.h>
  35 #include <linux/module.h>
  36 #include <sound/core.h>
  37 #include <sound/jack.h>
  38 #include <sound/asoundef.h>
  39 #include <sound/tlv.h>
  40 #include <sound/hdaudio.h>
  41 #include <sound/hda_i915.h>
  42 #include "hda_codec.h"
  43 #include "hda_local.h"
  44 #include "hda_jack.h"
  45
  46 static bool static_hdmi_pcm;
  47 module_param(static_hdmi_pcm, bool, 0644);
  48 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  49
  50 #define is_haswell(codec)  ((codec)->core.vendor_id == 0x80862807)
  51 #define is_broadwell(codec)    ((codec)->core.vendor_id == 0x80862808)
  52 #define is_skylake(codec) ((codec)->core.vendor_id == 0x80862809)
  53 #define is_broxton(codec) ((codec)->core.vendor_id == 0x8086280a)
  54 #define is_kabylake(codec) ((codec)->core.vendor_id == 0x8086280b)
  55 #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec) \
  56                                 || is_skylake(codec) || is_broxton(codec) \
  57                                 || is_kabylake(codec))
  58
  59 #define is_valleyview(codec) ((codec)->core.vendor_id == 0x80862882)
  60 #define is_cherryview(codec) ((codec)->core.vendor_id == 0x80862883)
  61 #define is_valleyview_plus(codec) (is_valleyview(codec) || is_cherryview(codec))
  62
  63 struct hdmi_spec_per_cvt {
  64         hda_nid_t cvt_nid;
  65         int assigned;
  66         unsigned int channels_min;
  67         unsigned int channels_max;
  68         u32 rates;
  69         u64 formats;
  70         unsigned int maxbps;
  71 };
  72
  73 /* max. connections to a widget */
  74 #define HDA_MAX_CONNECTIONS     32
  75
  76 struct hdmi_spec_per_pin {
  77         hda_nid_t pin_nid;
  78         /* pin idx, different device entries on the same pin use the same idx */
  79         int pin_nid_idx;
  80         int num_mux_nids;
  81         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  82         int mux_idx;
  83         hda_nid_t cvt_nid;
  84
  85         struct hda_codec *codec;
  86         struct hdmi_eld sink_eld;
  87         struct mutex lock;
  88         struct delayed_work work;
  89         struct snd_kcontrol *eld_ctl;
  90         struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
  91         int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
  92         int repoll_count;
  93         bool setup; /* the stream has been set up by prepare callback */
  94         int channels; /* current number of channels */
  95         bool non_pcm;
  96         bool chmap_set;         /* channel-map override by ALSA API? */
  97         unsigned char chmap[8]; /* ALSA API channel-map */
  98 #ifdef CONFIG_SND_PROC_FS
  99         struct snd_info_entry *proc_entry;
 100 #endif
 101 };
 102
 103 struct cea_channel_speaker_allocation;
 104
 105 /* operations used by generic code that can be overridden by patches */
 106 struct hdmi_ops {
 107         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
 108                            unsigned char *buf, int *eld_size);
 109
 110         /* get and set channel assigned to each HDMI ASP (audio sample packet) slot */
 111         int (*pin_get_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
 112                                     int asp_slot);
 113         int (*pin_set_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
 114                                     int asp_slot, int channel);
 115
 116         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
 117                                     int ca, int active_channels, int conn_type);
 118
 119         /* enable/disable HBR (HD passthrough) */
 120         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
 121
 122         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
 123                             hda_nid_t pin_nid, u32 stream_tag, int format);
 124
 125         /* Helpers for producing the channel map TLVs. These can be overridden
 126          * for devices that have non-standard mapping requirements. */
 127         int (*chmap_cea_alloc_validate_get_type)(struct cea_channel_speaker_allocation *cap,
 128                                                  int channels);
 129         void (*cea_alloc_to_tlv_chmap)(struct cea_channel_speaker_allocation *cap,
 130                                        unsigned int *chmap, int channels);
 131
 132         /* check that the user-given chmap is supported */
 133         int (*chmap_validate)(int ca, int channels, unsigned char *chmap);
 134 };
 135
 136 struct hdmi_pcm {
 137         struct hda_pcm *pcm;
 138         struct snd_jack *jack;
 139 };
 140
 141 struct hdmi_spec {
 142         int num_cvts;
 143         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 144         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 145
 146         int num_pins;
 147         struct snd_array pins; /* struct hdmi_spec_per_pin */
 148         struct hdmi_pcm pcm_rec[16];
 149         struct mutex pcm_lock;
 150         /* pcm_bitmap means which pcms have been assigned to pins*/
 151         unsigned long pcm_bitmap;
 152         int pcm_used;   /* counter of pcm_rec[] */
 153         /* bitmap shows whether the pcm is opened in user space
 154          * bit 0 means the first playback PCM (PCM3);
 155          * bit 1 means the second playback PCM, and so on.
 156          */
 157         unsigned long pcm_in_use;
 158         unsigned int channels_max; /* max over all cvts */
 159
 160         struct hdmi_eld temp_eld;
 161         struct hdmi_ops ops;
 162
 163         bool dyn_pin_out;
 164         bool dyn_pcm_assign;
 165         /*
 166          * Non-generic VIA/NVIDIA specific
 167          */
 168         struct hda_multi_out multiout;
 169         struct hda_pcm_stream pcm_playback;
 170
 171         /* i915/powerwell (Haswell+/Valleyview+) specific */
 172         struct i915_audio_component_audio_ops i915_audio_ops;
 173         bool i915_bound; /* was i915 bound in this driver? */
 174 };
 175
 176 #ifdef CONFIG_SND_HDA_I915
 177 #define codec_has_acomp(codec) \
 178         ((codec)->bus->core.audio_component != NULL)
 179 #else
 180 #define codec_has_acomp(codec)  false
 181 #endif
 182
 183 struct hdmi_audio_infoframe {
 184         u8 type; /* 0x84 */
 185         u8 ver;  /* 0x01 */
 186         u8 len;  /* 0x0a */
 187
 188         u8 checksum;
 189
 190         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 191         u8 SS01_SF24;
 192         u8 CXT04;
 193         u8 CA;
 194         u8 LFEPBL01_LSV36_DM_INH7;
 195 };
 196
 197 struct dp_audio_infoframe {
 198         u8 type; /* 0x84 */
 199         u8 len;  /* 0x1b */
 200         u8 ver;  /* 0x11 << 2 */
 201
 202         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 203         u8 SS01_SF24;
 204         u8 CXT04;
 205         u8 CA;
 206         u8 LFEPBL01_LSV36_DM_INH7;
 207 };
 208
 209 union audio_infoframe {
 210         struct hdmi_audio_infoframe hdmi;
 211         struct dp_audio_infoframe dp;
 212         u8 bytes[0];
 213 };
 214
 215 /*
 216  * CEA speaker placement:
 217  *
 218  *        FLH       FCH        FRH
 219  *  FLW    FL  FLC   FC   FRC   FR   FRW
 220  *
 221  *                                  LFE
 222  *                     TC
 223  *
 224  *          RL  RLC   RC   RRC   RR
 225  *
 226  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
 227  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
 228  */
 229 enum cea_speaker_placement {
 230         FL  = (1 <<  0),        /* Front Left           */
 231         FC  = (1 <<  1),        /* Front Center         */
 232         FR  = (1 <<  2),        /* Front Right          */
 233         FLC = (1 <<  3),        /* Front Left Center    */
 234         FRC = (1 <<  4),        /* Front Right Center   */
 235         RL  = (1 <<  5),        /* Rear Left            */
 236         RC  = (1 <<  6),        /* Rear Center          */
 237         RR  = (1 <<  7),        /* Rear Right           */
 238         RLC = (1 <<  8),        /* Rear Left Center     */
 239         RRC = (1 <<  9),        /* Rear Right Center    */
 240         LFE = (1 << 10),        /* Low Frequency Effect */
 241         FLW = (1 << 11),        /* Front Left Wide      */
 242         FRW = (1 << 12),        /* Front Right Wide     */
 243         FLH = (1 << 13),        /* Front Left High      */
 244         FCH = (1 << 14),        /* Front Center High    */
 245         FRH = (1 << 15),        /* Front Right High     */
 246         TC  = (1 << 16),        /* Top Center           */
 247 };
 248
 249 /*
 250  * ELD SA bits in the CEA Speaker Allocation data block
 251  */
 252 static int eld_speaker_allocation_bits[] = {
 253         [0] = FL | FR,
 254         [1] = LFE,
 255         [2] = FC,
 256         [3] = RL | RR,
 257         [4] = RC,
 258         [5] = FLC | FRC,
 259         [6] = RLC | RRC,
 260         /* the following are not defined in ELD yet */
 261         [7] = FLW | FRW,
 262         [8] = FLH | FRH,
 263         [9] = TC,
 264         [10] = FCH,
 265 };
 266
 267 struct cea_channel_speaker_allocation {
 268         int ca_index;
 269         int speakers[8];
 270
 271         /* derived values, just for convenience */
 272         int channels;
 273         int spk_mask;
 274 };
 275
 276 /*
 277  * ALSA sequence is:
 278  *
 279  *       surround40   surround41   surround50   surround51   surround71
 280  * ch0   front left   =            =            =            =
 281  * ch1   front right  =            =            =            =
 282  * ch2   rear left    =            =            =            =
 283  * ch3   rear right   =            =            =            =
 284  * ch4                LFE          center       center       center
 285  * ch5                                          LFE          LFE
 286  * ch6                                                       side left
 287  * ch7                                                       side right
 288  *
 289  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
 290  */
 291 static int hdmi_channel_mapping[0x32][8] = {
 292         /* stereo */
 293         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 294         /* 2.1 */
 295         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 296         /* Dolby Surround */
 297         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
 298         /* surround40 */
 299         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
 300         /* 4ch */
 301         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
 302         /* surround41 */
 303         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
 304         /* surround50 */
 305         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
 306         /* surround51 */
 307         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
 308         /* 7.1 */
 309         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
 310 };
 311
 312 /*
 313  * This is an ordered list!
 314  *
 315  * The preceding ones have better chances to be selected by
 316  * hdmi_channel_allocation().
 317  */
 318 static struct cea_channel_speaker_allocation channel_allocations[] = {
 319 /*                        channel:   7     6    5    4    3     2    1    0  */
 320 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
 321                                  /* 2.1 */
 322 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
 323                                  /* Dolby Surround */
 324 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
 325                                  /* surround40 */
 326 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
 327                                  /* surround41 */
 328 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
 329                                  /* surround50 */
 330 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 331                                  /* surround51 */
 332 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 333                                  /* 6.1 */
 334 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 335                                  /* surround71 */
 336 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 337
 338 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
 339 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
 340 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
 341 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
 342 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
 343 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
 344 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
 345 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 346 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
 347 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 348 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
 349 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
 350 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
 351 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
 352 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
 353 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
 354 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
 355 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
 356 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
 357 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
 358 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 359 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
 360 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 361 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 362 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 363 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 364 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 365 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
 366 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
 367 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
 368 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
 369 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 370 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 371 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 372 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 373 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 374 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 375 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
 376 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 377 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
 378 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
 379 };
 380
 381
 382 /*
 383  * HDMI routines
 384  */
 385
 386 #define get_pin(spec, idx) \
 387         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 388 #define get_cvt(spec, idx) \
 389         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 390 /* obtain hdmi_pcm object assigned to idx */
 391 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
 392 /* obtain hda_pcm object assigned to idx */
 393 #define get_pcm_rec(spec, idx)  (get_hdmi_pcm(spec, idx)->pcm)
 394
 395 static int pin_nid_to_pin_index(struct hda_codec *codec, hda_nid_t pin_nid)
 396 {
 397         struct hdmi_spec *spec = codec->spec;
 398         int pin_idx;
 399
 400         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 401                 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
 402                         return pin_idx;
 403
 404         codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
 405         return -EINVAL;
 406 }
 407
 408 static int hinfo_to_pcm_index(struct hda_codec *codec,
 409                         struct hda_pcm_stream *hinfo)
 410 {
 411         struct hdmi_spec *spec = codec->spec;
 412         int pcm_idx;
 413
 414         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
 415                 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
 416                         return pcm_idx;
 417
 418         codec_warn(codec, "HDMI: hinfo %p not registered\n", hinfo);
 419         return -EINVAL;
 420 }
 421
 422 static int hinfo_to_pin_index(struct hda_codec *codec,
 423                               struct hda_pcm_stream *hinfo)
 424 {
 425         struct hdmi_spec *spec = codec->spec;
 426         struct hdmi_spec_per_pin *per_pin;
 427         int pin_idx;
 428
 429         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 430                 per_pin = get_pin(spec, pin_idx);
 431                 if (per_pin->pcm &&
 432                         per_pin->pcm->pcm->stream == hinfo)
 433                         return pin_idx;
 434         }
 435
 436         codec_dbg(codec, "HDMI: hinfo %p not registered\n", hinfo);
 437         return -EINVAL;
 438 }
 439
 440 static struct hdmi_spec_per_pin *pcm_idx_to_pin(struct hdmi_spec *spec,
 441                                                 int pcm_idx)
 442 {
 443         int i;
 444         struct hdmi_spec_per_pin *per_pin;
 445
 446         for (i = 0; i < spec->num_pins; i++) {
 447                 per_pin = get_pin(spec, i);
 448                 if (per_pin->pcm_idx == pcm_idx)
 449                         return per_pin;
 450         }
 451         return NULL;
 452 }
 453
 454 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
 455 {
 456         struct hdmi_spec *spec = codec->spec;
 457         int cvt_idx;
 458
 459         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 460                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 461                         return cvt_idx;
 462
 463         codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
 464         return -EINVAL;
 465 }
 466
 467 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 468                         struct snd_ctl_elem_info *uinfo)
 469 {
 470         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 471         struct hdmi_spec *spec = codec->spec;
 472         struct hdmi_spec_per_pin *per_pin;
 473         struct hdmi_eld *eld;
 474         int pin_idx;
 475
 476         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 477
 478         pin_idx = kcontrol->private_value;
 479         per_pin = get_pin(spec, pin_idx);
 480         eld = &per_pin->sink_eld;
 481
 482         mutex_lock(&per_pin->lock);
 483         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 484         mutex_unlock(&per_pin->lock);
 485
 486         return 0;
 487 }
 488
 489 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 490                         struct snd_ctl_elem_value *ucontrol)
 491 {
 492         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 493         struct hdmi_spec *spec = codec->spec;
 494         struct hdmi_spec_per_pin *per_pin;
 495         struct hdmi_eld *eld;
 496         int pin_idx;
 497
 498         pin_idx = kcontrol->private_value;
 499         per_pin = get_pin(spec, pin_idx);
 500         eld = &per_pin->sink_eld;
 501
 502         mutex_lock(&per_pin->lock);
 503         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) ||
 504             eld->eld_size > ELD_MAX_SIZE) {
 505                 mutex_unlock(&per_pin->lock);
 506                 snd_BUG();
 507                 return -EINVAL;
 508         }
 509
 510         memset(ucontrol->value.bytes.data, 0,
 511                ARRAY_SIZE(ucontrol->value.bytes.data));
 512         if (eld->eld_valid)
 513                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 514                        eld->eld_size);
 515         mutex_unlock(&per_pin->lock);
 516
 517         return 0;
 518 }
 519
 520 static struct snd_kcontrol_new eld_bytes_ctl = {
 521         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 522         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 523         .name = "ELD",
 524         .info = hdmi_eld_ctl_info,
 525         .get = hdmi_eld_ctl_get,
 526 };
 527
 528 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
 529                         int device)
 530 {
 531         struct snd_kcontrol *kctl;
 532         struct hdmi_spec *spec = codec->spec;
 533         int err;
 534
 535         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 536         if (!kctl)
 537                 return -ENOMEM;
 538         kctl->private_value = pin_idx;
 539         kctl->id.device = device;
 540
 541         err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
 542         if (err < 0)
 543                 return err;
 544
 545         get_pin(spec, pin_idx)->eld_ctl = kctl;
 546         return 0;
 547 }
 548
 549 #ifdef BE_PARANOID
 550 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 551                                 int *packet_index, int *byte_index)
 552 {
 553         int val;
 554
 555         val = snd_hda_codec_read(codec, pin_nid, 0,
 556                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 557
 558         *packet_index = val >> 5;
 559         *byte_index = val & 0x1f;
 560 }
 561 #endif
 562
 563 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 564                                 int packet_index, int byte_index)
 565 {
 566         int val;
 567
 568         val = (packet_index << 5) | (byte_index & 0x1f);
 569
 570         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 571 }
 572
 573 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 574                                 unsigned char val)
 575 {
 576         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 577 }
 578
 579 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 580 {
 581         struct hdmi_spec *spec = codec->spec;
 582         int pin_out;
 583
 584         /* Unmute */
 585         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 586                 snd_hda_codec_write(codec, pin_nid, 0,
 587                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 588
 589         if (spec->dyn_pin_out)
 590                 /* Disable pin out until stream is active */
 591                 pin_out = 0;
 592         else
 593                 /* Enable pin out: some machines with GM965 gets broken output
 594                  * when the pin is disabled or changed while using with HDMI
 595                  */
 596                 pin_out = PIN_OUT;
 597
 598         snd_hda_codec_write(codec, pin_nid, 0,
 599                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 600 }
 601
 602 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
 603 {
 604         return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
 605                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
 606 }
 607
 608 static void hdmi_set_channel_count(struct hda_codec *codec,
 609                                    hda_nid_t cvt_nid, int chs)
 610 {
 611         if (chs != hdmi_get_channel_count(codec, cvt_nid))
 612                 snd_hda_codec_write(codec, cvt_nid, 0,
 613                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
 614 }
 615
 616 /*
 617  * ELD proc files
 618  */
 619
 620 #ifdef CONFIG_SND_PROC_FS
 621 static void print_eld_info(struct snd_info_entry *entry,
 622                            struct snd_info_buffer *buffer)
 623 {
 624         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 625
 626         mutex_lock(&per_pin->lock);
 627         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 628         mutex_unlock(&per_pin->lock);
 629 }
 630
 631 static void write_eld_info(struct snd_info_entry *entry,
 632                            struct snd_info_buffer *buffer)
 633 {
 634         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 635
 636         mutex_lock(&per_pin->lock);
 637         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 638         mutex_unlock(&per_pin->lock);
 639 }
 640
 641 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 642 {
 643         char name[32];
 644         struct hda_codec *codec = per_pin->codec;
 645         struct snd_info_entry *entry;
 646         int err;
 647
 648         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 649         err = snd_card_proc_new(codec->card, name, &entry);
 650         if (err < 0)
 651                 return err;
 652
 653         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 654         entry->c.text.write = write_eld_info;
 655         entry->mode |= S_IWUSR;
 656         per_pin->proc_entry = entry;
 657
 658         return 0;
 659 }
 660
 661 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 662 {
 663         if (!per_pin->codec->bus->shutdown) {
 664                 snd_info_free_entry(per_pin->proc_entry);
 665                 per_pin->proc_entry = NULL;
 666         }
 667 }
 668 #else
 669 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 670                                int index)
 671 {
 672         return 0;
 673 }
 674 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 675 {
 676 }
 677 #endif
 678
 679 /*
 680  * Channel mapping routines
 681  */
 682
 683 /*
 684  * Compute derived values in channel_allocations[].
 685  */
 686 static void init_channel_allocations(void)
 687 {
 688         int i, j;
 689         struct cea_channel_speaker_allocation *p;
 690
 691         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 692                 p = channel_allocations + i;
 693                 p->channels = 0;
 694                 p->spk_mask = 0;
 695                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
 696                         if (p->speakers[j]) {
 697                                 p->channels++;
 698                                 p->spk_mask |= p->speakers[j];
 699                         }
 700         }
 701 }
 702
 703 static int get_channel_allocation_order(int ca)
 704 {
 705         int i;
 706
 707         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 708                 if (channel_allocations[i].ca_index == ca)
 709                         break;
 710         }
 711         return i;
 712 }
 713
 714 /*
 715  * The transformation takes two steps:
 716  *
 717  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
 718  *            spk_mask => (channel_allocations[])         => ai->CA
 719  *
 720  * TODO: it could select the wrong CA from multiple candidates.
 721 */
 722 static int hdmi_channel_allocation(struct hda_codec *codec,
 723                                    struct hdmi_eld *eld, int channels)
 724 {
 725         int i;
 726         int ca = 0;
 727         int spk_mask = 0;
 728         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
 729
 730         /*
 731          * CA defaults to 0 for basic stereo audio
 732          */
 733         if (channels <= 2)
 734                 return 0;
 735
 736         /*
 737          * expand ELD's speaker allocation mask
 738          *
 739          * ELD tells the speaker mask in a compact(paired) form,
 740          * expand ELD's notions to match the ones used by Audio InfoFrame.
 741          */
 742         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
 743                 if (eld->info.spk_alloc & (1 << i))
 744                         spk_mask |= eld_speaker_allocation_bits[i];
 745         }
 746
 747         /* search for the first working match in the CA table */
 748         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 749                 if (channels == channel_allocations[i].channels &&
 750                     (spk_mask & channel_allocations[i].spk_mask) ==
 751                                 channel_allocations[i].spk_mask) {
 752                         ca = channel_allocations[i].ca_index;
 753                         break;
 754                 }
 755         }
 756
 757         if (!ca) {
 758                 /* if there was no match, select the regular ALSA channel
 759                  * allocation with the matching number of channels */
 760                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 761                         if (channels == channel_allocations[i].channels) {
 762                                 ca = channel_allocations[i].ca_index;
 763                                 break;
 764                         }
 765                 }
 766         }
 767
 768         snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
 769         codec_dbg(codec, "HDMI: select CA 0x%x for %d-channel allocation: %s\n",
 770                     ca, channels, buf);
 771
 772         return ca;
 773 }
 774
 775 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
 776                                        hda_nid_t pin_nid)
 777 {
 778 #ifdef CONFIG_SND_DEBUG_VERBOSE
 779         struct hdmi_spec *spec = codec->spec;
 780         int i;
 781         int channel;
 782
 783         for (i = 0; i < 8; i++) {
 784                 channel = spec->ops.pin_get_slot_channel(codec, pin_nid, i);
 785                 codec_dbg(codec, "HDMI: ASP channel %d => slot %d\n",
 786                                                 channel, i);
 787         }
 788 #endif
 789 }
 790
 791 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
 792                                        hda_nid_t pin_nid,
 793                                        bool non_pcm,
 794                                        int ca)
 795 {
 796         struct hdmi_spec *spec = codec->spec;
 797         struct cea_channel_speaker_allocation *ch_alloc;
 798         int i;
 799         int err;
 800         int order;
 801         int non_pcm_mapping[8];
 802
 803         order = get_channel_allocation_order(ca);
 804         ch_alloc = &channel_allocations[order];
 805
 806         if (hdmi_channel_mapping[ca][1] == 0) {
 807                 int hdmi_slot = 0;
 808                 /* fill actual channel mappings in ALSA channel (i) order */
 809                 for (i = 0; i < ch_alloc->channels; i++) {
 810                         while (!ch_alloc->speakers[7 - hdmi_slot] && !WARN_ON(hdmi_slot >= 8))
 811                                 hdmi_slot++; /* skip zero slots */
 812
 813                         hdmi_channel_mapping[ca][i] = (i << 4) | hdmi_slot++;
 814                 }
 815                 /* fill the rest of the slots with ALSA channel 0xf */
 816                 for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++)
 817                         if (!ch_alloc->speakers[7 - hdmi_slot])
 818                                 hdmi_channel_mapping[ca][i++] = (0xf << 4) | hdmi_slot;
 819         }
 820
 821         if (non_pcm) {
 822                 for (i = 0; i < ch_alloc->channels; i++)
 823                         non_pcm_mapping[i] = (i << 4) | i;
 824                 for (; i < 8; i++)
 825                         non_pcm_mapping[i] = (0xf << 4) | i;
 826         }
 827
 828         for (i = 0; i < 8; i++) {
 829                 int slotsetup = non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i];
 830                 int hdmi_slot = slotsetup & 0x0f;
 831                 int channel = (slotsetup & 0xf0) >> 4;
 832                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot, channel);
 833                 if (err) {
 834                         codec_dbg(codec, "HDMI: channel mapping failed\n");
 835                         break;
 836                 }
 837         }
 838 }
 839
 840 struct channel_map_table {
 841         unsigned char map;              /* ALSA API channel map position */
 842         int spk_mask;                   /* speaker position bit mask */
 843 };
 844
 845 static struct channel_map_table map_tables[] = {
 846         { SNDRV_CHMAP_FL,       FL },
 847         { SNDRV_CHMAP_FR,       FR },
 848         { SNDRV_CHMAP_RL,       RL },
 849         { SNDRV_CHMAP_RR,       RR },
 850         { SNDRV_CHMAP_LFE,      LFE },
 851         { SNDRV_CHMAP_FC,       FC },
 852         { SNDRV_CHMAP_RLC,      RLC },
 853         { SNDRV_CHMAP_RRC,      RRC },
 854         { SNDRV_CHMAP_RC,       RC },
 855         { SNDRV_CHMAP_FLC,      FLC },
 856         { SNDRV_CHMAP_FRC,      FRC },
 857         { SNDRV_CHMAP_TFL,      FLH },
 858         { SNDRV_CHMAP_TFR,      FRH },
 859         { SNDRV_CHMAP_FLW,      FLW },
 860         { SNDRV_CHMAP_FRW,      FRW },
 861         { SNDRV_CHMAP_TC,       TC },
 862         { SNDRV_CHMAP_TFC,      FCH },
 863         {} /* terminator */
 864 };
 865
 866 /* from ALSA API channel position to speaker bit mask */
 867 static int to_spk_mask(unsigned char c)
 868 {
 869         struct channel_map_table *t = map_tables;
 870         for (; t->map; t++) {
 871                 if (t->map == c)
 872                         return t->spk_mask;
 873         }
 874         return 0;
 875 }
 876
 877 /* from ALSA API channel position to CEA slot */
 878 static int to_cea_slot(int ordered_ca, unsigned char pos)
 879 {
 880         int mask = to_spk_mask(pos);
 881         int i;
 882
 883         if (mask) {
 884                 for (i = 0; i < 8; i++) {
 885                         if (channel_allocations[ordered_ca].speakers[7 - i] == mask)
 886                                 return i;
 887                 }
 888         }
 889
 890         return -1;
 891 }
 892
 893 /* from speaker bit mask to ALSA API channel position */
 894 static int spk_to_chmap(int spk)
 895 {
 896         struct channel_map_table *t = map_tables;
 897         for (; t->map; t++) {
 898                 if (t->spk_mask == spk)
 899                         return t->map;
 900         }
 901         return 0;
 902 }
 903
 904 /* from CEA slot to ALSA API channel position */
 905 static int from_cea_slot(int ordered_ca, unsigned char slot)
 906 {
 907         int mask = channel_allocations[ordered_ca].speakers[7 - slot];
 908
 909         return spk_to_chmap(mask);
 910 }
 911
 912 /* get the CA index corresponding to the given ALSA API channel map */
 913 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
 914 {
 915         int i, spks = 0, spk_mask = 0;
 916
 917         for (i = 0; i < chs; i++) {
 918                 int mask = to_spk_mask(map[i]);
 919                 if (mask) {
 920                         spk_mask |= mask;
 921                         spks++;
 922                 }
 923         }
 924
 925         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 926                 if ((chs == channel_allocations[i].channels ||
 927                      spks == channel_allocations[i].channels) &&
 928                     (spk_mask & channel_allocations[i].spk_mask) ==
 929                                 channel_allocations[i].spk_mask)
 930                         return channel_allocations[i].ca_index;
 931         }
 932         return -1;
 933 }
 934
 935 /* set up the channel slots for the given ALSA API channel map */
 936 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
 937                                              hda_nid_t pin_nid,
 938                                              int chs, unsigned char *map,
 939                                              int ca)
 940 {
 941         struct hdmi_spec *spec = codec->spec;
 942         int ordered_ca = get_channel_allocation_order(ca);
 943         int alsa_pos, hdmi_slot;
 944         int assignments[8] = {[0 ... 7] = 0xf};
 945
 946         for (alsa_pos = 0; alsa_pos < chs; alsa_pos++) {
 947
 948                 hdmi_slot = to_cea_slot(ordered_ca, map[alsa_pos]);
 949
 950                 if (hdmi_slot < 0)
 951                         continue; /* unassigned channel */
 952
 953                 assignments[hdmi_slot] = alsa_pos;
 954         }
 955
 956         for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++) {
 957                 int err;
 958
 959                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot,
 960                                                      assignments[hdmi_slot]);
 961                 if (err)
 962                         return -EINVAL;
 963         }
 964         return 0;
 965 }
 966
 967 /* store ALSA API channel map from the current default map */
 968 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
 969 {
 970         int i;
 971         int ordered_ca = get_channel_allocation_order(ca);
 972         for (i = 0; i < 8; i++) {
 973                 if (i < channel_allocations[ordered_ca].channels)
 974                         map[i] = from_cea_slot(ordered_ca, hdmi_channel_mapping[ca][i] & 0x0f);
 975                 else
 976                         map[i] = 0;
 977         }
 978 }
 979
 980 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
 981                                        hda_nid_t pin_nid, bool non_pcm, int ca,
 982                                        int channels, unsigned char *map,
 983                                        bool chmap_set)
 984 {
 985         if (!non_pcm && chmap_set) {
 986                 hdmi_manual_setup_channel_mapping(codec, pin_nid,
 987                                                   channels, map, ca);
 988         } else {
 989                 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
 990                 hdmi_setup_fake_chmap(map, ca);
 991         }
 992
 993         hdmi_debug_channel_mapping(codec, pin_nid);
 994 }
 995
 996 static int hdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
 997                                      int asp_slot, int channel)
 998 {
 999         return snd_hda_codec_write(codec, pin_nid, 0,
1000                                    AC_VERB_SET_HDMI_CHAN_SLOT,
1001                                    (channel << 4) | asp_slot);
1002 }
1003
1004 static int hdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
1005                                      int asp_slot)
1006 {
1007         return (snd_hda_codec_read(codec, pin_nid, 0,
1008                                    AC_VERB_GET_HDMI_CHAN_SLOT,
1009                                    asp_slot) & 0xf0) >> 4;
1010 }
1011
1012 /*
1013  * Audio InfoFrame routines
1014  */
1015
1016 /*
1017  * Enable Audio InfoFrame Transmission
1018  */
1019 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
1020                                        hda_nid_t pin_nid)
1021 {
1022         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1023         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
1024                                                 AC_DIPXMIT_BEST);
1025 }
1026
1027 /*
1028  * Disable Audio InfoFrame Transmission
1029  */
1030 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
1031                                       hda_nid_t pin_nid)
1032 {
1033         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1034         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
1035                                                 AC_DIPXMIT_DISABLE);
1036 }
1037
1038 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
1039 {
1040 #ifdef CONFIG_SND_DEBUG_VERBOSE
1041         int i;
1042         int size;
1043
1044         size = snd_hdmi_get_eld_size(codec, pin_nid);
1045         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
1046
1047         for (i = 0; i < 8; i++) {
1048                 size = snd_hda_codec_read(codec, pin_nid, 0,
1049                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
1050                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
1051         }
1052 #endif
1053 }
1054
1055 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
1056 {
1057 #ifdef BE_PARANOID
1058         int i, j;
1059         int size;
1060         int pi, bi;
1061         for (i = 0; i < 8; i++) {
1062                 size = snd_hda_codec_read(codec, pin_nid, 0,
1063                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
1064                 if (size == 0)
1065                         continue;
1066
1067                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
1068                 for (j = 1; j < 1000; j++) {
1069                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
1070                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
1071                         if (pi != i)
1072                                 codec_dbg(codec, "dip index %d: %d != %d\n",
1073                                                 bi, pi, i);
1074                         if (bi == 0) /* byte index wrapped around */
1075                                 break;
1076                 }
1077                 codec_dbg(codec,
1078                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
1079                         i, size, j);
1080         }
1081 #endif
1082 }
1083
1084 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
1085 {
1086         u8 *bytes = (u8 *)hdmi_ai;
1087         u8 sum = 0;
1088         int i;
1089
1090         hdmi_ai->checksum = 0;
1091
1092         for (i = 0; i < sizeof(*hdmi_ai); i++)
1093                 sum += bytes[i];
1094
1095         hdmi_ai->checksum = -sum;
1096 }
1097
1098 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
1099                                       hda_nid_t pin_nid,
1100                                       u8 *dip, int size)
1101 {
1102         int i;
1103
1104         hdmi_debug_dip_size(codec, pin_nid);
1105         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
1106
1107         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1108         for (i = 0; i < size; i++)
1109                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
1110 }
1111
1112 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
1113                                     u8 *dip, int size)
1114 {
1115         u8 val;
1116         int i;
1117
1118         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
1119                                                             != AC_DIPXMIT_BEST)
1120                 return false;
1121
1122         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1123         for (i = 0; i < size; i++) {
1124                 val = snd_hda_codec_read(codec, pin_nid, 0,
1125                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
1126                 if (val != dip[i])
1127                         return false;
1128         }
1129
1130         return true;
1131 }
1132
1133 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
1134                                      hda_nid_t pin_nid,
1135                                      int ca, int active_channels,
1136                                      int conn_type)
1137 {
1138         union audio_infoframe ai;
1139
1140         memset(&ai, 0, sizeof(ai));
1141         if (conn_type == 0) { /* HDMI */
1142                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
1143
1144                 hdmi_ai->type           = 0x84;
1145                 hdmi_ai->ver            = 0x01;
1146                 hdmi_ai->len            = 0x0a;
1147                 hdmi_ai->CC02_CT47      = active_channels - 1;
1148                 hdmi_ai->CA             = ca;
1149                 hdmi_checksum_audio_infoframe(hdmi_ai);
1150         } else if (conn_type == 1) { /* DisplayPort */
1151                 struct dp_audio_infoframe *dp_ai = &ai.dp;
1152
1153                 dp_ai->type             = 0x84;
1154                 dp_ai->len              = 0x1b;
1155                 dp_ai->ver              = 0x11 << 2;
1156                 dp_ai->CC02_CT47        = active_channels - 1;
1157                 dp_ai->CA               = ca;
1158         } else {
1159                 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
1160                             pin_nid);
1161                 return;
1162         }
1163
1164         /*
1165          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
1166          * sizeof(*dp_ai) to avoid partial match/update problems when
1167          * the user switches between HDMI/DP monitors.
1168          */
1169         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
1170                                         sizeof(ai))) {
1171                 codec_dbg(codec,
1172                           "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
1173                             pin_nid,
1174                             active_channels, ca);
1175                 hdmi_stop_infoframe_trans(codec, pin_nid);
1176                 hdmi_fill_audio_infoframe(codec, pin_nid,
1177                                             ai.bytes, sizeof(ai));
1178                 hdmi_start_infoframe_trans(codec, pin_nid);
1179         }
1180 }
1181
1182 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
1183                                        struct hdmi_spec_per_pin *per_pin,
1184                                        bool non_pcm)
1185 {
1186         struct hdmi_spec *spec = codec->spec;
1187         hda_nid_t pin_nid = per_pin->pin_nid;
1188         int channels = per_pin->channels;
1189         int active_channels;
1190         struct hdmi_eld *eld;
1191         int ca, ordered_ca;
1192
1193         if (!channels)
1194                 return;
1195
1196         if (is_haswell_plus(codec))
1197                 snd_hda_codec_write(codec, pin_nid, 0,
1198                                             AC_VERB_SET_AMP_GAIN_MUTE,
1199                                             AMP_OUT_UNMUTE);
1200
1201         eld = &per_pin->sink_eld;
1202
1203         if (!non_pcm && per_pin->chmap_set)
1204                 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
1205         else
1206                 ca = hdmi_channel_allocation(codec, eld, channels);
1207         if (ca < 0)
1208                 ca = 0;
1209
1210         ordered_ca = get_channel_allocation_order(ca);
1211         active_channels = channel_allocations[ordered_ca].channels;
1212
1213         hdmi_set_channel_count(codec, per_pin->cvt_nid, active_channels);
1214
1215         /*
1216          * always configure channel mapping, it may have been changed by the
1217          * user in the meantime
1218          */
1219         hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
1220                                    channels, per_pin->chmap,
1221                                    per_pin->chmap_set);
1222
1223         spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
1224                                       eld->info.conn_type);
1225
1226         per_pin->non_pcm = non_pcm;
1227 }
1228
1229 /*
1230  * Unsolicited events
1231  */
1232
1233 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
1234
1235 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid)
1236 {
1237         struct hdmi_spec *spec = codec->spec;
1238         int pin_idx = pin_nid_to_pin_index(codec, nid);
1239
1240         if (pin_idx < 0)
1241                 return;
1242         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
1243                 snd_hda_jack_report_sync(codec);
1244 }
1245
1246 static void jack_callback(struct hda_codec *codec,
1247                           struct hda_jack_callback *jack)
1248 {
1249         check_presence_and_report(codec, jack->nid);
1250 }
1251
1252 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
1253 {
1254         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1255         struct hda_jack_tbl *jack;
1256         int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
1257
1258         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
1259         if (!jack)
1260                 return;
1261         jack->jack_dirty = 1;
1262
1263         codec_dbg(codec,
1264                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
1265                 codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
1266                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
1267
1268         check_presence_and_report(codec, jack->nid);
1269 }
1270
1271 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
1272 {
1273         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1274         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1275         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
1276         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
1277
1278         codec_info(codec,
1279                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1280                 codec->addr,
1281                 tag,
1282                 subtag,
1283                 cp_state,
1284                 cp_ready);
1285
1286         /* TODO */
1287         if (cp_state)
1288                 ;
1289         if (cp_ready)
1290                 ;
1291 }
1292
1293
1294 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1295 {
1296         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1297         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1298
1299         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1300                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
1301                 return;
1302         }
1303
1304         if (subtag == 0)
1305                 hdmi_intrinsic_event(codec, res);
1306         else
1307                 hdmi_non_intrinsic_event(codec, res);
1308 }
1309
1310 static void haswell_verify_D0(struct hda_codec *codec,
1311                 hda_nid_t cvt_nid, hda_nid_t nid)
1312 {
1313         int pwr;
1314
1315         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1316          * thus pins could only choose converter 0 for use. Make sure the
1317          * converters are in correct power state */
1318         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
1319                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1320
1321         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
1322                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1323                                     AC_PWRST_D0);
1324                 msleep(40);
1325                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1326                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1327                 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1328         }
1329 }
1330
1331 /*
1332  * Callbacks
1333  */
1334
1335 /* HBR should be Non-PCM, 8 channels */
1336 #define is_hbr_format(format) \
1337         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1338
1339 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
1340                               bool hbr)
1341 {
1342         int pinctl, new_pinctl;
1343
1344         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1345                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1346                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1347
1348                 if (pinctl < 0)
1349                         return hbr ? -EINVAL : 0;
1350
1351                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1352                 if (hbr)
1353                         new_pinctl |= AC_PINCTL_EPT_HBR;
1354                 else
1355                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
1356
1357                 codec_dbg(codec,
1358                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
1359                             pin_nid,
1360                             pinctl == new_pinctl ? "" : "new-",
1361                             new_pinctl);
1362
1363                 if (pinctl != new_pinctl)
1364                         snd_hda_codec_write(codec, pin_nid, 0,
1365                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1366                                             new_pinctl);
1367         } else if (hbr)
1368                 return -EINVAL;
1369
1370         return 0;
1371 }
1372
1373 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1374                               hda_nid_t pin_nid, u32 stream_tag, int format)
1375 {
1376         struct hdmi_spec *spec = codec->spec;
1377         int err;
1378
1379         if (is_haswell_plus(codec))
1380                 haswell_verify_D0(codec, cvt_nid, pin_nid);
1381
1382         err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
1383
1384         if (err) {
1385                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
1386                 return err;
1387         }
1388
1389         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1390         return 0;
1391 }
1392
1393 /* Try to find an available converter
1394  * If pin_idx is less then zero, just try to find an available converter.
1395  * Otherwise, try to find an available converter and get the cvt mux index
1396  * of the pin.
1397  */
1398 static int hdmi_choose_cvt(struct hda_codec *codec,
1399                         int pin_idx, int *cvt_id, int *mux_id)
1400 {
1401         struct hdmi_spec *spec = codec->spec;
1402         struct hdmi_spec_per_pin *per_pin;
1403         struct hdmi_spec_per_cvt *per_cvt = NULL;
1404         int cvt_idx, mux_idx = 0;
1405
1406         /* pin_idx < 0 means no pin will be bound to the converter */
1407         if (pin_idx < 0)
1408                 per_pin = NULL;
1409         else
1410                 per_pin = get_pin(spec, pin_idx);
1411
1412         /* Dynamically assign converter to stream */
1413         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1414                 per_cvt = get_cvt(spec, cvt_idx);
1415
1416                 /* Must not already be assigned */
1417                 if (per_cvt->assigned)
1418                         continue;
1419                 if (per_pin == NULL)
1420                         break;
1421                 /* Must be in pin's mux's list of converters */
1422                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1423                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1424                                 break;
1425                 /* Not in mux list */
1426                 if (mux_idx == per_pin->num_mux_nids)
1427                         continue;
1428                 break;
1429         }
1430
1431         /* No free converters */
1432         if (cvt_idx == spec->num_cvts)
1433                 return -EBUSY;
1434
1435         if (per_pin != NULL)
1436                 per_pin->mux_idx = mux_idx;
1437
1438         if (cvt_id)
1439                 *cvt_id = cvt_idx;
1440         if (mux_id)
1441                 *mux_id = mux_idx;
1442
1443         return 0;
1444 }
1445
1446 /* Assure the pin select the right convetor */
1447 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
1448                         struct hdmi_spec_per_pin *per_pin)
1449 {
1450         hda_nid_t pin_nid = per_pin->pin_nid;
1451         int mux_idx, curr;
1452
1453         mux_idx = per_pin->mux_idx;
1454         curr = snd_hda_codec_read(codec, pin_nid, 0,
1455                                           AC_VERB_GET_CONNECT_SEL, 0);
1456         if (curr != mux_idx)
1457                 snd_hda_codec_write_cache(codec, pin_nid, 0,
1458                                             AC_VERB_SET_CONNECT_SEL,
1459                                             mux_idx);
1460 }
1461
1462 /* get the mux index for the converter of the pins
1463  * converter's mux index is the same for all pins on Intel platform
1464  */
1465 static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
1466                         hda_nid_t cvt_nid)
1467 {
1468         int i;
1469
1470         for (i = 0; i < spec->num_cvts; i++)
1471                 if (spec->cvt_nids[i] == cvt_nid)
1472                         return i;
1473         return -EINVAL;
1474 }
1475
1476 /* Intel HDMI workaround to fix audio routing issue:
1477  * For some Intel display codecs, pins share the same connection list.
1478  * So a conveter can be selected by multiple pins and playback on any of these
1479  * pins will generate sound on the external display, because audio flows from
1480  * the same converter to the display pipeline. Also muting one pin may make
1481  * other pins have no sound output.
1482  * So this function assures that an assigned converter for a pin is not selected
1483  * by any other pins.
1484  */
1485 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1486                         hda_nid_t pin_nid, int mux_idx)
1487 {
1488         struct hdmi_spec *spec = codec->spec;
1489         hda_nid_t nid;
1490         int cvt_idx, curr;
1491         struct hdmi_spec_per_cvt *per_cvt;
1492
1493         /* configure all pins, including "no physical connection" ones */
1494         for_each_hda_codec_node(nid, codec) {
1495                 unsigned int wid_caps = get_wcaps(codec, nid);
1496                 unsigned int wid_type = get_wcaps_type(wid_caps);
1497
1498                 if (wid_type != AC_WID_PIN)
1499                         continue;
1500
1501                 if (nid == pin_nid)
1502                         continue;
1503
1504                 curr = snd_hda_codec_read(codec, nid, 0,
1505                                           AC_VERB_GET_CONNECT_SEL, 0);
1506                 if (curr != mux_idx)
1507                         continue;
1508
1509                 /* choose an unassigned converter. The conveters in the
1510                  * connection list are in the same order as in the codec.
1511                  */
1512                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1513                         per_cvt = get_cvt(spec, cvt_idx);
1514                         if (!per_cvt->assigned) {
1515                                 codec_dbg(codec,
1516                                           "choose cvt %d for pin nid %d\n",
1517                                         cvt_idx, nid);
1518                                 snd_hda_codec_write_cache(codec, nid, 0,
1519                                             AC_VERB_SET_CONNECT_SEL,
1520                                             cvt_idx);
1521                                 break;
1522                         }
1523                 }
1524         }
1525 }
1526
1527 /* A wrapper of intel_not_share_asigned_cvt() */
1528 static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1529                         hda_nid_t pin_nid, hda_nid_t cvt_nid)
1530 {
1531         int mux_idx;
1532         struct hdmi_spec *spec = codec->spec;
1533
1534         if (!is_haswell_plus(codec) && !is_valleyview_plus(codec))
1535                 return;
1536
1537         /* On Intel platform, the mapping of converter nid to
1538          * mux index of the pins are always the same.
1539          * The pin nid may be 0, this means all pins will not
1540          * share the converter.
1541          */
1542         mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1543         if (mux_idx >= 0)
1544                 intel_not_share_assigned_cvt(codec, pin_nid, mux_idx);
1545 }
1546
1547 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1548  * in dyn_pcm_assign mode.
1549  */
1550 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1551                          struct hda_codec *codec,
1552                          struct snd_pcm_substream *substream)
1553 {
1554         struct hdmi_spec *spec = codec->spec;
1555         struct snd_pcm_runtime *runtime = substream->runtime;
1556         int cvt_idx, pcm_idx;
1557         struct hdmi_spec_per_cvt *per_cvt = NULL;
1558         int err;
1559
1560         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1561         if (pcm_idx < 0)
1562                 return -EINVAL;
1563
1564         err = hdmi_choose_cvt(codec, -1, &cvt_idx, NULL);
1565         if (err)
1566                 return err;
1567
1568         per_cvt = get_cvt(spec, cvt_idx);
1569         per_cvt->assigned = 1;
1570         hinfo->nid = per_cvt->cvt_nid;
1571
1572         intel_not_share_assigned_cvt_nid(codec, 0, per_cvt->cvt_nid);
1573
1574         set_bit(pcm_idx, &spec->pcm_in_use);
1575         /* todo: setup spdif ctls assign */
1576
1577         /* Initially set the converter's capabilities */
1578         hinfo->channels_min = per_cvt->channels_min;
1579         hinfo->channels_max = per_cvt->channels_max;
1580         hinfo->rates = per_cvt->rates;
1581         hinfo->formats = per_cvt->formats;
1582         hinfo->maxbps = per_cvt->maxbps;
1583
1584         /* Store the updated parameters */
1585         runtime->hw.channels_min = hinfo->channels_min;
1586         runtime->hw.channels_max = hinfo->channels_max;
1587         runtime->hw.formats = hinfo->formats;
1588         runtime->hw.rates = hinfo->rates;
1589
1590         snd_pcm_hw_constraint_step(substream->runtime, 0,
1591                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1592         return 0;
1593 }
1594
1595 /*
1596  * HDA PCM callbacks
1597  */
1598 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1599                          struct hda_codec *codec,
1600                          struct snd_pcm_substream *substream)
1601 {
1602         struct hdmi_spec *spec = codec->spec;
1603         struct snd_pcm_runtime *runtime = substream->runtime;
1604         int pin_idx, cvt_idx, pcm_idx, mux_idx = 0;
1605         struct hdmi_spec_per_pin *per_pin;
1606         struct hdmi_eld *eld;
1607         struct hdmi_spec_per_cvt *per_cvt = NULL;
1608         int err;
1609
1610         /* Validate hinfo */
1611         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1612         if (pcm_idx < 0)
1613                 return -EINVAL;
1614
1615         mutex_lock(&spec->pcm_lock);
1616         pin_idx = hinfo_to_pin_index(codec, hinfo);
1617         if (!spec->dyn_pcm_assign) {
1618                 if (snd_BUG_ON(pin_idx < 0)) {
1619                         mutex_unlock(&spec->pcm_lock);
1620                         return -EINVAL;
1621                 }
1622         } else {
1623                 /* no pin is assigned to the PCM
1624                  * PA need pcm open successfully when probe
1625                  */
1626                 if (pin_idx < 0) {
1627                         err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1628                         mutex_unlock(&spec->pcm_lock);
1629                         return err;
1630                 }
1631         }
1632
1633         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1634         if (err < 0) {
1635                 mutex_unlock(&spec->pcm_lock);
1636                 return err;
1637         }
1638
1639         per_cvt = get_cvt(spec, cvt_idx);
1640         /* Claim converter */
1641         per_cvt->assigned = 1;
1642
1643         set_bit(pcm_idx, &spec->pcm_in_use);
1644         per_pin = get_pin(spec, pin_idx);
1645         per_pin->cvt_nid = per_cvt->cvt_nid;
1646         hinfo->nid = per_cvt->cvt_nid;
1647
1648         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1649                             AC_VERB_SET_CONNECT_SEL,
1650                             mux_idx);
1651
1652         /* configure unused pins to choose other converters */
1653         if (is_haswell_plus(codec) || is_valleyview_plus(codec))
1654                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid, mux_idx);
1655
1656         snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
1657
1658         /* Initially set the converter's capabilities */
1659         hinfo->channels_min = per_cvt->channels_min;
1660         hinfo->channels_max = per_cvt->channels_max;
1661         hinfo->rates = per_cvt->rates;
1662         hinfo->formats = per_cvt->formats;
1663         hinfo->maxbps = per_cvt->maxbps;
1664
1665         eld = &per_pin->sink_eld;
1666         /* Restrict capabilities by ELD if this isn't disabled */
1667         if (!static_hdmi_pcm && eld->eld_valid) {
1668                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1669                 if (hinfo->channels_min > hinfo->channels_max ||
1670                     !hinfo->rates || !hinfo->formats) {
1671                         per_cvt->assigned = 0;
1672                         hinfo->nid = 0;
1673                         snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1674                         mutex_unlock(&spec->pcm_lock);
1675                         return -ENODEV;
1676                 }
1677         }
1678
1679         mutex_unlock(&spec->pcm_lock);
1680         /* Store the updated parameters */
1681         runtime->hw.channels_min = hinfo->channels_min;
1682         runtime->hw.channels_max = hinfo->channels_max;
1683         runtime->hw.formats = hinfo->formats;
1684         runtime->hw.rates = hinfo->rates;
1685
1686         snd_pcm_hw_constraint_step(substream->runtime, 0,
1687                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1688         return 0;
1689 }
1690
1691 /*
1692  * HDA/HDMI auto parsing
1693  */
1694 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1695 {
1696         struct hdmi_spec *spec = codec->spec;
1697         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1698         hda_nid_t pin_nid = per_pin->pin_nid;
1699
1700         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1701                 codec_warn(codec,
1702                            "HDMI: pin %d wcaps %#x does not support connection list\n",
1703                            pin_nid, get_wcaps(codec, pin_nid));
1704                 return -EINVAL;
1705         }
1706
1707         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1708                                                         per_pin->mux_nids,
1709                                                         HDA_MAX_CONNECTIONS);
1710
1711         return 0;
1712 }
1713
1714 static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1715                                 struct hdmi_spec_per_pin *per_pin)
1716 {
1717         int i;
1718
1719         /* try the prefer PCM */
1720         if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1721                 return per_pin->pin_nid_idx;
1722
1723         /* have a second try; check the "reserved area" over num_pins */
1724         for (i = spec->num_pins; i < spec->pcm_used; i++) {
1725                 if (!test_bit(i, &spec->pcm_bitmap))
1726                         return i;
1727         }
1728
1729         /* the last try; check the empty slots in pins */
1730         for (i = 0; i < spec->num_pins; i++) {
1731                 if (!test_bit(i, &spec->pcm_bitmap))
1732                         return i;
1733         }
1734         return -EBUSY;
1735 }
1736
1737 static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1738                                 struct hdmi_spec_per_pin *per_pin)
1739 {
1740         int idx;
1741
1742         /* pcm already be attached to the pin */
1743         if (per_pin->pcm)
1744                 return;
1745         idx = hdmi_find_pcm_slot(spec, per_pin);
1746         if (idx == -ENODEV)
1747                 return;
1748         per_pin->pcm_idx = idx;
1749         per_pin->pcm = get_hdmi_pcm(spec, idx);
1750         set_bit(idx, &spec->pcm_bitmap);
1751 }
1752
1753 static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1754                                 struct hdmi_spec_per_pin *per_pin)
1755 {
1756         int idx;
1757
1758         /* pcm already be detached from the pin */
1759         if (!per_pin->pcm)
1760                 return;
1761         idx = per_pin->pcm_idx;
1762         per_pin->pcm_idx = -1;
1763         per_pin->pcm = NULL;
1764         if (idx >= 0 && idx < spec->pcm_used)
1765                 clear_bit(idx, &spec->pcm_bitmap);
1766 }
1767
1768 static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1769                 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1770 {
1771         int mux_idx;
1772
1773         for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1774                 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1775                         break;
1776         return mux_idx;
1777 }
1778
1779 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1780
1781 static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1782                            struct hdmi_spec_per_pin *per_pin)
1783 {
1784         struct hda_codec *codec = per_pin->codec;
1785         struct hda_pcm *pcm;
1786         struct hda_pcm_stream *hinfo;
1787         struct snd_pcm_substream *substream;
1788         int mux_idx;
1789         bool non_pcm;
1790
1791         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1792                 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
1793         else
1794                 return;
1795         if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1796                 return;
1797
1798         /* hdmi audio only uses playback and one substream */
1799         hinfo = pcm->stream;
1800         substream = pcm->pcm->streams[0].substream;
1801
1802         per_pin->cvt_nid = hinfo->nid;
1803
1804         mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1805         if (mux_idx < per_pin->num_mux_nids)
1806                 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1807                                 AC_VERB_SET_CONNECT_SEL,
1808                                 mux_idx);
1809         snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1810
1811         non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1812         if (substream->runtime)
1813                 per_pin->channels = substream->runtime->channels;
1814         per_pin->setup = true;
1815         per_pin->mux_idx = mux_idx;
1816
1817         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1818 }
1819
1820 static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1821                            struct hdmi_spec_per_pin *per_pin)
1822 {
1823         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1824                 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1825
1826         per_pin->chmap_set = false;
1827         memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1828
1829         per_pin->setup = false;
1830         per_pin->channels = 0;
1831 }
1832
1833 /* update per_pin ELD from the given new ELD;
1834  * setup info frame and notification accordingly
1835  */
1836 static void update_eld(struct hda_codec *codec,
1837                        struct hdmi_spec_per_pin *per_pin,
1838                        struct hdmi_eld *eld)
1839 {
1840         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1841         struct hdmi_spec *spec = codec->spec;
1842         bool old_eld_valid = pin_eld->eld_valid;
1843         bool eld_changed;
1844
1845         if (spec->dyn_pcm_assign) {
1846                 if (eld->eld_valid) {
1847                         hdmi_attach_hda_pcm(spec, per_pin);
1848                         hdmi_pcm_setup_pin(spec, per_pin);
1849                 } else {
1850                         hdmi_pcm_reset_pin(spec, per_pin);
1851                         hdmi_detach_hda_pcm(spec, per_pin);
1852                 }
1853         }
1854
1855         if (eld->eld_valid)
1856                 snd_hdmi_show_eld(codec, &eld->info);
1857
1858         eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1859         if (eld->eld_valid && pin_eld->eld_valid)
1860                 if (pin_eld->eld_size != eld->eld_size ||
1861                     memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1862                            eld->eld_size) != 0)
1863                         eld_changed = true;
1864
1865         pin_eld->eld_valid = eld->eld_valid;
1866         pin_eld->eld_size = eld->eld_size;
1867         if (eld->eld_valid)
1868                 memcpy(pin_eld->eld_buffer, eld->eld_buffer, eld->eld_size);
1869         pin_eld->info = eld->info;
1870
1871         /*
1872          * Re-setup pin and infoframe. This is needed e.g. when
1873          * - sink is first plugged-in
1874          * - transcoder can change during stream playback on Haswell
1875          *   and this can make HW reset converter selection on a pin.
1876          */
1877         if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1878                 if (is_haswell_plus(codec) || is_valleyview_plus(codec)) {
1879                         intel_verify_pin_cvt_connect(codec, per_pin);
1880                         intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
1881                                                      per_pin->mux_idx);
1882                 }
1883
1884                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1885         }
1886
1887         if (eld_changed)
1888                 snd_ctl_notify(codec->card,
1889                                SNDRV_CTL_EVENT_MASK_VALUE |
1890                                SNDRV_CTL_EVENT_MASK_INFO,
1891                                &per_pin->eld_ctl->id);
1892 }
1893
1894 /* update ELD and jack state via HD-audio verbs */
1895 static bool hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1896                                          int repoll)
1897 {
1898         struct hda_jack_tbl *jack;
1899         struct hda_codec *codec = per_pin->codec;
1900         struct hdmi_spec *spec = codec->spec;
1901         struct hdmi_eld *eld = &spec->temp_eld;
1902         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1903         hda_nid_t pin_nid = per_pin->pin_nid;
1904         /*
1905          * Always execute a GetPinSense verb here, even when called from
1906          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1907          * response's PD bit is not the real PD value, but indicates that
1908          * the real PD value changed. An older version of the HD-audio
1909          * specification worked this way. Hence, we just ignore the data in
1910          * the unsolicited response to avoid custom WARs.
1911          */
1912         int present;
1913         bool ret;
1914         bool do_repoll = false;
1915
1916         snd_hda_power_up_pm(codec);
1917         present = snd_hda_pin_sense(codec, pin_nid);
1918
1919         mutex_lock(&per_pin->lock);
1920         pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1921         if (pin_eld->monitor_present)
1922                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1923         else
1924                 eld->eld_valid = false;
1925
1926         codec_dbg(codec,
1927                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1928                 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1929
1930         if (eld->eld_valid) {
1931                 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1932                                                      &eld->eld_size) < 0)
1933                         eld->eld_valid = false;
1934                 else {
1935                         if (snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1936                                                     eld->eld_size) < 0)
1937                                 eld->eld_valid = false;
1938                 }
1939                 if (!eld->eld_valid && repoll)
1940                         do_repoll = true;
1941         }
1942
1943         if (do_repoll)
1944                 schedule_delayed_work(&per_pin->work, msecs_to_jiffies(300));
1945         else
1946                 update_eld(codec, per_pin, eld);
1947
1948         ret = !repoll || !pin_eld->monitor_present || pin_eld->eld_valid;
1949
1950         jack = snd_hda_jack_tbl_get(codec, pin_nid);
1951         if (jack)
1952                 jack->block_report = !ret;
1953
1954         mutex_unlock(&per_pin->lock);
1955         snd_hda_power_down_pm(codec);
1956         return ret;
1957 }
1958
1959 /* update ELD and jack state via audio component */
1960 static void sync_eld_via_acomp(struct hda_codec *codec,
1961                                struct hdmi_spec_per_pin *per_pin)
1962 {
1963         struct hdmi_spec *spec = codec->spec;
1964         struct hdmi_eld *eld = &spec->temp_eld;
1965         struct snd_jack *jack = NULL;
1966         int size;
1967
1968         mutex_lock(&per_pin->lock);
1969         size = snd_hdac_acomp_get_eld(&codec->bus->core, per_pin->pin_nid,
1970                                       &eld->monitor_present, eld->eld_buffer,
1971                                       ELD_MAX_SIZE);
1972         if (size < 0)
1973                 goto unlock;
1974         if (size > 0) {
1975                 size = min(size, ELD_MAX_SIZE);
1976                 if (snd_hdmi_parse_eld(codec, &eld->info,
1977                                        eld->eld_buffer, size) < 0)
1978                         size = -EINVAL;
1979         }
1980
1981         if (size > 0) {
1982                 eld->eld_valid = true;
1983                 eld->eld_size = size;
1984         } else {
1985                 eld->eld_valid = false;
1986                 eld->eld_size = 0;
1987         }
1988
1989         /* pcm_idx >=0 before update_eld() means it is in monitor
1990          * disconnected event. Jack must be fetched before update_eld()
1991          */
1992         if (per_pin->pcm_idx >= 0)
1993                 jack = spec->pcm_rec[per_pin->pcm_idx].jack;
1994         update_eld(codec, per_pin, eld);
1995         if (jack == NULL && per_pin->pcm_idx >= 0)
1996                 jack = spec->pcm_rec[per_pin->pcm_idx].jack;
1997         if (jack == NULL)
1998                 goto unlock;
1999         snd_jack_report(jack,
2000                         eld->monitor_present ? SND_JACK_AVOUT : 0);
2001  unlock:
2002         mutex_unlock(&per_pin->lock);
2003 }
2004
2005 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
2006 {
2007         struct hda_codec *codec = per_pin->codec;
2008         struct hdmi_spec *spec = codec->spec;
2009         int ret;
2010
2011         mutex_lock(&spec->pcm_lock);
2012         if (codec_has_acomp(codec)) {
2013                 sync_eld_via_acomp(codec, per_pin);
2014                 ret = false; /* don't call snd_hda_jack_report_sync() */
2015         } else {
2016                 ret = hdmi_present_sense_via_verbs(per_pin, repoll);
2017         }
2018         mutex_unlock(&spec->pcm_lock);
2019
2020         return ret;
2021 }
2022
2023 static void hdmi_repoll_eld(struct work_struct *work)
2024 {
2025         struct hdmi_spec_per_pin *per_pin =
2026         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
2027
2028         if (per_pin->repoll_count++ > 6)
2029                 per_pin->repoll_count = 0;
2030
2031         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
2032                 snd_hda_jack_report_sync(per_pin->codec);
2033 }
2034
2035 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2036                                              hda_nid_t nid);
2037
2038 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
2039 {
2040         struct hdmi_spec *spec = codec->spec;
2041         unsigned int caps, config;
2042         int pin_idx;
2043         struct hdmi_spec_per_pin *per_pin;
2044         int err;
2045
2046         caps = snd_hda_query_pin_caps(codec, pin_nid);
2047         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
2048                 return 0;
2049
2050         config = snd_hda_codec_get_pincfg(codec, pin_nid);
2051         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
2052                 return 0;
2053
2054         if (is_haswell_plus(codec))
2055                 intel_haswell_fixup_connect_list(codec, pin_nid);
2056
2057         pin_idx = spec->num_pins;
2058         per_pin = snd_array_new(&spec->pins);
2059         if (!per_pin)
2060                 return -ENOMEM;
2061
2062         per_pin->pin_nid = pin_nid;
2063         per_pin->non_pcm = false;
2064         if (spec->dyn_pcm_assign)
2065                 per_pin->pcm_idx = -1;
2066         else {
2067                 per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
2068                 per_pin->pcm_idx = pin_idx;
2069         }
2070         per_pin->pin_nid_idx = pin_idx;
2071
2072         err = hdmi_read_pin_conn(codec, pin_idx);
2073         if (err < 0)
2074                 return err;
2075
2076         spec->num_pins++;
2077
2078         return 0;
2079 }
2080
2081 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
2082 {
2083         struct hdmi_spec *spec = codec->spec;
2084         struct hdmi_spec_per_cvt *per_cvt;
2085         unsigned int chans;
2086         int err;
2087
2088         chans = get_wcaps(codec, cvt_nid);
2089         chans = get_wcaps_channels(chans);
2090
2091         per_cvt = snd_array_new(&spec->cvts);
2092         if (!per_cvt)
2093                 return -ENOMEM;
2094
2095         per_cvt->cvt_nid = cvt_nid;
2096         per_cvt->channels_min = 2;
2097         if (chans <= 16) {
2098                 per_cvt->channels_max = chans;
2099                 if (chans > spec->channels_max)
2100                         spec->channels_max = chans;
2101         }
2102
2103         err = snd_hda_query_supported_pcm(codec, cvt_nid,
2104                                           &per_cvt->rates,
2105                                           &per_cvt->formats,
2106                                           &per_cvt->maxbps);
2107         if (err < 0)
2108                 return err;
2109
2110         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
2111                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
2112         spec->num_cvts++;
2113
2114         return 0;
2115 }
2116
2117 static int hdmi_parse_codec(struct hda_codec *codec)
2118 {
2119         hda_nid_t nid;
2120         int i, nodes;
2121
2122         nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &nid);
2123         if (!nid || nodes < 0) {
2124                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
2125                 return -EINVAL;
2126         }
2127
2128         for (i = 0; i < nodes; i++, nid++) {
2129                 unsigned int caps;
2130                 unsigned int type;
2131
2132                 caps = get_wcaps(codec, nid);
2133                 type = get_wcaps_type(caps);
2134
2135                 if (!(caps & AC_WCAP_DIGITAL))
2136                         continue;
2137
2138                 switch (type) {
2139                 case AC_WID_AUD_OUT:
2140                         hdmi_add_cvt(codec, nid);
2141                         break;
2142                 case AC_WID_PIN:
2143                         hdmi_add_pin(codec, nid);
2144                         break;
2145                 }
2146         }
2147
2148         return 0;
2149 }
2150
2151 /*
2152  */
2153 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
2154 {
2155         struct hda_spdif_out *spdif;
2156         bool non_pcm;
2157
2158         mutex_lock(&codec->spdif_mutex);
2159         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
2160         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
2161         mutex_unlock(&codec->spdif_mutex);
2162         return non_pcm;
2163 }
2164
2165 /*
2166  * HDMI callbacks
2167  */
2168
2169 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2170                                            struct hda_codec *codec,
2171                                            unsigned int stream_tag,
2172                                            unsigned int format,
2173                                            struct snd_pcm_substream *substream)
2174 {
2175         hda_nid_t cvt_nid = hinfo->nid;
2176         struct hdmi_spec *spec = codec->spec;
2177         int pin_idx;
2178         struct hdmi_spec_per_pin *per_pin;
2179         hda_nid_t pin_nid;
2180         struct snd_pcm_runtime *runtime = substream->runtime;
2181         bool non_pcm;
2182         int pinctl;
2183         int err;
2184
2185         mutex_lock(&spec->pcm_lock);
2186         pin_idx = hinfo_to_pin_index(codec, hinfo);
2187         if (spec->dyn_pcm_assign && pin_idx < 0) {
2188                 /* when dyn_pcm_assign and pcm is not bound to a pin
2189                  * skip pin setup and return 0 to make audio playback
2190                  * be ongoing
2191                  */
2192                 intel_not_share_assigned_cvt_nid(codec, 0, cvt_nid);
2193                 snd_hda_codec_setup_stream(codec, cvt_nid,
2194                                         stream_tag, 0, format);
2195                 mutex_unlock(&spec->pcm_lock);
2196                 return 0;
2197         }
2198
2199         if (snd_BUG_ON(pin_idx < 0)) {
2200                 mutex_unlock(&spec->pcm_lock);
2201                 return -EINVAL;
2202         }
2203         per_pin = get_pin(spec, pin_idx);
2204         pin_nid = per_pin->pin_nid;
2205         if (is_haswell_plus(codec) || is_valleyview_plus(codec)) {
2206                 /* Verify pin:cvt selections to avoid silent audio after S3.
2207                  * After S3, the audio driver restores pin:cvt selections
2208                  * but this can happen before gfx is ready and such selection
2209                  * is overlooked by HW. Thus multiple pins can share a same
2210                  * default convertor and mute control will affect each other,
2211                  * which can cause a resumed audio playback become silent
2212                  * after S3.
2213                  */
2214                 intel_verify_pin_cvt_connect(codec, per_pin);
2215                 intel_not_share_assigned_cvt(codec, pin_nid, per_pin->mux_idx);
2216         }
2217
2218         /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
2219         /* Todo: add DP1.2 MST audio support later */
2220         snd_hdac_sync_audio_rate(&codec->bus->core, pin_nid, runtime->rate);
2221
2222         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
2223         mutex_lock(&per_pin->lock);
2224         per_pin->channels = substream->runtime->channels;
2225         per_pin->setup = true;
2226
2227         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
2228         mutex_unlock(&per_pin->lock);
2229         if (spec->dyn_pin_out) {
2230                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
2231                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2232                 snd_hda_codec_write(codec, pin_nid, 0,
2233                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
2234                                     pinctl | PIN_OUT);
2235         }
2236
2237         err = spec->ops.setup_stream(codec, cvt_nid, pin_nid,
2238                                  stream_tag, format);
2239         mutex_unlock(&spec->pcm_lock);
2240         return err;
2241 }
2242
2243 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2244                                              struct hda_codec *codec,
2245                                              struct snd_pcm_substream *substream)
2246 {
2247         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
2248         return 0;
2249 }
2250
2251 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
2252                           struct hda_codec *codec,
2253                           struct snd_pcm_substream *substream)
2254 {
2255         struct hdmi_spec *spec = codec->spec;
2256         int cvt_idx, pin_idx, pcm_idx;
2257         struct hdmi_spec_per_cvt *per_cvt;
2258         struct hdmi_spec_per_pin *per_pin;
2259         int pinctl;
2260
2261         if (hinfo->nid) {
2262                 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
2263                 if (snd_BUG_ON(pcm_idx < 0))
2264                         return -EINVAL;
2265                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
2266                 if (snd_BUG_ON(cvt_idx < 0))
2267                         return -EINVAL;
2268                 per_cvt = get_cvt(spec, cvt_idx);
2269
2270                 snd_BUG_ON(!per_cvt->assigned);
2271                 per_cvt->assigned = 0;
2272                 hinfo->nid = 0;
2273
2274                 mutex_lock(&spec->pcm_lock);
2275                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2276                 clear_bit(pcm_idx, &spec->pcm_in_use);
2277                 pin_idx = hinfo_to_pin_index(codec, hinfo);
2278                 if (spec->dyn_pcm_assign && pin_idx < 0) {
2279                         mutex_unlock(&spec->pcm_lock);
2280                         return 0;
2281                 }
2282
2283                 if (snd_BUG_ON(pin_idx < 0)) {
2284                         mutex_unlock(&spec->pcm_lock);
2285                         return -EINVAL;
2286                 }
2287                 per_pin = get_pin(spec, pin_idx);
2288
2289                 if (spec->dyn_pin_out) {
2290                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
2291                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2292                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
2293                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
2294                                             pinctl & ~PIN_OUT);
2295                 }
2296
2297                 mutex_lock(&per_pin->lock);
2298                 per_pin->chmap_set = false;
2299                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
2300
2301                 per_pin->setup = false;
2302                 per_pin->channels = 0;
2303                 mutex_unlock(&per_pin->lock);
2304                 mutex_unlock(&spec->pcm_lock);
2305         }
2306
2307         return 0;
2308 }
2309
2310 static const struct hda_pcm_ops generic_ops = {
2311         .open = hdmi_pcm_open,
2312         .close = hdmi_pcm_close,
2313         .prepare = generic_hdmi_playback_pcm_prepare,
2314         .cleanup = generic_hdmi_playback_pcm_cleanup,
2315 };
2316
2317 /*
2318  * ALSA API channel-map control callbacks
2319  */
2320 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
2321                                struct snd_ctl_elem_info *uinfo)
2322 {
2323         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
2324         struct hda_codec *codec = info->private_data;
2325         struct hdmi_spec *spec = codec->spec;
2326         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2327         uinfo->count = spec->channels_max;
2328         uinfo->value.integer.min = 0;
2329         uinfo->value.integer.max = SNDRV_CHMAP_LAST;
2330         return 0;
2331 }
2332
2333 static int hdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
2334                                                   int channels)
2335 {
2336         /* If the speaker allocation matches the channel count, it is OK.*/
2337         if (cap->channels != channels)
2338                 return -1;
2339
2340         /* all channels are remappable freely */
2341         return SNDRV_CTL_TLVT_CHMAP_VAR;
2342 }
2343
2344 static void hdmi_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
2345                                         unsigned int *chmap, int channels)
2346 {
2347         int count = 0;
2348         int c;
2349
2350         for (c = 7; c >= 0; c--) {
2351                 int spk = cap->speakers[c];
2352                 if (!spk)
2353                         continue;
2354
2355                 chmap[count++] = spk_to_chmap(spk);
2356         }
2357
2358         WARN_ON(count != channels);
2359 }
2360
2361 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
2362                               unsigned int size, unsigned int __user *tlv)
2363 {
2364         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
2365         struct hda_codec *codec = info->private_data;
2366         struct hdmi_spec *spec = codec->spec;
2367         unsigned int __user *dst;
2368         int chs, count = 0;
2369
2370         if (size < 8)
2371                 return -ENOMEM;
2372         if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
2373                 return -EFAULT;
2374         size -= 8;
2375         dst = tlv + 2;
2376         for (chs = 2; chs <= spec->channels_max; chs++) {
2377                 int i;
2378                 struct cea_channel_speaker_allocation *cap;
2379                 cap = channel_allocations;
2380                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
2381                         int chs_bytes = chs * 4;
2382                         int type = spec->ops.chmap_cea_alloc_validate_get_type(cap, chs);
2383                         unsigned int tlv_chmap[8];
2384
2385                         if (type < 0)
2386                                 continue;
2387                         if (size < 8)
2388                                 return -ENOMEM;
2389                         if (put_user(type, dst) ||
2390                             put_user(chs_bytes, dst + 1))
2391                                 return -EFAULT;
2392                         dst += 2;
2393                         size -= 8;
2394                         count += 8;
2395                         if (size < chs_bytes)
2396                                 return -ENOMEM;
2397                         size -= chs_bytes;
2398                         count += chs_bytes;
2399                         spec->ops.cea_alloc_to_tlv_chmap(cap, tlv_chmap, chs);
2400                         if (copy_to_user(dst, tlv_chmap, chs_bytes))
2401                                 return -EFAULT;
2402                         dst += chs;
2403                 }
2404         }
2405         if (put_user(count, tlv + 1))
2406                 return -EFAULT;
2407         return 0;
2408 }
2409
2410 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
2411                               struct snd_ctl_elem_value *ucontrol)
2412 {
2413         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
2414         struct hda_codec *codec = info->private_data;
2415         struct hdmi_spec *spec = codec->spec;
2416         int pcm_idx = kcontrol->private_value;
2417         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2418         int i;
2419
2420         if (!per_pin) {
2421                 for (i = 0; i < spec->channels_max; i++)
2422                         ucontrol->value.integer.value[i] = 0;
2423                 return 0;
2424         }
2425
2426         for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
2427                 ucontrol->value.integer.value[i] = per_pin->chmap[i];
2428         return 0;
2429 }
2430
2431 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
2432                               struct snd_ctl_elem_value *ucontrol)
2433 {
2434         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
2435         struct hda_codec *codec = info->private_data;
2436         struct hdmi_spec *spec = codec->spec;
2437         int pcm_idx = kcontrol->private_value;
2438         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2439         unsigned int ctl_idx;
2440         struct snd_pcm_substream *substream;
2441         unsigned char chmap[8];
2442         int i, err, ca, prepared = 0;
2443
2444         /* No monitor is connected in dyn_pcm_assign.
2445          * It's invalid to setup the chmap
2446          */
2447         if (!per_pin)
2448                 return 0;
2449
2450         ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2451         substream = snd_pcm_chmap_substream(info, ctl_idx);
2452         if (!substream || !substream->runtime)
2453                 return 0; /* just for avoiding error from alsactl restore */
2454         switch (substream->runtime->status->state) {
2455         case SNDRV_PCM_STATE_OPEN:
2456         case SNDRV_PCM_STATE_SETUP:
2457                 break;
2458         case SNDRV_PCM_STATE_PREPARED:
2459                 prepared = 1;
2460                 break;
2461         default:
2462                 return -EBUSY;
2463         }
2464         memset(chmap, 0, sizeof(chmap));
2465         for (i = 0; i < ARRAY_SIZE(chmap); i++)
2466                 chmap[i] = ucontrol->value.integer.value[i];
2467         if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
2468                 return 0;
2469         ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
2470         if (ca < 0)
2471                 return -EINVAL;
2472         if (spec->ops.chmap_validate) {
2473                 err = spec->ops.chmap_validate(ca, ARRAY_SIZE(chmap), chmap);
2474                 if (err)
2475                         return err;
2476         }
2477         mutex_lock(&per_pin->lock);
2478         per_pin->chmap_set = true;
2479         memcpy(per_pin->chmap, chmap, sizeof(chmap));
2480         if (prepared)
2481                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2482         mutex_unlock(&per_pin->lock);
2483
2484         return 0;
2485 }
2486
2487 static int generic_hdmi_build_pcms(struct hda_codec *codec)
2488 {
2489         struct hdmi_spec *spec = codec->spec;
2490         int pin_idx;
2491
2492         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2493                 struct hda_pcm *info;
2494                 struct hda_pcm_stream *pstr;
2495
2496                 info = snd_hda_codec_pcm_new(codec, "HDMI %d", pin_idx);
2497                 if (!info)
2498                         return -ENOMEM;
2499
2500                 spec->pcm_rec[pin_idx].pcm = info;
2501                 spec->pcm_used++;
2502                 info->pcm_type = HDA_PCM_TYPE_HDMI;
2503                 info->own_chmap = true;
2504
2505                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2506                 pstr->substreams = 1;
2507                 pstr->ops = generic_ops;
2508                 /* other pstr fields are set in open */
2509         }
2510
2511         return 0;
2512 }
2513
2514 static void free_hdmi_jack_priv(struct snd_jack *jack)
2515 {
2516         struct hdmi_pcm *pcm = jack->private_data;
2517
2518         pcm->jack = NULL;
2519 }
2520
2521 static int add_hdmi_jack_kctl(struct hda_codec *codec,
2522                                struct hdmi_spec *spec,
2523                                int pcm_idx,
2524                                const char *name)
2525 {
2526         struct snd_jack *jack;
2527         int err;
2528
2529         err = snd_jack_new(codec->card, name, SND_JACK_AVOUT, &jack,
2530                            true, false);
2531         if (err < 0)
2532                 return err;
2533
2534         spec->pcm_rec[pcm_idx].jack = jack;
2535         jack->private_data = &spec->pcm_rec[pcm_idx];
2536         jack->private_free = free_hdmi_jack_priv;
2537         return 0;
2538 }
2539
2540 static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx)
2541 {
2542         char hdmi_str[32] = "HDMI/DP";
2543         struct hdmi_spec *spec = codec->spec;
2544         struct hdmi_spec_per_pin *per_pin;
2545         struct hda_jack_tbl *jack;
2546         int pcmdev = get_pcm_rec(spec, pcm_idx)->device;
2547         bool phantom_jack;
2548         int ret;
2549
2550         if (pcmdev > 0)
2551                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2552
2553         if (spec->dyn_pcm_assign)
2554                 return add_hdmi_jack_kctl(codec, spec, pcm_idx, hdmi_str);
2555
2556         /* for !dyn_pcm_assign, we still use hda_jack for compatibility */
2557         /* if !dyn_pcm_assign, it must be non-MST mode.
2558          * This means pcms and pins are statically mapped.
2559          * And pcm_idx is pin_idx.
2560          */
2561         per_pin = get_pin(spec, pcm_idx);
2562         phantom_jack = !is_jack_detectable(codec, per_pin->pin_nid);
2563         if (phantom_jack)
2564                 strncat(hdmi_str, " Phantom",
2565                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2566         ret = snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str,
2567                                     phantom_jack);
2568         if (ret < 0)
2569                 return ret;
2570         jack = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
2571         if (jack == NULL)
2572                 return 0;
2573         /* assign jack->jack to pcm_rec[].jack to
2574          * align with dyn_pcm_assign mode
2575          */
2576         spec->pcm_rec[pcm_idx].jack = jack->jack;
2577         return 0;
2578 }
2579
2580 static int generic_hdmi_build_controls(struct hda_codec *codec)
2581 {
2582         struct hdmi_spec *spec = codec->spec;
2583         int err;
2584         int pin_idx, pcm_idx;
2585
2586
2587         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2588                 err = generic_hdmi_build_jack(codec, pcm_idx);
2589                 if (err < 0)
2590                         return err;
2591
2592                 /* create the spdif for each pcm
2593                  * pin will be bound when monitor is connected
2594                  */
2595                 if (spec->dyn_pcm_assign)
2596                         err = snd_hda_create_dig_out_ctls(codec,
2597                                           0, spec->cvt_nids[0],
2598                                           HDA_PCM_TYPE_HDMI);
2599                 else {
2600                         struct hdmi_spec_per_pin *per_pin =
2601                                 get_pin(spec, pcm_idx);
2602                         err = snd_hda_create_dig_out_ctls(codec,
2603                                                   per_pin->pin_nid,
2604                                                   per_pin->mux_nids[0],
2605                                                   HDA_PCM_TYPE_HDMI);
2606                 }
2607                 if (err < 0)
2608                         return err;
2609                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2610         }
2611
2612         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2613                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2614
2615                 /* add control for ELD Bytes */
2616                 err = hdmi_create_eld_ctl(codec, pin_idx,
2617                                 get_pcm_rec(spec, pin_idx)->device);
2618
2619                 if (err < 0)
2620                         return err;
2621
2622                 hdmi_present_sense(per_pin, 0);
2623         }
2624
2625         /* add channel maps */
2626         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2627                 struct hda_pcm *pcm;
2628                 struct snd_pcm_chmap *chmap;
2629                 struct snd_kcontrol *kctl;
2630                 int i;
2631
2632                 pcm = get_pcm_rec(spec, pcm_idx);
2633                 if (!pcm || !pcm->pcm)
2634                         break;
2635                 err = snd_pcm_add_chmap_ctls(pcm->pcm,
2636                                              SNDRV_PCM_STREAM_PLAYBACK,
2637                                              NULL, 0, pcm_idx, &chmap);
2638                 if (err < 0)
2639                         return err;
2640                 /* override handlers */
2641                 chmap->private_data = codec;
2642                 kctl = chmap->kctl;
2643                 for (i = 0; i < kctl->count; i++)
2644                         kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
2645                 kctl->info = hdmi_chmap_ctl_info;
2646                 kctl->get = hdmi_chmap_ctl_get;
2647                 kctl->put = hdmi_chmap_ctl_put;
2648                 kctl->tlv.c = hdmi_chmap_ctl_tlv;
2649         }
2650
2651         return 0;
2652 }
2653
2654 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2655 {
2656         struct hdmi_spec *spec = codec->spec;
2657         int pin_idx;
2658
2659         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2660                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2661
2662                 per_pin->codec = codec;
2663                 mutex_init(&per_pin->lock);
2664                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2665                 eld_proc_new(per_pin, pin_idx);
2666         }
2667         return 0;
2668 }
2669
2670 static int generic_hdmi_init(struct hda_codec *codec)
2671 {
2672         struct hdmi_spec *spec = codec->spec;
2673         int pin_idx;
2674
2675         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2676                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2677                 hda_nid_t pin_nid = per_pin->pin_nid;
2678
2679                 hdmi_init_pin(codec, pin_nid);
2680                 if (!codec_has_acomp(codec))
2681                         snd_hda_jack_detect_enable_callback(codec, pin_nid,
2682                                 codec->jackpoll_interval > 0 ?
2683                                 jack_callback : NULL);
2684         }
2685         return 0;
2686 }
2687
2688 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2689 {
2690         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2691         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2692 }
2693
2694 static void hdmi_array_free(struct hdmi_spec *spec)
2695 {
2696         snd_array_free(&spec->pins);
2697         snd_array_free(&spec->cvts);
2698 }
2699
2700 static void generic_hdmi_free(struct hda_codec *codec)
2701 {
2702         struct hdmi_spec *spec = codec->spec;
2703         int pin_idx, pcm_idx;
2704
2705         if (codec_has_acomp(codec))
2706                 snd_hdac_i915_register_notifier(NULL);
2707
2708         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2709                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2710                 cancel_delayed_work_sync(&per_pin->work);
2711                 eld_proc_free(per_pin);
2712         }
2713
2714         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2715                 if (spec->pcm_rec[pcm_idx].jack == NULL)
2716                         continue;
2717                 if (spec->dyn_pcm_assign)
2718                         snd_device_free(codec->card,
2719                                         spec->pcm_rec[pcm_idx].jack);
2720                 else
2721                         spec->pcm_rec[pcm_idx].jack = NULL;
2722         }
2723
2724         if (spec->i915_bound)
2725                 snd_hdac_i915_exit(&codec->bus->core);
2726         hdmi_array_free(spec);
2727         kfree(spec);
2728 }
2729
2730 #ifdef CONFIG_PM
2731 static int generic_hdmi_resume(struct hda_codec *codec)
2732 {
2733         struct hdmi_spec *spec = codec->spec;
2734         int pin_idx;
2735
2736         codec->patch_ops.init(codec);
2737         regcache_sync(codec->core.regmap);
2738
2739         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2740                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2741                 hdmi_present_sense(per_pin, 1);
2742         }
2743         return 0;
2744 }
2745 #endif
2746
2747 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2748         .init                   = generic_hdmi_init,
2749         .free                   = generic_hdmi_free,
2750         .build_pcms             = generic_hdmi_build_pcms,
2751         .build_controls         = generic_hdmi_build_controls,
2752         .unsol_event            = hdmi_unsol_event,
2753 #ifdef CONFIG_PM
2754         .resume                 = generic_hdmi_resume,
2755 #endif
2756 };
2757
2758 static const struct hdmi_ops generic_standard_hdmi_ops = {
2759         .pin_get_eld                            = snd_hdmi_get_eld,
2760         .pin_get_slot_channel                   = hdmi_pin_get_slot_channel,
2761         .pin_set_slot_channel                   = hdmi_pin_set_slot_channel,
2762         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2763         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2764         .setup_stream                           = hdmi_setup_stream,
2765         .chmap_cea_alloc_validate_get_type      = hdmi_chmap_cea_alloc_validate_get_type,
2766         .cea_alloc_to_tlv_chmap                 = hdmi_cea_alloc_to_tlv_chmap,
2767 };
2768
2769
2770 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2771                                              hda_nid_t nid)
2772 {
2773         struct hdmi_spec *spec = codec->spec;
2774         hda_nid_t conns[4];
2775         int nconns;
2776
2777         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2778         if (nconns == spec->num_cvts &&
2779             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2780                 return;
2781
2782         /* override pins connection list */
2783         codec_dbg(codec, "hdmi: haswell: override pin connection 0x%x\n", nid);
2784         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2785 }
2786
2787 #define INTEL_VENDOR_NID 0x08
2788 #define INTEL_GET_VENDOR_VERB 0xf81
2789 #define INTEL_SET_VENDOR_VERB 0x781
2790 #define INTEL_EN_DP12                   0x02 /* enable DP 1.2 features */
2791 #define INTEL_EN_ALL_PIN_CVTS   0x01 /* enable 2nd & 3rd pins and convertors */
2792
2793 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2794                                           bool update_tree)
2795 {
2796         unsigned int vendor_param;
2797
2798         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2799                                 INTEL_GET_VENDOR_VERB, 0);
2800         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2801                 return;
2802
2803         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2804         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2805                                 INTEL_SET_VENDOR_VERB, vendor_param);
2806         if (vendor_param == -1)
2807                 return;
2808
2809         if (update_tree)
2810                 snd_hda_codec_update_widgets(codec);
2811 }
2812
2813 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2814 {
2815         unsigned int vendor_param;
2816
2817         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2818                                 INTEL_GET_VENDOR_VERB, 0);
2819         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2820                 return;
2821
2822         /* enable DP1.2 mode */
2823         vendor_param |= INTEL_EN_DP12;
2824         snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2825         snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
2826                                 INTEL_SET_VENDOR_VERB, vendor_param);
2827 }
2828
2829 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2830  * Otherwise you may get severe h/w communication errors.
2831  */
2832 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2833                                 unsigned int power_state)
2834 {
2835         if (power_state == AC_PWRST_D0) {
2836                 intel_haswell_enable_all_pins(codec, false);
2837                 intel_haswell_fixup_enable_dp12(codec);
2838         }
2839
2840         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2841         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2842 }
2843
2844 static void intel_pin_eld_notify(void *audio_ptr, int port)
2845 {
2846         struct hda_codec *codec = audio_ptr;
2847         int pin_nid = port + 0x04;
2848
2849         /* skip notification during system suspend (but not in runtime PM);
2850          * the state will be updated at resume
2851          */
2852         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2853                 return;
2854         /* ditto during suspend/resume process itself */
2855         if (atomic_read(&(codec)->core.in_pm))
2856                 return;
2857
2858         check_presence_and_report(codec, pin_nid);
2859 }
2860
2861 static int patch_generic_hdmi(struct hda_codec *codec)
2862 {
2863         struct hdmi_spec *spec;
2864
2865         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2866         if (spec == NULL)
2867                 return -ENOMEM;
2868
2869         spec->ops = generic_standard_hdmi_ops;
2870         mutex_init(&spec->pcm_lock);
2871         codec->spec = spec;
2872         hdmi_array_init(spec, 4);
2873
2874         /* Try to bind with i915 for any Intel codecs (if not done yet) */
2875         if (!codec_has_acomp(codec) &&
2876             (codec->core.vendor_id >> 16) == 0x8086)
2877                 if (!snd_hdac_i915_init(&codec->bus->core))
2878                         spec->i915_bound = true;
2879
2880         if (is_haswell_plus(codec)) {
2881                 intel_haswell_enable_all_pins(codec, true);
2882                 intel_haswell_fixup_enable_dp12(codec);
2883         }
2884
2885         /* For Valleyview/Cherryview, only the display codec is in the display
2886          * power well and can use link_power ops to request/release the power.
2887          * For Haswell/Broadwell, the controller is also in the power well and
2888          * can cover the codec power request, and so need not set this flag.
2889          * For previous platforms, there is no such power well feature.
2890          */
2891         if (is_valleyview_plus(codec) || is_skylake(codec) ||
2892                         is_broxton(codec))
2893                 codec->core.link_power_control = 1;
2894
2895         if (codec_has_acomp(codec)) {
2896                 codec->depop_delay = 0;
2897                 spec->i915_audio_ops.audio_ptr = codec;
2898                 spec->i915_audio_ops.pin_eld_notify = intel_pin_eld_notify;
2899                 snd_hdac_i915_register_notifier(&spec->i915_audio_ops);
2900         }
2901
2902         if (hdmi_parse_codec(codec) < 0) {
2903                 if (spec->i915_bound)
2904                         snd_hdac_i915_exit(&codec->bus->core);
2905                 codec->spec = NULL;
2906                 kfree(spec);
2907                 return -EINVAL;
2908         }
2909         codec->patch_ops = generic_hdmi_patch_ops;
2910         if (is_haswell_plus(codec)) {
2911                 codec->patch_ops.set_power_state = haswell_set_power_state;
2912                 codec->dp_mst = true;
2913         }
2914
2915         /* Enable runtime pm for HDMI audio codec of HSW/BDW/SKL/BYT/BSW */
2916         if (is_haswell_plus(codec) || is_valleyview_plus(codec))
2917                 codec->auto_runtime_pm = 1;
2918
2919         generic_hdmi_init_per_pins(codec);
2920
2921         init_channel_allocations();
2922
2923         WARN_ON(spec->dyn_pcm_assign && !codec_has_acomp(codec));
2924         return 0;
2925 }
2926
2927 /*
2928  * Shared non-generic implementations
2929  */
2930
2931 static int simple_playback_build_pcms(struct hda_codec *codec)
2932 {
2933         struct hdmi_spec *spec = codec->spec;
2934         struct hda_pcm *info;
2935         unsigned int chans;
2936         struct hda_pcm_stream *pstr;
2937         struct hdmi_spec_per_cvt *per_cvt;
2938
2939         per_cvt = get_cvt(spec, 0);
2940         chans = get_wcaps(codec, per_cvt->cvt_nid);
2941         chans = get_wcaps_channels(chans);
2942
2943         info = snd_hda_codec_pcm_new(codec, "HDMI 0");
2944         if (!info)
2945                 return -ENOMEM;
2946         spec->pcm_rec[0].pcm = info;
2947         info->pcm_type = HDA_PCM_TYPE_HDMI;
2948         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2949         *pstr = spec->pcm_playback;
2950         pstr->nid = per_cvt->cvt_nid;
2951         if (pstr->channels_max <= 2 && chans && chans <= 16)
2952                 pstr->channels_max = chans;
2953
2954         return 0;
2955 }
2956
2957 /* unsolicited event for jack sensing */
2958 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2959                                     unsigned int res)
2960 {
2961         snd_hda_jack_set_dirty_all(codec);
2962         snd_hda_jack_report_sync(codec);
2963 }
2964
2965 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2966  * as long as spec->pins[] is set correctly
2967  */
2968 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2969
2970 static int simple_playback_build_controls(struct hda_codec *codec)
2971 {
2972         struct hdmi_spec *spec = codec->spec;
2973         struct hdmi_spec_per_cvt *per_cvt;
2974         int err;
2975
2976         per_cvt = get_cvt(spec, 0);
2977         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2978                                           per_cvt->cvt_nid,
2979                                           HDA_PCM_TYPE_HDMI);
2980         if (err < 0)
2981                 return err;
2982         return simple_hdmi_build_jack(codec, 0);
2983 }
2984
2985 static int simple_playback_init(struct hda_codec *codec)
2986 {
2987         struct hdmi_spec *spec = codec->spec;
2988         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2989         hda_nid_t pin = per_pin->pin_nid;
2990
2991         snd_hda_codec_write(codec, pin, 0,
2992                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2993         /* some codecs require to unmute the pin */
2994         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2995                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2996                                     AMP_OUT_UNMUTE);
2997         snd_hda_jack_detect_enable(codec, pin);
2998         return 0;
2999 }
3000
3001 static void simple_playback_free(struct hda_codec *codec)
3002 {
3003         struct hdmi_spec *spec = codec->spec;
3004
3005         hdmi_array_free(spec);
3006         kfree(spec);
3007 }
3008
3009 /*
3010  * Nvidia specific implementations
3011  */
3012
3013 #define Nv_VERB_SET_Channel_Allocation          0xF79
3014 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
3015 #define Nv_VERB_SET_Audio_Protection_On         0xF98
3016 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
3017
3018 #define nvhdmi_master_con_nid_7x        0x04
3019 #define nvhdmi_master_pin_nid_7x        0x05
3020
3021 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
3022         /*front, rear, clfe, rear_surr */
3023         0x6, 0x8, 0xa, 0xc,
3024 };
3025
3026 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
3027         /* set audio protect on */
3028         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3029         /* enable digital output on pin widget */
3030         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3031         {} /* terminator */
3032 };
3033
3034 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
3035         /* set audio protect on */
3036         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3037         /* enable digital output on pin widget */
3038         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3039         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3040         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3041         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3042         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3043         {} /* terminator */
3044 };
3045
3046 #ifdef LIMITED_RATE_FMT_SUPPORT
3047 /* support only the safe format and rate */
3048 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
3049 #define SUPPORTED_MAXBPS        16
3050 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
3051 #else
3052 /* support all rates and formats */
3053 #define SUPPORTED_RATES \
3054         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
3055         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
3056          SNDRV_PCM_RATE_192000)
3057 #define SUPPORTED_MAXBPS        24
3058 #define SUPPORTED_FORMATS \
3059         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
3060 #endif
3061
3062 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
3063 {
3064         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
3065         return 0;
3066 }
3067
3068 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
3069 {
3070         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
3071         return 0;
3072 }
3073
3074 static unsigned int channels_2_6_8[] = {
3075         2, 6, 8
3076 };
3077
3078 static unsigned int channels_2_8[] = {
3079         2, 8
3080 };
3081
3082 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
3083         .count = ARRAY_SIZE(channels_2_6_8),
3084         .list = channels_2_6_8,
3085         .mask = 0,
3086 };
3087
3088 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
3089         .count = ARRAY_SIZE(channels_2_8),
3090         .list = channels_2_8,
3091         .mask = 0,
3092 };
3093
3094 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
3095                                     struct hda_codec *codec,
3096                                     struct snd_pcm_substream *substream)
3097 {
3098         struct hdmi_spec *spec = codec->spec;
3099         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
3100
3101         switch (codec->preset->vendor_id) {
3102         case 0x10de0002:
3103         case 0x10de0003:
3104         case 0x10de0005:
3105         case 0x10de0006:
3106                 hw_constraints_channels = &hw_constraints_2_8_channels;
3107                 break;
3108         case 0x10de0007:
3109                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
3110                 break;
3111         default:
3112                 break;
3113         }
3114
3115         if (hw_constraints_channels != NULL) {
3116                 snd_pcm_hw_constraint_list(substream->runtime, 0,
3117                                 SNDRV_PCM_HW_PARAM_CHANNELS,
3118                                 hw_constraints_channels);
3119         } else {
3120                 snd_pcm_hw_constraint_step(substream->runtime, 0,
3121                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
3122         }
3123
3124         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
3125 }
3126
3127 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
3128                                      struct hda_codec *codec,
3129                                      struct snd_pcm_substream *substream)
3130 {
3131         struct hdmi_spec *spec = codec->spec;
3132         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3133 }
3134
3135 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
3136                                        struct hda_codec *codec,
3137                                        unsigned int stream_tag,
3138                                        unsigned int format,
3139                                        struct snd_pcm_substream *substream)
3140 {
3141         struct hdmi_spec *spec = codec->spec;
3142         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
3143                                              stream_tag, format, substream);
3144 }
3145
3146 static const struct hda_pcm_stream simple_pcm_playback = {
3147         .substreams = 1,
3148         .channels_min = 2,
3149         .channels_max = 2,
3150         .ops = {
3151                 .open = simple_playback_pcm_open,
3152                 .close = simple_playback_pcm_close,
3153                 .prepare = simple_playback_pcm_prepare
3154         },
3155 };
3156
3157 static const struct hda_codec_ops simple_hdmi_patch_ops = {
3158         .build_controls = simple_playback_build_controls,
3159         .build_pcms = simple_playback_build_pcms,
3160         .init = simple_playback_init,
3161         .free = simple_playback_free,
3162         .unsol_event = simple_hdmi_unsol_event,
3163 };
3164
3165 static int patch_simple_hdmi(struct hda_codec *codec,
3166                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
3167 {
3168         struct hdmi_spec *spec;
3169         struct hdmi_spec_per_cvt *per_cvt;
3170         struct hdmi_spec_per_pin *per_pin;
3171
3172         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3173         if (!spec)
3174                 return -ENOMEM;
3175
3176         codec->spec = spec;
3177         hdmi_array_init(spec, 1);
3178
3179         spec->multiout.num_dacs = 0;  /* no analog */
3180         spec->multiout.max_channels = 2;
3181         spec->multiout.dig_out_nid = cvt_nid;
3182         spec->num_cvts = 1;
3183         spec->num_pins = 1;
3184         per_pin = snd_array_new(&spec->pins);
3185         per_cvt = snd_array_new(&spec->cvts);
3186         if (!per_pin || !per_cvt) {
3187                 simple_playback_free(codec);
3188                 return -ENOMEM;
3189         }
3190         per_cvt->cvt_nid = cvt_nid;
3191         per_pin->pin_nid = pin_nid;
3192         spec->pcm_playback = simple_pcm_playback;
3193
3194         codec->patch_ops = simple_hdmi_patch_ops;
3195
3196         return 0;
3197 }
3198
3199 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
3200                                                     int channels)
3201 {
3202         unsigned int chanmask;
3203         int chan = channels ? (channels - 1) : 1;
3204
3205         switch (channels) {
3206         default:
3207         case 0:
3208         case 2:
3209                 chanmask = 0x00;
3210                 break;
3211         case 4:
3212                 chanmask = 0x08;
3213                 break;
3214         case 6:
3215                 chanmask = 0x0b;
3216                 break;
3217         case 8:
3218                 chanmask = 0x13;
3219                 break;
3220         }
3221
3222         /* Set the audio infoframe channel allocation and checksum fields.  The
3223          * channel count is computed implicitly by the hardware. */
3224         snd_hda_codec_write(codec, 0x1, 0,
3225                         Nv_VERB_SET_Channel_Allocation, chanmask);
3226
3227         snd_hda_codec_write(codec, 0x1, 0,
3228                         Nv_VERB_SET_Info_Frame_Checksum,
3229                         (0x71 - chan - chanmask));
3230 }
3231
3232 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
3233                                    struct hda_codec *codec,
3234                                    struct snd_pcm_substream *substream)
3235 {
3236         struct hdmi_spec *spec = codec->spec;
3237         int i;
3238
3239         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
3240                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
3241         for (i = 0; i < 4; i++) {
3242                 /* set the stream id */
3243                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3244                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
3245                 /* set the stream format */
3246                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3247                                 AC_VERB_SET_STREAM_FORMAT, 0);
3248         }
3249
3250         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
3251          * streams are disabled. */
3252         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3253
3254         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3255 }
3256
3257 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
3258                                      struct hda_codec *codec,
3259                                      unsigned int stream_tag,
3260                                      unsigned int format,
3261                                      struct snd_pcm_substream *substream)
3262 {
3263         int chs;
3264         unsigned int dataDCC2, channel_id;
3265         int i;
3266         struct hdmi_spec *spec = codec->spec;
3267         struct hda_spdif_out *spdif;
3268         struct hdmi_spec_per_cvt *per_cvt;
3269
3270         mutex_lock(&codec->spdif_mutex);
3271         per_cvt = get_cvt(spec, 0);
3272         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
3273
3274         chs = substream->runtime->channels;
3275
3276         dataDCC2 = 0x2;
3277
3278         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
3279         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
3280                 snd_hda_codec_write(codec,
3281                                 nvhdmi_master_con_nid_7x,
3282                                 0,
3283                                 AC_VERB_SET_DIGI_CONVERT_1,
3284                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3285
3286         /* set the stream id */
3287         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3288                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
3289
3290         /* set the stream format */
3291         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3292                         AC_VERB_SET_STREAM_FORMAT, format);
3293
3294         /* turn on again (if needed) */
3295         /* enable and set the channel status audio/data flag */
3296         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
3297                 snd_hda_codec_write(codec,
3298                                 nvhdmi_master_con_nid_7x,
3299                                 0,
3300                                 AC_VERB_SET_DIGI_CONVERT_1,
3301                                 spdif->ctls & 0xff);
3302                 snd_hda_codec_write(codec,
3303                                 nvhdmi_master_con_nid_7x,
3304                                 0,
3305                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3306         }
3307
3308         for (i = 0; i < 4; i++) {
3309                 if (chs == 2)
3310                         channel_id = 0;
3311                 else
3312                         channel_id = i * 2;
3313
3314                 /* turn off SPDIF once;
3315                  *otherwise the IEC958 bits won't be updated
3316                  */
3317                 if (codec->spdif_status_reset &&
3318                 (spdif->ctls & AC_DIG1_ENABLE))
3319                         snd_hda_codec_write(codec,
3320                                 nvhdmi_con_nids_7x[i],
3321                                 0,
3322                                 AC_VERB_SET_DIGI_CONVERT_1,
3323                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3324                 /* set the stream id */
3325                 snd_hda_codec_write(codec,
3326                                 nvhdmi_con_nids_7x[i],
3327                                 0,
3328                                 AC_VERB_SET_CHANNEL_STREAMID,
3329                                 (stream_tag << 4) | channel_id);
3330                 /* set the stream format */
3331                 snd_hda_codec_write(codec,
3332                                 nvhdmi_con_nids_7x[i],
3333                                 0,
3334                                 AC_VERB_SET_STREAM_FORMAT,
3335                                 format);
3336                 /* turn on again (if needed) */
3337                 /* enable and set the channel status audio/data flag */
3338                 if (codec->spdif_status_reset &&
3339                 (spdif->ctls & AC_DIG1_ENABLE)) {
3340                         snd_hda_codec_write(codec,
3341                                         nvhdmi_con_nids_7x[i],
3342                                         0,
3343                                         AC_VERB_SET_DIGI_CONVERT_1,
3344                                         spdif->ctls & 0xff);
3345                         snd_hda_codec_write(codec,
3346                                         nvhdmi_con_nids_7x[i],
3347                                         0,
3348                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3349                 }
3350         }
3351
3352         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
3353
3354         mutex_unlock(&codec->spdif_mutex);
3355         return 0;
3356 }
3357
3358 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
3359         .substreams = 1,
3360         .channels_min = 2,
3361         .channels_max = 8,
3362         .nid = nvhdmi_master_con_nid_7x,
3363         .rates = SUPPORTED_RATES,
3364         .maxbps = SUPPORTED_MAXBPS,
3365         .formats = SUPPORTED_FORMATS,
3366         .ops = {
3367                 .open = simple_playback_pcm_open,
3368                 .close = nvhdmi_8ch_7x_pcm_close,
3369                 .prepare = nvhdmi_8ch_7x_pcm_prepare
3370         },
3371 };
3372
3373 static int patch_nvhdmi_2ch(struct hda_codec *codec)
3374 {
3375         struct hdmi_spec *spec;
3376         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
3377                                     nvhdmi_master_pin_nid_7x);
3378         if (err < 0)
3379                 return err;
3380
3381         codec->patch_ops.init = nvhdmi_7x_init_2ch;
3382         /* override the PCM rates, etc, as the codec doesn't give full list */
3383         spec = codec->spec;
3384         spec->pcm_playback.rates = SUPPORTED_RATES;
3385         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
3386         spec->pcm_playback.formats = SUPPORTED_FORMATS;
3387         return 0;
3388 }
3389
3390 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
3391 {
3392         struct hdmi_spec *spec = codec->spec;
3393         int err = simple_playback_build_pcms(codec);
3394         if (!err) {
3395                 struct hda_pcm *info = get_pcm_rec(spec, 0);
3396                 info->own_chmap = true;
3397         }
3398         return err;
3399 }
3400
3401 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
3402 {
3403         struct hdmi_spec *spec = codec->spec;
3404         struct hda_pcm *info;
3405         struct snd_pcm_chmap *chmap;
3406         int err;
3407
3408         err = simple_playback_build_controls(codec);
3409         if (err < 0)
3410                 return err;
3411
3412         /* add channel maps */
3413         info = get_pcm_rec(spec, 0);
3414         err = snd_pcm_add_chmap_ctls(info->pcm,
3415                                      SNDRV_PCM_STREAM_PLAYBACK,
3416                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
3417         if (err < 0)
3418                 return err;
3419         switch (codec->preset->vendor_id) {
3420         case 0x10de0002:
3421         case 0x10de0003:
3422         case 0x10de0005:
3423         case 0x10de0006:
3424                 chmap->channel_mask = (1U << 2) | (1U << 8);
3425                 break;
3426         case 0x10de0007:
3427                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
3428         }
3429         return 0;
3430 }
3431
3432 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
3433 {
3434         struct hdmi_spec *spec;
3435         int err = patch_nvhdmi_2ch(codec);
3436         if (err < 0)
3437                 return err;
3438         spec = codec->spec;
3439         spec->multiout.max_channels = 8;
3440         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
3441         codec->patch_ops.init = nvhdmi_7x_init_8ch;
3442         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
3443         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
3444
3445         /* Initialize the audio infoframe channel mask and checksum to something
3446          * valid */
3447         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3448
3449         return 0;
3450 }
3451
3452 /*
3453  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3454  * - 0x10de0015
3455  * - 0x10de0040
3456  */
3457 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
3458                                                     int channels)
3459 {
3460         if (cap->ca_index == 0x00 && channels == 2)
3461                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
3462
3463         return hdmi_chmap_cea_alloc_validate_get_type(cap, channels);
3464 }
3465
3466 static int nvhdmi_chmap_validate(int ca, int chs, unsigned char *map)
3467 {
3468         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
3469                 return -EINVAL;
3470
3471         return 0;
3472 }
3473
3474 static int patch_nvhdmi(struct hda_codec *codec)
3475 {
3476         struct hdmi_spec *spec;
3477         int err;
3478
3479         err = patch_generic_hdmi(codec);
3480         if (err)
3481                 return err;
3482
3483         spec = codec->spec;
3484         spec->dyn_pin_out = true;
3485
3486         spec->ops.chmap_cea_alloc_validate_get_type =
3487                 nvhdmi_chmap_cea_alloc_validate_get_type;
3488         spec->ops.chmap_validate = nvhdmi_chmap_validate;
3489
3490         return 0;
3491 }
3492
3493 /*
3494  * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3495  * accessed using vendor-defined verbs. These registers can be used for
3496  * interoperability between the HDA and HDMI drivers.
3497  */
3498
3499 /* Audio Function Group node */
3500 #define NVIDIA_AFG_NID 0x01
3501
3502 /*
3503  * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3504  * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3505  * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3506  * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3507  * additional bit (at position 30) to signal the validity of the format.
3508  *
3509  * | 31      | 30    | 29  16 | 15   0 |
3510  * +---------+-------+--------+--------+
3511  * | TRIGGER | VALID | UNUSED | FORMAT |
3512  * +-----------------------------------|
3513  *
3514  * Note that for the trigger bit to take effect it needs to change value
3515  * (i.e. it needs to be toggled).
3516  */
3517 #define NVIDIA_GET_SCRATCH0             0xfa6
3518 #define NVIDIA_SET_SCRATCH0_BYTE0       0xfa7
3519 #define NVIDIA_SET_SCRATCH0_BYTE1       0xfa8
3520 #define NVIDIA_SET_SCRATCH0_BYTE2       0xfa9
3521 #define NVIDIA_SET_SCRATCH0_BYTE3       0xfaa
3522 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3523 #define NVIDIA_SCRATCH_VALID   (1 << 6)
3524
3525 #define NVIDIA_GET_SCRATCH1             0xfab
3526 #define NVIDIA_SET_SCRATCH1_BYTE0       0xfac
3527 #define NVIDIA_SET_SCRATCH1_BYTE1       0xfad
3528 #define NVIDIA_SET_SCRATCH1_BYTE2       0xfae
3529 #define NVIDIA_SET_SCRATCH1_BYTE3       0xfaf
3530
3531 /*
3532  * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3533  * the format is invalidated so that the HDMI codec can be disabled.
3534  */
3535 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
3536 {
3537         unsigned int value;
3538
3539         /* bits [31:30] contain the trigger and valid bits */
3540         value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
3541                                    NVIDIA_GET_SCRATCH0, 0);
3542         value = (value >> 24) & 0xff;
3543
3544         /* bits [15:0] are used to store the HDA format */
3545         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3546                             NVIDIA_SET_SCRATCH0_BYTE0,
3547                             (format >> 0) & 0xff);
3548         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3549                             NVIDIA_SET_SCRATCH0_BYTE1,
3550                             (format >> 8) & 0xff);
3551
3552         /* bits [16:24] are unused */
3553         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3554                             NVIDIA_SET_SCRATCH0_BYTE2, 0);
3555
3556         /*
3557          * Bit 30 signals that the data is valid and hence that HDMI audio can
3558          * be enabled.
3559          */
3560         if (format == 0)
3561                 value &= ~NVIDIA_SCRATCH_VALID;
3562         else
3563                 value |= NVIDIA_SCRATCH_VALID;
3564
3565         /*
3566          * Whenever the trigger bit is toggled, an interrupt is raised in the
3567          * HDMI codec. The HDMI driver will use that as trigger to update its
3568          * configuration.
3569          */
3570         value ^= NVIDIA_SCRATCH_TRIGGER;
3571
3572         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3573                             NVIDIA_SET_SCRATCH0_BYTE3, value);
3574 }
3575
3576 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
3577                                   struct hda_codec *codec,
3578                                   unsigned int stream_tag,
3579                                   unsigned int format,
3580                                   struct snd_pcm_substream *substream)
3581 {
3582         int err;
3583
3584         err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
3585                                                 format, substream);
3586         if (err < 0)
3587                 return err;
3588
3589         /* notify the HDMI codec of the format change */
3590         tegra_hdmi_set_format(codec, format);
3591
3592         return 0;
3593 }
3594
3595 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3596                                   struct hda_codec *codec,
3597                                   struct snd_pcm_substream *substream)
3598 {
3599         /* invalidate the format in the HDMI codec */
3600         tegra_hdmi_set_format(codec, 0);
3601
3602         return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3603 }
3604
3605 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3606 {
3607         struct hdmi_spec *spec = codec->spec;
3608         unsigned int i;
3609
3610         for (i = 0; i < spec->num_pins; i++) {
3611                 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3612
3613                 if (pcm->pcm_type == type)
3614                         return pcm;
3615         }
3616
3617         return NULL;
3618 }
3619
3620 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3621 {
3622         struct hda_pcm_stream *stream;
3623         struct hda_pcm *pcm;
3624         int err;
3625
3626         err = generic_hdmi_build_pcms(codec);
3627         if (err < 0)
3628                 return err;
3629
3630         pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3631         if (!pcm)
3632                 return -ENODEV;
3633
3634         /*
3635          * Override ->prepare() and ->cleanup() operations to notify the HDMI
3636          * codec about format changes.
3637          */
3638         stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3639         stream->ops.prepare = tegra_hdmi_pcm_prepare;
3640         stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3641
3642         return 0;
3643 }
3644
3645 static int patch_tegra_hdmi(struct hda_codec *codec)
3646 {
3647         int err;
3648
3649         err = patch_generic_hdmi(codec);
3650         if (err)
3651                 return err;
3652
3653         codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3654
3655         return 0;
3656 }
3657
3658 /*
3659  * ATI/AMD-specific implementations
3660  */
3661
3662 #define is_amdhdmi_rev3_or_later(codec) \
3663         ((codec)->core.vendor_id == 0x1002aa01 && \
3664          ((codec)->core.revision_id & 0xff00) >= 0x0300)
3665 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3666
3667 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3668 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3669 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
3670 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
3671 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
3672 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
3673 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
3674 #define ATI_VERB_SET_HBR_CONTROL        0x77c
3675 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
3676 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
3677 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
3678 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
3679 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
3680 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3681 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
3682 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
3683 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
3684 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
3685 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
3686 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
3687 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
3688 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
3689 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
3690 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
3691 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
3692
3693 /* AMD specific HDA cvt verbs */
3694 #define ATI_VERB_SET_RAMP_RATE          0x770
3695 #define ATI_VERB_GET_RAMP_RATE          0xf70
3696
3697 #define ATI_OUT_ENABLE 0x1
3698
3699 #define ATI_MULTICHANNEL_MODE_PAIRED    0
3700 #define ATI_MULTICHANNEL_MODE_SINGLE    1
3701
3702 #define ATI_HBR_CAPABLE 0x01
3703 #define ATI_HBR_ENABLE 0x10
3704
3705 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3706                            unsigned char *buf, int *eld_size)
3707 {
3708         /* call hda_eld.c ATI/AMD-specific function */
3709         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3710                                     is_amdhdmi_rev3_or_later(codec));
3711 }
3712
3713 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
3714                                         int active_channels, int conn_type)
3715 {
3716         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3717 }
3718
3719 static int atihdmi_paired_swap_fc_lfe(int pos)
3720 {
3721         /*
3722          * ATI/AMD have automatic FC/LFE swap built-in
3723          * when in pairwise mapping mode.
3724          */
3725
3726         switch (pos) {
3727                 /* see channel_allocations[].speakers[] */
3728                 case 2: return 3;
3729                 case 3: return 2;
3730                 default: break;
3731         }
3732
3733         return pos;
3734 }
3735
3736 static int atihdmi_paired_chmap_validate(int ca, int chs, unsigned char *map)
3737 {
3738         struct cea_channel_speaker_allocation *cap;
3739         int i, j;
3740
3741         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3742
3743         cap = &channel_allocations[get_channel_allocation_order(ca)];
3744         for (i = 0; i < chs; ++i) {
3745                 int mask = to_spk_mask(map[i]);
3746                 bool ok = false;
3747                 bool companion_ok = false;
3748
3749                 if (!mask)
3750                         continue;
3751
3752                 for (j = 0 + i % 2; j < 8; j += 2) {
3753                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3754                         if (cap->speakers[chan_idx] == mask) {
3755                                 /* channel is in a supported position */
3756                                 ok = true;
3757
3758                                 if (i % 2 == 0 && i + 1 < chs) {
3759                                         /* even channel, check the odd companion */
3760                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3761                                         int comp_mask_req = to_spk_mask(map[i+1]);
3762                                         int comp_mask_act = cap->speakers[comp_chan_idx];
3763
3764                                         if (comp_mask_req == comp_mask_act)
3765                                                 companion_ok = true;
3766                                         else
3767                                                 return -EINVAL;
3768                                 }
3769                                 break;
3770                         }
3771                 }
3772
3773                 if (!ok)
3774                         return -EINVAL;
3775
3776                 if (companion_ok)
3777                         i++; /* companion channel already checked */
3778         }
3779
3780         return 0;
3781 }
3782
3783 static int atihdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3784                                         int hdmi_slot, int stream_channel)
3785 {
3786         int verb;
3787         int ati_channel_setup = 0;
3788
3789         if (hdmi_slot > 7)
3790                 return -EINVAL;
3791
3792         if (!has_amd_full_remap_support(codec)) {
3793                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3794
3795                 /* In case this is an odd slot but without stream channel, do not
3796                  * disable the slot since the corresponding even slot could have a
3797                  * channel. In case neither have a channel, the slot pair will be
3798                  * disabled when this function is called for the even slot. */
3799                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3800                         return 0;
3801
3802                 hdmi_slot -= hdmi_slot % 2;
3803
3804                 if (stream_channel != 0xf)
3805                         stream_channel -= stream_channel % 2;
3806         }
3807
3808         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3809
3810         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3811
3812         if (stream_channel != 0xf)
3813                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3814
3815         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3816 }
3817
3818 static int atihdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3819                                         int asp_slot)
3820 {
3821         bool was_odd = false;
3822         int ati_asp_slot = asp_slot;
3823         int verb;
3824         int ati_channel_setup;
3825
3826         if (asp_slot > 7)
3827                 return -EINVAL;
3828
3829         if (!has_amd_full_remap_support(codec)) {
3830                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3831                 if (ati_asp_slot % 2 != 0) {
3832                         ati_asp_slot -= 1;
3833                         was_odd = true;
3834                 }
3835         }
3836
3837         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3838
3839         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3840
3841         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3842                 return 0xf;
3843
3844         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3845 }
3846
3847 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
3848                                                             int channels)
3849 {
3850         int c;
3851
3852         /*
3853          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3854          * we need to take that into account (a single channel may take 2
3855          * channel slots if we need to carry a silent channel next to it).
3856          * On Rev3+ AMD codecs this function is not used.
3857          */
3858         int chanpairs = 0;
3859
3860         /* We only produce even-numbered channel count TLVs */
3861         if ((channels % 2) != 0)
3862                 return -1;
3863
3864         for (c = 0; c < 7; c += 2) {
3865                 if (cap->speakers[c] || cap->speakers[c+1])
3866                         chanpairs++;
3867         }
3868
3869         if (chanpairs * 2 != channels)
3870                 return -1;
3871
3872         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3873 }
3874
3875 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
3876                                                   unsigned int *chmap, int channels)
3877 {
3878         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3879         int count = 0;
3880         int c;
3881
3882         for (c = 7; c >= 0; c--) {
3883                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3884                 int spk = cap->speakers[chan];
3885                 if (!spk) {
3886                         /* add N/A channel if the companion channel is occupied */
3887                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3888                                 chmap[count++] = SNDRV_CHMAP_NA;
3889
3890                         continue;
3891                 }
3892
3893                 chmap[count++] = spk_to_chmap(spk);
3894         }
3895
3896         WARN_ON(count != channels);
3897 }
3898
3899 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3900                                  bool hbr)
3901 {
3902         int hbr_ctl, hbr_ctl_new;
3903
3904         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3905         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3906                 if (hbr)
3907                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3908                 else
3909                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3910
3911                 codec_dbg(codec,
3912                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3913                                 pin_nid,
3914                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
3915                                 hbr_ctl_new);
3916
3917                 if (hbr_ctl != hbr_ctl_new)
3918                         snd_hda_codec_write(codec, pin_nid, 0,
3919                                                 ATI_VERB_SET_HBR_CONTROL,
3920                                                 hbr_ctl_new);
3921
3922         } else if (hbr)
3923                 return -EINVAL;
3924
3925         return 0;
3926 }
3927
3928 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3929                                 hda_nid_t pin_nid, u32 stream_tag, int format)
3930 {
3931
3932         if (is_amdhdmi_rev3_or_later(codec)) {
3933                 int ramp_rate = 180; /* default as per AMD spec */
3934                 /* disable ramp-up/down for non-pcm as per AMD spec */
3935                 if (format & AC_FMT_TYPE_NON_PCM)
3936                         ramp_rate = 0;
3937
3938                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3939         }
3940
3941         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3942 }
3943
3944
3945 static int atihdmi_init(struct hda_codec *codec)
3946 {
3947         struct hdmi_spec *spec = codec->spec;
3948         int pin_idx, err;
3949
3950         err = generic_hdmi_init(codec);
3951
3952         if (err)
3953                 return err;
3954
3955         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3956                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3957
3958                 /* make sure downmix information in infoframe is zero */
3959                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3960
3961                 /* enable channel-wise remap mode if supported */
3962                 if (has_amd_full_remap_support(codec))
3963                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3964                                             ATI_VERB_SET_MULTICHANNEL_MODE,
3965                                             ATI_MULTICHANNEL_MODE_SINGLE);
3966         }
3967
3968         return 0;
3969 }
3970
3971 static int patch_atihdmi(struct hda_codec *codec)
3972 {
3973         struct hdmi_spec *spec;
3974         struct hdmi_spec_per_cvt *per_cvt;
3975         int err, cvt_idx;
3976
3977         err = patch_generic_hdmi(codec);
3978
3979         if (err)
3980                 return err;
3981
3982         codec->patch_ops.init = atihdmi_init;
3983
3984         spec = codec->spec;
3985
3986         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
3987         spec->ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
3988         spec->ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
3989         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
3990         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
3991         spec->ops.setup_stream = atihdmi_setup_stream;
3992
3993         if (!has_amd_full_remap_support(codec)) {
3994                 /* override to ATI/AMD-specific versions with pairwise mapping */
3995                 spec->ops.chmap_cea_alloc_validate_get_type =
3996                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
3997                 spec->ops.cea_alloc_to_tlv_chmap = atihdmi_paired_cea_alloc_to_tlv_chmap;
3998                 spec->ops.chmap_validate = atihdmi_paired_chmap_validate;
3999         }
4000
4001         /* ATI/AMD converters do not advertise all of their capabilities */
4002         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
4003                 per_cvt = get_cvt(spec, cvt_idx);
4004                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
4005                 per_cvt->rates |= SUPPORTED_RATES;
4006                 per_cvt->formats |= SUPPORTED_FORMATS;
4007                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
4008         }
4009
4010         spec->channels_max = max(spec->channels_max, 8u);
4011
4012         return 0;
4013 }
4014
4015 /* VIA HDMI Implementation */
4016 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
4017 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
4018
4019 static int patch_via_hdmi(struct hda_codec *codec)
4020 {
4021         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
4022 }
4023
4024 /*
4025  * patch entries
4026  */
4027 static const struct hda_device_id snd_hda_id_hdmi[] = {
4028 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI",       patch_atihdmi),
4029 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI",       patch_atihdmi),
4030 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI",   patch_atihdmi),
4031 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI",        patch_atihdmi),
4032 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI",     patch_generic_hdmi),
4033 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI",     patch_generic_hdmi),
4034 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI",    patch_generic_hdmi),
4035 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4036 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4037 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4038 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4039 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI",    patch_nvhdmi_8ch_7x),
4040 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP",   patch_nvhdmi),
4041 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP",   patch_nvhdmi),
4042 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI",       patch_nvhdmi),
4043 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP",   patch_nvhdmi),
4044 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP",   patch_nvhdmi),
4045 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP",   patch_nvhdmi),
4046 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP",   patch_nvhdmi),
4047 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP",   patch_nvhdmi),
4048 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP",   patch_nvhdmi),
4049 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP",   patch_nvhdmi),
4050 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP",   patch_nvhdmi),
4051 /* 17 is known to be absent */
4052 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP",   patch_nvhdmi),
4053 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP",   patch_nvhdmi),
4054 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP",   patch_nvhdmi),
4055 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP",   patch_nvhdmi),
4056 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP",   patch_nvhdmi),
4057 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI",     patch_tegra_hdmi),
4058 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI",    patch_tegra_hdmi),
4059 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI",    patch_tegra_hdmi),
4060 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
4061 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP",   patch_nvhdmi),
4062 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP",   patch_nvhdmi),
4063 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP",   patch_nvhdmi),
4064 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP",   patch_nvhdmi),
4065 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP",   patch_nvhdmi),
4066 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP",   patch_nvhdmi),
4067 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP",   patch_nvhdmi),
4068 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI",       patch_nvhdmi_2ch),
4069 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP",   patch_nvhdmi),
4070 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP",   patch_nvhdmi),
4071 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP",   patch_nvhdmi),
4072 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP",   patch_nvhdmi),
4073 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP",   patch_nvhdmi),
4074 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI",       patch_nvhdmi_2ch),
4075 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP",    patch_via_hdmi),
4076 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP",    patch_via_hdmi),
4077 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP",     patch_generic_hdmi),
4078 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP",     patch_generic_hdmi),
4079 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI",    patch_generic_hdmi),
4080 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI",    patch_generic_hdmi),
4081 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI",     patch_generic_hdmi),
4082 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI",   patch_generic_hdmi),
4083 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI",    patch_generic_hdmi),
4084 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_generic_hdmi),
4085 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_generic_hdmi),
4086 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI",     patch_generic_hdmi),
4087 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI",   patch_generic_hdmi),
4088 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI",     patch_generic_hdmi),
4089 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI",     patch_generic_hdmi),
4090 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI",    patch_generic_hdmi),
4091 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI",  patch_generic_hdmi),
4092 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_generic_hdmi),
4093 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI",    patch_generic_hdmi),
4094 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI",   patch_generic_hdmi),
4095 /* special ID for generic HDMI */
4096 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
4097 {} /* terminator */
4098 };
4099 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
4100
4101 MODULE_LICENSE("GPL");
4102 MODULE_DESCRIPTION("HDMI HD-audio codec");
4103 MODULE_ALIAS("snd-hda-codec-intelhdmi");
4104 MODULE_ALIAS("snd-hda-codec-nvhdmi");
4105 MODULE_ALIAS("snd-hda-codec-atihdmi");
4106
4107 static struct hda_codec_driver hdmi_driver = {
4108         .id = snd_hda_id_hdmi,
4109 };
4110
4111 module_hda_codec_driver(hdmi_driver);