3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6 * Copyright (c) 2006 ATI Technologies Inc.
7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
11 * Wu Fengguang <wfg@linux.intel.com>
14 * Wu Fengguang <wfg@linux.intel.com>
16 * This program is free software; you can redistribute it and/or modify it
17 * under the terms of the GNU General Public License as published by the Free
18 * Software Foundation; either version 2 of the License, or (at your option)
21 * This program is distributed in the hope that it will be useful, but
22 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
23 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software Foundation,
28 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
31 #include <linux/init.h>
32 #include <linux/delay.h>
33 #include <linux/slab.h>
34 #include <linux/module.h>
35 #include <sound/core.h>
36 #include <sound/jack.h>
37 #include "hda_codec.h"
38 #include "hda_local.h"
40 static bool static_hdmi_pcm;
41 module_param(static_hdmi_pcm, bool, 0644);
42 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
45 * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
46 * could support N independent pipes, each of them can be connected to one or
47 * more ports (DVI, HDMI or DisplayPort).
49 * The HDA correspondence of pipes/ports are converter/pin nodes.
51 #define MAX_HDMI_CVTS 4
52 #define MAX_HDMI_PINS 4
54 struct hdmi_spec_per_cvt {
57 unsigned int channels_min;
58 unsigned int channels_max;
64 struct hdmi_spec_per_pin {
67 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
68 struct hdmi_eld sink_eld;
73 struct hdmi_spec_per_cvt cvts[MAX_HDMI_CVTS];
76 struct hdmi_spec_per_pin pins[MAX_HDMI_PINS];
77 struct hda_pcm pcm_rec[MAX_HDMI_PINS];
80 * Non-generic ATI/NVIDIA specific
82 struct hda_multi_out multiout;
83 const struct hda_pcm_stream *pcm_playback;
87 struct hdmi_audio_infoframe {
94 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
98 u8 LFEPBL01_LSV36_DM_INH7;
101 struct dp_audio_infoframe {
104 u8 ver; /* 0x11 << 2 */
106 u8 CC02_CT47; /* match with HDMI infoframe from this on */
110 u8 LFEPBL01_LSV36_DM_INH7;
113 union audio_infoframe {
114 struct hdmi_audio_infoframe hdmi;
115 struct dp_audio_infoframe dp;
120 * CEA speaker placement:
123 * FLW FL FLC FC FRC FR FRW
130 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
131 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
133 enum cea_speaker_placement {
134 FL = (1 << 0), /* Front Left */
135 FC = (1 << 1), /* Front Center */
136 FR = (1 << 2), /* Front Right */
137 FLC = (1 << 3), /* Front Left Center */
138 FRC = (1 << 4), /* Front Right Center */
139 RL = (1 << 5), /* Rear Left */
140 RC = (1 << 6), /* Rear Center */
141 RR = (1 << 7), /* Rear Right */
142 RLC = (1 << 8), /* Rear Left Center */
143 RRC = (1 << 9), /* Rear Right Center */
144 LFE = (1 << 10), /* Low Frequency Effect */
145 FLW = (1 << 11), /* Front Left Wide */
146 FRW = (1 << 12), /* Front Right Wide */
147 FLH = (1 << 13), /* Front Left High */
148 FCH = (1 << 14), /* Front Center High */
149 FRH = (1 << 15), /* Front Right High */
150 TC = (1 << 16), /* Top Center */
154 * ELD SA bits in the CEA Speaker Allocation data block
156 static int eld_speaker_allocation_bits[] = {
164 /* the following are not defined in ELD yet */
171 struct cea_channel_speaker_allocation {
175 /* derived values, just for convenience */
183 * surround40 surround41 surround50 surround51 surround71
184 * ch0 front left = = = =
185 * ch1 front right = = = =
186 * ch2 rear left = = = =
187 * ch3 rear right = = = =
188 * ch4 LFE center center center
193 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
195 static int hdmi_channel_mapping[0x32][8] = {
197 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
199 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
201 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
203 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
205 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
207 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
209 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
211 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
213 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
217 * This is an ordered list!
219 * The preceding ones have better chances to be selected by
220 * hdmi_channel_allocation().
222 static struct cea_channel_speaker_allocation channel_allocations[] = {
223 /* channel: 7 6 5 4 3 2 1 0 */
224 { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
226 { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
228 { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
230 { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
232 { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
234 { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
236 { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
238 { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
240 { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
242 { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
243 { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
244 { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
245 { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
246 { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
247 { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
248 { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
249 { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
250 { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
251 { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
252 { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
253 { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
254 { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
255 { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
256 { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
257 { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
258 { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
259 { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
260 { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
261 { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
262 { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
263 { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
264 { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
265 { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
266 { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
267 { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
268 { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
269 { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
270 { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
271 { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
272 { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
273 { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
274 { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
275 { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
276 { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
277 { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
278 { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
279 { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
280 { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
281 { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
282 { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
290 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
294 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
295 if (spec->pins[pin_idx].pin_nid == pin_nid)
298 snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
302 static int hinfo_to_pin_index(struct hdmi_spec *spec,
303 struct hda_pcm_stream *hinfo)
307 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
308 if (&spec->pcm_rec[pin_idx].stream[0] == hinfo)
311 snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
315 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
319 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
320 if (spec->cvts[cvt_idx].cvt_nid == cvt_nid)
323 snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
327 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
328 struct snd_ctl_elem_info *uinfo)
330 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
331 struct hdmi_spec *spec;
335 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
337 pin_idx = kcontrol->private_value;
338 uinfo->count = spec->pins[pin_idx].sink_eld.eld_size;
343 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
344 struct snd_ctl_elem_value *ucontrol)
346 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
347 struct hdmi_spec *spec;
351 pin_idx = kcontrol->private_value;
353 memcpy(ucontrol->value.bytes.data,
354 spec->pins[pin_idx].sink_eld.eld_buffer, ELD_MAX_SIZE);
359 static struct snd_kcontrol_new eld_bytes_ctl = {
360 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
361 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
363 .info = hdmi_eld_ctl_info,
364 .get = hdmi_eld_ctl_get,
367 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
370 struct snd_kcontrol *kctl;
371 struct hdmi_spec *spec = codec->spec;
374 kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
377 kctl->private_value = pin_idx;
378 kctl->id.device = device;
380 err = snd_hda_ctl_add(codec, spec->pins[pin_idx].pin_nid, kctl);
388 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
389 int *packet_index, int *byte_index)
393 val = snd_hda_codec_read(codec, pin_nid, 0,
394 AC_VERB_GET_HDMI_DIP_INDEX, 0);
396 *packet_index = val >> 5;
397 *byte_index = val & 0x1f;
401 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
402 int packet_index, int byte_index)
406 val = (packet_index << 5) | (byte_index & 0x1f);
408 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
411 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
414 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
417 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
420 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
421 snd_hda_codec_write(codec, pin_nid, 0,
422 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
423 /* Disable pin out until stream is active*/
424 snd_hda_codec_write(codec, pin_nid, 0,
425 AC_VERB_SET_PIN_WIDGET_CONTROL, 0);
428 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
430 return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
431 AC_VERB_GET_CVT_CHAN_COUNT, 0);
434 static void hdmi_set_channel_count(struct hda_codec *codec,
435 hda_nid_t cvt_nid, int chs)
437 if (chs != hdmi_get_channel_count(codec, cvt_nid))
438 snd_hda_codec_write(codec, cvt_nid, 0,
439 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
444 * Channel mapping routines
448 * Compute derived values in channel_allocations[].
450 static void init_channel_allocations(void)
453 struct cea_channel_speaker_allocation *p;
455 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
456 p = channel_allocations + i;
459 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
460 if (p->speakers[j]) {
462 p->spk_mask |= p->speakers[j];
468 * The transformation takes two steps:
470 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
471 * spk_mask => (channel_allocations[]) => ai->CA
473 * TODO: it could select the wrong CA from multiple candidates.
475 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
480 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
483 * CA defaults to 0 for basic stereo audio
489 * expand ELD's speaker allocation mask
491 * ELD tells the speaker mask in a compact(paired) form,
492 * expand ELD's notions to match the ones used by Audio InfoFrame.
494 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
495 if (eld->spk_alloc & (1 << i))
496 spk_mask |= eld_speaker_allocation_bits[i];
499 /* search for the first working match in the CA table */
500 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
501 if (channels == channel_allocations[i].channels &&
502 (spk_mask & channel_allocations[i].spk_mask) ==
503 channel_allocations[i].spk_mask) {
504 ca = channel_allocations[i].ca_index;
509 snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
510 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
516 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
519 #ifdef CONFIG_SND_DEBUG_VERBOSE
523 for (i = 0; i < 8; i++) {
524 slot = snd_hda_codec_read(codec, pin_nid, 0,
525 AC_VERB_GET_HDMI_CHAN_SLOT, i);
526 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
527 slot >> 4, slot & 0xf);
533 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
540 if (hdmi_channel_mapping[ca][1] == 0) {
541 for (i = 0; i < channel_allocations[ca].channels; i++)
542 hdmi_channel_mapping[ca][i] = i | (i << 4);
544 hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
547 for (i = 0; i < 8; i++) {
548 err = snd_hda_codec_write(codec, pin_nid, 0,
549 AC_VERB_SET_HDMI_CHAN_SLOT,
550 hdmi_channel_mapping[ca][i]);
552 snd_printdd(KERN_NOTICE
553 "HDMI: channel mapping failed\n");
558 hdmi_debug_channel_mapping(codec, pin_nid);
563 * Audio InfoFrame routines
567 * Enable Audio InfoFrame Transmission
569 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
572 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
573 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
578 * Disable Audio InfoFrame Transmission
580 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
583 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
584 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
588 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
590 #ifdef CONFIG_SND_DEBUG_VERBOSE
594 size = snd_hdmi_get_eld_size(codec, pin_nid);
595 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
597 for (i = 0; i < 8; i++) {
598 size = snd_hda_codec_read(codec, pin_nid, 0,
599 AC_VERB_GET_HDMI_DIP_SIZE, i);
600 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
605 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
611 for (i = 0; i < 8; i++) {
612 size = snd_hda_codec_read(codec, pin_nid, 0,
613 AC_VERB_GET_HDMI_DIP_SIZE, i);
617 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
618 for (j = 1; j < 1000; j++) {
619 hdmi_write_dip_byte(codec, pin_nid, 0x0);
620 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
622 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
624 if (bi == 0) /* byte index wrapped around */
628 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
634 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
636 u8 *bytes = (u8 *)hdmi_ai;
640 hdmi_ai->checksum = 0;
642 for (i = 0; i < sizeof(*hdmi_ai); i++)
645 hdmi_ai->checksum = -sum;
648 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
654 hdmi_debug_dip_size(codec, pin_nid);
655 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
657 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
658 for (i = 0; i < size; i++)
659 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
662 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
668 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
672 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
673 for (i = 0; i < size; i++) {
674 val = snd_hda_codec_read(codec, pin_nid, 0,
675 AC_VERB_GET_HDMI_DIP_DATA, 0);
683 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
684 struct snd_pcm_substream *substream)
686 struct hdmi_spec *spec = codec->spec;
687 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
688 hda_nid_t pin_nid = per_pin->pin_nid;
689 int channels = substream->runtime->channels;
690 struct hdmi_eld *eld;
692 union audio_infoframe ai;
694 eld = &spec->pins[pin_idx].sink_eld;
695 if (!eld->monitor_present)
698 ca = hdmi_channel_allocation(eld, channels);
700 memset(&ai, 0, sizeof(ai));
701 if (eld->conn_type == 0) { /* HDMI */
702 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
704 hdmi_ai->type = 0x84;
707 hdmi_ai->CC02_CT47 = channels - 1;
709 hdmi_checksum_audio_infoframe(hdmi_ai);
710 } else if (eld->conn_type == 1) { /* DisplayPort */
711 struct dp_audio_infoframe *dp_ai = &ai.dp;
715 dp_ai->ver = 0x11 << 2;
716 dp_ai->CC02_CT47 = channels - 1;
719 snd_printd("HDMI: unknown connection type at pin %d\n",
725 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
726 * sizeof(*dp_ai) to avoid partial match/update problems when
727 * the user switches between HDMI/DP monitors.
729 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
731 snd_printdd("hdmi_setup_audio_infoframe: "
732 "pin=%d channels=%d\n",
735 hdmi_setup_channel_mapping(codec, pin_nid, ca);
736 hdmi_stop_infoframe_trans(codec, pin_nid);
737 hdmi_fill_audio_infoframe(codec, pin_nid,
738 ai.bytes, sizeof(ai));
739 hdmi_start_infoframe_trans(codec, pin_nid);
748 static void hdmi_present_sense(struct hda_codec *codec, hda_nid_t pin_nid,
749 struct hdmi_eld *eld);
751 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
753 struct hdmi_spec *spec = codec->spec;
754 int pin_nid = res >> AC_UNSOL_RES_TAG_SHIFT;
755 int pd = !!(res & AC_UNSOL_RES_PD);
756 int eldv = !!(res & AC_UNSOL_RES_ELDV);
758 struct hdmi_eld *eld;
761 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
762 codec->addr, pin_nid, pd, eldv);
764 pin_idx = pin_nid_to_pin_index(spec, pin_nid);
767 eld = &spec->pins[pin_idx].sink_eld;
769 hdmi_present_sense(codec, pin_nid, eld);
772 * HDMI sink's ELD info cannot always be retrieved for now, e.g.
773 * in console or for audio devices. Assume the highest speakers
774 * configuration, to _not_ prohibit multi-channel audio playback.
777 eld->spk_alloc = 0xffff;
780 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
782 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
783 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
784 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
785 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
788 "HDMI CP event: CODEC=%d PIN=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
803 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
805 struct hdmi_spec *spec = codec->spec;
806 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
807 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
809 if (pin_nid_to_pin_index(spec, tag) < 0) {
810 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
815 hdmi_intrinsic_event(codec, res);
817 hdmi_non_intrinsic_event(codec, res);
824 /* HBR should be Non-PCM, 8 channels */
825 #define is_hbr_format(format) \
826 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
828 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
829 hda_nid_t pin_nid, u32 stream_tag, int format)
834 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
835 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
836 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
838 new_pinctl = pinctl & ~AC_PINCTL_EPT;
839 if (is_hbr_format(format))
840 new_pinctl |= AC_PINCTL_EPT_HBR;
842 new_pinctl |= AC_PINCTL_EPT_NATIVE;
844 snd_printdd("hdmi_setup_stream: "
845 "NID=0x%x, %spinctl=0x%x\n",
847 pinctl == new_pinctl ? "" : "new-",
850 if (pinctl != new_pinctl)
851 snd_hda_codec_write(codec, pin_nid, 0,
852 AC_VERB_SET_PIN_WIDGET_CONTROL,
856 if (is_hbr_format(format) && !new_pinctl) {
857 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
861 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
868 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
869 struct hda_codec *codec,
870 struct snd_pcm_substream *substream)
872 struct hdmi_spec *spec = codec->spec;
873 struct snd_pcm_runtime *runtime = substream->runtime;
874 int pin_idx, cvt_idx, mux_idx = 0;
875 struct hdmi_spec_per_pin *per_pin;
876 struct hdmi_eld *eld;
877 struct hdmi_spec_per_cvt *per_cvt = NULL;
881 pin_idx = hinfo_to_pin_index(spec, hinfo);
882 if (snd_BUG_ON(pin_idx < 0))
884 per_pin = &spec->pins[pin_idx];
885 eld = &per_pin->sink_eld;
887 /* Dynamically assign converter to stream */
888 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
889 per_cvt = &spec->cvts[cvt_idx];
891 /* Must not already be assigned */
892 if (per_cvt->assigned)
894 /* Must be in pin's mux's list of converters */
895 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
896 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
898 /* Not in mux list */
899 if (mux_idx == per_pin->num_mux_nids)
903 /* No free converters */
904 if (cvt_idx == spec->num_cvts)
907 /* Claim converter */
908 per_cvt->assigned = 1;
909 hinfo->nid = per_cvt->cvt_nid;
911 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
912 AC_VERB_SET_CONNECT_SEL,
914 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
915 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
916 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
917 AC_VERB_SET_PIN_WIDGET_CONTROL,
919 snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
921 /* Initially set the converter's capabilities */
922 hinfo->channels_min = per_cvt->channels_min;
923 hinfo->channels_max = per_cvt->channels_max;
924 hinfo->rates = per_cvt->rates;
925 hinfo->formats = per_cvt->formats;
926 hinfo->maxbps = per_cvt->maxbps;
928 /* Restrict capabilities by ELD if this isn't disabled */
929 if (!static_hdmi_pcm && eld->eld_valid) {
930 snd_hdmi_eld_update_pcm_info(eld, hinfo);
931 if (hinfo->channels_min > hinfo->channels_max ||
932 !hinfo->rates || !hinfo->formats)
936 /* Store the updated parameters */
937 runtime->hw.channels_min = hinfo->channels_min;
938 runtime->hw.channels_max = hinfo->channels_max;
939 runtime->hw.formats = hinfo->formats;
940 runtime->hw.rates = hinfo->rates;
942 snd_pcm_hw_constraint_step(substream->runtime, 0,
943 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
948 * HDA/HDMI auto parsing
950 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
952 struct hdmi_spec *spec = codec->spec;
953 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
954 hda_nid_t pin_nid = per_pin->pin_nid;
956 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
957 snd_printk(KERN_WARNING
958 "HDMI: pin %d wcaps %#x "
959 "does not support connection list\n",
960 pin_nid, get_wcaps(codec, pin_nid));
964 per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
966 HDA_MAX_CONNECTIONS);
971 static void hdmi_present_sense(struct hda_codec *codec, hda_nid_t pin_nid,
972 struct hdmi_eld *eld)
975 * Always execute a GetPinSense verb here, even when called from
976 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
977 * response's PD bit is not the real PD value, but indicates that
978 * the real PD value changed. An older version of the HD-audio
979 * specification worked this way. Hence, we just ignore the data in
980 * the unsolicited response to avoid custom WARs.
982 int present = snd_hda_pin_sense(codec, pin_nid);
983 bool eld_valid = false;
985 memset(eld, 0, offsetof(struct hdmi_eld, eld_buffer));
987 eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
988 if (eld->monitor_present)
989 eld_valid = !!(present & AC_PINSENSE_ELDV);
992 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
993 codec->addr, pin_nid, eld->monitor_present, eld_valid);
996 if (!snd_hdmi_get_eld(eld, codec, pin_nid))
997 snd_hdmi_show_eld(eld);
999 snd_hda_input_jack_report(codec, pin_nid);
1002 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1004 struct hdmi_spec *spec = codec->spec;
1005 unsigned int caps, config;
1007 struct hdmi_spec_per_pin *per_pin;
1010 caps = snd_hda_param_read(codec, pin_nid, AC_PAR_PIN_CAP);
1011 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1014 config = snd_hda_codec_read(codec, pin_nid, 0,
1015 AC_VERB_GET_CONFIG_DEFAULT, 0);
1016 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1019 if (snd_BUG_ON(spec->num_pins >= MAX_HDMI_PINS))
1022 pin_idx = spec->num_pins;
1023 per_pin = &spec->pins[pin_idx];
1025 per_pin->pin_nid = pin_nid;
1027 err = hdmi_read_pin_conn(codec, pin_idx);
1036 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1038 struct hdmi_spec *spec = codec->spec;
1040 struct hdmi_spec_per_cvt *per_cvt;
1044 if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS))
1047 chans = get_wcaps(codec, cvt_nid);
1048 chans = get_wcaps_channels(chans);
1050 cvt_idx = spec->num_cvts;
1051 per_cvt = &spec->cvts[cvt_idx];
1053 per_cvt->cvt_nid = cvt_nid;
1054 per_cvt->channels_min = 2;
1056 per_cvt->channels_max = chans;
1058 err = snd_hda_query_supported_pcm(codec, cvt_nid,
1070 static int hdmi_parse_codec(struct hda_codec *codec)
1075 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1076 if (!nid || nodes < 0) {
1077 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1081 for (i = 0; i < nodes; i++, nid++) {
1085 caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP);
1086 type = get_wcaps_type(caps);
1088 if (!(caps & AC_WCAP_DIGITAL))
1092 case AC_WID_AUD_OUT:
1093 hdmi_add_cvt(codec, nid);
1096 hdmi_add_pin(codec, nid);
1102 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1103 * can be lost and presence sense verb will become inaccurate if the
1104 * HDA link is powered off at hot plug or hw initialization time.
1106 #ifdef CONFIG_SND_HDA_POWER_SAVE
1107 if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1109 codec->bus->power_keep_link_on = 1;
1117 static char *generic_hdmi_pcm_names[MAX_HDMI_PINS] = {
1128 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1129 struct hda_codec *codec,
1130 unsigned int stream_tag,
1131 unsigned int format,
1132 struct snd_pcm_substream *substream)
1134 hda_nid_t cvt_nid = hinfo->nid;
1135 struct hdmi_spec *spec = codec->spec;
1136 int pin_idx = hinfo_to_pin_index(spec, hinfo);
1137 hda_nid_t pin_nid = spec->pins[pin_idx].pin_nid;
1139 hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
1141 hdmi_setup_audio_infoframe(codec, pin_idx, substream);
1143 return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1146 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1147 struct hda_codec *codec,
1148 struct snd_pcm_substream *substream)
1150 struct hdmi_spec *spec = codec->spec;
1151 int cvt_idx, pin_idx;
1152 struct hdmi_spec_per_cvt *per_cvt;
1153 struct hdmi_spec_per_pin *per_pin;
1156 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1159 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1160 if (snd_BUG_ON(cvt_idx < 0))
1162 per_cvt = &spec->cvts[cvt_idx];
1164 snd_BUG_ON(!per_cvt->assigned);
1165 per_cvt->assigned = 0;
1168 pin_idx = hinfo_to_pin_index(spec, hinfo);
1169 if (snd_BUG_ON(pin_idx < 0))
1171 per_pin = &spec->pins[pin_idx];
1173 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1174 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1175 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1176 AC_VERB_SET_PIN_WIDGET_CONTROL,
1178 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1184 static const struct hda_pcm_ops generic_ops = {
1185 .open = hdmi_pcm_open,
1186 .prepare = generic_hdmi_playback_pcm_prepare,
1187 .cleanup = generic_hdmi_playback_pcm_cleanup,
1190 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1192 struct hdmi_spec *spec = codec->spec;
1195 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1196 struct hda_pcm *info;
1197 struct hda_pcm_stream *pstr;
1199 info = &spec->pcm_rec[pin_idx];
1200 info->name = generic_hdmi_pcm_names[pin_idx];
1201 info->pcm_type = HDA_PCM_TYPE_HDMI;
1203 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1204 pstr->substreams = 1;
1205 pstr->ops = generic_ops;
1206 /* other pstr fields are set in open */
1209 codec->num_pcms = spec->num_pins;
1210 codec->pcm_info = spec->pcm_rec;
1215 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1219 struct hdmi_spec *spec = codec->spec;
1220 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1221 int pcmdev = spec->pcm_rec[pin_idx].device;
1223 snprintf(hdmi_str, sizeof(hdmi_str), "HDMI/DP,pcm=%d", pcmdev);
1225 err = snd_hda_input_jack_add(codec, per_pin->pin_nid,
1226 SND_JACK_VIDEOOUT, pcmdev > 0 ? hdmi_str : NULL);
1230 hdmi_present_sense(codec, per_pin->pin_nid, &per_pin->sink_eld);
1234 static int generic_hdmi_build_controls(struct hda_codec *codec)
1236 struct hdmi_spec *spec = codec->spec;
1240 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1241 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1243 err = generic_hdmi_build_jack(codec, pin_idx);
1247 err = snd_hda_create_spdif_out_ctls(codec,
1249 per_pin->mux_nids[0]);
1252 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1254 /* add control for ELD Bytes */
1255 err = hdmi_create_eld_ctl(codec,
1257 spec->pcm_rec[pin_idx].device);
1266 static int generic_hdmi_init(struct hda_codec *codec)
1268 struct hdmi_spec *spec = codec->spec;
1271 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1272 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1273 hda_nid_t pin_nid = per_pin->pin_nid;
1274 struct hdmi_eld *eld = &per_pin->sink_eld;
1276 hdmi_init_pin(codec, pin_nid);
1277 snd_hda_codec_write(codec, pin_nid, 0,
1278 AC_VERB_SET_UNSOLICITED_ENABLE,
1279 AC_USRSP_EN | pin_nid);
1281 snd_hda_eld_proc_new(codec, eld, pin_idx);
1286 static void generic_hdmi_free(struct hda_codec *codec)
1288 struct hdmi_spec *spec = codec->spec;
1291 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1292 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1293 struct hdmi_eld *eld = &per_pin->sink_eld;
1295 snd_hda_eld_proc_free(codec, eld);
1297 snd_hda_input_jack_free(codec);
1302 static const struct hda_codec_ops generic_hdmi_patch_ops = {
1303 .init = generic_hdmi_init,
1304 .free = generic_hdmi_free,
1305 .build_pcms = generic_hdmi_build_pcms,
1306 .build_controls = generic_hdmi_build_controls,
1307 .unsol_event = hdmi_unsol_event,
1310 static int patch_generic_hdmi(struct hda_codec *codec)
1312 struct hdmi_spec *spec;
1314 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1319 if (hdmi_parse_codec(codec) < 0) {
1324 codec->patch_ops = generic_hdmi_patch_ops;
1326 init_channel_allocations();
1332 * Shared non-generic implementations
1335 static int simple_playback_build_pcms(struct hda_codec *codec)
1337 struct hdmi_spec *spec = codec->spec;
1338 struct hda_pcm *info = spec->pcm_rec;
1341 codec->num_pcms = spec->num_cvts;
1342 codec->pcm_info = info;
1344 for (i = 0; i < codec->num_pcms; i++, info++) {
1346 struct hda_pcm_stream *pstr;
1348 chans = get_wcaps(codec, spec->cvts[i].cvt_nid);
1349 chans = get_wcaps_channels(chans);
1351 info->name = generic_hdmi_pcm_names[i];
1352 info->pcm_type = HDA_PCM_TYPE_HDMI;
1353 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1354 snd_BUG_ON(!spec->pcm_playback);
1355 *pstr = *spec->pcm_playback;
1356 pstr->nid = spec->cvts[i].cvt_nid;
1357 if (pstr->channels_max <= 2 && chans && chans <= 16)
1358 pstr->channels_max = chans;
1364 static int simple_playback_build_controls(struct hda_codec *codec)
1366 struct hdmi_spec *spec = codec->spec;
1370 for (i = 0; i < codec->num_pcms; i++) {
1371 err = snd_hda_create_spdif_out_ctls(codec,
1372 spec->cvts[i].cvt_nid,
1373 spec->cvts[i].cvt_nid);
1381 static void simple_playback_free(struct hda_codec *codec)
1383 struct hdmi_spec *spec = codec->spec;
1389 * Nvidia specific implementations
1392 #define Nv_VERB_SET_Channel_Allocation 0xF79
1393 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
1394 #define Nv_VERB_SET_Audio_Protection_On 0xF98
1395 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
1397 #define nvhdmi_master_con_nid_7x 0x04
1398 #define nvhdmi_master_pin_nid_7x 0x05
1400 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
1401 /*front, rear, clfe, rear_surr */
1405 static const struct hda_verb nvhdmi_basic_init_7x[] = {
1406 /* set audio protect on */
1407 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1408 /* enable digital output on pin widget */
1409 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1410 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1411 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1412 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1413 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1417 #ifdef LIMITED_RATE_FMT_SUPPORT
1418 /* support only the safe format and rate */
1419 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
1420 #define SUPPORTED_MAXBPS 16
1421 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
1423 /* support all rates and formats */
1424 #define SUPPORTED_RATES \
1425 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1426 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
1427 SNDRV_PCM_RATE_192000)
1428 #define SUPPORTED_MAXBPS 24
1429 #define SUPPORTED_FORMATS \
1430 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
1433 static int nvhdmi_7x_init(struct hda_codec *codec)
1435 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x);
1439 static unsigned int channels_2_6_8[] = {
1443 static unsigned int channels_2_8[] = {
1447 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
1448 .count = ARRAY_SIZE(channels_2_6_8),
1449 .list = channels_2_6_8,
1453 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
1454 .count = ARRAY_SIZE(channels_2_8),
1455 .list = channels_2_8,
1459 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
1460 struct hda_codec *codec,
1461 struct snd_pcm_substream *substream)
1463 struct hdmi_spec *spec = codec->spec;
1464 struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
1466 switch (codec->preset->id) {
1471 hw_constraints_channels = &hw_constraints_2_8_channels;
1474 hw_constraints_channels = &hw_constraints_2_6_8_channels;
1480 if (hw_constraints_channels != NULL) {
1481 snd_pcm_hw_constraint_list(substream->runtime, 0,
1482 SNDRV_PCM_HW_PARAM_CHANNELS,
1483 hw_constraints_channels);
1485 snd_pcm_hw_constraint_step(substream->runtime, 0,
1486 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1489 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1492 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
1493 struct hda_codec *codec,
1494 struct snd_pcm_substream *substream)
1496 struct hdmi_spec *spec = codec->spec;
1497 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1500 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1501 struct hda_codec *codec,
1502 unsigned int stream_tag,
1503 unsigned int format,
1504 struct snd_pcm_substream *substream)
1506 struct hdmi_spec *spec = codec->spec;
1507 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1508 stream_tag, format, substream);
1511 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
1514 unsigned int chanmask;
1515 int chan = channels ? (channels - 1) : 1;
1534 /* Set the audio infoframe channel allocation and checksum fields. The
1535 * channel count is computed implicitly by the hardware. */
1536 snd_hda_codec_write(codec, 0x1, 0,
1537 Nv_VERB_SET_Channel_Allocation, chanmask);
1539 snd_hda_codec_write(codec, 0x1, 0,
1540 Nv_VERB_SET_Info_Frame_Checksum,
1541 (0x71 - chan - chanmask));
1544 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
1545 struct hda_codec *codec,
1546 struct snd_pcm_substream *substream)
1548 struct hdmi_spec *spec = codec->spec;
1551 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
1552 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
1553 for (i = 0; i < 4; i++) {
1554 /* set the stream id */
1555 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1556 AC_VERB_SET_CHANNEL_STREAMID, 0);
1557 /* set the stream format */
1558 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1559 AC_VERB_SET_STREAM_FORMAT, 0);
1562 /* The audio hardware sends a channel count of 0x7 (8ch) when all the
1563 * streams are disabled. */
1564 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1566 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1569 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
1570 struct hda_codec *codec,
1571 unsigned int stream_tag,
1572 unsigned int format,
1573 struct snd_pcm_substream *substream)
1576 unsigned int dataDCC2, channel_id;
1578 struct hdmi_spec *spec = codec->spec;
1579 struct hda_spdif_out *spdif =
1580 snd_hda_spdif_out_of_nid(codec, spec->cvts[0].cvt_nid);
1582 mutex_lock(&codec->spdif_mutex);
1584 chs = substream->runtime->channels;
1588 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
1589 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
1590 snd_hda_codec_write(codec,
1591 nvhdmi_master_con_nid_7x,
1593 AC_VERB_SET_DIGI_CONVERT_1,
1594 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
1596 /* set the stream id */
1597 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1598 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
1600 /* set the stream format */
1601 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1602 AC_VERB_SET_STREAM_FORMAT, format);
1604 /* turn on again (if needed) */
1605 /* enable and set the channel status audio/data flag */
1606 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
1607 snd_hda_codec_write(codec,
1608 nvhdmi_master_con_nid_7x,
1610 AC_VERB_SET_DIGI_CONVERT_1,
1611 spdif->ctls & 0xff);
1612 snd_hda_codec_write(codec,
1613 nvhdmi_master_con_nid_7x,
1615 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1618 for (i = 0; i < 4; i++) {
1624 /* turn off SPDIF once;
1625 *otherwise the IEC958 bits won't be updated
1627 if (codec->spdif_status_reset &&
1628 (spdif->ctls & AC_DIG1_ENABLE))
1629 snd_hda_codec_write(codec,
1630 nvhdmi_con_nids_7x[i],
1632 AC_VERB_SET_DIGI_CONVERT_1,
1633 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
1634 /* set the stream id */
1635 snd_hda_codec_write(codec,
1636 nvhdmi_con_nids_7x[i],
1638 AC_VERB_SET_CHANNEL_STREAMID,
1639 (stream_tag << 4) | channel_id);
1640 /* set the stream format */
1641 snd_hda_codec_write(codec,
1642 nvhdmi_con_nids_7x[i],
1644 AC_VERB_SET_STREAM_FORMAT,
1646 /* turn on again (if needed) */
1647 /* enable and set the channel status audio/data flag */
1648 if (codec->spdif_status_reset &&
1649 (spdif->ctls & AC_DIG1_ENABLE)) {
1650 snd_hda_codec_write(codec,
1651 nvhdmi_con_nids_7x[i],
1653 AC_VERB_SET_DIGI_CONVERT_1,
1654 spdif->ctls & 0xff);
1655 snd_hda_codec_write(codec,
1656 nvhdmi_con_nids_7x[i],
1658 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1662 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
1664 mutex_unlock(&codec->spdif_mutex);
1668 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
1672 .nid = nvhdmi_master_con_nid_7x,
1673 .rates = SUPPORTED_RATES,
1674 .maxbps = SUPPORTED_MAXBPS,
1675 .formats = SUPPORTED_FORMATS,
1677 .open = simple_playback_pcm_open,
1678 .close = nvhdmi_8ch_7x_pcm_close,
1679 .prepare = nvhdmi_8ch_7x_pcm_prepare
1683 static const struct hda_pcm_stream nvhdmi_pcm_playback_2ch = {
1687 .nid = nvhdmi_master_con_nid_7x,
1688 .rates = SUPPORTED_RATES,
1689 .maxbps = SUPPORTED_MAXBPS,
1690 .formats = SUPPORTED_FORMATS,
1692 .open = simple_playback_pcm_open,
1693 .close = simple_playback_pcm_close,
1694 .prepare = simple_playback_pcm_prepare
1698 static const struct hda_codec_ops nvhdmi_patch_ops_8ch_7x = {
1699 .build_controls = simple_playback_build_controls,
1700 .build_pcms = simple_playback_build_pcms,
1701 .init = nvhdmi_7x_init,
1702 .free = simple_playback_free,
1705 static const struct hda_codec_ops nvhdmi_patch_ops_2ch = {
1706 .build_controls = simple_playback_build_controls,
1707 .build_pcms = simple_playback_build_pcms,
1708 .init = nvhdmi_7x_init,
1709 .free = simple_playback_free,
1712 static int patch_nvhdmi_2ch(struct hda_codec *codec)
1714 struct hdmi_spec *spec;
1716 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1722 spec->multiout.num_dacs = 0; /* no analog */
1723 spec->multiout.max_channels = 2;
1724 spec->multiout.dig_out_nid = nvhdmi_master_con_nid_7x;
1726 spec->cvts[0].cvt_nid = nvhdmi_master_con_nid_7x;
1727 spec->pcm_playback = &nvhdmi_pcm_playback_2ch;
1729 codec->patch_ops = nvhdmi_patch_ops_2ch;
1734 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
1736 struct hdmi_spec *spec;
1737 int err = patch_nvhdmi_2ch(codec);
1742 spec->multiout.max_channels = 8;
1743 spec->pcm_playback = &nvhdmi_pcm_playback_8ch_7x;
1744 codec->patch_ops = nvhdmi_patch_ops_8ch_7x;
1746 /* Initialize the audio infoframe channel mask and checksum to something
1748 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1754 * ATI-specific implementations
1756 * FIXME: we may omit the whole this and use the generic code once after
1757 * it's confirmed to work.
1760 #define ATIHDMI_CVT_NID 0x02 /* audio converter */
1761 #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
1763 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1764 struct hda_codec *codec,
1765 unsigned int stream_tag,
1766 unsigned int format,
1767 struct snd_pcm_substream *substream)
1769 struct hdmi_spec *spec = codec->spec;
1770 int chans = substream->runtime->channels;
1773 err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
1777 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
1778 AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
1780 for (i = 0; i < chans; i++) {
1781 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
1782 AC_VERB_SET_HDMI_CHAN_SLOT,
1788 static const struct hda_pcm_stream atihdmi_pcm_digital_playback = {
1792 .nid = ATIHDMI_CVT_NID,
1794 .open = simple_playback_pcm_open,
1795 .close = simple_playback_pcm_close,
1796 .prepare = atihdmi_playback_pcm_prepare
1800 static const struct hda_verb atihdmi_basic_init[] = {
1801 /* enable digital output on pin widget */
1802 { 0x03, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },
1806 static int atihdmi_init(struct hda_codec *codec)
1808 struct hdmi_spec *spec = codec->spec;
1810 snd_hda_sequence_write(codec, atihdmi_basic_init);
1811 /* SI codec requires to unmute the pin */
1812 if (get_wcaps(codec, spec->pins[0].pin_nid) & AC_WCAP_OUT_AMP)
1813 snd_hda_codec_write(codec, spec->pins[0].pin_nid, 0,
1814 AC_VERB_SET_AMP_GAIN_MUTE,
1819 static const struct hda_codec_ops atihdmi_patch_ops = {
1820 .build_controls = simple_playback_build_controls,
1821 .build_pcms = simple_playback_build_pcms,
1822 .init = atihdmi_init,
1823 .free = simple_playback_free,
1827 static int patch_atihdmi(struct hda_codec *codec)
1829 struct hdmi_spec *spec;
1831 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1837 spec->multiout.num_dacs = 0; /* no analog */
1838 spec->multiout.max_channels = 2;
1839 spec->multiout.dig_out_nid = ATIHDMI_CVT_NID;
1841 spec->cvts[0].cvt_nid = ATIHDMI_CVT_NID;
1842 spec->pins[0].pin_nid = ATIHDMI_PIN_NID;
1843 spec->pcm_playback = &atihdmi_pcm_digital_playback;
1845 codec->patch_ops = atihdmi_patch_ops;
1854 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
1855 { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
1856 { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
1857 { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
1858 { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
1859 { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
1860 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
1861 { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
1862 { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
1863 { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
1864 { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
1865 { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
1866 { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
1867 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
1868 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
1869 { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
1870 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
1871 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
1872 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
1873 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
1874 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
1875 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
1876 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
1877 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
1878 /* 17 is known to be absent */
1879 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
1880 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
1881 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
1882 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
1883 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
1884 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
1885 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
1886 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
1887 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
1888 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
1889 { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
1890 { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
1891 { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
1892 { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
1893 { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
1894 { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
1895 { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
1896 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
1897 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
1898 { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
1902 MODULE_ALIAS("snd-hda-codec-id:1002793c");
1903 MODULE_ALIAS("snd-hda-codec-id:10027919");
1904 MODULE_ALIAS("snd-hda-codec-id:1002791a");
1905 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
1906 MODULE_ALIAS("snd-hda-codec-id:10951390");
1907 MODULE_ALIAS("snd-hda-codec-id:10951392");
1908 MODULE_ALIAS("snd-hda-codec-id:10de0002");
1909 MODULE_ALIAS("snd-hda-codec-id:10de0003");
1910 MODULE_ALIAS("snd-hda-codec-id:10de0005");
1911 MODULE_ALIAS("snd-hda-codec-id:10de0006");
1912 MODULE_ALIAS("snd-hda-codec-id:10de0007");
1913 MODULE_ALIAS("snd-hda-codec-id:10de000a");
1914 MODULE_ALIAS("snd-hda-codec-id:10de000b");
1915 MODULE_ALIAS("snd-hda-codec-id:10de000c");
1916 MODULE_ALIAS("snd-hda-codec-id:10de000d");
1917 MODULE_ALIAS("snd-hda-codec-id:10de0010");
1918 MODULE_ALIAS("snd-hda-codec-id:10de0011");
1919 MODULE_ALIAS("snd-hda-codec-id:10de0012");
1920 MODULE_ALIAS("snd-hda-codec-id:10de0013");
1921 MODULE_ALIAS("snd-hda-codec-id:10de0014");
1922 MODULE_ALIAS("snd-hda-codec-id:10de0015");
1923 MODULE_ALIAS("snd-hda-codec-id:10de0016");
1924 MODULE_ALIAS("snd-hda-codec-id:10de0018");
1925 MODULE_ALIAS("snd-hda-codec-id:10de0019");
1926 MODULE_ALIAS("snd-hda-codec-id:10de001a");
1927 MODULE_ALIAS("snd-hda-codec-id:10de001b");
1928 MODULE_ALIAS("snd-hda-codec-id:10de001c");
1929 MODULE_ALIAS("snd-hda-codec-id:10de0040");
1930 MODULE_ALIAS("snd-hda-codec-id:10de0041");
1931 MODULE_ALIAS("snd-hda-codec-id:10de0042");
1932 MODULE_ALIAS("snd-hda-codec-id:10de0043");
1933 MODULE_ALIAS("snd-hda-codec-id:10de0044");
1934 MODULE_ALIAS("snd-hda-codec-id:10de0067");
1935 MODULE_ALIAS("snd-hda-codec-id:10de8001");
1936 MODULE_ALIAS("snd-hda-codec-id:17e80047");
1937 MODULE_ALIAS("snd-hda-codec-id:80860054");
1938 MODULE_ALIAS("snd-hda-codec-id:80862801");
1939 MODULE_ALIAS("snd-hda-codec-id:80862802");
1940 MODULE_ALIAS("snd-hda-codec-id:80862803");
1941 MODULE_ALIAS("snd-hda-codec-id:80862804");
1942 MODULE_ALIAS("snd-hda-codec-id:80862805");
1943 MODULE_ALIAS("snd-hda-codec-id:80862806");
1944 MODULE_ALIAS("snd-hda-codec-id:808629fb");
1946 MODULE_LICENSE("GPL");
1947 MODULE_DESCRIPTION("HDMI HD-audio codec");
1948 MODULE_ALIAS("snd-hda-codec-intelhdmi");
1949 MODULE_ALIAS("snd-hda-codec-nvhdmi");
1950 MODULE_ALIAS("snd-hda-codec-atihdmi");
1952 static struct hda_codec_preset_list intel_list = {
1953 .preset = snd_hda_preset_hdmi,
1954 .owner = THIS_MODULE,
1957 static int __init patch_hdmi_init(void)
1959 return snd_hda_add_codec_preset(&intel_list);
1962 static void __exit patch_hdmi_exit(void)
1964 snd_hda_delete_codec_preset(&intel_list);
1967 module_init(patch_hdmi_init)
1968 module_exit(patch_hdmi_exit)