3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6 * Copyright (c) 2006 ATI Technologies Inc.
7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
11 * Wu Fengguang <wfg@linux.intel.com>
14 * Wu Fengguang <wfg@linux.intel.com>
16 * This program is free software; you can redistribute it and/or modify it
17 * under the terms of the GNU General Public License as published by the Free
18 * Software Foundation; either version 2 of the License, or (at your option)
21 * This program is distributed in the hope that it will be useful, but
22 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
23 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software Foundation,
28 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
31 #include <linux/init.h>
32 #include <linux/delay.h>
33 #include <linux/slab.h>
34 #include <linux/module.h>
35 #include <sound/core.h>
36 #include <sound/jack.h>
37 #include <sound/asoundef.h>
38 #include <sound/tlv.h>
39 #include "hda_codec.h"
40 #include "hda_local.h"
43 static bool static_hdmi_pcm;
44 module_param(static_hdmi_pcm, bool, 0644);
45 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
47 struct hdmi_spec_per_cvt {
50 unsigned int channels_min;
51 unsigned int channels_max;
57 /* max. connections to a widget */
58 #define HDA_MAX_CONNECTIONS 32
60 struct hdmi_spec_per_pin {
63 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
65 struct hda_codec *codec;
66 struct hdmi_eld sink_eld;
67 struct delayed_work work;
68 struct snd_kcontrol *eld_ctl;
71 bool chmap_set; /* channel-map override by ALSA API? */
72 unsigned char chmap[8]; /* ALSA API channel-map */
73 char pcm_name[8]; /* filled in build_pcm callbacks */
78 struct snd_array cvts; /* struct hdmi_spec_per_cvt */
79 hda_nid_t cvt_nids[4]; /* only for haswell fix */
82 struct snd_array pins; /* struct hdmi_spec_per_pin */
83 struct snd_array pcm_rec; /* struct hda_pcm */
84 unsigned int channels_max; /* max over all cvts */
86 struct hdmi_eld temp_eld;
88 * Non-generic ATI/NVIDIA specific
90 struct hda_multi_out multiout;
91 struct hda_pcm_stream pcm_playback;
95 struct hdmi_audio_infoframe {
102 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
106 u8 LFEPBL01_LSV36_DM_INH7;
109 struct dp_audio_infoframe {
112 u8 ver; /* 0x11 << 2 */
114 u8 CC02_CT47; /* match with HDMI infoframe from this on */
118 u8 LFEPBL01_LSV36_DM_INH7;
121 union audio_infoframe {
122 struct hdmi_audio_infoframe hdmi;
123 struct dp_audio_infoframe dp;
128 * CEA speaker placement:
131 * FLW FL FLC FC FRC FR FRW
138 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
139 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
141 enum cea_speaker_placement {
142 FL = (1 << 0), /* Front Left */
143 FC = (1 << 1), /* Front Center */
144 FR = (1 << 2), /* Front Right */
145 FLC = (1 << 3), /* Front Left Center */
146 FRC = (1 << 4), /* Front Right Center */
147 RL = (1 << 5), /* Rear Left */
148 RC = (1 << 6), /* Rear Center */
149 RR = (1 << 7), /* Rear Right */
150 RLC = (1 << 8), /* Rear Left Center */
151 RRC = (1 << 9), /* Rear Right Center */
152 LFE = (1 << 10), /* Low Frequency Effect */
153 FLW = (1 << 11), /* Front Left Wide */
154 FRW = (1 << 12), /* Front Right Wide */
155 FLH = (1 << 13), /* Front Left High */
156 FCH = (1 << 14), /* Front Center High */
157 FRH = (1 << 15), /* Front Right High */
158 TC = (1 << 16), /* Top Center */
162 * ELD SA bits in the CEA Speaker Allocation data block
164 static int eld_speaker_allocation_bits[] = {
172 /* the following are not defined in ELD yet */
179 struct cea_channel_speaker_allocation {
183 /* derived values, just for convenience */
191 * surround40 surround41 surround50 surround51 surround71
192 * ch0 front left = = = =
193 * ch1 front right = = = =
194 * ch2 rear left = = = =
195 * ch3 rear right = = = =
196 * ch4 LFE center center center
201 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
203 static int hdmi_channel_mapping[0x32][8] = {
205 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
207 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
209 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
211 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
213 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
215 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
217 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
219 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
221 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
225 * This is an ordered list!
227 * The preceding ones have better chances to be selected by
228 * hdmi_channel_allocation().
230 static struct cea_channel_speaker_allocation channel_allocations[] = {
231 /* channel: 7 6 5 4 3 2 1 0 */
232 { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
234 { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
236 { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
238 { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
240 { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
242 { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
244 { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
246 { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
248 { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
250 { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
251 { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
252 { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
253 { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
254 { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
255 { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
256 { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
257 { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
258 { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
259 { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
260 { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
261 { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
262 { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
263 { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
264 { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
265 { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
266 { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
267 { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
268 { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
269 { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
270 { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
271 { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
272 { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
273 { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
274 { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
275 { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
276 { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
277 { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
278 { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
279 { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
280 { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
281 { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
282 { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
283 { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
284 { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
285 { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
286 { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
287 { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
288 { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
289 { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
290 { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
298 #define get_pin(spec, idx) \
299 ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
300 #define get_cvt(spec, idx) \
301 ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
302 #define get_pcm_rec(spec, idx) \
303 ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
305 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
309 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
310 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
313 snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
317 static int hinfo_to_pin_index(struct hdmi_spec *spec,
318 struct hda_pcm_stream *hinfo)
322 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
323 if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
326 snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
330 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
334 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
335 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
338 snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
342 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
343 struct snd_ctl_elem_info *uinfo)
345 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
346 struct hdmi_spec *spec = codec->spec;
347 struct hdmi_eld *eld;
350 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
352 pin_idx = kcontrol->private_value;
353 eld = &get_pin(spec, pin_idx)->sink_eld;
355 mutex_lock(&eld->lock);
356 uinfo->count = eld->eld_valid ? eld->eld_size : 0;
357 mutex_unlock(&eld->lock);
362 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
363 struct snd_ctl_elem_value *ucontrol)
365 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
366 struct hdmi_spec *spec = codec->spec;
367 struct hdmi_eld *eld;
370 pin_idx = kcontrol->private_value;
371 eld = &get_pin(spec, pin_idx)->sink_eld;
373 mutex_lock(&eld->lock);
374 if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
375 mutex_unlock(&eld->lock);
380 memset(ucontrol->value.bytes.data, 0,
381 ARRAY_SIZE(ucontrol->value.bytes.data));
383 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
385 mutex_unlock(&eld->lock);
390 static struct snd_kcontrol_new eld_bytes_ctl = {
391 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
392 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
394 .info = hdmi_eld_ctl_info,
395 .get = hdmi_eld_ctl_get,
398 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
401 struct snd_kcontrol *kctl;
402 struct hdmi_spec *spec = codec->spec;
405 kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
408 kctl->private_value = pin_idx;
409 kctl->id.device = device;
411 err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
415 get_pin(spec, pin_idx)->eld_ctl = kctl;
420 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
421 int *packet_index, int *byte_index)
425 val = snd_hda_codec_read(codec, pin_nid, 0,
426 AC_VERB_GET_HDMI_DIP_INDEX, 0);
428 *packet_index = val >> 5;
429 *byte_index = val & 0x1f;
433 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
434 int packet_index, int byte_index)
438 val = (packet_index << 5) | (byte_index & 0x1f);
440 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
443 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
446 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
449 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
452 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
453 snd_hda_codec_write(codec, pin_nid, 0,
454 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
455 /* Enable pin out: some machines with GM965 gets broken output when
456 * the pin is disabled or changed while using with HDMI
458 snd_hda_codec_write(codec, pin_nid, 0,
459 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
462 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
464 return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
465 AC_VERB_GET_CVT_CHAN_COUNT, 0);
468 static void hdmi_set_channel_count(struct hda_codec *codec,
469 hda_nid_t cvt_nid, int chs)
471 if (chs != hdmi_get_channel_count(codec, cvt_nid))
472 snd_hda_codec_write(codec, cvt_nid, 0,
473 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
478 * Channel mapping routines
482 * Compute derived values in channel_allocations[].
484 static void init_channel_allocations(void)
487 struct cea_channel_speaker_allocation *p;
489 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
490 p = channel_allocations + i;
493 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
494 if (p->speakers[j]) {
496 p->spk_mask |= p->speakers[j];
501 static int get_channel_allocation_order(int ca)
505 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
506 if (channel_allocations[i].ca_index == ca)
513 * The transformation takes two steps:
515 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
516 * spk_mask => (channel_allocations[]) => ai->CA
518 * TODO: it could select the wrong CA from multiple candidates.
520 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
525 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
528 * CA defaults to 0 for basic stereo audio
534 * expand ELD's speaker allocation mask
536 * ELD tells the speaker mask in a compact(paired) form,
537 * expand ELD's notions to match the ones used by Audio InfoFrame.
539 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
540 if (eld->info.spk_alloc & (1 << i))
541 spk_mask |= eld_speaker_allocation_bits[i];
544 /* search for the first working match in the CA table */
545 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
546 if (channels == channel_allocations[i].channels &&
547 (spk_mask & channel_allocations[i].spk_mask) ==
548 channel_allocations[i].spk_mask) {
549 ca = channel_allocations[i].ca_index;
554 snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
555 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
561 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
564 #ifdef CONFIG_SND_DEBUG_VERBOSE
568 for (i = 0; i < 8; i++) {
569 slot = snd_hda_codec_read(codec, pin_nid, 0,
570 AC_VERB_GET_HDMI_CHAN_SLOT, i);
571 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
572 slot >> 4, slot & 0xf);
578 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
586 int non_pcm_mapping[8];
588 order = get_channel_allocation_order(ca);
590 if (hdmi_channel_mapping[ca][1] == 0) {
591 for (i = 0; i < channel_allocations[order].channels; i++)
592 hdmi_channel_mapping[ca][i] = i | (i << 4);
594 hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
598 for (i = 0; i < channel_allocations[order].channels; i++)
599 non_pcm_mapping[i] = i | (i << 4);
601 non_pcm_mapping[i] = 0xf | (i << 4);
604 for (i = 0; i < 8; i++) {
605 err = snd_hda_codec_write(codec, pin_nid, 0,
606 AC_VERB_SET_HDMI_CHAN_SLOT,
607 non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
609 snd_printdd(KERN_NOTICE
610 "HDMI: channel mapping failed\n");
615 hdmi_debug_channel_mapping(codec, pin_nid);
618 struct channel_map_table {
619 unsigned char map; /* ALSA API channel map position */
620 unsigned char cea_slot; /* CEA slot value */
621 int spk_mask; /* speaker position bit mask */
624 static struct channel_map_table map_tables[] = {
625 { SNDRV_CHMAP_FL, 0x00, FL },
626 { SNDRV_CHMAP_FR, 0x01, FR },
627 { SNDRV_CHMAP_RL, 0x04, RL },
628 { SNDRV_CHMAP_RR, 0x05, RR },
629 { SNDRV_CHMAP_LFE, 0x02, LFE },
630 { SNDRV_CHMAP_FC, 0x03, FC },
631 { SNDRV_CHMAP_RLC, 0x06, RLC },
632 { SNDRV_CHMAP_RRC, 0x07, RRC },
636 /* from ALSA API channel position to speaker bit mask */
637 static int to_spk_mask(unsigned char c)
639 struct channel_map_table *t = map_tables;
640 for (; t->map; t++) {
647 /* from ALSA API channel position to CEA slot */
648 static int to_cea_slot(unsigned char c)
650 struct channel_map_table *t = map_tables;
651 for (; t->map; t++) {
658 /* from CEA slot to ALSA API channel position */
659 static int from_cea_slot(unsigned char c)
661 struct channel_map_table *t = map_tables;
662 for (; t->map; t++) {
663 if (t->cea_slot == c)
669 /* from speaker bit mask to ALSA API channel position */
670 static int spk_to_chmap(int spk)
672 struct channel_map_table *t = map_tables;
673 for (; t->map; t++) {
674 if (t->spk_mask == spk)
680 /* get the CA index corresponding to the given ALSA API channel map */
681 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
683 int i, spks = 0, spk_mask = 0;
685 for (i = 0; i < chs; i++) {
686 int mask = to_spk_mask(map[i]);
693 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
694 if ((chs == channel_allocations[i].channels ||
695 spks == channel_allocations[i].channels) &&
696 (spk_mask & channel_allocations[i].spk_mask) ==
697 channel_allocations[i].spk_mask)
698 return channel_allocations[i].ca_index;
703 /* set up the channel slots for the given ALSA API channel map */
704 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
706 int chs, unsigned char *map)
709 for (i = 0; i < 8; i++) {
712 val = to_cea_slot(map[i]);
716 err = snd_hda_codec_write(codec, pin_nid, 0,
717 AC_VERB_SET_HDMI_CHAN_SLOT, val);
724 /* store ALSA API channel map from the current default map */
725 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
728 for (i = 0; i < 8; i++) {
729 if (i < channel_allocations[ca].channels)
730 map[i] = from_cea_slot((hdmi_channel_mapping[ca][i] >> 4) & 0x0f);
736 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
737 hda_nid_t pin_nid, bool non_pcm, int ca,
738 int channels, unsigned char *map,
741 if (!non_pcm && chmap_set) {
742 hdmi_manual_setup_channel_mapping(codec, pin_nid,
745 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
746 hdmi_setup_fake_chmap(map, ca);
751 * Audio InfoFrame routines
755 * Enable Audio InfoFrame Transmission
757 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
760 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
761 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
766 * Disable Audio InfoFrame Transmission
768 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
771 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
772 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
776 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
778 #ifdef CONFIG_SND_DEBUG_VERBOSE
782 size = snd_hdmi_get_eld_size(codec, pin_nid);
783 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
785 for (i = 0; i < 8; i++) {
786 size = snd_hda_codec_read(codec, pin_nid, 0,
787 AC_VERB_GET_HDMI_DIP_SIZE, i);
788 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
793 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
799 for (i = 0; i < 8; i++) {
800 size = snd_hda_codec_read(codec, pin_nid, 0,
801 AC_VERB_GET_HDMI_DIP_SIZE, i);
805 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
806 for (j = 1; j < 1000; j++) {
807 hdmi_write_dip_byte(codec, pin_nid, 0x0);
808 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
810 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
812 if (bi == 0) /* byte index wrapped around */
816 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
822 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
824 u8 *bytes = (u8 *)hdmi_ai;
828 hdmi_ai->checksum = 0;
830 for (i = 0; i < sizeof(*hdmi_ai); i++)
833 hdmi_ai->checksum = -sum;
836 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
842 hdmi_debug_dip_size(codec, pin_nid);
843 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
845 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
846 for (i = 0; i < size; i++)
847 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
850 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
856 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
860 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
861 for (i = 0; i < size; i++) {
862 val = snd_hda_codec_read(codec, pin_nid, 0,
863 AC_VERB_GET_HDMI_DIP_DATA, 0);
871 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
873 struct snd_pcm_substream *substream)
875 struct hdmi_spec *spec = codec->spec;
876 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
877 hda_nid_t pin_nid = per_pin->pin_nid;
878 int channels = substream->runtime->channels;
879 struct hdmi_eld *eld;
881 union audio_infoframe ai;
883 eld = &per_pin->sink_eld;
884 if (!eld->monitor_present)
887 if (!non_pcm && per_pin->chmap_set)
888 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
890 ca = hdmi_channel_allocation(eld, channels);
894 memset(&ai, 0, sizeof(ai));
895 if (eld->info.conn_type == 0) { /* HDMI */
896 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
898 hdmi_ai->type = 0x84;
901 hdmi_ai->CC02_CT47 = channels - 1;
903 hdmi_checksum_audio_infoframe(hdmi_ai);
904 } else if (eld->info.conn_type == 1) { /* DisplayPort */
905 struct dp_audio_infoframe *dp_ai = &ai.dp;
909 dp_ai->ver = 0x11 << 2;
910 dp_ai->CC02_CT47 = channels - 1;
913 snd_printd("HDMI: unknown connection type at pin %d\n",
919 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
920 * sizeof(*dp_ai) to avoid partial match/update problems when
921 * the user switches between HDMI/DP monitors.
923 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
925 snd_printdd("hdmi_setup_audio_infoframe: "
926 "pin=%d channels=%d\n",
929 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
930 channels, per_pin->chmap,
932 hdmi_stop_infoframe_trans(codec, pin_nid);
933 hdmi_fill_audio_infoframe(codec, pin_nid,
934 ai.bytes, sizeof(ai));
935 hdmi_start_infoframe_trans(codec, pin_nid);
937 /* For non-pcm audio switch, setup new channel mapping
939 if (per_pin->non_pcm != non_pcm)
940 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
941 channels, per_pin->chmap,
945 per_pin->non_pcm = non_pcm;
953 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
955 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
957 struct hdmi_spec *spec = codec->spec;
958 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
961 struct hda_jack_tbl *jack;
963 jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
967 jack->jack_dirty = 1;
969 _snd_printd(SND_PR_VERBOSE,
970 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
971 codec->addr, pin_nid,
972 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
974 pin_idx = pin_nid_to_pin_index(spec, pin_nid);
978 hdmi_present_sense(get_pin(spec, pin_idx), 1);
979 snd_hda_jack_report_sync(codec);
982 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
984 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
985 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
986 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
987 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
990 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1005 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1007 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1008 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1010 if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1011 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
1016 hdmi_intrinsic_event(codec, res);
1018 hdmi_non_intrinsic_event(codec, res);
1021 static void haswell_verify_pin_D0(struct hda_codec *codec,
1022 hda_nid_t cvt_nid, hda_nid_t nid)
1024 int pwr, lamp, ramp;
1026 /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1027 * thus pins could only choose converter 0 for use. Make sure the
1028 * converters are in correct power state */
1029 pwr = snd_hda_codec_read(codec, cvt_nid, 0, AC_VERB_GET_POWER_STATE, 0);
1030 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1031 if (pwr != AC_PWRST_D0)
1032 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1034 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1035 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1036 if (pwr != AC_PWRST_D0) {
1037 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1040 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1041 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1042 snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1045 lamp = snd_hda_codec_read(codec, nid, 0,
1046 AC_VERB_GET_AMP_GAIN_MUTE,
1047 AC_AMP_GET_LEFT | AC_AMP_GET_OUTPUT);
1048 ramp = snd_hda_codec_read(codec, nid, 0,
1049 AC_VERB_GET_AMP_GAIN_MUTE,
1050 AC_AMP_GET_RIGHT | AC_AMP_GET_OUTPUT);
1052 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_AMP_GAIN_MUTE,
1053 AC_AMP_SET_RIGHT | AC_AMP_SET_OUTPUT | lamp);
1055 lamp = snd_hda_codec_read(codec, nid, 0,
1056 AC_VERB_GET_AMP_GAIN_MUTE,
1057 AC_AMP_GET_LEFT | AC_AMP_GET_OUTPUT);
1058 ramp = snd_hda_codec_read(codec, nid, 0,
1059 AC_VERB_GET_AMP_GAIN_MUTE,
1060 AC_AMP_GET_RIGHT | AC_AMP_GET_OUTPUT);
1061 snd_printd("Haswell HDMI audio: Mute after set on pin 0x%x: [0x%x 0x%x]\n", nid, lamp, ramp);
1069 /* HBR should be Non-PCM, 8 channels */
1070 #define is_hbr_format(format) \
1071 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1073 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1074 hda_nid_t pin_nid, u32 stream_tag, int format)
1079 if (codec->vendor_id == 0x80862807)
1080 haswell_verify_pin_D0(codec, cvt_nid, pin_nid);
1082 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1083 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1084 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1086 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1087 if (is_hbr_format(format))
1088 new_pinctl |= AC_PINCTL_EPT_HBR;
1090 new_pinctl |= AC_PINCTL_EPT_NATIVE;
1092 snd_printdd("hdmi_setup_stream: "
1093 "NID=0x%x, %spinctl=0x%x\n",
1095 pinctl == new_pinctl ? "" : "new-",
1098 if (pinctl != new_pinctl)
1099 snd_hda_codec_write(codec, pin_nid, 0,
1100 AC_VERB_SET_PIN_WIDGET_CONTROL,
1104 if (is_hbr_format(format) && !new_pinctl) {
1105 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
1109 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1116 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1117 struct hda_codec *codec,
1118 struct snd_pcm_substream *substream)
1120 struct hdmi_spec *spec = codec->spec;
1121 struct snd_pcm_runtime *runtime = substream->runtime;
1122 int pin_idx, cvt_idx, mux_idx = 0;
1123 struct hdmi_spec_per_pin *per_pin;
1124 struct hdmi_eld *eld;
1125 struct hdmi_spec_per_cvt *per_cvt = NULL;
1127 /* Validate hinfo */
1128 pin_idx = hinfo_to_pin_index(spec, hinfo);
1129 if (snd_BUG_ON(pin_idx < 0))
1131 per_pin = get_pin(spec, pin_idx);
1132 eld = &per_pin->sink_eld;
1134 /* Dynamically assign converter to stream */
1135 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1136 per_cvt = get_cvt(spec, cvt_idx);
1138 /* Must not already be assigned */
1139 if (per_cvt->assigned)
1141 /* Must be in pin's mux's list of converters */
1142 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1143 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1145 /* Not in mux list */
1146 if (mux_idx == per_pin->num_mux_nids)
1150 /* No free converters */
1151 if (cvt_idx == spec->num_cvts)
1154 /* Claim converter */
1155 per_cvt->assigned = 1;
1156 hinfo->nid = per_cvt->cvt_nid;
1158 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1159 AC_VERB_SET_CONNECT_SEL,
1161 snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1163 /* Initially set the converter's capabilities */
1164 hinfo->channels_min = per_cvt->channels_min;
1165 hinfo->channels_max = per_cvt->channels_max;
1166 hinfo->rates = per_cvt->rates;
1167 hinfo->formats = per_cvt->formats;
1168 hinfo->maxbps = per_cvt->maxbps;
1170 /* Restrict capabilities by ELD if this isn't disabled */
1171 if (!static_hdmi_pcm && eld->eld_valid) {
1172 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1173 if (hinfo->channels_min > hinfo->channels_max ||
1174 !hinfo->rates || !hinfo->formats) {
1175 per_cvt->assigned = 0;
1177 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1182 /* Store the updated parameters */
1183 runtime->hw.channels_min = hinfo->channels_min;
1184 runtime->hw.channels_max = hinfo->channels_max;
1185 runtime->hw.formats = hinfo->formats;
1186 runtime->hw.rates = hinfo->rates;
1188 snd_pcm_hw_constraint_step(substream->runtime, 0,
1189 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1194 * HDA/HDMI auto parsing
1196 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1198 struct hdmi_spec *spec = codec->spec;
1199 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1200 hda_nid_t pin_nid = per_pin->pin_nid;
1202 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1203 snd_printk(KERN_WARNING
1204 "HDMI: pin %d wcaps %#x "
1205 "does not support connection list\n",
1206 pin_nid, get_wcaps(codec, pin_nid));
1210 per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1212 HDA_MAX_CONNECTIONS);
1217 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1219 struct hda_codec *codec = per_pin->codec;
1220 struct hdmi_spec *spec = codec->spec;
1221 struct hdmi_eld *eld = &spec->temp_eld;
1222 struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1223 hda_nid_t pin_nid = per_pin->pin_nid;
1225 * Always execute a GetPinSense verb here, even when called from
1226 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1227 * response's PD bit is not the real PD value, but indicates that
1228 * the real PD value changed. An older version of the HD-audio
1229 * specification worked this way. Hence, we just ignore the data in
1230 * the unsolicited response to avoid custom WARs.
1232 int present = snd_hda_pin_sense(codec, pin_nid);
1233 bool update_eld = false;
1234 bool eld_changed = false;
1236 pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1237 if (pin_eld->monitor_present)
1238 eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
1240 eld->eld_valid = false;
1242 _snd_printd(SND_PR_VERBOSE,
1243 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1244 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1246 if (eld->eld_valid) {
1247 if (snd_hdmi_get_eld(codec, pin_nid, eld->eld_buffer,
1248 &eld->eld_size) < 0)
1249 eld->eld_valid = false;
1251 memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
1252 if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
1254 eld->eld_valid = false;
1257 if (eld->eld_valid) {
1258 snd_hdmi_show_eld(&eld->info);
1262 queue_delayed_work(codec->bus->workq,
1264 msecs_to_jiffies(300));
1269 mutex_lock(&pin_eld->lock);
1270 if (pin_eld->eld_valid && !eld->eld_valid) {
1275 pin_eld->eld_valid = eld->eld_valid;
1276 eld_changed = pin_eld->eld_size != eld->eld_size ||
1277 memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1278 eld->eld_size) != 0;
1280 memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1282 pin_eld->eld_size = eld->eld_size;
1283 pin_eld->info = eld->info;
1285 mutex_unlock(&pin_eld->lock);
1288 snd_ctl_notify(codec->bus->card,
1289 SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
1290 &per_pin->eld_ctl->id);
1293 static void hdmi_repoll_eld(struct work_struct *work)
1295 struct hdmi_spec_per_pin *per_pin =
1296 container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1298 if (per_pin->repoll_count++ > 6)
1299 per_pin->repoll_count = 0;
1301 hdmi_present_sense(per_pin, per_pin->repoll_count);
1304 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1307 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1309 struct hdmi_spec *spec = codec->spec;
1310 unsigned int caps, config;
1312 struct hdmi_spec_per_pin *per_pin;
1315 caps = snd_hda_query_pin_caps(codec, pin_nid);
1316 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1319 config = snd_hda_codec_get_pincfg(codec, pin_nid);
1320 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1323 if (codec->vendor_id == 0x80862807)
1324 intel_haswell_fixup_connect_list(codec, pin_nid);
1326 pin_idx = spec->num_pins;
1327 per_pin = snd_array_new(&spec->pins);
1331 per_pin->pin_nid = pin_nid;
1332 per_pin->non_pcm = false;
1334 err = hdmi_read_pin_conn(codec, pin_idx);
1343 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1345 struct hdmi_spec *spec = codec->spec;
1346 struct hdmi_spec_per_cvt *per_cvt;
1350 chans = get_wcaps(codec, cvt_nid);
1351 chans = get_wcaps_channels(chans);
1353 per_cvt = snd_array_new(&spec->cvts);
1357 per_cvt->cvt_nid = cvt_nid;
1358 per_cvt->channels_min = 2;
1360 per_cvt->channels_max = chans;
1361 if (chans > spec->channels_max)
1362 spec->channels_max = chans;
1365 err = snd_hda_query_supported_pcm(codec, cvt_nid,
1372 if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1373 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1379 static int hdmi_parse_codec(struct hda_codec *codec)
1384 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1385 if (!nid || nodes < 0) {
1386 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1390 for (i = 0; i < nodes; i++, nid++) {
1394 caps = get_wcaps(codec, nid);
1395 type = get_wcaps_type(caps);
1397 if (!(caps & AC_WCAP_DIGITAL))
1401 case AC_WID_AUD_OUT:
1402 hdmi_add_cvt(codec, nid);
1405 hdmi_add_pin(codec, nid);
1411 /* We're seeing some problems with unsolicited hot plug events on
1412 * PantherPoint after S3, if this is not enabled */
1413 if (codec->vendor_id == 0x80862806)
1414 codec->bus->power_keep_link_on = 1;
1416 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1417 * can be lost and presence sense verb will become inaccurate if the
1418 * HDA link is powered off at hot plug or hw initialization time.
1420 else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1422 codec->bus->power_keep_link_on = 1;
1430 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1432 struct hda_spdif_out *spdif;
1435 mutex_lock(&codec->spdif_mutex);
1436 spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1437 non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1438 mutex_unlock(&codec->spdif_mutex);
1447 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1448 struct hda_codec *codec,
1449 unsigned int stream_tag,
1450 unsigned int format,
1451 struct snd_pcm_substream *substream)
1453 hda_nid_t cvt_nid = hinfo->nid;
1454 struct hdmi_spec *spec = codec->spec;
1455 int pin_idx = hinfo_to_pin_index(spec, hinfo);
1456 hda_nid_t pin_nid = get_pin(spec, pin_idx)->pin_nid;
1459 non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1461 hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
1463 hdmi_setup_audio_infoframe(codec, pin_idx, non_pcm, substream);
1465 return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1468 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1469 struct hda_codec *codec,
1470 struct snd_pcm_substream *substream)
1472 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1476 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1477 struct hda_codec *codec,
1478 struct snd_pcm_substream *substream)
1480 struct hdmi_spec *spec = codec->spec;
1481 int cvt_idx, pin_idx;
1482 struct hdmi_spec_per_cvt *per_cvt;
1483 struct hdmi_spec_per_pin *per_pin;
1486 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1487 if (snd_BUG_ON(cvt_idx < 0))
1489 per_cvt = get_cvt(spec, cvt_idx);
1491 snd_BUG_ON(!per_cvt->assigned);
1492 per_cvt->assigned = 0;
1495 pin_idx = hinfo_to_pin_index(spec, hinfo);
1496 if (snd_BUG_ON(pin_idx < 0))
1498 per_pin = get_pin(spec, pin_idx);
1500 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1501 per_pin->chmap_set = false;
1502 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1508 static const struct hda_pcm_ops generic_ops = {
1509 .open = hdmi_pcm_open,
1510 .close = hdmi_pcm_close,
1511 .prepare = generic_hdmi_playback_pcm_prepare,
1512 .cleanup = generic_hdmi_playback_pcm_cleanup,
1516 * ALSA API channel-map control callbacks
1518 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1519 struct snd_ctl_elem_info *uinfo)
1521 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1522 struct hda_codec *codec = info->private_data;
1523 struct hdmi_spec *spec = codec->spec;
1524 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1525 uinfo->count = spec->channels_max;
1526 uinfo->value.integer.min = 0;
1527 uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1531 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
1532 unsigned int size, unsigned int __user *tlv)
1534 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1535 struct hda_codec *codec = info->private_data;
1536 struct hdmi_spec *spec = codec->spec;
1537 const unsigned int valid_mask =
1538 FL | FR | RL | RR | LFE | FC | RLC | RRC;
1539 unsigned int __user *dst;
1544 if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
1548 for (chs = 2; chs <= spec->channels_max; chs++) {
1550 struct cea_channel_speaker_allocation *cap;
1551 cap = channel_allocations;
1552 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
1553 int chs_bytes = chs * 4;
1554 if (cap->channels != chs)
1556 if (cap->spk_mask & ~valid_mask)
1560 if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) ||
1561 put_user(chs_bytes, dst + 1))
1566 if (size < chs_bytes)
1570 for (c = 7; c >= 0; c--) {
1571 int spk = cap->speakers[c];
1574 if (put_user(spk_to_chmap(spk), dst))
1580 if (put_user(count, tlv + 1))
1585 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
1586 struct snd_ctl_elem_value *ucontrol)
1588 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1589 struct hda_codec *codec = info->private_data;
1590 struct hdmi_spec *spec = codec->spec;
1591 int pin_idx = kcontrol->private_value;
1592 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1595 for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
1596 ucontrol->value.integer.value[i] = per_pin->chmap[i];
1600 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
1601 struct snd_ctl_elem_value *ucontrol)
1603 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1604 struct hda_codec *codec = info->private_data;
1605 struct hdmi_spec *spec = codec->spec;
1606 int pin_idx = kcontrol->private_value;
1607 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1608 unsigned int ctl_idx;
1609 struct snd_pcm_substream *substream;
1610 unsigned char chmap[8];
1611 int i, ca, prepared = 0;
1613 ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1614 substream = snd_pcm_chmap_substream(info, ctl_idx);
1615 if (!substream || !substream->runtime)
1616 return 0; /* just for avoiding error from alsactl restore */
1617 switch (substream->runtime->status->state) {
1618 case SNDRV_PCM_STATE_OPEN:
1619 case SNDRV_PCM_STATE_SETUP:
1621 case SNDRV_PCM_STATE_PREPARED:
1627 memset(chmap, 0, sizeof(chmap));
1628 for (i = 0; i < ARRAY_SIZE(chmap); i++)
1629 chmap[i] = ucontrol->value.integer.value[i];
1630 if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
1632 ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
1635 per_pin->chmap_set = true;
1636 memcpy(per_pin->chmap, chmap, sizeof(chmap));
1638 hdmi_setup_audio_infoframe(codec, pin_idx, per_pin->non_pcm,
1644 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1646 struct hdmi_spec *spec = codec->spec;
1649 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1650 struct hda_pcm *info;
1651 struct hda_pcm_stream *pstr;
1652 struct hdmi_spec_per_pin *per_pin;
1654 per_pin = get_pin(spec, pin_idx);
1655 sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
1656 info = snd_array_new(&spec->pcm_rec);
1659 info->name = per_pin->pcm_name;
1660 info->pcm_type = HDA_PCM_TYPE_HDMI;
1661 info->own_chmap = true;
1663 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1664 pstr->substreams = 1;
1665 pstr->ops = generic_ops;
1666 /* other pstr fields are set in open */
1669 codec->num_pcms = spec->num_pins;
1670 codec->pcm_info = spec->pcm_rec.list;
1675 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1677 char hdmi_str[32] = "HDMI/DP";
1678 struct hdmi_spec *spec = codec->spec;
1679 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1680 int pcmdev = get_pcm_rec(spec, pin_idx)->device;
1683 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
1684 if (!is_jack_detectable(codec, per_pin->pin_nid))
1685 strncat(hdmi_str, " Phantom",
1686 sizeof(hdmi_str) - strlen(hdmi_str) - 1);
1688 return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
1691 static int generic_hdmi_build_controls(struct hda_codec *codec)
1693 struct hdmi_spec *spec = codec->spec;
1697 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1698 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1700 err = generic_hdmi_build_jack(codec, pin_idx);
1704 err = snd_hda_create_dig_out_ctls(codec,
1706 per_pin->mux_nids[0],
1710 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1712 /* add control for ELD Bytes */
1713 err = hdmi_create_eld_ctl(codec, pin_idx,
1714 get_pcm_rec(spec, pin_idx)->device);
1719 hdmi_present_sense(per_pin, 0);
1722 /* add channel maps */
1723 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1724 struct snd_pcm_chmap *chmap;
1725 struct snd_kcontrol *kctl;
1727 err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
1728 SNDRV_PCM_STREAM_PLAYBACK,
1729 NULL, 0, pin_idx, &chmap);
1732 /* override handlers */
1733 chmap->private_data = codec;
1735 for (i = 0; i < kctl->count; i++)
1736 kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
1737 kctl->info = hdmi_chmap_ctl_info;
1738 kctl->get = hdmi_chmap_ctl_get;
1739 kctl->put = hdmi_chmap_ctl_put;
1740 kctl->tlv.c = hdmi_chmap_ctl_tlv;
1746 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
1748 struct hdmi_spec *spec = codec->spec;
1751 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1752 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1753 struct hdmi_eld *eld = &per_pin->sink_eld;
1755 per_pin->codec = codec;
1756 mutex_init(&eld->lock);
1757 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
1758 snd_hda_eld_proc_new(codec, eld, pin_idx);
1763 static int generic_hdmi_init(struct hda_codec *codec)
1765 struct hdmi_spec *spec = codec->spec;
1768 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1769 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1770 hda_nid_t pin_nid = per_pin->pin_nid;
1772 hdmi_init_pin(codec, pin_nid);
1773 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
1778 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
1780 snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
1781 snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
1782 snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
1785 static void hdmi_array_free(struct hdmi_spec *spec)
1787 snd_array_free(&spec->pins);
1788 snd_array_free(&spec->cvts);
1789 snd_array_free(&spec->pcm_rec);
1792 static void generic_hdmi_free(struct hda_codec *codec)
1794 struct hdmi_spec *spec = codec->spec;
1797 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1798 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1799 struct hdmi_eld *eld = &per_pin->sink_eld;
1801 cancel_delayed_work(&per_pin->work);
1802 snd_hda_eld_proc_free(codec, eld);
1805 flush_workqueue(codec->bus->workq);
1806 hdmi_array_free(spec);
1810 static const struct hda_codec_ops generic_hdmi_patch_ops = {
1811 .init = generic_hdmi_init,
1812 .free = generic_hdmi_free,
1813 .build_pcms = generic_hdmi_build_pcms,
1814 .build_controls = generic_hdmi_build_controls,
1815 .unsol_event = hdmi_unsol_event,
1819 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1822 struct hdmi_spec *spec = codec->spec;
1826 nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
1827 if (nconns == spec->num_cvts &&
1828 !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
1831 /* override pins connection list */
1832 snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
1833 nconns = max(spec->num_cvts, 4);
1834 snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
1837 #define INTEL_VENDOR_NID 0x08
1838 #define INTEL_GET_VENDOR_VERB 0xf81
1839 #define INTEL_SET_VENDOR_VERB 0x781
1840 #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
1841 #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
1843 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
1846 unsigned int vendor_param;
1848 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1849 INTEL_GET_VENDOR_VERB, 0);
1850 if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
1853 vendor_param |= INTEL_EN_ALL_PIN_CVTS;
1854 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1855 INTEL_SET_VENDOR_VERB, vendor_param);
1856 if (vendor_param == -1)
1860 snd_hda_codec_update_widgets(codec);
1863 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
1865 unsigned int vendor_param;
1867 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1868 INTEL_GET_VENDOR_VERB, 0);
1869 if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
1872 /* enable DP1.2 mode */
1873 vendor_param |= INTEL_EN_DP12;
1874 snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
1875 INTEL_SET_VENDOR_VERB, vendor_param);
1878 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
1879 * Otherwise you may get severe h/w communication errors.
1881 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
1882 unsigned int power_state)
1884 if (power_state == AC_PWRST_D0) {
1885 intel_haswell_enable_all_pins(codec, false);
1886 intel_haswell_fixup_enable_dp12(codec);
1889 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
1890 snd_hda_codec_set_power_to_all(codec, fg, power_state);
1893 static int patch_generic_hdmi(struct hda_codec *codec)
1895 struct hdmi_spec *spec;
1897 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1902 hdmi_array_init(spec, 4);
1904 if (codec->vendor_id == 0x80862807) {
1905 intel_haswell_enable_all_pins(codec, true);
1906 intel_haswell_fixup_enable_dp12(codec);
1909 if (hdmi_parse_codec(codec) < 0) {
1914 codec->patch_ops = generic_hdmi_patch_ops;
1915 if (codec->vendor_id == 0x80862807)
1916 codec->patch_ops.set_power_state = haswell_set_power_state;
1918 generic_hdmi_init_per_pins(codec);
1920 init_channel_allocations();
1926 * Shared non-generic implementations
1929 static int simple_playback_build_pcms(struct hda_codec *codec)
1931 struct hdmi_spec *spec = codec->spec;
1932 struct hda_pcm *info;
1934 struct hda_pcm_stream *pstr;
1935 struct hdmi_spec_per_cvt *per_cvt;
1937 per_cvt = get_cvt(spec, 0);
1938 chans = get_wcaps(codec, per_cvt->cvt_nid);
1939 chans = get_wcaps_channels(chans);
1941 info = snd_array_new(&spec->pcm_rec);
1944 info->name = get_pin(spec, 0)->pcm_name;
1945 sprintf(info->name, "HDMI 0");
1946 info->pcm_type = HDA_PCM_TYPE_HDMI;
1947 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1948 *pstr = spec->pcm_playback;
1949 pstr->nid = per_cvt->cvt_nid;
1950 if (pstr->channels_max <= 2 && chans && chans <= 16)
1951 pstr->channels_max = chans;
1953 codec->num_pcms = 1;
1954 codec->pcm_info = info;
1959 /* unsolicited event for jack sensing */
1960 static void simple_hdmi_unsol_event(struct hda_codec *codec,
1963 snd_hda_jack_set_dirty_all(codec);
1964 snd_hda_jack_report_sync(codec);
1967 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
1968 * as long as spec->pins[] is set correctly
1970 #define simple_hdmi_build_jack generic_hdmi_build_jack
1972 static int simple_playback_build_controls(struct hda_codec *codec)
1974 struct hdmi_spec *spec = codec->spec;
1975 struct hdmi_spec_per_cvt *per_cvt;
1978 per_cvt = get_cvt(spec, 0);
1979 err = snd_hda_create_spdif_out_ctls(codec, per_cvt->cvt_nid,
1983 return simple_hdmi_build_jack(codec, 0);
1986 static int simple_playback_init(struct hda_codec *codec)
1988 struct hdmi_spec *spec = codec->spec;
1989 struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
1990 hda_nid_t pin = per_pin->pin_nid;
1992 snd_hda_codec_write(codec, pin, 0,
1993 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
1994 /* some codecs require to unmute the pin */
1995 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
1996 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
1998 snd_hda_jack_detect_enable(codec, pin, pin);
2002 static void simple_playback_free(struct hda_codec *codec)
2004 struct hdmi_spec *spec = codec->spec;
2006 hdmi_array_free(spec);
2011 * Nvidia specific implementations
2014 #define Nv_VERB_SET_Channel_Allocation 0xF79
2015 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
2016 #define Nv_VERB_SET_Audio_Protection_On 0xF98
2017 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
2019 #define nvhdmi_master_con_nid_7x 0x04
2020 #define nvhdmi_master_pin_nid_7x 0x05
2022 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2023 /*front, rear, clfe, rear_surr */
2027 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2028 /* set audio protect on */
2029 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2030 /* enable digital output on pin widget */
2031 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2035 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2036 /* set audio protect on */
2037 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2038 /* enable digital output on pin widget */
2039 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2040 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2041 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2042 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2043 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2047 #ifdef LIMITED_RATE_FMT_SUPPORT
2048 /* support only the safe format and rate */
2049 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
2050 #define SUPPORTED_MAXBPS 16
2051 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
2053 /* support all rates and formats */
2054 #define SUPPORTED_RATES \
2055 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2056 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2057 SNDRV_PCM_RATE_192000)
2058 #define SUPPORTED_MAXBPS 24
2059 #define SUPPORTED_FORMATS \
2060 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2063 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2065 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2069 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2071 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2075 static unsigned int channels_2_6_8[] = {
2079 static unsigned int channels_2_8[] = {
2083 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2084 .count = ARRAY_SIZE(channels_2_6_8),
2085 .list = channels_2_6_8,
2089 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2090 .count = ARRAY_SIZE(channels_2_8),
2091 .list = channels_2_8,
2095 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2096 struct hda_codec *codec,
2097 struct snd_pcm_substream *substream)
2099 struct hdmi_spec *spec = codec->spec;
2100 struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2102 switch (codec->preset->id) {
2107 hw_constraints_channels = &hw_constraints_2_8_channels;
2110 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2116 if (hw_constraints_channels != NULL) {
2117 snd_pcm_hw_constraint_list(substream->runtime, 0,
2118 SNDRV_PCM_HW_PARAM_CHANNELS,
2119 hw_constraints_channels);
2121 snd_pcm_hw_constraint_step(substream->runtime, 0,
2122 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2125 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2128 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2129 struct hda_codec *codec,
2130 struct snd_pcm_substream *substream)
2132 struct hdmi_spec *spec = codec->spec;
2133 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2136 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2137 struct hda_codec *codec,
2138 unsigned int stream_tag,
2139 unsigned int format,
2140 struct snd_pcm_substream *substream)
2142 struct hdmi_spec *spec = codec->spec;
2143 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2144 stream_tag, format, substream);
2147 static const struct hda_pcm_stream simple_pcm_playback = {
2152 .open = simple_playback_pcm_open,
2153 .close = simple_playback_pcm_close,
2154 .prepare = simple_playback_pcm_prepare
2158 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2159 .build_controls = simple_playback_build_controls,
2160 .build_pcms = simple_playback_build_pcms,
2161 .init = simple_playback_init,
2162 .free = simple_playback_free,
2163 .unsol_event = simple_hdmi_unsol_event,
2166 static int patch_simple_hdmi(struct hda_codec *codec,
2167 hda_nid_t cvt_nid, hda_nid_t pin_nid)
2169 struct hdmi_spec *spec;
2170 struct hdmi_spec_per_cvt *per_cvt;
2171 struct hdmi_spec_per_pin *per_pin;
2173 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2178 hdmi_array_init(spec, 1);
2180 spec->multiout.num_dacs = 0; /* no analog */
2181 spec->multiout.max_channels = 2;
2182 spec->multiout.dig_out_nid = cvt_nid;
2185 per_pin = snd_array_new(&spec->pins);
2186 per_cvt = snd_array_new(&spec->cvts);
2187 if (!per_pin || !per_cvt) {
2188 simple_playback_free(codec);
2191 per_cvt->cvt_nid = cvt_nid;
2192 per_pin->pin_nid = pin_nid;
2193 spec->pcm_playback = simple_pcm_playback;
2195 codec->patch_ops = simple_hdmi_patch_ops;
2200 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2203 unsigned int chanmask;
2204 int chan = channels ? (channels - 1) : 1;
2223 /* Set the audio infoframe channel allocation and checksum fields. The
2224 * channel count is computed implicitly by the hardware. */
2225 snd_hda_codec_write(codec, 0x1, 0,
2226 Nv_VERB_SET_Channel_Allocation, chanmask);
2228 snd_hda_codec_write(codec, 0x1, 0,
2229 Nv_VERB_SET_Info_Frame_Checksum,
2230 (0x71 - chan - chanmask));
2233 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2234 struct hda_codec *codec,
2235 struct snd_pcm_substream *substream)
2237 struct hdmi_spec *spec = codec->spec;
2240 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2241 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2242 for (i = 0; i < 4; i++) {
2243 /* set the stream id */
2244 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2245 AC_VERB_SET_CHANNEL_STREAMID, 0);
2246 /* set the stream format */
2247 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2248 AC_VERB_SET_STREAM_FORMAT, 0);
2251 /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2252 * streams are disabled. */
2253 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2255 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2258 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2259 struct hda_codec *codec,
2260 unsigned int stream_tag,
2261 unsigned int format,
2262 struct snd_pcm_substream *substream)
2265 unsigned int dataDCC2, channel_id;
2267 struct hdmi_spec *spec = codec->spec;
2268 struct hda_spdif_out *spdif;
2269 struct hdmi_spec_per_cvt *per_cvt;
2271 mutex_lock(&codec->spdif_mutex);
2272 per_cvt = get_cvt(spec, 0);
2273 spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2275 chs = substream->runtime->channels;
2279 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2280 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2281 snd_hda_codec_write(codec,
2282 nvhdmi_master_con_nid_7x,
2284 AC_VERB_SET_DIGI_CONVERT_1,
2285 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2287 /* set the stream id */
2288 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2289 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2291 /* set the stream format */
2292 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2293 AC_VERB_SET_STREAM_FORMAT, format);
2295 /* turn on again (if needed) */
2296 /* enable and set the channel status audio/data flag */
2297 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2298 snd_hda_codec_write(codec,
2299 nvhdmi_master_con_nid_7x,
2301 AC_VERB_SET_DIGI_CONVERT_1,
2302 spdif->ctls & 0xff);
2303 snd_hda_codec_write(codec,
2304 nvhdmi_master_con_nid_7x,
2306 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2309 for (i = 0; i < 4; i++) {
2315 /* turn off SPDIF once;
2316 *otherwise the IEC958 bits won't be updated
2318 if (codec->spdif_status_reset &&
2319 (spdif->ctls & AC_DIG1_ENABLE))
2320 snd_hda_codec_write(codec,
2321 nvhdmi_con_nids_7x[i],
2323 AC_VERB_SET_DIGI_CONVERT_1,
2324 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2325 /* set the stream id */
2326 snd_hda_codec_write(codec,
2327 nvhdmi_con_nids_7x[i],
2329 AC_VERB_SET_CHANNEL_STREAMID,
2330 (stream_tag << 4) | channel_id);
2331 /* set the stream format */
2332 snd_hda_codec_write(codec,
2333 nvhdmi_con_nids_7x[i],
2335 AC_VERB_SET_STREAM_FORMAT,
2337 /* turn on again (if needed) */
2338 /* enable and set the channel status audio/data flag */
2339 if (codec->spdif_status_reset &&
2340 (spdif->ctls & AC_DIG1_ENABLE)) {
2341 snd_hda_codec_write(codec,
2342 nvhdmi_con_nids_7x[i],
2344 AC_VERB_SET_DIGI_CONVERT_1,
2345 spdif->ctls & 0xff);
2346 snd_hda_codec_write(codec,
2347 nvhdmi_con_nids_7x[i],
2349 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2353 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2355 mutex_unlock(&codec->spdif_mutex);
2359 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2363 .nid = nvhdmi_master_con_nid_7x,
2364 .rates = SUPPORTED_RATES,
2365 .maxbps = SUPPORTED_MAXBPS,
2366 .formats = SUPPORTED_FORMATS,
2368 .open = simple_playback_pcm_open,
2369 .close = nvhdmi_8ch_7x_pcm_close,
2370 .prepare = nvhdmi_8ch_7x_pcm_prepare
2374 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2376 struct hdmi_spec *spec;
2377 int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2378 nvhdmi_master_pin_nid_7x);
2382 codec->patch_ops.init = nvhdmi_7x_init_2ch;
2383 /* override the PCM rates, etc, as the codec doesn't give full list */
2385 spec->pcm_playback.rates = SUPPORTED_RATES;
2386 spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2387 spec->pcm_playback.formats = SUPPORTED_FORMATS;
2391 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2393 struct hdmi_spec *spec = codec->spec;
2394 int err = simple_playback_build_pcms(codec);
2396 struct hda_pcm *info = get_pcm_rec(spec, 0);
2397 info->own_chmap = true;
2402 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2404 struct hdmi_spec *spec = codec->spec;
2405 struct hda_pcm *info;
2406 struct snd_pcm_chmap *chmap;
2409 err = simple_playback_build_controls(codec);
2413 /* add channel maps */
2414 info = get_pcm_rec(spec, 0);
2415 err = snd_pcm_add_chmap_ctls(info->pcm,
2416 SNDRV_PCM_STREAM_PLAYBACK,
2417 snd_pcm_alt_chmaps, 8, 0, &chmap);
2420 switch (codec->preset->id) {
2425 chmap->channel_mask = (1U << 2) | (1U << 8);
2428 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2433 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2435 struct hdmi_spec *spec;
2436 int err = patch_nvhdmi_2ch(codec);
2440 spec->multiout.max_channels = 8;
2441 spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2442 codec->patch_ops.init = nvhdmi_7x_init_8ch;
2443 codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2444 codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2446 /* Initialize the audio infoframe channel mask and checksum to something
2448 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2454 * ATI-specific implementations
2456 * FIXME: we may omit the whole this and use the generic code once after
2457 * it's confirmed to work.
2460 #define ATIHDMI_CVT_NID 0x02 /* audio converter */
2461 #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
2463 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2464 struct hda_codec *codec,
2465 unsigned int stream_tag,
2466 unsigned int format,
2467 struct snd_pcm_substream *substream)
2469 struct hdmi_spec *spec = codec->spec;
2470 struct hdmi_spec_per_cvt *per_cvt = get_cvt(spec, 0);
2471 int chans = substream->runtime->channels;
2474 err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
2478 snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
2479 AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
2481 for (i = 0; i < chans; i++) {
2482 snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
2483 AC_VERB_SET_HDMI_CHAN_SLOT,
2489 static int patch_atihdmi(struct hda_codec *codec)
2491 struct hdmi_spec *spec;
2492 int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
2496 spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
2500 /* VIA HDMI Implementation */
2501 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
2502 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
2504 static int patch_via_hdmi(struct hda_codec *codec)
2506 return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
2512 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
2513 { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
2514 { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
2515 { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
2516 { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
2517 { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
2518 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
2519 { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
2520 { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2521 { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2522 { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2523 { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2524 { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
2525 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
2526 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
2527 { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
2528 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
2529 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
2530 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
2531 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
2532 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
2533 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
2534 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
2535 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
2536 /* 17 is known to be absent */
2537 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
2538 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
2539 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
2540 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
2541 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
2542 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
2543 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
2544 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
2545 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
2546 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
2547 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi },
2548 { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
2549 { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
2550 { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
2551 { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
2552 { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
2553 { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
2554 { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
2555 { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
2556 { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
2557 { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
2558 { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
2559 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
2560 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
2561 { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi },
2562 { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi },
2563 { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
2567 MODULE_ALIAS("snd-hda-codec-id:1002793c");
2568 MODULE_ALIAS("snd-hda-codec-id:10027919");
2569 MODULE_ALIAS("snd-hda-codec-id:1002791a");
2570 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
2571 MODULE_ALIAS("snd-hda-codec-id:10951390");
2572 MODULE_ALIAS("snd-hda-codec-id:10951392");
2573 MODULE_ALIAS("snd-hda-codec-id:10de0002");
2574 MODULE_ALIAS("snd-hda-codec-id:10de0003");
2575 MODULE_ALIAS("snd-hda-codec-id:10de0005");
2576 MODULE_ALIAS("snd-hda-codec-id:10de0006");
2577 MODULE_ALIAS("snd-hda-codec-id:10de0007");
2578 MODULE_ALIAS("snd-hda-codec-id:10de000a");
2579 MODULE_ALIAS("snd-hda-codec-id:10de000b");
2580 MODULE_ALIAS("snd-hda-codec-id:10de000c");
2581 MODULE_ALIAS("snd-hda-codec-id:10de000d");
2582 MODULE_ALIAS("snd-hda-codec-id:10de0010");
2583 MODULE_ALIAS("snd-hda-codec-id:10de0011");
2584 MODULE_ALIAS("snd-hda-codec-id:10de0012");
2585 MODULE_ALIAS("snd-hda-codec-id:10de0013");
2586 MODULE_ALIAS("snd-hda-codec-id:10de0014");
2587 MODULE_ALIAS("snd-hda-codec-id:10de0015");
2588 MODULE_ALIAS("snd-hda-codec-id:10de0016");
2589 MODULE_ALIAS("snd-hda-codec-id:10de0018");
2590 MODULE_ALIAS("snd-hda-codec-id:10de0019");
2591 MODULE_ALIAS("snd-hda-codec-id:10de001a");
2592 MODULE_ALIAS("snd-hda-codec-id:10de001b");
2593 MODULE_ALIAS("snd-hda-codec-id:10de001c");
2594 MODULE_ALIAS("snd-hda-codec-id:10de0040");
2595 MODULE_ALIAS("snd-hda-codec-id:10de0041");
2596 MODULE_ALIAS("snd-hda-codec-id:10de0042");
2597 MODULE_ALIAS("snd-hda-codec-id:10de0043");
2598 MODULE_ALIAS("snd-hda-codec-id:10de0044");
2599 MODULE_ALIAS("snd-hda-codec-id:10de0051");
2600 MODULE_ALIAS("snd-hda-codec-id:10de0067");
2601 MODULE_ALIAS("snd-hda-codec-id:10de8001");
2602 MODULE_ALIAS("snd-hda-codec-id:11069f80");
2603 MODULE_ALIAS("snd-hda-codec-id:11069f81");
2604 MODULE_ALIAS("snd-hda-codec-id:11069f84");
2605 MODULE_ALIAS("snd-hda-codec-id:11069f85");
2606 MODULE_ALIAS("snd-hda-codec-id:17e80047");
2607 MODULE_ALIAS("snd-hda-codec-id:80860054");
2608 MODULE_ALIAS("snd-hda-codec-id:80862801");
2609 MODULE_ALIAS("snd-hda-codec-id:80862802");
2610 MODULE_ALIAS("snd-hda-codec-id:80862803");
2611 MODULE_ALIAS("snd-hda-codec-id:80862804");
2612 MODULE_ALIAS("snd-hda-codec-id:80862805");
2613 MODULE_ALIAS("snd-hda-codec-id:80862806");
2614 MODULE_ALIAS("snd-hda-codec-id:80862807");
2615 MODULE_ALIAS("snd-hda-codec-id:80862880");
2616 MODULE_ALIAS("snd-hda-codec-id:808629fb");
2618 MODULE_LICENSE("GPL");
2619 MODULE_DESCRIPTION("HDMI HD-audio codec");
2620 MODULE_ALIAS("snd-hda-codec-intelhdmi");
2621 MODULE_ALIAS("snd-hda-codec-nvhdmi");
2622 MODULE_ALIAS("snd-hda-codec-atihdmi");
2624 static struct hda_codec_preset_list intel_list = {
2625 .preset = snd_hda_preset_hdmi,
2626 .owner = THIS_MODULE,
2629 static int __init patch_hdmi_init(void)
2631 return snd_hda_add_codec_preset(&intel_list);
2634 static void __exit patch_hdmi_exit(void)
2636 snd_hda_delete_codec_preset(&intel_list);
2639 module_init(patch_hdmi_init)
2640 module_exit(patch_hdmi_exit)