sound/pci/hda/patch_hdmi.c

   1 /*
   2  *
   3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   4  *
   5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   6  *  Copyright (c) 2006 ATI Technologies Inc.
   7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
   9  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  10  *
  11  *  Authors:
  12  *                      Wu Fengguang <wfg@linux.intel.com>
  13  *
  14  *  Maintained by:
  15  *                      Wu Fengguang <wfg@linux.intel.com>
  16  *
  17  *  This program is free software; you can redistribute it and/or modify it
  18  *  under the terms of the GNU General Public License as published by the Free
  19  *  Software Foundation; either version 2 of the License, or (at your option)
  20  *  any later version.
  21  *
  22  *  This program is distributed in the hope that it will be useful, but
  23  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  24  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  25  *  for more details.
  26  *
  27  *  You should have received a copy of the GNU General Public License
  28  *  along with this program; if not, write to the Free Software Foundation,
  29  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  30  */
  31
  32 #include <linux/init.h>
  33 #include <linux/delay.h>
  34 #include <linux/slab.h>
  35 #include <linux/module.h>
  36 #include <sound/core.h>
  37 #include <sound/jack.h>
  38 #include <sound/asoundef.h>
  39 #include <sound/tlv.h>
  40 #include <sound/hdaudio.h>
  41 #include <sound/hda_i915.h>
  42 #include <sound/hda_chmap.h>
  43 #include "hda_codec.h"
  44 #include "hda_local.h"
  45 #include "hda_jack.h"
  46
  47 static bool static_hdmi_pcm;
  48 module_param(static_hdmi_pcm, bool, 0644);
  49 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  50
  51 #define is_haswell(codec)  ((codec)->core.vendor_id == 0x80862807)
  52 #define is_broadwell(codec)    ((codec)->core.vendor_id == 0x80862808)
  53 #define is_skylake(codec) ((codec)->core.vendor_id == 0x80862809)
  54 #define is_broxton(codec) ((codec)->core.vendor_id == 0x8086280a)
  55 #define is_kabylake(codec) ((codec)->core.vendor_id == 0x8086280b)
  56 #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec) \
  57                                 || is_skylake(codec) || is_broxton(codec) \
  58                                 || is_kabylake(codec))
  59
  60 #define is_valleyview(codec) ((codec)->core.vendor_id == 0x80862882)
  61 #define is_cherryview(codec) ((codec)->core.vendor_id == 0x80862883)
  62 #define is_valleyview_plus(codec) (is_valleyview(codec) || is_cherryview(codec))
  63
  64 struct hdmi_spec_per_cvt {
  65         hda_nid_t cvt_nid;
  66         int assigned;
  67         unsigned int channels_min;
  68         unsigned int channels_max;
  69         u32 rates;
  70         u64 formats;
  71         unsigned int maxbps;
  72 };
  73
  74 /* max. connections to a widget */
  75 #define HDA_MAX_CONNECTIONS     32
  76
  77 struct hdmi_spec_per_pin {
  78         hda_nid_t pin_nid;
  79         int dev_id;
  80         /* pin idx, different device entries on the same pin use the same idx */
  81         int pin_nid_idx;
  82         int num_mux_nids;
  83         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  84         int mux_idx;
  85         hda_nid_t cvt_nid;
  86
  87         struct hda_codec *codec;
  88         struct hdmi_eld sink_eld;
  89         struct mutex lock;
  90         struct delayed_work work;
  91         struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
  92         int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
  93         int repoll_count;
  94         bool setup; /* the stream has been set up by prepare callback */
  95         int channels; /* current number of channels */
  96         bool non_pcm;
  97         bool chmap_set;         /* channel-map override by ALSA API? */
  98         unsigned char chmap[8]; /* ALSA API channel-map */
  99 #ifdef CONFIG_SND_PROC_FS
 100         struct snd_info_entry *proc_entry;
 101 #endif
 102 };
 103
 104 /* operations used by generic code that can be overridden by patches */
 105 struct hdmi_ops {
 106         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
 107                            unsigned char *buf, int *eld_size);
 108
 109         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
 110                                     int ca, int active_channels, int conn_type);
 111
 112         /* enable/disable HBR (HD passthrough) */
 113         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
 114
 115         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
 116                             hda_nid_t pin_nid, u32 stream_tag, int format);
 117
 118         void (*pin_cvt_fixup)(struct hda_codec *codec,
 119                               struct hdmi_spec_per_pin *per_pin,
 120                               hda_nid_t cvt_nid);
 121 };
 122
 123 struct hdmi_pcm {
 124         struct hda_pcm *pcm;
 125         struct snd_jack *jack;
 126         struct snd_kcontrol *eld_ctl;
 127 };
 128
 129 struct hdmi_spec {
 130         int num_cvts;
 131         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 132         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 133
 134         /*
 135          * num_pins is the number of virtual pins
 136          * for example, there are 3 pins, and each pin
 137          * has 4 device entries, then the num_pins is 12
 138          */
 139         int num_pins;
 140         /*
 141          * num_nids is the number of real pins
 142          * In the above example, num_nids is 3
 143          */
 144         int num_nids;
 145         /*
 146          * dev_num is the number of device entries
 147          * on each pin.
 148          * In the above example, dev_num is 4
 149          */
 150         int dev_num;
 151         struct snd_array pins; /* struct hdmi_spec_per_pin */
 152         struct hdmi_pcm pcm_rec[16];
 153         struct mutex pcm_lock;
 154         /* pcm_bitmap means which pcms have been assigned to pins*/
 155         unsigned long pcm_bitmap;
 156         int pcm_used;   /* counter of pcm_rec[] */
 157         /* bitmap shows whether the pcm is opened in user space
 158          * bit 0 means the first playback PCM (PCM3);
 159          * bit 1 means the second playback PCM, and so on.
 160          */
 161         unsigned long pcm_in_use;
 162
 163         struct hdmi_eld temp_eld;
 164         struct hdmi_ops ops;
 165
 166         bool dyn_pin_out;
 167         bool dyn_pcm_assign;
 168         /*
 169          * Non-generic VIA/NVIDIA specific
 170          */
 171         struct hda_multi_out multiout;
 172         struct hda_pcm_stream pcm_playback;
 173
 174         /* i915/powerwell (Haswell+/Valleyview+) specific */
 175         bool use_acomp_notifier; /* use i915 eld_notify callback for hotplug */
 176         struct i915_audio_component_audio_ops i915_audio_ops;
 177         bool i915_bound; /* was i915 bound in this driver? */
 178
 179         struct hdac_chmap chmap;
 180         hda_nid_t vendor_nid;
 181 };
 182
 183 #ifdef CONFIG_SND_HDA_I915
 184 static inline bool codec_has_acomp(struct hda_codec *codec)
 185 {
 186         struct hdmi_spec *spec = codec->spec;
 187         return spec->use_acomp_notifier;
 188 }
 189 #else
 190 #define codec_has_acomp(codec)  false
 191 #endif
 192
 193 struct hdmi_audio_infoframe {
 194         u8 type; /* 0x84 */
 195         u8 ver;  /* 0x01 */
 196         u8 len;  /* 0x0a */
 197
 198         u8 checksum;
 199
 200         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 201         u8 SS01_SF24;
 202         u8 CXT04;
 203         u8 CA;
 204         u8 LFEPBL01_LSV36_DM_INH7;
 205 };
 206
 207 struct dp_audio_infoframe {
 208         u8 type; /* 0x84 */
 209         u8 len;  /* 0x1b */
 210         u8 ver;  /* 0x11 << 2 */
 211
 212         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 213         u8 SS01_SF24;
 214         u8 CXT04;
 215         u8 CA;
 216         u8 LFEPBL01_LSV36_DM_INH7;
 217 };
 218
 219 union audio_infoframe {
 220         struct hdmi_audio_infoframe hdmi;
 221         struct dp_audio_infoframe dp;
 222         u8 bytes[0];
 223 };
 224
 225 /*
 226  * HDMI routines
 227  */
 228
 229 #define get_pin(spec, idx) \
 230         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 231 #define get_cvt(spec, idx) \
 232         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 233 /* obtain hdmi_pcm object assigned to idx */
 234 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
 235 /* obtain hda_pcm object assigned to idx */
 236 #define get_pcm_rec(spec, idx)  (get_hdmi_pcm(spec, idx)->pcm)
 237
 238 static int pin_id_to_pin_index(struct hda_codec *codec,
 239                                hda_nid_t pin_nid, int dev_id)
 240 {
 241         struct hdmi_spec *spec = codec->spec;
 242         int pin_idx;
 243         struct hdmi_spec_per_pin *per_pin;
 244
 245         /*
 246          * (dev_id == -1) means it is NON-MST pin
 247          * return the first virtual pin on this port
 248          */
 249         if (dev_id == -1)
 250                 dev_id = 0;
 251
 252         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 253                 per_pin = get_pin(spec, pin_idx);
 254                 if ((per_pin->pin_nid == pin_nid) &&
 255                         (per_pin->dev_id == dev_id))
 256                         return pin_idx;
 257         }
 258
 259         codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
 260         return -EINVAL;
 261 }
 262
 263 static int hinfo_to_pcm_index(struct hda_codec *codec,
 264                         struct hda_pcm_stream *hinfo)
 265 {
 266         struct hdmi_spec *spec = codec->spec;
 267         int pcm_idx;
 268
 269         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
 270                 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
 271                         return pcm_idx;
 272
 273         codec_warn(codec, "HDMI: hinfo %p not registered\n", hinfo);
 274         return -EINVAL;
 275 }
 276
 277 static int hinfo_to_pin_index(struct hda_codec *codec,
 278                               struct hda_pcm_stream *hinfo)
 279 {
 280         struct hdmi_spec *spec = codec->spec;
 281         struct hdmi_spec_per_pin *per_pin;
 282         int pin_idx;
 283
 284         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 285                 per_pin = get_pin(spec, pin_idx);
 286                 if (per_pin->pcm &&
 287                         per_pin->pcm->pcm->stream == hinfo)
 288                         return pin_idx;
 289         }
 290
 291         codec_dbg(codec, "HDMI: hinfo %p not registered\n", hinfo);
 292         return -EINVAL;
 293 }
 294
 295 static struct hdmi_spec_per_pin *pcm_idx_to_pin(struct hdmi_spec *spec,
 296                                                 int pcm_idx)
 297 {
 298         int i;
 299         struct hdmi_spec_per_pin *per_pin;
 300
 301         for (i = 0; i < spec->num_pins; i++) {
 302                 per_pin = get_pin(spec, i);
 303                 if (per_pin->pcm_idx == pcm_idx)
 304                         return per_pin;
 305         }
 306         return NULL;
 307 }
 308
 309 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
 310 {
 311         struct hdmi_spec *spec = codec->spec;
 312         int cvt_idx;
 313
 314         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 315                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 316                         return cvt_idx;
 317
 318         codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
 319         return -EINVAL;
 320 }
 321
 322 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 323                         struct snd_ctl_elem_info *uinfo)
 324 {
 325         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 326         struct hdmi_spec *spec = codec->spec;
 327         struct hdmi_spec_per_pin *per_pin;
 328         struct hdmi_eld *eld;
 329         int pcm_idx;
 330
 331         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 332
 333         pcm_idx = kcontrol->private_value;
 334         mutex_lock(&spec->pcm_lock);
 335         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 336         if (!per_pin) {
 337                 /* no pin is bound to the pcm */
 338                 uinfo->count = 0;
 339                 mutex_unlock(&spec->pcm_lock);
 340                 return 0;
 341         }
 342         eld = &per_pin->sink_eld;
 343         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 344         mutex_unlock(&spec->pcm_lock);
 345
 346         return 0;
 347 }
 348
 349 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 350                         struct snd_ctl_elem_value *ucontrol)
 351 {
 352         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 353         struct hdmi_spec *spec = codec->spec;
 354         struct hdmi_spec_per_pin *per_pin;
 355         struct hdmi_eld *eld;
 356         int pcm_idx;
 357
 358         pcm_idx = kcontrol->private_value;
 359         mutex_lock(&spec->pcm_lock);
 360         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 361         if (!per_pin) {
 362                 /* no pin is bound to the pcm */
 363                 memset(ucontrol->value.bytes.data, 0,
 364                        ARRAY_SIZE(ucontrol->value.bytes.data));
 365                 mutex_unlock(&spec->pcm_lock);
 366                 return 0;
 367         }
 368         eld = &per_pin->sink_eld;
 369
 370         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) ||
 371             eld->eld_size > ELD_MAX_SIZE) {
 372                 mutex_unlock(&spec->pcm_lock);
 373                 snd_BUG();
 374                 return -EINVAL;
 375         }
 376
 377         memset(ucontrol->value.bytes.data, 0,
 378                ARRAY_SIZE(ucontrol->value.bytes.data));
 379         if (eld->eld_valid)
 380                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 381                        eld->eld_size);
 382         mutex_unlock(&spec->pcm_lock);
 383
 384         return 0;
 385 }
 386
 387 static const struct snd_kcontrol_new eld_bytes_ctl = {
 388         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 389         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 390         .name = "ELD",
 391         .info = hdmi_eld_ctl_info,
 392         .get = hdmi_eld_ctl_get,
 393 };
 394
 395 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pcm_idx,
 396                         int device)
 397 {
 398         struct snd_kcontrol *kctl;
 399         struct hdmi_spec *spec = codec->spec;
 400         int err;
 401
 402         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 403         if (!kctl)
 404                 return -ENOMEM;
 405         kctl->private_value = pcm_idx;
 406         kctl->id.device = device;
 407
 408         /* no pin nid is associated with the kctl now
 409          * tbd: associate pin nid to eld ctl later
 410          */
 411         err = snd_hda_ctl_add(codec, 0, kctl);
 412         if (err < 0)
 413                 return err;
 414
 415         get_hdmi_pcm(spec, pcm_idx)->eld_ctl = kctl;
 416         return 0;
 417 }
 418
 419 #ifdef BE_PARANOID
 420 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 421                                 int *packet_index, int *byte_index)
 422 {
 423         int val;
 424
 425         val = snd_hda_codec_read(codec, pin_nid, 0,
 426                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 427
 428         *packet_index = val >> 5;
 429         *byte_index = val & 0x1f;
 430 }
 431 #endif
 432
 433 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 434                                 int packet_index, int byte_index)
 435 {
 436         int val;
 437
 438         val = (packet_index << 5) | (byte_index & 0x1f);
 439
 440         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 441 }
 442
 443 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 444                                 unsigned char val)
 445 {
 446         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 447 }
 448
 449 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 450 {
 451         struct hdmi_spec *spec = codec->spec;
 452         int pin_out;
 453
 454         /* Unmute */
 455         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 456                 snd_hda_codec_write(codec, pin_nid, 0,
 457                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 458
 459         if (spec->dyn_pin_out)
 460                 /* Disable pin out until stream is active */
 461                 pin_out = 0;
 462         else
 463                 /* Enable pin out: some machines with GM965 gets broken output
 464                  * when the pin is disabled or changed while using with HDMI
 465                  */
 466                 pin_out = PIN_OUT;
 467
 468         snd_hda_codec_write(codec, pin_nid, 0,
 469                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 470 }
 471
 472 /*
 473  * ELD proc files
 474  */
 475
 476 #ifdef CONFIG_SND_PROC_FS
 477 static void print_eld_info(struct snd_info_entry *entry,
 478                            struct snd_info_buffer *buffer)
 479 {
 480         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 481
 482         mutex_lock(&per_pin->lock);
 483         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 484         mutex_unlock(&per_pin->lock);
 485 }
 486
 487 static void write_eld_info(struct snd_info_entry *entry,
 488                            struct snd_info_buffer *buffer)
 489 {
 490         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 491
 492         mutex_lock(&per_pin->lock);
 493         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 494         mutex_unlock(&per_pin->lock);
 495 }
 496
 497 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 498 {
 499         char name[32];
 500         struct hda_codec *codec = per_pin->codec;
 501         struct snd_info_entry *entry;
 502         int err;
 503
 504         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 505         err = snd_card_proc_new(codec->card, name, &entry);
 506         if (err < 0)
 507                 return err;
 508
 509         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 510         entry->c.text.write = write_eld_info;
 511         entry->mode |= S_IWUSR;
 512         per_pin->proc_entry = entry;
 513
 514         return 0;
 515 }
 516
 517 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 518 {
 519         if (!per_pin->codec->bus->shutdown) {
 520                 snd_info_free_entry(per_pin->proc_entry);
 521                 per_pin->proc_entry = NULL;
 522         }
 523 }
 524 #else
 525 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 526                                int index)
 527 {
 528         return 0;
 529 }
 530 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 531 {
 532 }
 533 #endif
 534
 535 /*
 536  * Audio InfoFrame routines
 537  */
 538
 539 /*
 540  * Enable Audio InfoFrame Transmission
 541  */
 542 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 543                                        hda_nid_t pin_nid)
 544 {
 545         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 546         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 547                                                 AC_DIPXMIT_BEST);
 548 }
 549
 550 /*
 551  * Disable Audio InfoFrame Transmission
 552  */
 553 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 554                                       hda_nid_t pin_nid)
 555 {
 556         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 557         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 558                                                 AC_DIPXMIT_DISABLE);
 559 }
 560
 561 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 562 {
 563 #ifdef CONFIG_SND_DEBUG_VERBOSE
 564         int i;
 565         int size;
 566
 567         size = snd_hdmi_get_eld_size(codec, pin_nid);
 568         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
 569
 570         for (i = 0; i < 8; i++) {
 571                 size = snd_hda_codec_read(codec, pin_nid, 0,
 572                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 573                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 574         }
 575 #endif
 576 }
 577
 578 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 579 {
 580 #ifdef BE_PARANOID
 581         int i, j;
 582         int size;
 583         int pi, bi;
 584         for (i = 0; i < 8; i++) {
 585                 size = snd_hda_codec_read(codec, pin_nid, 0,
 586                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 587                 if (size == 0)
 588                         continue;
 589
 590                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 591                 for (j = 1; j < 1000; j++) {
 592                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 593                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 594                         if (pi != i)
 595                                 codec_dbg(codec, "dip index %d: %d != %d\n",
 596                                                 bi, pi, i);
 597                         if (bi == 0) /* byte index wrapped around */
 598                                 break;
 599                 }
 600                 codec_dbg(codec,
 601                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
 602                         i, size, j);
 603         }
 604 #endif
 605 }
 606
 607 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
 608 {
 609         u8 *bytes = (u8 *)hdmi_ai;
 610         u8 sum = 0;
 611         int i;
 612
 613         hdmi_ai->checksum = 0;
 614
 615         for (i = 0; i < sizeof(*hdmi_ai); i++)
 616                 sum += bytes[i];
 617
 618         hdmi_ai->checksum = -sum;
 619 }
 620
 621 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
 622                                       hda_nid_t pin_nid,
 623                                       u8 *dip, int size)
 624 {
 625         int i;
 626
 627         hdmi_debug_dip_size(codec, pin_nid);
 628         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
 629
 630         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 631         for (i = 0; i < size; i++)
 632                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
 633 }
 634
 635 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
 636                                     u8 *dip, int size)
 637 {
 638         u8 val;
 639         int i;
 640
 641         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
 642                                                             != AC_DIPXMIT_BEST)
 643                 return false;
 644
 645         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 646         for (i = 0; i < size; i++) {
 647                 val = snd_hda_codec_read(codec, pin_nid, 0,
 648                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
 649                 if (val != dip[i])
 650                         return false;
 651         }
 652
 653         return true;
 654 }
 655
 656 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
 657                                      hda_nid_t pin_nid,
 658                                      int ca, int active_channels,
 659                                      int conn_type)
 660 {
 661         union audio_infoframe ai;
 662
 663         memset(&ai, 0, sizeof(ai));
 664         if (conn_type == 0) { /* HDMI */
 665                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
 666
 667                 hdmi_ai->type           = 0x84;
 668                 hdmi_ai->ver            = 0x01;
 669                 hdmi_ai->len            = 0x0a;
 670                 hdmi_ai->CC02_CT47      = active_channels - 1;
 671                 hdmi_ai->CA             = ca;
 672                 hdmi_checksum_audio_infoframe(hdmi_ai);
 673         } else if (conn_type == 1) { /* DisplayPort */
 674                 struct dp_audio_infoframe *dp_ai = &ai.dp;
 675
 676                 dp_ai->type             = 0x84;
 677                 dp_ai->len              = 0x1b;
 678                 dp_ai->ver              = 0x11 << 2;
 679                 dp_ai->CC02_CT47        = active_channels - 1;
 680                 dp_ai->CA               = ca;
 681         } else {
 682                 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
 683                             pin_nid);
 684                 return;
 685         }
 686
 687         /*
 688          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
 689          * sizeof(*dp_ai) to avoid partial match/update problems when
 690          * the user switches between HDMI/DP monitors.
 691          */
 692         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
 693                                         sizeof(ai))) {
 694                 codec_dbg(codec,
 695                           "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
 696                             pin_nid,
 697                             active_channels, ca);
 698                 hdmi_stop_infoframe_trans(codec, pin_nid);
 699                 hdmi_fill_audio_infoframe(codec, pin_nid,
 700                                             ai.bytes, sizeof(ai));
 701                 hdmi_start_infoframe_trans(codec, pin_nid);
 702         }
 703 }
 704
 705 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
 706                                        struct hdmi_spec_per_pin *per_pin,
 707                                        bool non_pcm)
 708 {
 709         struct hdmi_spec *spec = codec->spec;
 710         struct hdac_chmap *chmap = &spec->chmap;
 711         hda_nid_t pin_nid = per_pin->pin_nid;
 712         int channels = per_pin->channels;
 713         int active_channels;
 714         struct hdmi_eld *eld;
 715         int ca;
 716
 717         if (!channels)
 718                 return;
 719
 720         /* some HW (e.g. HSW+) needs reprogramming the amp at each time */
 721         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 722                 snd_hda_codec_write(codec, pin_nid, 0,
 723                                             AC_VERB_SET_AMP_GAIN_MUTE,
 724                                             AMP_OUT_UNMUTE);
 725
 726         eld = &per_pin->sink_eld;
 727
 728         ca = snd_hdac_channel_allocation(&codec->core,
 729                         eld->info.spk_alloc, channels,
 730                         per_pin->chmap_set, non_pcm, per_pin->chmap);
 731
 732         active_channels = snd_hdac_get_active_channels(ca);
 733
 734         chmap->ops.set_channel_count(&codec->core, per_pin->cvt_nid,
 735                                                 active_channels);
 736
 737         /*
 738          * always configure channel mapping, it may have been changed by the
 739          * user in the meantime
 740          */
 741         snd_hdac_setup_channel_mapping(&spec->chmap,
 742                                 pin_nid, non_pcm, ca, channels,
 743                                 per_pin->chmap, per_pin->chmap_set);
 744
 745         spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
 746                                       eld->info.conn_type);
 747
 748         per_pin->non_pcm = non_pcm;
 749 }
 750
 751 /*
 752  * Unsolicited events
 753  */
 754
 755 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
 756
 757 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid,
 758                                       int dev_id)
 759 {
 760         struct hdmi_spec *spec = codec->spec;
 761         int pin_idx = pin_id_to_pin_index(codec, nid, dev_id);
 762
 763         if (pin_idx < 0)
 764                 return;
 765         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
 766                 snd_hda_jack_report_sync(codec);
 767 }
 768
 769 static void jack_callback(struct hda_codec *codec,
 770                           struct hda_jack_callback *jack)
 771 {
 772         /* hda_jack don't support DP MST */
 773         check_presence_and_report(codec, jack->nid, 0);
 774 }
 775
 776 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
 777 {
 778         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 779         struct hda_jack_tbl *jack;
 780         int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
 781
 782         /*
 783          * assume DP MST uses dyn_pcm_assign and acomp and
 784          * never comes here
 785          * if DP MST supports unsol event, below code need
 786          * consider dev_entry
 787          */
 788         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
 789         if (!jack)
 790                 return;
 791         jack->jack_dirty = 1;
 792
 793         codec_dbg(codec,
 794                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
 795                 codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
 796                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
 797
 798         /* hda_jack don't support DP MST */
 799         check_presence_and_report(codec, jack->nid, 0);
 800 }
 801
 802 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
 803 {
 804         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 805         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 806         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
 807         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
 808
 809         codec_info(codec,
 810                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
 811                 codec->addr,
 812                 tag,
 813                 subtag,
 814                 cp_state,
 815                 cp_ready);
 816
 817         /* TODO */
 818         if (cp_state)
 819                 ;
 820         if (cp_ready)
 821                 ;
 822 }
 823
 824
 825 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
 826 {
 827         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 828         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 829
 830         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
 831                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
 832                 return;
 833         }
 834
 835         if (subtag == 0)
 836                 hdmi_intrinsic_event(codec, res);
 837         else
 838                 hdmi_non_intrinsic_event(codec, res);
 839 }
 840
 841 static void haswell_verify_D0(struct hda_codec *codec,
 842                 hda_nid_t cvt_nid, hda_nid_t nid)
 843 {
 844         int pwr;
 845
 846         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
 847          * thus pins could only choose converter 0 for use. Make sure the
 848          * converters are in correct power state */
 849         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
 850                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
 851
 852         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
 853                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
 854                                     AC_PWRST_D0);
 855                 msleep(40);
 856                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
 857                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
 858                 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
 859         }
 860 }
 861
 862 /*
 863  * Callbacks
 864  */
 865
 866 /* HBR should be Non-PCM, 8 channels */
 867 #define is_hbr_format(format) \
 868         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
 869
 870 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
 871                               bool hbr)
 872 {
 873         int pinctl, new_pinctl;
 874
 875         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
 876                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
 877                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
 878
 879                 if (pinctl < 0)
 880                         return hbr ? -EINVAL : 0;
 881
 882                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
 883                 if (hbr)
 884                         new_pinctl |= AC_PINCTL_EPT_HBR;
 885                 else
 886                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
 887
 888                 codec_dbg(codec,
 889                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
 890                             pin_nid,
 891                             pinctl == new_pinctl ? "" : "new-",
 892                             new_pinctl);
 893
 894                 if (pinctl != new_pinctl)
 895                         snd_hda_codec_write(codec, pin_nid, 0,
 896                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
 897                                             new_pinctl);
 898         } else if (hbr)
 899                 return -EINVAL;
 900
 901         return 0;
 902 }
 903
 904 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
 905                               hda_nid_t pin_nid, u32 stream_tag, int format)
 906 {
 907         struct hdmi_spec *spec = codec->spec;
 908         int err;
 909
 910         err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
 911
 912         if (err) {
 913                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
 914                 return err;
 915         }
 916
 917         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
 918         return 0;
 919 }
 920
 921 /* Try to find an available converter
 922  * If pin_idx is less then zero, just try to find an available converter.
 923  * Otherwise, try to find an available converter and get the cvt mux index
 924  * of the pin.
 925  */
 926 static int hdmi_choose_cvt(struct hda_codec *codec,
 927                            int pin_idx, int *cvt_id)
 928 {
 929         struct hdmi_spec *spec = codec->spec;
 930         struct hdmi_spec_per_pin *per_pin;
 931         struct hdmi_spec_per_cvt *per_cvt = NULL;
 932         int cvt_idx, mux_idx = 0;
 933
 934         /* pin_idx < 0 means no pin will be bound to the converter */
 935         if (pin_idx < 0)
 936                 per_pin = NULL;
 937         else
 938                 per_pin = get_pin(spec, pin_idx);
 939
 940         /* Dynamically assign converter to stream */
 941         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
 942                 per_cvt = get_cvt(spec, cvt_idx);
 943
 944                 /* Must not already be assigned */
 945                 if (per_cvt->assigned)
 946                         continue;
 947                 if (per_pin == NULL)
 948                         break;
 949                 /* Must be in pin's mux's list of converters */
 950                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
 951                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
 952                                 break;
 953                 /* Not in mux list */
 954                 if (mux_idx == per_pin->num_mux_nids)
 955                         continue;
 956                 break;
 957         }
 958
 959         /* No free converters */
 960         if (cvt_idx == spec->num_cvts)
 961                 return -EBUSY;
 962
 963         if (per_pin != NULL)
 964                 per_pin->mux_idx = mux_idx;
 965
 966         if (cvt_id)
 967                 *cvt_id = cvt_idx;
 968
 969         return 0;
 970 }
 971
 972 /* Assure the pin select the right convetor */
 973 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
 974                         struct hdmi_spec_per_pin *per_pin)
 975 {
 976         hda_nid_t pin_nid = per_pin->pin_nid;
 977         int mux_idx, curr;
 978
 979         mux_idx = per_pin->mux_idx;
 980         curr = snd_hda_codec_read(codec, pin_nid, 0,
 981                                           AC_VERB_GET_CONNECT_SEL, 0);
 982         if (curr != mux_idx)
 983                 snd_hda_codec_write_cache(codec, pin_nid, 0,
 984                                             AC_VERB_SET_CONNECT_SEL,
 985                                             mux_idx);
 986 }
 987
 988 /* get the mux index for the converter of the pins
 989  * converter's mux index is the same for all pins on Intel platform
 990  */
 991 static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
 992                         hda_nid_t cvt_nid)
 993 {
 994         int i;
 995
 996         for (i = 0; i < spec->num_cvts; i++)
 997                 if (spec->cvt_nids[i] == cvt_nid)
 998                         return i;
 999         return -EINVAL;
1000 }
1001
1002 /* Intel HDMI workaround to fix audio routing issue:
1003  * For some Intel display codecs, pins share the same connection list.
1004  * So a conveter can be selected by multiple pins and playback on any of these
1005  * pins will generate sound on the external display, because audio flows from
1006  * the same converter to the display pipeline. Also muting one pin may make
1007  * other pins have no sound output.
1008  * So this function assures that an assigned converter for a pin is not selected
1009  * by any other pins.
1010  */
1011 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1012                                          hda_nid_t pin_nid,
1013                                          int dev_id, int mux_idx)
1014 {
1015         struct hdmi_spec *spec = codec->spec;
1016         hda_nid_t nid;
1017         int cvt_idx, curr;
1018         struct hdmi_spec_per_cvt *per_cvt;
1019         struct hdmi_spec_per_pin *per_pin;
1020         int pin_idx;
1021
1022         /* configure the pins connections */
1023         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1024                 int dev_id_saved;
1025                 int dev_num;
1026
1027                 per_pin = get_pin(spec, pin_idx);
1028                 /*
1029                  * pin not connected to monitor
1030                  * no need to operate on it
1031                  */
1032                 if (!per_pin->pcm)
1033                         continue;
1034
1035                 if ((per_pin->pin_nid == pin_nid) &&
1036                         (per_pin->dev_id == dev_id))
1037                         continue;
1038
1039                 /*
1040                  * if per_pin->dev_id >= dev_num,
1041                  * snd_hda_get_dev_select() will fail,
1042                  * and the following operation is unpredictable.
1043                  * So skip this situation.
1044                  */
1045                 dev_num = snd_hda_get_num_devices(codec, per_pin->pin_nid) + 1;
1046                 if (per_pin->dev_id >= dev_num)
1047                         continue;
1048
1049                 nid = per_pin->pin_nid;
1050
1051                 /*
1052                  * Calling this function should not impact
1053                  * on the device entry selection
1054                  * So let's save the dev id for each pin,
1055                  * and restore it when return
1056                  */
1057                 dev_id_saved = snd_hda_get_dev_select(codec, nid);
1058                 snd_hda_set_dev_select(codec, nid, per_pin->dev_id);
1059                 curr = snd_hda_codec_read(codec, nid, 0,
1060                                           AC_VERB_GET_CONNECT_SEL, 0);
1061                 if (curr != mux_idx) {
1062                         snd_hda_set_dev_select(codec, nid, dev_id_saved);
1063                         continue;
1064                 }
1065
1066
1067                 /* choose an unassigned converter. The conveters in the
1068                  * connection list are in the same order as in the codec.
1069                  */
1070                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1071                         per_cvt = get_cvt(spec, cvt_idx);
1072                         if (!per_cvt->assigned) {
1073                                 codec_dbg(codec,
1074                                           "choose cvt %d for pin nid %d\n",
1075                                         cvt_idx, nid);
1076                                 snd_hda_codec_write_cache(codec, nid, 0,
1077                                             AC_VERB_SET_CONNECT_SEL,
1078                                             cvt_idx);
1079                                 break;
1080                         }
1081                 }
1082                 snd_hda_set_dev_select(codec, nid, dev_id_saved);
1083         }
1084 }
1085
1086 /* A wrapper of intel_not_share_asigned_cvt() */
1087 static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1088                         hda_nid_t pin_nid, int dev_id, hda_nid_t cvt_nid)
1089 {
1090         int mux_idx;
1091         struct hdmi_spec *spec = codec->spec;
1092
1093         /* On Intel platform, the mapping of converter nid to
1094          * mux index of the pins are always the same.
1095          * The pin nid may be 0, this means all pins will not
1096          * share the converter.
1097          */
1098         mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1099         if (mux_idx >= 0)
1100                 intel_not_share_assigned_cvt(codec, pin_nid, dev_id, mux_idx);
1101 }
1102
1103 /* skeleton caller of pin_cvt_fixup ops */
1104 static void pin_cvt_fixup(struct hda_codec *codec,
1105                           struct hdmi_spec_per_pin *per_pin,
1106                           hda_nid_t cvt_nid)
1107 {
1108         struct hdmi_spec *spec = codec->spec;
1109
1110         if (spec->ops.pin_cvt_fixup)
1111                 spec->ops.pin_cvt_fixup(codec, per_pin, cvt_nid);
1112 }
1113
1114 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1115  * in dyn_pcm_assign mode.
1116  */
1117 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1118                          struct hda_codec *codec,
1119                          struct snd_pcm_substream *substream)
1120 {
1121         struct hdmi_spec *spec = codec->spec;
1122         struct snd_pcm_runtime *runtime = substream->runtime;
1123         int cvt_idx, pcm_idx;
1124         struct hdmi_spec_per_cvt *per_cvt = NULL;
1125         int err;
1126
1127         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1128         if (pcm_idx < 0)
1129                 return -EINVAL;
1130
1131         err = hdmi_choose_cvt(codec, -1, &cvt_idx);
1132         if (err)
1133                 return err;
1134
1135         per_cvt = get_cvt(spec, cvt_idx);
1136         per_cvt->assigned = 1;
1137         hinfo->nid = per_cvt->cvt_nid;
1138
1139         pin_cvt_fixup(codec, NULL, per_cvt->cvt_nid);
1140
1141         set_bit(pcm_idx, &spec->pcm_in_use);
1142         /* todo: setup spdif ctls assign */
1143
1144         /* Initially set the converter's capabilities */
1145         hinfo->channels_min = per_cvt->channels_min;
1146         hinfo->channels_max = per_cvt->channels_max;
1147         hinfo->rates = per_cvt->rates;
1148         hinfo->formats = per_cvt->formats;
1149         hinfo->maxbps = per_cvt->maxbps;
1150
1151         /* Store the updated parameters */
1152         runtime->hw.channels_min = hinfo->channels_min;
1153         runtime->hw.channels_max = hinfo->channels_max;
1154         runtime->hw.formats = hinfo->formats;
1155         runtime->hw.rates = hinfo->rates;
1156
1157         snd_pcm_hw_constraint_step(substream->runtime, 0,
1158                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1159         return 0;
1160 }
1161
1162 /*
1163  * HDA PCM callbacks
1164  */
1165 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1166                          struct hda_codec *codec,
1167                          struct snd_pcm_substream *substream)
1168 {
1169         struct hdmi_spec *spec = codec->spec;
1170         struct snd_pcm_runtime *runtime = substream->runtime;
1171         int pin_idx, cvt_idx, pcm_idx;
1172         struct hdmi_spec_per_pin *per_pin;
1173         struct hdmi_eld *eld;
1174         struct hdmi_spec_per_cvt *per_cvt = NULL;
1175         int err;
1176
1177         /* Validate hinfo */
1178         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1179         if (pcm_idx < 0)
1180                 return -EINVAL;
1181
1182         mutex_lock(&spec->pcm_lock);
1183         pin_idx = hinfo_to_pin_index(codec, hinfo);
1184         if (!spec->dyn_pcm_assign) {
1185                 if (snd_BUG_ON(pin_idx < 0)) {
1186                         mutex_unlock(&spec->pcm_lock);
1187                         return -EINVAL;
1188                 }
1189         } else {
1190                 /* no pin is assigned to the PCM
1191                  * PA need pcm open successfully when probe
1192                  */
1193                 if (pin_idx < 0) {
1194                         err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1195                         mutex_unlock(&spec->pcm_lock);
1196                         return err;
1197                 }
1198         }
1199
1200         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx);
1201         if (err < 0) {
1202                 mutex_unlock(&spec->pcm_lock);
1203                 return err;
1204         }
1205
1206         per_cvt = get_cvt(spec, cvt_idx);
1207         /* Claim converter */
1208         per_cvt->assigned = 1;
1209
1210         set_bit(pcm_idx, &spec->pcm_in_use);
1211         per_pin = get_pin(spec, pin_idx);
1212         per_pin->cvt_nid = per_cvt->cvt_nid;
1213         hinfo->nid = per_cvt->cvt_nid;
1214
1215         snd_hda_set_dev_select(codec, per_pin->pin_nid, per_pin->dev_id);
1216         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1217                             AC_VERB_SET_CONNECT_SEL,
1218                             per_pin->mux_idx);
1219
1220         /* configure unused pins to choose other converters */
1221         pin_cvt_fixup(codec, per_pin, 0);
1222
1223         snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
1224
1225         /* Initially set the converter's capabilities */
1226         hinfo->channels_min = per_cvt->channels_min;
1227         hinfo->channels_max = per_cvt->channels_max;
1228         hinfo->rates = per_cvt->rates;
1229         hinfo->formats = per_cvt->formats;
1230         hinfo->maxbps = per_cvt->maxbps;
1231
1232         eld = &per_pin->sink_eld;
1233         /* Restrict capabilities by ELD if this isn't disabled */
1234         if (!static_hdmi_pcm && eld->eld_valid) {
1235                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1236                 if (hinfo->channels_min > hinfo->channels_max ||
1237                     !hinfo->rates || !hinfo->formats) {
1238                         per_cvt->assigned = 0;
1239                         hinfo->nid = 0;
1240                         snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1241                         mutex_unlock(&spec->pcm_lock);
1242                         return -ENODEV;
1243                 }
1244         }
1245
1246         mutex_unlock(&spec->pcm_lock);
1247         /* Store the updated parameters */
1248         runtime->hw.channels_min = hinfo->channels_min;
1249         runtime->hw.channels_max = hinfo->channels_max;
1250         runtime->hw.formats = hinfo->formats;
1251         runtime->hw.rates = hinfo->rates;
1252
1253         snd_pcm_hw_constraint_step(substream->runtime, 0,
1254                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1255         return 0;
1256 }
1257
1258 /*
1259  * HDA/HDMI auto parsing
1260  */
1261 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1262 {
1263         struct hdmi_spec *spec = codec->spec;
1264         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1265         hda_nid_t pin_nid = per_pin->pin_nid;
1266
1267         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1268                 codec_warn(codec,
1269                            "HDMI: pin %d wcaps %#x does not support connection list\n",
1270                            pin_nid, get_wcaps(codec, pin_nid));
1271                 return -EINVAL;
1272         }
1273
1274         /* all the device entries on the same pin have the same conn list */
1275         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1276                                                         per_pin->mux_nids,
1277                                                         HDA_MAX_CONNECTIONS);
1278
1279         return 0;
1280 }
1281
1282 static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1283                                 struct hdmi_spec_per_pin *per_pin)
1284 {
1285         int i;
1286
1287         /* try the prefer PCM */
1288         if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1289                 return per_pin->pin_nid_idx;
1290
1291         /* have a second try; check the "reserved area" over num_pins */
1292         for (i = spec->num_nids; i < spec->pcm_used; i++) {
1293                 if (!test_bit(i, &spec->pcm_bitmap))
1294                         return i;
1295         }
1296
1297         /* the last try; check the empty slots in pins */
1298         for (i = 0; i < spec->num_nids; i++) {
1299                 if (!test_bit(i, &spec->pcm_bitmap))
1300                         return i;
1301         }
1302         return -EBUSY;
1303 }
1304
1305 static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1306                                 struct hdmi_spec_per_pin *per_pin)
1307 {
1308         int idx;
1309
1310         /* pcm already be attached to the pin */
1311         if (per_pin->pcm)
1312                 return;
1313         idx = hdmi_find_pcm_slot(spec, per_pin);
1314         if (idx == -EBUSY)
1315                 return;
1316         per_pin->pcm_idx = idx;
1317         per_pin->pcm = get_hdmi_pcm(spec, idx);
1318         set_bit(idx, &spec->pcm_bitmap);
1319 }
1320
1321 static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1322                                 struct hdmi_spec_per_pin *per_pin)
1323 {
1324         int idx;
1325
1326         /* pcm already be detached from the pin */
1327         if (!per_pin->pcm)
1328                 return;
1329         idx = per_pin->pcm_idx;
1330         per_pin->pcm_idx = -1;
1331         per_pin->pcm = NULL;
1332         if (idx >= 0 && idx < spec->pcm_used)
1333                 clear_bit(idx, &spec->pcm_bitmap);
1334 }
1335
1336 static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1337                 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1338 {
1339         int mux_idx;
1340
1341         for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1342                 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1343                         break;
1344         return mux_idx;
1345 }
1346
1347 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1348
1349 static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1350                            struct hdmi_spec_per_pin *per_pin)
1351 {
1352         struct hda_codec *codec = per_pin->codec;
1353         struct hda_pcm *pcm;
1354         struct hda_pcm_stream *hinfo;
1355         struct snd_pcm_substream *substream;
1356         int mux_idx;
1357         bool non_pcm;
1358
1359         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1360                 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
1361         else
1362                 return;
1363         if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1364                 return;
1365
1366         /* hdmi audio only uses playback and one substream */
1367         hinfo = pcm->stream;
1368         substream = pcm->pcm->streams[0].substream;
1369
1370         per_pin->cvt_nid = hinfo->nid;
1371
1372         mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1373         if (mux_idx < per_pin->num_mux_nids) {
1374                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
1375                                    per_pin->dev_id);
1376                 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1377                                 AC_VERB_SET_CONNECT_SEL,
1378                                 mux_idx);
1379         }
1380         snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1381
1382         non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1383         if (substream->runtime)
1384                 per_pin->channels = substream->runtime->channels;
1385         per_pin->setup = true;
1386         per_pin->mux_idx = mux_idx;
1387
1388         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1389 }
1390
1391 static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1392                            struct hdmi_spec_per_pin *per_pin)
1393 {
1394         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1395                 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1396
1397         per_pin->chmap_set = false;
1398         memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1399
1400         per_pin->setup = false;
1401         per_pin->channels = 0;
1402 }
1403
1404 /* update per_pin ELD from the given new ELD;
1405  * setup info frame and notification accordingly
1406  */
1407 static void update_eld(struct hda_codec *codec,
1408                        struct hdmi_spec_per_pin *per_pin,
1409                        struct hdmi_eld *eld)
1410 {
1411         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1412         struct hdmi_spec *spec = codec->spec;
1413         bool old_eld_valid = pin_eld->eld_valid;
1414         bool eld_changed;
1415         int pcm_idx = -1;
1416
1417         /* for monitor disconnection, save pcm_idx firstly */
1418         pcm_idx = per_pin->pcm_idx;
1419         if (spec->dyn_pcm_assign) {
1420                 if (eld->eld_valid) {
1421                         hdmi_attach_hda_pcm(spec, per_pin);
1422                         hdmi_pcm_setup_pin(spec, per_pin);
1423                 } else {
1424                         hdmi_pcm_reset_pin(spec, per_pin);
1425                         hdmi_detach_hda_pcm(spec, per_pin);
1426                 }
1427         }
1428         /* if pcm_idx == -1, it means this is in monitor connection event
1429          * we can get the correct pcm_idx now.
1430          */
1431         if (pcm_idx == -1)
1432                 pcm_idx = per_pin->pcm_idx;
1433
1434         if (eld->eld_valid)
1435                 snd_hdmi_show_eld(codec, &eld->info);
1436
1437         eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1438         if (eld->eld_valid && pin_eld->eld_valid)
1439                 if (pin_eld->eld_size != eld->eld_size ||
1440                     memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1441                            eld->eld_size) != 0)
1442                         eld_changed = true;
1443
1444         pin_eld->monitor_present = eld->monitor_present;
1445         pin_eld->eld_valid = eld->eld_valid;
1446         pin_eld->eld_size = eld->eld_size;
1447         if (eld->eld_valid)
1448                 memcpy(pin_eld->eld_buffer, eld->eld_buffer, eld->eld_size);
1449         pin_eld->info = eld->info;
1450
1451         /*
1452          * Re-setup pin and infoframe. This is needed e.g. when
1453          * - sink is first plugged-in
1454          * - transcoder can change during stream playback on Haswell
1455          *   and this can make HW reset converter selection on a pin.
1456          */
1457         if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1458                 pin_cvt_fixup(codec, per_pin, 0);
1459                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1460         }
1461
1462         if (eld_changed && pcm_idx >= 0)
1463                 snd_ctl_notify(codec->card,
1464                                SNDRV_CTL_EVENT_MASK_VALUE |
1465                                SNDRV_CTL_EVENT_MASK_INFO,
1466                                &get_hdmi_pcm(spec, pcm_idx)->eld_ctl->id);
1467 }
1468
1469 /* update ELD and jack state via HD-audio verbs */
1470 static bool hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1471                                          int repoll)
1472 {
1473         struct hda_jack_tbl *jack;
1474         struct hda_codec *codec = per_pin->codec;
1475         struct hdmi_spec *spec = codec->spec;
1476         struct hdmi_eld *eld = &spec->temp_eld;
1477         hda_nid_t pin_nid = per_pin->pin_nid;
1478         /*
1479          * Always execute a GetPinSense verb here, even when called from
1480          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1481          * response's PD bit is not the real PD value, but indicates that
1482          * the real PD value changed. An older version of the HD-audio
1483          * specification worked this way. Hence, we just ignore the data in
1484          * the unsolicited response to avoid custom WARs.
1485          */
1486         int present;
1487         bool ret;
1488         bool do_repoll = false;
1489
1490         present = snd_hda_pin_sense(codec, pin_nid);
1491
1492         mutex_lock(&per_pin->lock);
1493         eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1494         if (eld->monitor_present)
1495                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1496         else
1497                 eld->eld_valid = false;
1498
1499         codec_dbg(codec,
1500                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1501                 codec->addr, pin_nid, eld->monitor_present, eld->eld_valid);
1502
1503         if (eld->eld_valid) {
1504                 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1505                                                      &eld->eld_size) < 0)
1506                         eld->eld_valid = false;
1507                 else {
1508                         if (snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1509                                                     eld->eld_size) < 0)
1510                                 eld->eld_valid = false;
1511                 }
1512                 if (!eld->eld_valid && repoll)
1513                         do_repoll = true;
1514         }
1515
1516         if (do_repoll)
1517                 schedule_delayed_work(&per_pin->work, msecs_to_jiffies(300));
1518         else
1519                 update_eld(codec, per_pin, eld);
1520
1521         ret = !repoll || !eld->monitor_present || eld->eld_valid;
1522
1523         jack = snd_hda_jack_tbl_get(codec, pin_nid);
1524         if (jack)
1525                 jack->block_report = !ret;
1526
1527         mutex_unlock(&per_pin->lock);
1528         return ret;
1529 }
1530
1531 static struct snd_jack *pin_idx_to_jack(struct hda_codec *codec,
1532                                  struct hdmi_spec_per_pin *per_pin)
1533 {
1534         struct hdmi_spec *spec = codec->spec;
1535         struct snd_jack *jack = NULL;
1536         struct hda_jack_tbl *jack_tbl;
1537
1538         /* if !dyn_pcm_assign, get jack from hda_jack_tbl
1539          * in !dyn_pcm_assign case, spec->pcm_rec[].jack is not
1540          * NULL even after snd_hda_jack_tbl_clear() is called to
1541          * free snd_jack. This may cause access invalid memory
1542          * when calling snd_jack_report
1543          */
1544         if (per_pin->pcm_idx >= 0 && spec->dyn_pcm_assign)
1545                 jack = spec->pcm_rec[per_pin->pcm_idx].jack;
1546         else if (!spec->dyn_pcm_assign) {
1547                 /*
1548                  * jack tbl doesn't support DP MST
1549                  * DP MST will use dyn_pcm_assign,
1550                  * so DP MST will never come here
1551                  */
1552                 jack_tbl = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
1553                 if (jack_tbl)
1554                         jack = jack_tbl->jack;
1555         }
1556         return jack;
1557 }
1558
1559 /* update ELD and jack state via audio component */
1560 static void sync_eld_via_acomp(struct hda_codec *codec,
1561                                struct hdmi_spec_per_pin *per_pin)
1562 {
1563         struct hdmi_spec *spec = codec->spec;
1564         struct hdmi_eld *eld = &spec->temp_eld;
1565         struct snd_jack *jack = NULL;
1566         int size;
1567
1568         mutex_lock(&per_pin->lock);
1569         eld->monitor_present = false;
1570         size = snd_hdac_acomp_get_eld(&codec->core, per_pin->pin_nid,
1571                                       per_pin->dev_id, &eld->monitor_present,
1572                                       eld->eld_buffer, ELD_MAX_SIZE);
1573         if (size > 0) {
1574                 size = min(size, ELD_MAX_SIZE);
1575                 if (snd_hdmi_parse_eld(codec, &eld->info,
1576                                        eld->eld_buffer, size) < 0)
1577                         size = -EINVAL;
1578         }
1579
1580         if (size > 0) {
1581                 eld->eld_valid = true;
1582                 eld->eld_size = size;
1583         } else {
1584                 eld->eld_valid = false;
1585                 eld->eld_size = 0;
1586         }
1587
1588         /* pcm_idx >=0 before update_eld() means it is in monitor
1589          * disconnected event. Jack must be fetched before update_eld()
1590          */
1591         jack = pin_idx_to_jack(codec, per_pin);
1592         update_eld(codec, per_pin, eld);
1593         if (jack == NULL)
1594                 jack = pin_idx_to_jack(codec, per_pin);
1595         if (jack == NULL)
1596                 goto unlock;
1597         snd_jack_report(jack,
1598                         eld->monitor_present ? SND_JACK_AVOUT : 0);
1599  unlock:
1600         mutex_unlock(&per_pin->lock);
1601 }
1602
1603 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1604 {
1605         struct hda_codec *codec = per_pin->codec;
1606         struct hdmi_spec *spec = codec->spec;
1607         int ret;
1608
1609         /* no temporary power up/down needed for component notifier */
1610         if (!codec_has_acomp(codec))
1611                 snd_hda_power_up_pm(codec);
1612
1613         mutex_lock(&spec->pcm_lock);
1614         if (codec_has_acomp(codec)) {
1615                 sync_eld_via_acomp(codec, per_pin);
1616                 ret = false; /* don't call snd_hda_jack_report_sync() */
1617         } else {
1618                 ret = hdmi_present_sense_via_verbs(per_pin, repoll);
1619         }
1620         mutex_unlock(&spec->pcm_lock);
1621
1622         if (!codec_has_acomp(codec))
1623                 snd_hda_power_down_pm(codec);
1624
1625         return ret;
1626 }
1627
1628 static void hdmi_repoll_eld(struct work_struct *work)
1629 {
1630         struct hdmi_spec_per_pin *per_pin =
1631         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1632
1633         if (per_pin->repoll_count++ > 6)
1634                 per_pin->repoll_count = 0;
1635
1636         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1637                 snd_hda_jack_report_sync(per_pin->codec);
1638 }
1639
1640 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1641                                              hda_nid_t nid);
1642
1643 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1644 {
1645         struct hdmi_spec *spec = codec->spec;
1646         unsigned int caps, config;
1647         int pin_idx;
1648         struct hdmi_spec_per_pin *per_pin;
1649         int err;
1650         int dev_num, i;
1651
1652         caps = snd_hda_query_pin_caps(codec, pin_nid);
1653         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1654                 return 0;
1655
1656         /*
1657          * For DP MST audio, Configuration Default is the same for
1658          * all device entries on the same pin
1659          */
1660         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1661         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1662                 return 0;
1663
1664         /*
1665          * To simplify the implementation, malloc all
1666          * the virtual pins in the initialization statically
1667          */
1668         if (is_haswell_plus(codec)) {
1669                 /*
1670                  * On Intel platforms, device entries number is
1671                  * changed dynamically. If there is a DP MST
1672                  * hub connected, the device entries number is 3.
1673                  * Otherwise, it is 1.
1674                  * Here we manually set dev_num to 3, so that
1675                  * we can initialize all the device entries when
1676                  * bootup statically.
1677                  */
1678                 dev_num = 3;
1679                 spec->dev_num = 3;
1680         } else if (spec->dyn_pcm_assign && codec->dp_mst) {
1681                 dev_num = snd_hda_get_num_devices(codec, pin_nid) + 1;
1682                 /*
1683                  * spec->dev_num is the maxinum number of device entries
1684                  * among all the pins
1685                  */
1686                 spec->dev_num = (spec->dev_num > dev_num) ?
1687                         spec->dev_num : dev_num;
1688         } else {
1689                 /*
1690                  * If the platform doesn't support DP MST,
1691                  * manually set dev_num to 1. This means
1692                  * the pin has only one device entry.
1693                  */
1694                 dev_num = 1;
1695                 spec->dev_num = 1;
1696         }
1697
1698         for (i = 0; i < dev_num; i++) {
1699                 pin_idx = spec->num_pins;
1700                 per_pin = snd_array_new(&spec->pins);
1701
1702                 if (!per_pin)
1703                         return -ENOMEM;
1704
1705                 if (spec->dyn_pcm_assign) {
1706                         per_pin->pcm = NULL;
1707                         per_pin->pcm_idx = -1;
1708                 } else {
1709                         per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
1710                         per_pin->pcm_idx = pin_idx;
1711                 }
1712                 per_pin->pin_nid = pin_nid;
1713                 per_pin->pin_nid_idx = spec->num_nids;
1714                 per_pin->dev_id = i;
1715                 per_pin->non_pcm = false;
1716                 snd_hda_set_dev_select(codec, pin_nid, i);
1717                 if (is_haswell_plus(codec))
1718                         intel_haswell_fixup_connect_list(codec, pin_nid);
1719                 err = hdmi_read_pin_conn(codec, pin_idx);
1720                 if (err < 0)
1721                         return err;
1722                 spec->num_pins++;
1723         }
1724         spec->num_nids++;
1725
1726         return 0;
1727 }
1728
1729 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1730 {
1731         struct hdmi_spec *spec = codec->spec;
1732         struct hdmi_spec_per_cvt *per_cvt;
1733         unsigned int chans;
1734         int err;
1735
1736         chans = get_wcaps(codec, cvt_nid);
1737         chans = get_wcaps_channels(chans);
1738
1739         per_cvt = snd_array_new(&spec->cvts);
1740         if (!per_cvt)
1741                 return -ENOMEM;
1742
1743         per_cvt->cvt_nid = cvt_nid;
1744         per_cvt->channels_min = 2;
1745         if (chans <= 16) {
1746                 per_cvt->channels_max = chans;
1747                 if (chans > spec->chmap.channels_max)
1748                         spec->chmap.channels_max = chans;
1749         }
1750
1751         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1752                                           &per_cvt->rates,
1753                                           &per_cvt->formats,
1754                                           &per_cvt->maxbps);
1755         if (err < 0)
1756                 return err;
1757
1758         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1759                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1760         spec->num_cvts++;
1761
1762         return 0;
1763 }
1764
1765 static int hdmi_parse_codec(struct hda_codec *codec)
1766 {
1767         hda_nid_t nid;
1768         int i, nodes;
1769
1770         nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &nid);
1771         if (!nid || nodes < 0) {
1772                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1773                 return -EINVAL;
1774         }
1775
1776         for (i = 0; i < nodes; i++, nid++) {
1777                 unsigned int caps;
1778                 unsigned int type;
1779
1780                 caps = get_wcaps(codec, nid);
1781                 type = get_wcaps_type(caps);
1782
1783                 if (!(caps & AC_WCAP_DIGITAL))
1784                         continue;
1785
1786                 switch (type) {
1787                 case AC_WID_AUD_OUT:
1788                         hdmi_add_cvt(codec, nid);
1789                         break;
1790                 case AC_WID_PIN:
1791                         hdmi_add_pin(codec, nid);
1792                         break;
1793                 }
1794         }
1795
1796         return 0;
1797 }
1798
1799 /*
1800  */
1801 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1802 {
1803         struct hda_spdif_out *spdif;
1804         bool non_pcm;
1805
1806         mutex_lock(&codec->spdif_mutex);
1807         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1808         /* Add sanity check to pass klockwork check.
1809          * This should never happen.
1810          */
1811         if (WARN_ON(spdif == NULL))
1812                 return true;
1813         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1814         mutex_unlock(&codec->spdif_mutex);
1815         return non_pcm;
1816 }
1817
1818 /*
1819  * HDMI callbacks
1820  */
1821
1822 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1823                                            struct hda_codec *codec,
1824                                            unsigned int stream_tag,
1825                                            unsigned int format,
1826                                            struct snd_pcm_substream *substream)
1827 {
1828         hda_nid_t cvt_nid = hinfo->nid;
1829         struct hdmi_spec *spec = codec->spec;
1830         int pin_idx;
1831         struct hdmi_spec_per_pin *per_pin;
1832         hda_nid_t pin_nid;
1833         struct snd_pcm_runtime *runtime = substream->runtime;
1834         bool non_pcm;
1835         int pinctl;
1836         int err;
1837
1838         mutex_lock(&spec->pcm_lock);
1839         pin_idx = hinfo_to_pin_index(codec, hinfo);
1840         if (spec->dyn_pcm_assign && pin_idx < 0) {
1841                 /* when dyn_pcm_assign and pcm is not bound to a pin
1842                  * skip pin setup and return 0 to make audio playback
1843                  * be ongoing
1844                  */
1845                 pin_cvt_fixup(codec, NULL, cvt_nid);
1846                 snd_hda_codec_setup_stream(codec, cvt_nid,
1847                                         stream_tag, 0, format);
1848                 mutex_unlock(&spec->pcm_lock);
1849                 return 0;
1850         }
1851
1852         if (snd_BUG_ON(pin_idx < 0)) {
1853                 mutex_unlock(&spec->pcm_lock);
1854                 return -EINVAL;
1855         }
1856         per_pin = get_pin(spec, pin_idx);
1857         pin_nid = per_pin->pin_nid;
1858
1859         /* Verify pin:cvt selections to avoid silent audio after S3.
1860          * After S3, the audio driver restores pin:cvt selections
1861          * but this can happen before gfx is ready and such selection
1862          * is overlooked by HW. Thus multiple pins can share a same
1863          * default convertor and mute control will affect each other,
1864          * which can cause a resumed audio playback become silent
1865          * after S3.
1866          */
1867         pin_cvt_fixup(codec, per_pin, 0);
1868
1869         /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
1870         /* Todo: add DP1.2 MST audio support later */
1871         if (codec_has_acomp(codec))
1872                 snd_hdac_sync_audio_rate(&codec->core, pin_nid, per_pin->dev_id,
1873                                          runtime->rate);
1874
1875         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1876         mutex_lock(&per_pin->lock);
1877         per_pin->channels = substream->runtime->channels;
1878         per_pin->setup = true;
1879
1880         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1881         mutex_unlock(&per_pin->lock);
1882         if (spec->dyn_pin_out) {
1883                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1884                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1885                 snd_hda_codec_write(codec, pin_nid, 0,
1886                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
1887                                     pinctl | PIN_OUT);
1888         }
1889
1890         /* snd_hda_set_dev_select() has been called before */
1891         err = spec->ops.setup_stream(codec, cvt_nid, pin_nid,
1892                                  stream_tag, format);
1893         mutex_unlock(&spec->pcm_lock);
1894         return err;
1895 }
1896
1897 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1898                                              struct hda_codec *codec,
1899                                              struct snd_pcm_substream *substream)
1900 {
1901         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1902         return 0;
1903 }
1904
1905 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1906                           struct hda_codec *codec,
1907                           struct snd_pcm_substream *substream)
1908 {
1909         struct hdmi_spec *spec = codec->spec;
1910         int cvt_idx, pin_idx, pcm_idx;
1911         struct hdmi_spec_per_cvt *per_cvt;
1912         struct hdmi_spec_per_pin *per_pin;
1913         int pinctl;
1914
1915         if (hinfo->nid) {
1916                 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1917                 if (snd_BUG_ON(pcm_idx < 0))
1918                         return -EINVAL;
1919                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
1920                 if (snd_BUG_ON(cvt_idx < 0))
1921                         return -EINVAL;
1922                 per_cvt = get_cvt(spec, cvt_idx);
1923
1924                 snd_BUG_ON(!per_cvt->assigned);
1925                 per_cvt->assigned = 0;
1926                 hinfo->nid = 0;
1927
1928                 mutex_lock(&spec->pcm_lock);
1929                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1930                 clear_bit(pcm_idx, &spec->pcm_in_use);
1931                 pin_idx = hinfo_to_pin_index(codec, hinfo);
1932                 if (spec->dyn_pcm_assign && pin_idx < 0) {
1933                         mutex_unlock(&spec->pcm_lock);
1934                         return 0;
1935                 }
1936
1937                 if (snd_BUG_ON(pin_idx < 0)) {
1938                         mutex_unlock(&spec->pcm_lock);
1939                         return -EINVAL;
1940                 }
1941                 per_pin = get_pin(spec, pin_idx);
1942
1943                 if (spec->dyn_pin_out) {
1944                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1945                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1946                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1947                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1948                                             pinctl & ~PIN_OUT);
1949                 }
1950
1951                 mutex_lock(&per_pin->lock);
1952                 per_pin->chmap_set = false;
1953                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1954
1955                 per_pin->setup = false;
1956                 per_pin->channels = 0;
1957                 mutex_unlock(&per_pin->lock);
1958                 mutex_unlock(&spec->pcm_lock);
1959         }
1960
1961         return 0;
1962 }
1963
1964 static const struct hda_pcm_ops generic_ops = {
1965         .open = hdmi_pcm_open,
1966         .close = hdmi_pcm_close,
1967         .prepare = generic_hdmi_playback_pcm_prepare,
1968         .cleanup = generic_hdmi_playback_pcm_cleanup,
1969 };
1970
1971 static int hdmi_get_spk_alloc(struct hdac_device *hdac, int pcm_idx)
1972 {
1973         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
1974         struct hdmi_spec *spec = codec->spec;
1975         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
1976
1977         if (!per_pin)
1978                 return 0;
1979
1980         return per_pin->sink_eld.info.spk_alloc;
1981 }
1982
1983 static void hdmi_get_chmap(struct hdac_device *hdac, int pcm_idx,
1984                                         unsigned char *chmap)
1985 {
1986         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
1987         struct hdmi_spec *spec = codec->spec;
1988         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
1989
1990         /* chmap is already set to 0 in caller */
1991         if (!per_pin)
1992                 return;
1993
1994         memcpy(chmap, per_pin->chmap, ARRAY_SIZE(per_pin->chmap));
1995 }
1996
1997 static void hdmi_set_chmap(struct hdac_device *hdac, int pcm_idx,
1998                                 unsigned char *chmap, int prepared)
1999 {
2000         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2001         struct hdmi_spec *spec = codec->spec;
2002         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2003
2004         if (!per_pin)
2005                 return;
2006         mutex_lock(&per_pin->lock);
2007         per_pin->chmap_set = true;
2008         memcpy(per_pin->chmap, chmap, ARRAY_SIZE(per_pin->chmap));
2009         if (prepared)
2010                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2011         mutex_unlock(&per_pin->lock);
2012 }
2013
2014 static bool is_hdmi_pcm_attached(struct hdac_device *hdac, int pcm_idx)
2015 {
2016         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2017         struct hdmi_spec *spec = codec->spec;
2018         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2019
2020         return per_pin ? true:false;
2021 }
2022
2023 static int generic_hdmi_build_pcms(struct hda_codec *codec)
2024 {
2025         struct hdmi_spec *spec = codec->spec;
2026         int idx;
2027
2028         /*
2029          * for non-mst mode, pcm number is the same as before
2030          * for DP MST mode, pcm number is (nid number + dev_num - 1)
2031          *  dev_num is the device entry number in a pin
2032          *
2033          */
2034         for (idx = 0; idx < spec->num_nids + spec->dev_num - 1; idx++) {
2035                 struct hda_pcm *info;
2036                 struct hda_pcm_stream *pstr;
2037
2038                 info = snd_hda_codec_pcm_new(codec, "HDMI %d", idx);
2039                 if (!info)
2040                         return -ENOMEM;
2041
2042                 spec->pcm_rec[idx].pcm = info;
2043                 spec->pcm_used++;
2044                 info->pcm_type = HDA_PCM_TYPE_HDMI;
2045                 info->own_chmap = true;
2046
2047                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2048                 pstr->substreams = 1;
2049                 pstr->ops = generic_ops;
2050                 /* pcm number is less than 16 */
2051                 if (spec->pcm_used >= 16)
2052                         break;
2053                 /* other pstr fields are set in open */
2054         }
2055
2056         return 0;
2057 }
2058
2059 static void free_hdmi_jack_priv(struct snd_jack *jack)
2060 {
2061         struct hdmi_pcm *pcm = jack->private_data;
2062
2063         pcm->jack = NULL;
2064 }
2065
2066 static int add_hdmi_jack_kctl(struct hda_codec *codec,
2067                                struct hdmi_spec *spec,
2068                                int pcm_idx,
2069                                const char *name)
2070 {
2071         struct snd_jack *jack;
2072         int err;
2073
2074         err = snd_jack_new(codec->card, name, SND_JACK_AVOUT, &jack,
2075                            true, false);
2076         if (err < 0)
2077                 return err;
2078
2079         spec->pcm_rec[pcm_idx].jack = jack;
2080         jack->private_data = &spec->pcm_rec[pcm_idx];
2081         jack->private_free = free_hdmi_jack_priv;
2082         return 0;
2083 }
2084
2085 static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx)
2086 {
2087         char hdmi_str[32] = "HDMI/DP";
2088         struct hdmi_spec *spec = codec->spec;
2089         struct hdmi_spec_per_pin *per_pin;
2090         struct hda_jack_tbl *jack;
2091         int pcmdev = get_pcm_rec(spec, pcm_idx)->device;
2092         bool phantom_jack;
2093         int ret;
2094
2095         if (pcmdev > 0)
2096                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2097
2098         if (spec->dyn_pcm_assign)
2099                 return add_hdmi_jack_kctl(codec, spec, pcm_idx, hdmi_str);
2100
2101         /* for !dyn_pcm_assign, we still use hda_jack for compatibility */
2102         /* if !dyn_pcm_assign, it must be non-MST mode.
2103          * This means pcms and pins are statically mapped.
2104          * And pcm_idx is pin_idx.
2105          */
2106         per_pin = get_pin(spec, pcm_idx);
2107         phantom_jack = !is_jack_detectable(codec, per_pin->pin_nid);
2108         if (phantom_jack)
2109                 strncat(hdmi_str, " Phantom",
2110                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2111         ret = snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str,
2112                                     phantom_jack);
2113         if (ret < 0)
2114                 return ret;
2115         jack = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
2116         if (jack == NULL)
2117                 return 0;
2118         /* assign jack->jack to pcm_rec[].jack to
2119          * align with dyn_pcm_assign mode
2120          */
2121         spec->pcm_rec[pcm_idx].jack = jack->jack;
2122         return 0;
2123 }
2124
2125 static int generic_hdmi_build_controls(struct hda_codec *codec)
2126 {
2127         struct hdmi_spec *spec = codec->spec;
2128         int err;
2129         int pin_idx, pcm_idx;
2130
2131
2132         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2133                 err = generic_hdmi_build_jack(codec, pcm_idx);
2134                 if (err < 0)
2135                         return err;
2136
2137                 /* create the spdif for each pcm
2138                  * pin will be bound when monitor is connected
2139                  */
2140                 if (spec->dyn_pcm_assign)
2141                         err = snd_hda_create_dig_out_ctls(codec,
2142                                           0, spec->cvt_nids[0],
2143                                           HDA_PCM_TYPE_HDMI);
2144                 else {
2145                         struct hdmi_spec_per_pin *per_pin =
2146                                 get_pin(spec, pcm_idx);
2147                         err = snd_hda_create_dig_out_ctls(codec,
2148                                                   per_pin->pin_nid,
2149                                                   per_pin->mux_nids[0],
2150                                                   HDA_PCM_TYPE_HDMI);
2151                 }
2152                 if (err < 0)
2153                         return err;
2154                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2155
2156                 /* add control for ELD Bytes */
2157                 err = hdmi_create_eld_ctl(codec, pcm_idx,
2158                                         get_pcm_rec(spec, pcm_idx)->device);
2159                 if (err < 0)
2160                         return err;
2161         }
2162
2163         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2164                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2165
2166                 hdmi_present_sense(per_pin, 0);
2167         }
2168
2169         /* add channel maps */
2170         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2171                 struct hda_pcm *pcm;
2172
2173                 pcm = get_pcm_rec(spec, pcm_idx);
2174                 if (!pcm || !pcm->pcm)
2175                         break;
2176                 err = snd_hdac_add_chmap_ctls(pcm->pcm, pcm_idx, &spec->chmap);
2177                 if (err < 0)
2178                         return err;
2179         }
2180
2181         return 0;
2182 }
2183
2184 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2185 {
2186         struct hdmi_spec *spec = codec->spec;
2187         int pin_idx;
2188
2189         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2190                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2191
2192                 per_pin->codec = codec;
2193                 mutex_init(&per_pin->lock);
2194                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2195                 eld_proc_new(per_pin, pin_idx);
2196         }
2197         return 0;
2198 }
2199
2200 static int generic_hdmi_init(struct hda_codec *codec)
2201 {
2202         struct hdmi_spec *spec = codec->spec;
2203         int pin_idx;
2204
2205         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2206                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2207                 hda_nid_t pin_nid = per_pin->pin_nid;
2208                 int dev_id = per_pin->dev_id;
2209
2210                 snd_hda_set_dev_select(codec, pin_nid, dev_id);
2211                 hdmi_init_pin(codec, pin_nid);
2212                 if (!codec_has_acomp(codec))
2213                         snd_hda_jack_detect_enable_callback(codec, pin_nid,
2214                                 codec->jackpoll_interval > 0 ?
2215                                 jack_callback : NULL);
2216         }
2217         return 0;
2218 }
2219
2220 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2221 {
2222         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2223         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2224 }
2225
2226 static void hdmi_array_free(struct hdmi_spec *spec)
2227 {
2228         snd_array_free(&spec->pins);
2229         snd_array_free(&spec->cvts);
2230 }
2231
2232 static void generic_spec_free(struct hda_codec *codec)
2233 {
2234         struct hdmi_spec *spec = codec->spec;
2235
2236         if (spec) {
2237                 if (spec->i915_bound)
2238                         snd_hdac_i915_exit(&codec->bus->core);
2239                 hdmi_array_free(spec);
2240                 kfree(spec);
2241                 codec->spec = NULL;
2242         }
2243         codec->dp_mst = false;
2244 }
2245
2246 static void generic_hdmi_free(struct hda_codec *codec)
2247 {
2248         struct hdmi_spec *spec = codec->spec;
2249         int pin_idx, pcm_idx;
2250
2251         if (codec_has_acomp(codec))
2252                 snd_hdac_i915_register_notifier(NULL);
2253
2254         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2255                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2256                 cancel_delayed_work_sync(&per_pin->work);
2257                 eld_proc_free(per_pin);
2258         }
2259
2260         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2261                 if (spec->pcm_rec[pcm_idx].jack == NULL)
2262                         continue;
2263                 if (spec->dyn_pcm_assign)
2264                         snd_device_free(codec->card,
2265                                         spec->pcm_rec[pcm_idx].jack);
2266                 else
2267                         spec->pcm_rec[pcm_idx].jack = NULL;
2268         }
2269
2270         generic_spec_free(codec);
2271 }
2272
2273 #ifdef CONFIG_PM
2274 static int generic_hdmi_resume(struct hda_codec *codec)
2275 {
2276         struct hdmi_spec *spec = codec->spec;
2277         int pin_idx;
2278
2279         codec->patch_ops.init(codec);
2280         regcache_sync(codec->core.regmap);
2281
2282         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2283                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2284                 hdmi_present_sense(per_pin, 1);
2285         }
2286         return 0;
2287 }
2288 #endif
2289
2290 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2291         .init                   = generic_hdmi_init,
2292         .free                   = generic_hdmi_free,
2293         .build_pcms             = generic_hdmi_build_pcms,
2294         .build_controls         = generic_hdmi_build_controls,
2295         .unsol_event            = hdmi_unsol_event,
2296 #ifdef CONFIG_PM
2297         .resume                 = generic_hdmi_resume,
2298 #endif
2299 };
2300
2301 static const struct hdmi_ops generic_standard_hdmi_ops = {
2302         .pin_get_eld                            = snd_hdmi_get_eld,
2303         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2304         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2305         .setup_stream                           = hdmi_setup_stream,
2306 };
2307
2308 /* allocate codec->spec and assign/initialize generic parser ops */
2309 static int alloc_generic_hdmi(struct hda_codec *codec)
2310 {
2311         struct hdmi_spec *spec;
2312
2313         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2314         if (!spec)
2315                 return -ENOMEM;
2316
2317         spec->ops = generic_standard_hdmi_ops;
2318         spec->dev_num = 1;      /* initialize to 1 */
2319         mutex_init(&spec->pcm_lock);
2320         snd_hdac_register_chmap_ops(&codec->core, &spec->chmap);
2321
2322         spec->chmap.ops.get_chmap = hdmi_get_chmap;
2323         spec->chmap.ops.set_chmap = hdmi_set_chmap;
2324         spec->chmap.ops.is_pcm_attached = is_hdmi_pcm_attached;
2325         spec->chmap.ops.get_spk_alloc = hdmi_get_spk_alloc,
2326
2327         codec->spec = spec;
2328         hdmi_array_init(spec, 4);
2329
2330         codec->patch_ops = generic_hdmi_patch_ops;
2331
2332         return 0;
2333 }
2334
2335 /* generic HDMI parser */
2336 static int patch_generic_hdmi(struct hda_codec *codec)
2337 {
2338         int err;
2339
2340         err = alloc_generic_hdmi(codec);
2341         if (err < 0)
2342                 return err;
2343
2344         err = hdmi_parse_codec(codec);
2345         if (err < 0) {
2346                 generic_spec_free(codec);
2347                 return err;
2348         }
2349
2350         generic_hdmi_init_per_pins(codec);
2351         return 0;
2352 }
2353
2354 /*
2355  * Intel codec parsers and helpers
2356  */
2357
2358 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2359                                              hda_nid_t nid)
2360 {
2361         struct hdmi_spec *spec = codec->spec;
2362         hda_nid_t conns[4];
2363         int nconns;
2364
2365         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2366         if (nconns == spec->num_cvts &&
2367             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2368                 return;
2369
2370         /* override pins connection list */
2371         codec_dbg(codec, "hdmi: haswell: override pin connection 0x%x\n", nid);
2372         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2373 }
2374
2375 #define INTEL_VENDOR_NID 0x08
2376 #define INTEL_GLK_VENDOR_NID 0x0B
2377 #define INTEL_GET_VENDOR_VERB 0xf81
2378 #define INTEL_SET_VENDOR_VERB 0x781
2379 #define INTEL_EN_DP12                   0x02 /* enable DP 1.2 features */
2380 #define INTEL_EN_ALL_PIN_CVTS   0x01 /* enable 2nd & 3rd pins and convertors */
2381
2382 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2383                                           bool update_tree)
2384 {
2385         unsigned int vendor_param;
2386         struct hdmi_spec *spec = codec->spec;
2387
2388         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2389                                 INTEL_GET_VENDOR_VERB, 0);
2390         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2391                 return;
2392
2393         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2394         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2395                                 INTEL_SET_VENDOR_VERB, vendor_param);
2396         if (vendor_param == -1)
2397                 return;
2398
2399         if (update_tree)
2400                 snd_hda_codec_update_widgets(codec);
2401 }
2402
2403 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2404 {
2405         unsigned int vendor_param;
2406         struct hdmi_spec *spec = codec->spec;
2407
2408         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2409                                 INTEL_GET_VENDOR_VERB, 0);
2410         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2411                 return;
2412
2413         /* enable DP1.2 mode */
2414         vendor_param |= INTEL_EN_DP12;
2415         snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2416         snd_hda_codec_write_cache(codec, spec->vendor_nid, 0,
2417                                 INTEL_SET_VENDOR_VERB, vendor_param);
2418 }
2419
2420 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2421  * Otherwise you may get severe h/w communication errors.
2422  */
2423 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2424                                 unsigned int power_state)
2425 {
2426         if (power_state == AC_PWRST_D0) {
2427                 intel_haswell_enable_all_pins(codec, false);
2428                 intel_haswell_fixup_enable_dp12(codec);
2429         }
2430
2431         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2432         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2433 }
2434
2435 static void intel_pin_eld_notify(void *audio_ptr, int port, int pipe)
2436 {
2437         struct hda_codec *codec = audio_ptr;
2438         int pin_nid;
2439         int dev_id = pipe;
2440
2441         /* we assume only from port-B to port-D */
2442         if (port < 1 || port > 3)
2443                 return;
2444
2445         switch (codec->core.vendor_id) {
2446         case 0x80860054: /* ILK */
2447         case 0x80862804: /* ILK */
2448         case 0x80862882: /* VLV */
2449                 pin_nid = port + 0x03;
2450                 break;
2451         default:
2452                 pin_nid = port + 0x04;
2453                 break;
2454         }
2455
2456         /* skip notification during system suspend (but not in runtime PM);
2457          * the state will be updated at resume
2458          */
2459         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2460                 return;
2461         /* ditto during suspend/resume process itself */
2462         if (atomic_read(&(codec)->core.in_pm))
2463                 return;
2464
2465         snd_hdac_i915_set_bclk(&codec->bus->core);
2466         check_presence_and_report(codec, pin_nid, dev_id);
2467 }
2468
2469 /* register i915 component pin_eld_notify callback */
2470 static void register_i915_notifier(struct hda_codec *codec)
2471 {
2472         struct hdmi_spec *spec = codec->spec;
2473
2474         spec->use_acomp_notifier = true;
2475         spec->i915_audio_ops.audio_ptr = codec;
2476         /* intel_audio_codec_enable() or intel_audio_codec_disable()
2477          * will call pin_eld_notify with using audio_ptr pointer
2478          * We need make sure audio_ptr is really setup
2479          */
2480         wmb();
2481         spec->i915_audio_ops.pin_eld_notify = intel_pin_eld_notify;
2482         snd_hdac_i915_register_notifier(&spec->i915_audio_ops);
2483 }
2484
2485 /* setup_stream ops override for HSW+ */
2486 static int i915_hsw_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
2487                                  hda_nid_t pin_nid, u32 stream_tag, int format)
2488 {
2489         haswell_verify_D0(codec, cvt_nid, pin_nid);
2490         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
2491 }
2492
2493 /* pin_cvt_fixup ops override for HSW+ and VLV+ */
2494 static void i915_pin_cvt_fixup(struct hda_codec *codec,
2495                                struct hdmi_spec_per_pin *per_pin,
2496                                hda_nid_t cvt_nid)
2497 {
2498         if (per_pin) {
2499                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2500                                per_pin->dev_id);
2501                 intel_verify_pin_cvt_connect(codec, per_pin);
2502                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
2503                                      per_pin->dev_id, per_pin->mux_idx);
2504         } else {
2505                 intel_not_share_assigned_cvt_nid(codec, 0, 0, cvt_nid);
2506         }
2507 }
2508
2509 /* Intel Haswell and onwards; audio component with eld notifier */
2510 static int intel_hsw_common_init(struct hda_codec *codec, hda_nid_t vendor_nid)
2511 {
2512         struct hdmi_spec *spec;
2513         int err;
2514
2515         /* HSW+ requires i915 binding */
2516         if (!codec->bus->core.audio_component) {
2517                 codec_info(codec, "No i915 binding for Intel HDMI/DP codec\n");
2518                 return -ENODEV;
2519         }
2520
2521         err = alloc_generic_hdmi(codec);
2522         if (err < 0)
2523                 return err;
2524         spec = codec->spec;
2525         codec->dp_mst = true;
2526         spec->dyn_pcm_assign = true;
2527         spec->vendor_nid = vendor_nid;
2528
2529         intel_haswell_enable_all_pins(codec, true);
2530         intel_haswell_fixup_enable_dp12(codec);
2531
2532         /* For Haswell/Broadwell, the controller is also in the power well and
2533          * can cover the codec power request, and so need not set this flag.
2534          */
2535         if (!is_haswell(codec) && !is_broadwell(codec))
2536                 codec->core.link_power_control = 1;
2537
2538         codec->patch_ops.set_power_state = haswell_set_power_state;
2539         codec->depop_delay = 0;
2540         codec->auto_runtime_pm = 1;
2541
2542         spec->ops.setup_stream = i915_hsw_setup_stream;
2543         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2544
2545         err = hdmi_parse_codec(codec);
2546         if (err < 0) {
2547                 generic_spec_free(codec);
2548                 return err;
2549         }
2550
2551         generic_hdmi_init_per_pins(codec);
2552         register_i915_notifier(codec);
2553         return 0;
2554 }
2555
2556 static int patch_i915_hsw_hdmi(struct hda_codec *codec)
2557 {
2558         return intel_hsw_common_init(codec, INTEL_VENDOR_NID);
2559 }
2560
2561 static int patch_i915_glk_hdmi(struct hda_codec *codec)
2562 {
2563         return intel_hsw_common_init(codec, INTEL_GLK_VENDOR_NID);
2564 }
2565
2566 /* Intel Baytrail and Braswell; with eld notifier */
2567 static int patch_i915_byt_hdmi(struct hda_codec *codec)
2568 {
2569         struct hdmi_spec *spec;
2570         int err;
2571
2572         /* requires i915 binding */
2573         if (!codec->bus->core.audio_component) {
2574                 codec_info(codec, "No i915 binding for Intel HDMI/DP codec\n");
2575                 return -ENODEV;
2576         }
2577
2578         err = alloc_generic_hdmi(codec);
2579         if (err < 0)
2580                 return err;
2581         spec = codec->spec;
2582
2583         /* For Valleyview/Cherryview, only the display codec is in the display
2584          * power well and can use link_power ops to request/release the power.
2585          */
2586         codec->core.link_power_control = 1;
2587
2588         codec->depop_delay = 0;
2589         codec->auto_runtime_pm = 1;
2590
2591         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2592
2593         err = hdmi_parse_codec(codec);
2594         if (err < 0) {
2595                 generic_spec_free(codec);
2596                 return err;
2597         }
2598
2599         generic_hdmi_init_per_pins(codec);
2600         register_i915_notifier(codec);
2601         return 0;
2602 }
2603
2604 /* Intel IronLake, SandyBridge and IvyBridge; with eld notifier */
2605 static int patch_i915_cpt_hdmi(struct hda_codec *codec)
2606 {
2607         struct hdmi_spec *spec;
2608         int err;
2609
2610         /* no i915 component should have been bound before this */
2611         if (WARN_ON(codec->bus->core.audio_component))
2612                 return -EBUSY;
2613
2614         err = alloc_generic_hdmi(codec);
2615         if (err < 0)
2616                 return err;
2617         spec = codec->spec;
2618
2619         /* Try to bind with i915 now */
2620         err = snd_hdac_i915_init(&codec->bus->core);
2621         if (err < 0)
2622                 goto error;
2623         spec->i915_bound = true;
2624
2625         err = hdmi_parse_codec(codec);
2626         if (err < 0)
2627                 goto error;
2628
2629         generic_hdmi_init_per_pins(codec);
2630         register_i915_notifier(codec);
2631         return 0;
2632
2633  error:
2634         generic_spec_free(codec);
2635         return err;
2636 }
2637
2638 /*
2639  * Shared non-generic implementations
2640  */
2641
2642 static int simple_playback_build_pcms(struct hda_codec *codec)
2643 {
2644         struct hdmi_spec *spec = codec->spec;
2645         struct hda_pcm *info;
2646         unsigned int chans;
2647         struct hda_pcm_stream *pstr;
2648         struct hdmi_spec_per_cvt *per_cvt;
2649
2650         per_cvt = get_cvt(spec, 0);
2651         chans = get_wcaps(codec, per_cvt->cvt_nid);
2652         chans = get_wcaps_channels(chans);
2653
2654         info = snd_hda_codec_pcm_new(codec, "HDMI 0");
2655         if (!info)
2656                 return -ENOMEM;
2657         spec->pcm_rec[0].pcm = info;
2658         info->pcm_type = HDA_PCM_TYPE_HDMI;
2659         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2660         *pstr = spec->pcm_playback;
2661         pstr->nid = per_cvt->cvt_nid;
2662         if (pstr->channels_max <= 2 && chans && chans <= 16)
2663                 pstr->channels_max = chans;
2664
2665         return 0;
2666 }
2667
2668 /* unsolicited event for jack sensing */
2669 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2670                                     unsigned int res)
2671 {
2672         snd_hda_jack_set_dirty_all(codec);
2673         snd_hda_jack_report_sync(codec);
2674 }
2675
2676 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2677  * as long as spec->pins[] is set correctly
2678  */
2679 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2680
2681 static int simple_playback_build_controls(struct hda_codec *codec)
2682 {
2683         struct hdmi_spec *spec = codec->spec;
2684         struct hdmi_spec_per_cvt *per_cvt;
2685         int err;
2686
2687         per_cvt = get_cvt(spec, 0);
2688         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2689                                           per_cvt->cvt_nid,
2690                                           HDA_PCM_TYPE_HDMI);
2691         if (err < 0)
2692                 return err;
2693         return simple_hdmi_build_jack(codec, 0);
2694 }
2695
2696 static int simple_playback_init(struct hda_codec *codec)
2697 {
2698         struct hdmi_spec *spec = codec->spec;
2699         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2700         hda_nid_t pin = per_pin->pin_nid;
2701
2702         snd_hda_codec_write(codec, pin, 0,
2703                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2704         /* some codecs require to unmute the pin */
2705         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2706                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2707                                     AMP_OUT_UNMUTE);
2708         snd_hda_jack_detect_enable(codec, pin);
2709         return 0;
2710 }
2711
2712 static void simple_playback_free(struct hda_codec *codec)
2713 {
2714         struct hdmi_spec *spec = codec->spec;
2715
2716         hdmi_array_free(spec);
2717         kfree(spec);
2718 }
2719
2720 /*
2721  * Nvidia specific implementations
2722  */
2723
2724 #define Nv_VERB_SET_Channel_Allocation          0xF79
2725 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
2726 #define Nv_VERB_SET_Audio_Protection_On         0xF98
2727 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
2728
2729 #define nvhdmi_master_con_nid_7x        0x04
2730 #define nvhdmi_master_pin_nid_7x        0x05
2731
2732 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2733         /*front, rear, clfe, rear_surr */
2734         0x6, 0x8, 0xa, 0xc,
2735 };
2736
2737 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2738         /* set audio protect on */
2739         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2740         /* enable digital output on pin widget */
2741         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2742         {} /* terminator */
2743 };
2744
2745 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2746         /* set audio protect on */
2747         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2748         /* enable digital output on pin widget */
2749         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2750         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2751         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2752         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2753         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2754         {} /* terminator */
2755 };
2756
2757 #ifdef LIMITED_RATE_FMT_SUPPORT
2758 /* support only the safe format and rate */
2759 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
2760 #define SUPPORTED_MAXBPS        16
2761 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
2762 #else
2763 /* support all rates and formats */
2764 #define SUPPORTED_RATES \
2765         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2766         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2767          SNDRV_PCM_RATE_192000)
2768 #define SUPPORTED_MAXBPS        24
2769 #define SUPPORTED_FORMATS \
2770         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2771 #endif
2772
2773 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2774 {
2775         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2776         return 0;
2777 }
2778
2779 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2780 {
2781         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2782         return 0;
2783 }
2784
2785 static unsigned int channels_2_6_8[] = {
2786         2, 6, 8
2787 };
2788
2789 static unsigned int channels_2_8[] = {
2790         2, 8
2791 };
2792
2793 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2794         .count = ARRAY_SIZE(channels_2_6_8),
2795         .list = channels_2_6_8,
2796         .mask = 0,
2797 };
2798
2799 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2800         .count = ARRAY_SIZE(channels_2_8),
2801         .list = channels_2_8,
2802         .mask = 0,
2803 };
2804
2805 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2806                                     struct hda_codec *codec,
2807                                     struct snd_pcm_substream *substream)
2808 {
2809         struct hdmi_spec *spec = codec->spec;
2810         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2811
2812         switch (codec->preset->vendor_id) {
2813         case 0x10de0002:
2814         case 0x10de0003:
2815         case 0x10de0005:
2816         case 0x10de0006:
2817                 hw_constraints_channels = &hw_constraints_2_8_channels;
2818                 break;
2819         case 0x10de0007:
2820                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2821                 break;
2822         default:
2823                 break;
2824         }
2825
2826         if (hw_constraints_channels != NULL) {
2827                 snd_pcm_hw_constraint_list(substream->runtime, 0,
2828                                 SNDRV_PCM_HW_PARAM_CHANNELS,
2829                                 hw_constraints_channels);
2830         } else {
2831                 snd_pcm_hw_constraint_step(substream->runtime, 0,
2832                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2833         }
2834
2835         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2836 }
2837
2838 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2839                                      struct hda_codec *codec,
2840                                      struct snd_pcm_substream *substream)
2841 {
2842         struct hdmi_spec *spec = codec->spec;
2843         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2844 }
2845
2846 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2847                                        struct hda_codec *codec,
2848                                        unsigned int stream_tag,
2849                                        unsigned int format,
2850                                        struct snd_pcm_substream *substream)
2851 {
2852         struct hdmi_spec *spec = codec->spec;
2853         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2854                                              stream_tag, format, substream);
2855 }
2856
2857 static const struct hda_pcm_stream simple_pcm_playback = {
2858         .substreams = 1,
2859         .channels_min = 2,
2860         .channels_max = 2,
2861         .ops = {
2862                 .open = simple_playback_pcm_open,
2863                 .close = simple_playback_pcm_close,
2864                 .prepare = simple_playback_pcm_prepare
2865         },
2866 };
2867
2868 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2869         .build_controls = simple_playback_build_controls,
2870         .build_pcms = simple_playback_build_pcms,
2871         .init = simple_playback_init,
2872         .free = simple_playback_free,
2873         .unsol_event = simple_hdmi_unsol_event,
2874 };
2875
2876 static int patch_simple_hdmi(struct hda_codec *codec,
2877                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
2878 {
2879         struct hdmi_spec *spec;
2880         struct hdmi_spec_per_cvt *per_cvt;
2881         struct hdmi_spec_per_pin *per_pin;
2882
2883         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2884         if (!spec)
2885                 return -ENOMEM;
2886
2887         codec->spec = spec;
2888         hdmi_array_init(spec, 1);
2889
2890         spec->multiout.num_dacs = 0;  /* no analog */
2891         spec->multiout.max_channels = 2;
2892         spec->multiout.dig_out_nid = cvt_nid;
2893         spec->num_cvts = 1;
2894         spec->num_pins = 1;
2895         per_pin = snd_array_new(&spec->pins);
2896         per_cvt = snd_array_new(&spec->cvts);
2897         if (!per_pin || !per_cvt) {
2898                 simple_playback_free(codec);
2899                 return -ENOMEM;
2900         }
2901         per_cvt->cvt_nid = cvt_nid;
2902         per_pin->pin_nid = pin_nid;
2903         spec->pcm_playback = simple_pcm_playback;
2904
2905         codec->patch_ops = simple_hdmi_patch_ops;
2906
2907         return 0;
2908 }
2909
2910 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2911                                                     int channels)
2912 {
2913         unsigned int chanmask;
2914         int chan = channels ? (channels - 1) : 1;
2915
2916         switch (channels) {
2917         default:
2918         case 0:
2919         case 2:
2920                 chanmask = 0x00;
2921                 break;
2922         case 4:
2923                 chanmask = 0x08;
2924                 break;
2925         case 6:
2926                 chanmask = 0x0b;
2927                 break;
2928         case 8:
2929                 chanmask = 0x13;
2930                 break;
2931         }
2932
2933         /* Set the audio infoframe channel allocation and checksum fields.  The
2934          * channel count is computed implicitly by the hardware. */
2935         snd_hda_codec_write(codec, 0x1, 0,
2936                         Nv_VERB_SET_Channel_Allocation, chanmask);
2937
2938         snd_hda_codec_write(codec, 0x1, 0,
2939                         Nv_VERB_SET_Info_Frame_Checksum,
2940                         (0x71 - chan - chanmask));
2941 }
2942
2943 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2944                                    struct hda_codec *codec,
2945                                    struct snd_pcm_substream *substream)
2946 {
2947         struct hdmi_spec *spec = codec->spec;
2948         int i;
2949
2950         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2951                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2952         for (i = 0; i < 4; i++) {
2953                 /* set the stream id */
2954                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2955                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
2956                 /* set the stream format */
2957                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2958                                 AC_VERB_SET_STREAM_FORMAT, 0);
2959         }
2960
2961         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2962          * streams are disabled. */
2963         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2964
2965         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2966 }
2967
2968 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2969                                      struct hda_codec *codec,
2970                                      unsigned int stream_tag,
2971                                      unsigned int format,
2972                                      struct snd_pcm_substream *substream)
2973 {
2974         int chs;
2975         unsigned int dataDCC2, channel_id;
2976         int i;
2977         struct hdmi_spec *spec = codec->spec;
2978         struct hda_spdif_out *spdif;
2979         struct hdmi_spec_per_cvt *per_cvt;
2980
2981         mutex_lock(&codec->spdif_mutex);
2982         per_cvt = get_cvt(spec, 0);
2983         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2984
2985         chs = substream->runtime->channels;
2986
2987         dataDCC2 = 0x2;
2988
2989         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2990         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2991                 snd_hda_codec_write(codec,
2992                                 nvhdmi_master_con_nid_7x,
2993                                 0,
2994                                 AC_VERB_SET_DIGI_CONVERT_1,
2995                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2996
2997         /* set the stream id */
2998         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2999                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
3000
3001         /* set the stream format */
3002         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3003                         AC_VERB_SET_STREAM_FORMAT, format);
3004
3005         /* turn on again (if needed) */
3006         /* enable and set the channel status audio/data flag */
3007         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
3008                 snd_hda_codec_write(codec,
3009                                 nvhdmi_master_con_nid_7x,
3010                                 0,
3011                                 AC_VERB_SET_DIGI_CONVERT_1,
3012                                 spdif->ctls & 0xff);
3013                 snd_hda_codec_write(codec,
3014                                 nvhdmi_master_con_nid_7x,
3015                                 0,
3016                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3017         }
3018
3019         for (i = 0; i < 4; i++) {
3020                 if (chs == 2)
3021                         channel_id = 0;
3022                 else
3023                         channel_id = i * 2;
3024
3025                 /* turn off SPDIF once;
3026                  *otherwise the IEC958 bits won't be updated
3027                  */
3028                 if (codec->spdif_status_reset &&
3029                 (spdif->ctls & AC_DIG1_ENABLE))
3030                         snd_hda_codec_write(codec,
3031                                 nvhdmi_con_nids_7x[i],
3032                                 0,
3033                                 AC_VERB_SET_DIGI_CONVERT_1,
3034                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3035                 /* set the stream id */
3036                 snd_hda_codec_write(codec,
3037                                 nvhdmi_con_nids_7x[i],
3038                                 0,
3039                                 AC_VERB_SET_CHANNEL_STREAMID,
3040                                 (stream_tag << 4) | channel_id);
3041                 /* set the stream format */
3042                 snd_hda_codec_write(codec,
3043                                 nvhdmi_con_nids_7x[i],
3044                                 0,
3045                                 AC_VERB_SET_STREAM_FORMAT,
3046                                 format);
3047                 /* turn on again (if needed) */
3048                 /* enable and set the channel status audio/data flag */
3049                 if (codec->spdif_status_reset &&
3050                 (spdif->ctls & AC_DIG1_ENABLE)) {
3051                         snd_hda_codec_write(codec,
3052                                         nvhdmi_con_nids_7x[i],
3053                                         0,
3054                                         AC_VERB_SET_DIGI_CONVERT_1,
3055                                         spdif->ctls & 0xff);
3056                         snd_hda_codec_write(codec,
3057                                         nvhdmi_con_nids_7x[i],
3058                                         0,
3059                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3060                 }
3061         }
3062
3063         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
3064
3065         mutex_unlock(&codec->spdif_mutex);
3066         return 0;
3067 }
3068
3069 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
3070         .substreams = 1,
3071         .channels_min = 2,
3072         .channels_max = 8,
3073         .nid = nvhdmi_master_con_nid_7x,
3074         .rates = SUPPORTED_RATES,
3075         .maxbps = SUPPORTED_MAXBPS,
3076         .formats = SUPPORTED_FORMATS,
3077         .ops = {
3078                 .open = simple_playback_pcm_open,
3079                 .close = nvhdmi_8ch_7x_pcm_close,
3080                 .prepare = nvhdmi_8ch_7x_pcm_prepare
3081         },
3082 };
3083
3084 static int patch_nvhdmi_2ch(struct hda_codec *codec)
3085 {
3086         struct hdmi_spec *spec;
3087         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
3088                                     nvhdmi_master_pin_nid_7x);
3089         if (err < 0)
3090                 return err;
3091
3092         codec->patch_ops.init = nvhdmi_7x_init_2ch;
3093         /* override the PCM rates, etc, as the codec doesn't give full list */
3094         spec = codec->spec;
3095         spec->pcm_playback.rates = SUPPORTED_RATES;
3096         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
3097         spec->pcm_playback.formats = SUPPORTED_FORMATS;
3098         return 0;
3099 }
3100
3101 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
3102 {
3103         struct hdmi_spec *spec = codec->spec;
3104         int err = simple_playback_build_pcms(codec);
3105         if (!err) {
3106                 struct hda_pcm *info = get_pcm_rec(spec, 0);
3107                 info->own_chmap = true;
3108         }
3109         return err;
3110 }
3111
3112 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
3113 {
3114         struct hdmi_spec *spec = codec->spec;
3115         struct hda_pcm *info;
3116         struct snd_pcm_chmap *chmap;
3117         int err;
3118
3119         err = simple_playback_build_controls(codec);
3120         if (err < 0)
3121                 return err;
3122
3123         /* add channel maps */
3124         info = get_pcm_rec(spec, 0);
3125         err = snd_pcm_add_chmap_ctls(info->pcm,
3126                                      SNDRV_PCM_STREAM_PLAYBACK,
3127                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
3128         if (err < 0)
3129                 return err;
3130         switch (codec->preset->vendor_id) {
3131         case 0x10de0002:
3132         case 0x10de0003:
3133         case 0x10de0005:
3134         case 0x10de0006:
3135                 chmap->channel_mask = (1U << 2) | (1U << 8);
3136                 break;
3137         case 0x10de0007:
3138                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
3139         }
3140         return 0;
3141 }
3142
3143 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
3144 {
3145         struct hdmi_spec *spec;
3146         int err = patch_nvhdmi_2ch(codec);
3147         if (err < 0)
3148                 return err;
3149         spec = codec->spec;
3150         spec->multiout.max_channels = 8;
3151         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
3152         codec->patch_ops.init = nvhdmi_7x_init_8ch;
3153         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
3154         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
3155
3156         /* Initialize the audio infoframe channel mask and checksum to something
3157          * valid */
3158         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3159
3160         return 0;
3161 }
3162
3163 /*
3164  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3165  * - 0x10de0015
3166  * - 0x10de0040
3167  */
3168 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap *chmap,
3169                 struct hdac_cea_channel_speaker_allocation *cap, int channels)
3170 {
3171         if (cap->ca_index == 0x00 && channels == 2)
3172                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
3173
3174         /* If the speaker allocation matches the channel count, it is OK. */
3175         if (cap->channels != channels)
3176                 return -1;
3177
3178         /* all channels are remappable freely */
3179         return SNDRV_CTL_TLVT_CHMAP_VAR;
3180 }
3181
3182 static int nvhdmi_chmap_validate(struct hdac_chmap *chmap,
3183                 int ca, int chs, unsigned char *map)
3184 {
3185         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
3186                 return -EINVAL;
3187
3188         return 0;
3189 }
3190
3191 static int patch_nvhdmi(struct hda_codec *codec)
3192 {
3193         struct hdmi_spec *spec;
3194         int err;
3195
3196         err = patch_generic_hdmi(codec);
3197         if (err)
3198                 return err;
3199
3200         spec = codec->spec;
3201         spec->dyn_pin_out = true;
3202
3203         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3204                 nvhdmi_chmap_cea_alloc_validate_get_type;
3205         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3206
3207         return 0;
3208 }
3209
3210 /*
3211  * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3212  * accessed using vendor-defined verbs. These registers can be used for
3213  * interoperability between the HDA and HDMI drivers.
3214  */
3215
3216 /* Audio Function Group node */
3217 #define NVIDIA_AFG_NID 0x01
3218
3219 /*
3220  * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3221  * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3222  * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3223  * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3224  * additional bit (at position 30) to signal the validity of the format.
3225  *
3226  * | 31      | 30    | 29  16 | 15   0 |
3227  * +---------+-------+--------+--------+
3228  * | TRIGGER | VALID | UNUSED | FORMAT |
3229  * +-----------------------------------|
3230  *
3231  * Note that for the trigger bit to take effect it needs to change value
3232  * (i.e. it needs to be toggled).
3233  */
3234 #define NVIDIA_GET_SCRATCH0             0xfa6
3235 #define NVIDIA_SET_SCRATCH0_BYTE0       0xfa7
3236 #define NVIDIA_SET_SCRATCH0_BYTE1       0xfa8
3237 #define NVIDIA_SET_SCRATCH0_BYTE2       0xfa9
3238 #define NVIDIA_SET_SCRATCH0_BYTE3       0xfaa
3239 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3240 #define NVIDIA_SCRATCH_VALID   (1 << 6)
3241
3242 #define NVIDIA_GET_SCRATCH1             0xfab
3243 #define NVIDIA_SET_SCRATCH1_BYTE0       0xfac
3244 #define NVIDIA_SET_SCRATCH1_BYTE1       0xfad
3245 #define NVIDIA_SET_SCRATCH1_BYTE2       0xfae
3246 #define NVIDIA_SET_SCRATCH1_BYTE3       0xfaf
3247
3248 /*
3249  * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3250  * the format is invalidated so that the HDMI codec can be disabled.
3251  */
3252 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
3253 {
3254         unsigned int value;
3255
3256         /* bits [31:30] contain the trigger and valid bits */
3257         value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
3258                                    NVIDIA_GET_SCRATCH0, 0);
3259         value = (value >> 24) & 0xff;
3260
3261         /* bits [15:0] are used to store the HDA format */
3262         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3263                             NVIDIA_SET_SCRATCH0_BYTE0,
3264                             (format >> 0) & 0xff);
3265         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3266                             NVIDIA_SET_SCRATCH0_BYTE1,
3267                             (format >> 8) & 0xff);
3268
3269         /* bits [16:24] are unused */
3270         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3271                             NVIDIA_SET_SCRATCH0_BYTE2, 0);
3272
3273         /*
3274          * Bit 30 signals that the data is valid and hence that HDMI audio can
3275          * be enabled.
3276          */
3277         if (format == 0)
3278                 value &= ~NVIDIA_SCRATCH_VALID;
3279         else
3280                 value |= NVIDIA_SCRATCH_VALID;
3281
3282         /*
3283          * Whenever the trigger bit is toggled, an interrupt is raised in the
3284          * HDMI codec. The HDMI driver will use that as trigger to update its
3285          * configuration.
3286          */
3287         value ^= NVIDIA_SCRATCH_TRIGGER;
3288
3289         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3290                             NVIDIA_SET_SCRATCH0_BYTE3, value);
3291 }
3292
3293 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
3294                                   struct hda_codec *codec,
3295                                   unsigned int stream_tag,
3296                                   unsigned int format,
3297                                   struct snd_pcm_substream *substream)
3298 {
3299         int err;
3300
3301         err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
3302                                                 format, substream);
3303         if (err < 0)
3304                 return err;
3305
3306         /* notify the HDMI codec of the format change */
3307         tegra_hdmi_set_format(codec, format);
3308
3309         return 0;
3310 }
3311
3312 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3313                                   struct hda_codec *codec,
3314                                   struct snd_pcm_substream *substream)
3315 {
3316         /* invalidate the format in the HDMI codec */
3317         tegra_hdmi_set_format(codec, 0);
3318
3319         return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3320 }
3321
3322 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3323 {
3324         struct hdmi_spec *spec = codec->spec;
3325         unsigned int i;
3326
3327         for (i = 0; i < spec->num_pins; i++) {
3328                 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3329
3330                 if (pcm->pcm_type == type)
3331                         return pcm;
3332         }
3333
3334         return NULL;
3335 }
3336
3337 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3338 {
3339         struct hda_pcm_stream *stream;
3340         struct hda_pcm *pcm;
3341         int err;
3342
3343         err = generic_hdmi_build_pcms(codec);
3344         if (err < 0)
3345                 return err;
3346
3347         pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3348         if (!pcm)
3349                 return -ENODEV;
3350
3351         /*
3352          * Override ->prepare() and ->cleanup() operations to notify the HDMI
3353          * codec about format changes.
3354          */
3355         stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3356         stream->ops.prepare = tegra_hdmi_pcm_prepare;
3357         stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3358
3359         return 0;
3360 }
3361
3362 static int patch_tegra_hdmi(struct hda_codec *codec)
3363 {
3364         int err;
3365
3366         err = patch_generic_hdmi(codec);
3367         if (err)
3368                 return err;
3369
3370         codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3371
3372         return 0;
3373 }
3374
3375 /*
3376  * ATI/AMD-specific implementations
3377  */
3378
3379 #define is_amdhdmi_rev3_or_later(codec) \
3380         ((codec)->core.vendor_id == 0x1002aa01 && \
3381          ((codec)->core.revision_id & 0xff00) >= 0x0300)
3382 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3383
3384 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3385 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3386 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
3387 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
3388 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
3389 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
3390 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
3391 #define ATI_VERB_SET_HBR_CONTROL        0x77c
3392 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
3393 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
3394 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
3395 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
3396 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
3397 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3398 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
3399 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
3400 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
3401 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
3402 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
3403 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
3404 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
3405 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
3406 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
3407 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
3408 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
3409
3410 /* AMD specific HDA cvt verbs */
3411 #define ATI_VERB_SET_RAMP_RATE          0x770
3412 #define ATI_VERB_GET_RAMP_RATE          0xf70
3413
3414 #define ATI_OUT_ENABLE 0x1
3415
3416 #define ATI_MULTICHANNEL_MODE_PAIRED    0
3417 #define ATI_MULTICHANNEL_MODE_SINGLE    1
3418
3419 #define ATI_HBR_CAPABLE 0x01
3420 #define ATI_HBR_ENABLE 0x10
3421
3422 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3423                            unsigned char *buf, int *eld_size)
3424 {
3425         /* call hda_eld.c ATI/AMD-specific function */
3426         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3427                                     is_amdhdmi_rev3_or_later(codec));
3428 }
3429
3430 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
3431                                         int active_channels, int conn_type)
3432 {
3433         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3434 }
3435
3436 static int atihdmi_paired_swap_fc_lfe(int pos)
3437 {
3438         /*
3439          * ATI/AMD have automatic FC/LFE swap built-in
3440          * when in pairwise mapping mode.
3441          */
3442
3443         switch (pos) {
3444                 /* see channel_allocations[].speakers[] */
3445                 case 2: return 3;
3446                 case 3: return 2;
3447                 default: break;
3448         }
3449
3450         return pos;
3451 }
3452
3453 static int atihdmi_paired_chmap_validate(struct hdac_chmap *chmap,
3454                         int ca, int chs, unsigned char *map)
3455 {
3456         struct hdac_cea_channel_speaker_allocation *cap;
3457         int i, j;
3458
3459         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3460
3461         cap = snd_hdac_get_ch_alloc_from_ca(ca);
3462         for (i = 0; i < chs; ++i) {
3463                 int mask = snd_hdac_chmap_to_spk_mask(map[i]);
3464                 bool ok = false;
3465                 bool companion_ok = false;
3466
3467                 if (!mask)
3468                         continue;
3469
3470                 for (j = 0 + i % 2; j < 8; j += 2) {
3471                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3472                         if (cap->speakers[chan_idx] == mask) {
3473                                 /* channel is in a supported position */
3474                                 ok = true;
3475
3476                                 if (i % 2 == 0 && i + 1 < chs) {
3477                                         /* even channel, check the odd companion */
3478                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3479                                         int comp_mask_req = snd_hdac_chmap_to_spk_mask(map[i+1]);
3480                                         int comp_mask_act = cap->speakers[comp_chan_idx];
3481
3482                                         if (comp_mask_req == comp_mask_act)
3483                                                 companion_ok = true;
3484                                         else
3485                                                 return -EINVAL;
3486                                 }
3487                                 break;
3488                         }
3489                 }
3490
3491                 if (!ok)
3492                         return -EINVAL;
3493
3494                 if (companion_ok)
3495                         i++; /* companion channel already checked */
3496         }
3497
3498         return 0;
3499 }
3500
3501 static int atihdmi_pin_set_slot_channel(struct hdac_device *hdac,
3502                 hda_nid_t pin_nid, int hdmi_slot, int stream_channel)
3503 {
3504         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3505         int verb;
3506         int ati_channel_setup = 0;
3507
3508         if (hdmi_slot > 7)
3509                 return -EINVAL;
3510
3511         if (!has_amd_full_remap_support(codec)) {
3512                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3513
3514                 /* In case this is an odd slot but without stream channel, do not
3515                  * disable the slot since the corresponding even slot could have a
3516                  * channel. In case neither have a channel, the slot pair will be
3517                  * disabled when this function is called for the even slot. */
3518                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3519                         return 0;
3520
3521                 hdmi_slot -= hdmi_slot % 2;
3522
3523                 if (stream_channel != 0xf)
3524                         stream_channel -= stream_channel % 2;
3525         }
3526
3527         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3528
3529         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3530
3531         if (stream_channel != 0xf)
3532                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3533
3534         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3535 }
3536
3537 static int atihdmi_pin_get_slot_channel(struct hdac_device *hdac,
3538                                 hda_nid_t pin_nid, int asp_slot)
3539 {
3540         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3541         bool was_odd = false;
3542         int ati_asp_slot = asp_slot;
3543         int verb;
3544         int ati_channel_setup;
3545
3546         if (asp_slot > 7)
3547                 return -EINVAL;
3548
3549         if (!has_amd_full_remap_support(codec)) {
3550                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3551                 if (ati_asp_slot % 2 != 0) {
3552                         ati_asp_slot -= 1;
3553                         was_odd = true;
3554                 }
3555         }
3556
3557         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3558
3559         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3560
3561         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3562                 return 0xf;
3563
3564         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3565 }
3566
3567 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(
3568                 struct hdac_chmap *chmap,
3569                 struct hdac_cea_channel_speaker_allocation *cap,
3570                 int channels)
3571 {
3572         int c;
3573
3574         /*
3575          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3576          * we need to take that into account (a single channel may take 2
3577          * channel slots if we need to carry a silent channel next to it).
3578          * On Rev3+ AMD codecs this function is not used.
3579          */
3580         int chanpairs = 0;
3581
3582         /* We only produce even-numbered channel count TLVs */
3583         if ((channels % 2) != 0)
3584                 return -1;
3585
3586         for (c = 0; c < 7; c += 2) {
3587                 if (cap->speakers[c] || cap->speakers[c+1])
3588                         chanpairs++;
3589         }
3590
3591         if (chanpairs * 2 != channels)
3592                 return -1;
3593
3594         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3595 }
3596
3597 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct hdac_chmap *hchmap,
3598                 struct hdac_cea_channel_speaker_allocation *cap,
3599                 unsigned int *chmap, int channels)
3600 {
3601         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3602         int count = 0;
3603         int c;
3604
3605         for (c = 7; c >= 0; c--) {
3606                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3607                 int spk = cap->speakers[chan];
3608                 if (!spk) {
3609                         /* add N/A channel if the companion channel is occupied */
3610                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3611                                 chmap[count++] = SNDRV_CHMAP_NA;
3612
3613                         continue;
3614                 }
3615
3616                 chmap[count++] = snd_hdac_spk_to_chmap(spk);
3617         }
3618
3619         WARN_ON(count != channels);
3620 }
3621
3622 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3623                                  bool hbr)
3624 {
3625         int hbr_ctl, hbr_ctl_new;
3626
3627         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3628         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3629                 if (hbr)
3630                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3631                 else
3632                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3633
3634                 codec_dbg(codec,
3635                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3636                                 pin_nid,
3637                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
3638                                 hbr_ctl_new);
3639
3640                 if (hbr_ctl != hbr_ctl_new)
3641                         snd_hda_codec_write(codec, pin_nid, 0,
3642                                                 ATI_VERB_SET_HBR_CONTROL,
3643                                                 hbr_ctl_new);
3644
3645         } else if (hbr)
3646                 return -EINVAL;
3647
3648         return 0;
3649 }
3650
3651 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3652                                 hda_nid_t pin_nid, u32 stream_tag, int format)
3653 {
3654
3655         if (is_amdhdmi_rev3_or_later(codec)) {
3656                 int ramp_rate = 180; /* default as per AMD spec */
3657                 /* disable ramp-up/down for non-pcm as per AMD spec */
3658                 if (format & AC_FMT_TYPE_NON_PCM)
3659                         ramp_rate = 0;
3660
3661                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3662         }
3663
3664         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3665 }
3666
3667
3668 static int atihdmi_init(struct hda_codec *codec)
3669 {
3670         struct hdmi_spec *spec = codec->spec;
3671         int pin_idx, err;
3672
3673         err = generic_hdmi_init(codec);
3674
3675         if (err)
3676                 return err;
3677
3678         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3679                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3680
3681                 /* make sure downmix information in infoframe is zero */
3682                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3683
3684                 /* enable channel-wise remap mode if supported */
3685                 if (has_amd_full_remap_support(codec))
3686                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3687                                             ATI_VERB_SET_MULTICHANNEL_MODE,
3688                                             ATI_MULTICHANNEL_MODE_SINGLE);
3689         }
3690
3691         return 0;
3692 }
3693
3694 static int patch_atihdmi(struct hda_codec *codec)
3695 {
3696         struct hdmi_spec *spec;
3697         struct hdmi_spec_per_cvt *per_cvt;
3698         int err, cvt_idx;
3699
3700         err = patch_generic_hdmi(codec);
3701
3702         if (err)
3703                 return err;
3704
3705         codec->patch_ops.init = atihdmi_init;
3706
3707         spec = codec->spec;
3708
3709         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
3710         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
3711         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
3712         spec->ops.setup_stream = atihdmi_setup_stream;
3713
3714         spec->chmap.ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
3715         spec->chmap.ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
3716
3717         if (!has_amd_full_remap_support(codec)) {
3718                 /* override to ATI/AMD-specific versions with pairwise mapping */
3719                 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3720                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
3721                 spec->chmap.ops.cea_alloc_to_tlv_chmap =
3722                                 atihdmi_paired_cea_alloc_to_tlv_chmap;
3723                 spec->chmap.ops.chmap_validate = atihdmi_paired_chmap_validate;
3724         }
3725
3726         /* ATI/AMD converters do not advertise all of their capabilities */
3727         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
3728                 per_cvt = get_cvt(spec, cvt_idx);
3729                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
3730                 per_cvt->rates |= SUPPORTED_RATES;
3731                 per_cvt->formats |= SUPPORTED_FORMATS;
3732                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
3733         }
3734
3735         spec->chmap.channels_max = max(spec->chmap.channels_max, 8u);
3736
3737         return 0;
3738 }
3739
3740 /* VIA HDMI Implementation */
3741 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
3742 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
3743
3744 static int patch_via_hdmi(struct hda_codec *codec)
3745 {
3746         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
3747 }
3748
3749 /*
3750  * patch entries
3751  */
3752 static const struct hda_device_id snd_hda_id_hdmi[] = {
3753 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI",       patch_atihdmi),
3754 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI",       patch_atihdmi),
3755 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI",   patch_atihdmi),
3756 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI",        patch_atihdmi),
3757 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI",     patch_generic_hdmi),
3758 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI",     patch_generic_hdmi),
3759 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI",    patch_generic_hdmi),
3760 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3761 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3762 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3763 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3764 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI",    patch_nvhdmi_8ch_7x),
3765 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP",   patch_nvhdmi),
3766 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP",   patch_nvhdmi),
3767 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI",       patch_nvhdmi),
3768 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP",   patch_nvhdmi),
3769 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP",   patch_nvhdmi),
3770 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP",   patch_nvhdmi),
3771 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP",   patch_nvhdmi),
3772 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP",   patch_nvhdmi),
3773 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP",   patch_nvhdmi),
3774 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP",   patch_nvhdmi),
3775 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP",   patch_nvhdmi),
3776 /* 17 is known to be absent */
3777 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP",   patch_nvhdmi),
3778 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP",   patch_nvhdmi),
3779 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP",   patch_nvhdmi),
3780 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP",   patch_nvhdmi),
3781 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP",   patch_nvhdmi),
3782 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI",     patch_tegra_hdmi),
3783 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI",    patch_tegra_hdmi),
3784 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI",    patch_tegra_hdmi),
3785 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
3786 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP",   patch_nvhdmi),
3787 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP",   patch_nvhdmi),
3788 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP",   patch_nvhdmi),
3789 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP",   patch_nvhdmi),
3790 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP",   patch_nvhdmi),
3791 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP",   patch_nvhdmi),
3792 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP",   patch_nvhdmi),
3793 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI",       patch_nvhdmi_2ch),
3794 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP",   patch_nvhdmi),
3795 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP",   patch_nvhdmi),
3796 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP",   patch_nvhdmi),
3797 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP",   patch_nvhdmi),
3798 HDA_CODEC_ENTRY(0x10de0080, "GPU 80 HDMI/DP",   patch_nvhdmi),
3799 HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP",   patch_nvhdmi),
3800 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP",   patch_nvhdmi),
3801 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI",       patch_nvhdmi_2ch),
3802 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP",    patch_via_hdmi),
3803 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP",    patch_via_hdmi),
3804 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP",     patch_generic_hdmi),
3805 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP",     patch_generic_hdmi),
3806 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
3807 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI",    patch_generic_hdmi),
3808 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI",     patch_generic_hdmi),
3809 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI",   patch_generic_hdmi),
3810 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
3811 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_i915_cpt_hdmi),
3812 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_i915_cpt_hdmi),
3813 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI",     patch_i915_hsw_hdmi),
3814 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI",   patch_i915_hsw_hdmi),
3815 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI",     patch_i915_hsw_hdmi),
3816 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI",     patch_i915_hsw_hdmi),
3817 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI",    patch_i915_hsw_hdmi),
3818 HDA_CODEC_ENTRY(0x8086280d, "Geminilake HDMI",  patch_i915_glk_hdmi),
3819 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI",  patch_generic_hdmi),
3820 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi),
3821 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI",    patch_i915_byt_hdmi),
3822 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI",   patch_generic_hdmi),
3823 /* special ID for generic HDMI */
3824 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
3825 {} /* terminator */
3826 };
3827 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
3828
3829 MODULE_LICENSE("GPL");
3830 MODULE_DESCRIPTION("HDMI HD-audio codec");
3831 MODULE_ALIAS("snd-hda-codec-intelhdmi");
3832 MODULE_ALIAS("snd-hda-codec-nvhdmi");
3833 MODULE_ALIAS("snd-hda-codec-atihdmi");
3834
3835 static struct hda_codec_driver hdmi_driver = {
3836         .id = snd_hda_id_hdmi,
3837 };
3838
3839 module_hda_codec_driver(hdmi_driver);